JP3794088B2 - Process input / output device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for duplicating a process input / output device that directly interfaces to a controller of a distributed control system via an IO link.
[0002]
[Prior art]
A conventional distributed control system is configured as shown in FIG. In the figure, 1 is a man-machine interface device, 2 is a control LAN, and 31 to 3n are controllers. As shown in this figure, the distributed control system is configured by connecting a plurality of distributed controllers (several dozens in the case of large scale) 31 to 3n through a control LAN 2, and connecting them to one or several man machines. This is a system managed by the interface device 1. FIG. 19 shows a configuration example of the controllers 31 to 3n in FIG. In FIG. 19, 4 is a control MPU, 5 is an IO link, and 61 to 6n are process input / output devices.
[0003]
The control MPU 4 performs calculations for process control, and exchanges data with a plurality of (for example, 32) process input / output devices 61 to 6n that are installed in a distributed manner via the IO link 5. The process input / output devices 61 to 6n are connected to various sensors and actuators of the process, and convert an analog amount of the process into a digital amount that can be calculated by the control MPU 4. These controllers 31 to 3n are generally required to have high reliability. In order to improve reliability, the controllers 31 to 3n may be duplicated as shown in FIG. In the figure, 4A and 4B are control MPUs, 5A and 5B are IO links, and 61 to 6n are process input / output devices. Here, the control MPUs 4A and 4B and the IO links 5A and 5B are duplexed, and the process input / output devices 61 to 6n are connected to the IO links 5A and 5B, respectively.
[0004]
FIG. 21 shows a configuration example of the process input / output devices 61 to 6n corresponding to the duplication of the control MPUs 4A and 4B and the IO links 5A and 5B. In the figure, 5A and 5B are IO links, 7A and 7B are transmission control modules, 8 is an IO bus, and 91 to 9n are IO modules. Here, the transmission control modules 7A and 7B interface with the IO links 5A and 5B and the IO bus 8, and relay data exchange between the control MPUs 4A and 4B and the IO modules 91 to 9n. On the other hand, the IO modules 91 to 9n directly interface with the process, and convert analog quantities and digital quantities. In the example of FIG. 21, the transmission control modules 7A and 7B are duplexed in correspondence with the duplexing of the control MPUs 4A and 4B and the IO links 5A and 5B, and switching between operation / standby of the control MPUs 4A and 4B and the IO links 5A and 5B is performed. Correspondingly, the transmission control modules 7A and 7B are switched.
[0005]
[Problems to be solved by the invention]
However, these conventional techniques have the following problems.
(1) Although the transmission control module in FIG. 21 is duplexed, the IO module is not duplexed. Therefore, when an abnormality occurs in any IO module, monitoring and control of the process connected to the IO module becomes impossible, which may be a major drawback depending on the system.
(2) Similarly, the IO bus is not duplicated. For this reason, when an abnormality occurs in the IO bus, all the IO modules connected to the IO bus become unusable, which may be a major drawback depending on the system.
[0006]
[Means for Solving the Problems]
  In order to solve the above problem, the invention of claim 1,
  A duplexed transmission control module called active side and standby side connected to the IO link to communicate with the control MPU;
  A duplexed IO bus connected to one transmission control module with two wires, and also connected to the other transmission control module with two wires;
  An IO module for output of a duplexed pair of an operating side and a standby side, which is connected to each of the duplexed IO buses and processes, and can be switched by an operation / standby switching circuit,
  An IO module for input of a duplexed pair of an active side and a standby side that is connected to each of the duplexed IO buses and processes and is switchable by an operation / standby switching circuit;
  A process input / output device comprising:
  In a duplexed pair transmission control module, the standby transmission control module operates as a slave of the IO bus accessed by the active transmission control module, and the active transmission control module waits via the IO bus accessed. The necessary data is sent to the transmission control module to equalize the data between the active and standby transmission control modules.
  The output IO module of the duplexed pair of the operating side and the standby side both processes the signal transmitted from the duplexed IO bus, and only the output IO module on the operating side outputs to the process,
  The duplex pair input IO module of the active side and the standby side both processes the input from the process, and outputs both to the duplex pair transmission control module via the duplex IO bus, thereby outputting the duplex pair transmission control module. Outputs only the output from the operating IO module to the control MPU.
  The process input / output device is characterized by that.
[0007]
  The invention of claim 2,
  The process input / output device according to claim 1.
  One slot for mounting one IO module;
  An IO shelf that accommodates multiple slots;
  With
  A process input / output apparatus is characterized in that a series of slot numbers are assigned to the plurality of slots while continuing in the slots of the IO module of the duplex pair of operating side and standby side.
[0008]
  The invention of claim 3,
  The process input / output device according to claim 2,
  Each of the transmission control module and the IO module includes transmission control means configured by hardware,
  These transmission control means equalize the data sent to each duplex pair of the IO modules, and perform the data transmission in the order of the slot numbers.
[0009]
  The invention of claim 4,
  In the process input / output device according to claim 2 or 3,
  The process input / output device is characterized in that the slot in which the IO module is mounted is divided into two by the odd and even slot numbers, and one of the IO modules is set to operate and the other is set to standby when the power is turned on.
[0010]
  The invention of claim 5,
  The process input / output device according to any one of claims 2 to 4,
  A process input / output device characterized in that setting means for duplicating each IO module in a duplex pair unit is provided for each IO module.
[0011]
  The invention of claim 6,
  The process input / output device according to any one of claims 2 to 4,
  The process input / output device is characterized in that setting means for duplexing each IO module in a duplex pair unit is provided on the IO shelf.
[0012]
  The invention of claim 7,
  The process input / output device according to any one of claims 2 to 4,
  The switch for operation / standby switching is installed for each IO module, and the operation of this switch is detected by each IO module, and the operation / standby setting is switched between the IO modules in a duplex pair. Process input / output device.
[0013]
  The invention of claim 8,
  The process input / output device according to any one of claims 2 to 4,
  An operation / standby switching switch is installed for each transmission control module, the operation of this switch is detected by each transmission control module, and then a switching command is sent from the transmission control module to each IO module via the IO bus. Thus, the process input / output device is characterized in that operation / standby between each IO module is switched in units of IO shelves.
[0014]
  The invention of claim 9,
  The process input / output device according to any one of claims 2 to 4,
  An operation / standby switching switch is installed on the IO shelf, the operation of this switch is detected by the transmission control module, and then a switching command is sent from the transmission control module to each IO module via the IO bus. A process input / output device characterized in that operation / standby between IO modules is switched in units of IO shelves.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows a first embodiment of a method for duplicating a process input / output device according to the present invention. In the figure, reference numeral 61 denotes an IO shelf, which has mounting slots for mounting two transmission control modules 7A and 7B and 16 IO modules 91A, 91B to 98A and 98B. One process input / output device is configured.
[0017]
5A and 5B are IO links, and 8A and 8B are IO buses. The IO modules 91A, 91B to 98A and 98B in the figure have slot numbers 00, 01, 02 and 03,. Are duplicated by mounting the same type of IO modules 91, 92,... 98 for each pair of A and B. One pair of IO modules A and B is active and the other is standby, and both are connected to the process. The input signal from the process is input to both operation and standby, and only the operation side outputs the signal to the process.
[0018]
Next, an example of signal output to the process will be described with reference to FIG. FIG. 2 is an example of duplex analog output modules, in which 101A and 101B are IO bus interfaces, 102A and 102B are microprocessors, 103A and 103B are DA converters, 104A and 104B are operation / standby control signals, 105A and 105B are operation / standby switching circuits, 106A and 106B are output switching signals, and 107A and 107B are output switching switches.
[0019]
The duplex pair analog output modules 91A and 91B receive the same digital output value from the transmission control modules 7A and 7B via the IO buses 8A and 8B. The duplex pair analog output modules 91A and 91B perform DA conversion and generate the same analog output value, but output to the process is determined by the operation / standby switching circuits 105A and 105B. Only. In other words, the operation / standby of the analog output modules 91A, 91B is determined by the operation / standby switching circuits 105A, 105B, and one of the output changeover switches 107A, 107B on the operation module side is turned on by the output switching signals 106A, 106B. Become.
[0020]
As described above, the standby side module always generates the same analog output value as that of the operating side, and when an abnormality occurs on the operating side, the operating / standby switching circuits 105A and 105B operate and the standby side The module becomes active and continues to output to the process. The abnormality on the operating side is a periodic self-diagnosis abnormality such as a readback check error of the IO buses 8A and 8B, an analog output readback check error, or a processor abnormality (= watchdog timer overflow).
Next, an example of signal input from the process will be described with reference to FIG.
[0021]
FIG. 3 shows an example of duplex analog input modules. In the figure, 103A and 103B are AD conversion circuits, 108A and 108B are constant current circuits, and the others are the same as FIG. An analog input signal from the process in the figure is input to both of the analog input module pairs 92A and 92B and AD-converted. Here, for example, when a constant current for measurement is required on the process side, such as a thermocouple input, only the operating side module determined by the operation / standby switching circuits 105A and 105B supplies the constant current. To do. In this way, the analog input module pair always generates the same digital value, and the transmission control module reads these digital values via the IO buses 8A and 8B, and controls only the digital values of the active module via the IO link. Transmit to MPU.
[0022]
Next, a second embodiment will be described. FIG. 4 shows a second embodiment, in which 7A is a transmission control module, 8A and 8B are IO buses, and 91A and 91B are duplexed pair IO modules (analog output modules). The transmission control module 7A receives output data (digital value) from the control MPU 4A via the IO link 5A. In this case, for example, if there are 16 IO module mounting slots in the IO shelf and all of them are duplicated by the output modules, the control MPU 4A always transmits the digital data for 8 sheets at a constant cycle. It will be transmitted to 7A.
[0023]
The microprocessor 73A of the transmission control module 7A that receives them expands the received data to 16 pieces so that the received data becomes the same data for the duplexed pair, stores them in the memory 72A in the order of the slot numbers, and stores them in the IO bus master control unit. 71A is started. The IO buses 8A and 8B are high-speed serial master / slave buses, and the IO bus master control unit 71A is digitally arranged in the slot number order in conjunction with the IO bus slave control units 100A and 100B of the analog output modules 91A and 91B. Data is transferred to the memories 109A and 109B.
[0024]
The data flow at this time is shown in FIG. Here, if the transmission speed of the IO buses 8A and 8B is about 2 Mbps, and data transmission is performed by hardware as described above, data equalization between the analog output modules 91A and 91B duplexed between adjacent slots is performed. The delay time can be made within several tens of μs. Further, the analog output modules 91A and 91B of the duplexed pair receive the same data and perform the same operation (DA conversion, etc.), so that the synchronization delay time is regarded as substantially the equalization delay time. be able to.
[0025]
Next, a third embodiment will be described. FIG. 6 shows the third embodiment, and the configuration of each part is the same as that in FIG. 1, but duplex setting is performed between the transmission control modules 7A and 7B of the duplex pair and between the IO modules 91A, 91B to 98A and 98B. In addition, an operation / standby switching signal D is connected. A specific example of the operation / standby switching circuit operated by the switching signal D is shown in FIG. 7, and a time chart thereof is shown in FIG. Although FIG. 7 shows the IO modules 91A and 91B, the transmission control modules 7A and 7B are configured in substantially the same manner.
[0026]
The * MSTC signal in FIG. 7 is an operation / standby control signal controlled by the microprocessors 102A and 102B of the IO modules 91A and 91B, and the * WDTE signal is a watchdog realized by the hardware of the IO modules 91A and 91B. This is an overflow signal of the timer monitoring circuits 129A and 129B and is input to the OR gates 110A and 110B, respectively. The * RST signal is a reset signal generated by the reset pulse generation circuits 111A and 111B of the IO modules 91A and 91B when the power is turned on, and is input to the JK / FFs 112A, 112B, 113A, and 113B.
[0027]
SLT0 and SLT1 are signals indicating slot numbers in which the IO modules 91A and 91B are mounted. The predetermined pins of the IO module connection connectors 120A and 120B installed on the motherboard of the IO shelf 61 are set to 0V. Or is pulled up to + 5V and set for each mounting position. In the illustrated example, there are two signal lines for recognizing the slot number. However, when the number of slots of the IO shelf 61 is 16, four signal lines are required. FIG. 7 shows a case where the number of slots is 4 and the number of signal lines is 2 as a simple example.
[0028]
Next, the operation of this circuit will be described with reference to the time chart of FIG. After power is turned on to the IO modules 91A and 91B and the reset signal * RST is released, the microprocessors 102A and 102B of the IO modules 91A and 91B recognize the slot numbers. In the case of the IO module 91A, the slot numbers are even numbers ( In the illustrated example, since SLT0 = "0" and SLT1 = "0"), the * MSTC signal is immediately set to High (= "1"). In the case of the IO module 91B, since the slot number is an odd number (in the example shown, SLT0 = "1", SLT1 = "0"), the * MSTC signal is set to High (= "1") after 100 ms.
[0029]
At this time, the time difference between the IO modules 91A and 91B after the power is turned on until the reset signal * RST is released (= “1”) is set to be within 20 ms. At this time, it is assumed that the watchdog timer has not overflowed. As described above, from the time chart of FIG. 8, it can be seen that the IO module mounted in the slot with an even slot number always operates when the power is turned on, due to the time difference of outputting the * MSTC signal. Next, FIG. 9 shows a time chart when switching between operation / standby due to an abnormality on the operation side while the IO module pair is operating in operation / standby.
[0030]
FIG. 9 shows an example of switching between operation / standby by controlling the * MSTC signal. 7 and 9, when the * MSTC signal is inverted to L in the IO module 91A on the operating side, the MSTS signal output from the JK / FF 112A also becomes L, and is input to the NAND gate 114A, and the signal D is set to H Invert. The signal D is sent to the connection connector 120B of the other IO module 91B via the connection connector 120A. Next, the M / S signal in the IO module 91B to which the signal D is input is inverted to H level and is input to the microprocessor 102B to switch the IO module 91B to the operating state, although not shown.
[0031]
In the IO module 91A, after the signal D is inverted to H, the M / S signal is inverted to L level, and is input to the microprocessor 102A to be switched to the standby state. The same applies to the * WDTE signal, but in the case of the * WDTE signal, the microprocessor is not involved and the operation / standby switching is performed directly by hardware. Such an operation / standby switching circuit can also be used for setting whether to use an IO module in a single or duplex manner. In other words, if the IO module pair operation / standby switching circuits are connected, the connection is duplicated, and if the IO module pair is opened, the connection is single.
[0032]
Next, a fourth embodiment will be described. FIG. 10 shows a fourth embodiment, and the basic configuration is the same as FIG. In this embodiment, setting pins 121A and 121B are provided in the output part of the operation / standby switching signal of the IO modules 91A and 91B. If both the setting pins 121A and 121B are connected, the setting is duplicated, which is the same as in FIG. On the other hand, if both the setting pins 121A and 121B are opened, the setting is single.
[0033]
This embodiment has an advantage that the setting of single / duplex IO modules can be set for each IO module pair, but there is also a risk of causing a malfunction due to a setting error. That is, even if this setting pin is connected to only one of the IO module pairs, it is a single operation and is not duplicated. In order to avoid these malfunctions, the duplex / single setting, that is, whether to use the operation / standby switching circuit, may be set on the IO shelf. That is, malfunctions can be eliminated by preparing two types of IO shelves for single use and duplex use.
[0034]
Next, a fifth embodiment will be described. FIG. 11 shows a fifth embodiment, and the basic configuration is the same as FIG. This embodiment is an example of an IO shelf 61 in the case where an IO module is used as a single, and only one pair of IO modules is shown in the figure, and the signal line D in FIG. 7 is deleted. The method of this embodiment has a drawback that the IO modules 91A and 91B can be set to single / duplex only in units of IO shelves, but since the setting pins are eliminated, there is no risk of malfunction due to erroneous settings. . Also, the setting work for setting pins is not required. In order for the transmission control module to know the operation state of the IO module, one of the following two methods may be used corresponding to the two embodiments described above.
[0035]
When setting operation / standby for each IO module pair, the transmission control module reads the operation / standby state of the IO module via the IO bus, so that the single / duplex setting state of the IO module can be known. . That is, at the time of power-on, a single operation is performed when both IO modules of even / odd adjacent slot numbers are operating, and a duplex operation is performed when one is operating and the other is standby. In addition, when the IO module is set for single / duplex in units of IO shelves, the connection connector of the transmission control module on the IO shelf is provided with a single / duplex setting terminal, and in the case of the IO shell for duplexing, the terminal. May be short-circuited to 0V and pulled up to + 5V in the case of single use so that the processor of the transmission control module recognizes it.
[0036]
Next, a sixth embodiment will be described. FIG. 12 shows a sixth embodiment. The basic configuration is the same as that in FIG. 7, and switches SWA and SWB that can be recognized by the microprocessors 102A and 102B are added to the configuration in FIG. As described so far, as for the IO modules 91A and 91B of the duplex pair, the modules mounted in the even slots of the slot numbers on the IO shelf 61 are in operation when the power is turned on. The IO modules 91A and 91B are provided with LEDs for displaying operation / standby (not shown), and as illustrated in FIG. 1, the operation of the module group on the left side when viewed from the insertion direction of the IO module pair. The display LEDs light up all at once.
[0037]
If any IO module fails during operation in such a state, for example, only one pair of 8 pairs of IO modules on one IO shelf lights up the operation indicator LED on the right module as viewed from the insertion direction. It will be in the state. Even after replacing the failed module with a non-defective product, this state does not change. This state is normal for the system. However, if both IO module pairs are normal, the system will be Confirmation is easy for maintenance. This is in response to a user request for intentionally switching between operation and standby after replacing a failed module with a non-defective product.
[0038]
The switches SWA and SWB in FIG. 12 are provided to intentionally return the operating / standby state to the same state immediately after the power is turned on after replacing the failed module with a non-defective product. That is, in FIG. 12, when the IO module 91B is in operation and the IO module 91A is on standby, if the switch SWB is operated, the microprocessor of the IO module 91B recognizes this and resets the * MSTC signal (= “0”). As a result, the IO module 91A can be put into operation while the IO module 91B is on standby. In this embodiment, replacement of a faulty module with a non-defective product is also possible with a live line. Note that the method of this embodiment requires a switch for switching between operation / standby for each IO module, which increases the cost.
[0039]
Next, a seventh embodiment will be described. FIG. 13 shows a seventh embodiment, the basic configuration is the same as that in FIG. 6, and switches SWA and SWB are added to the transmission control modules 7A and 7B in FIG. These switches SWA and SWB are switches for operation / standby switching, and the transmission control module switches operation / standby of the IO module pair via the IO bus by operating the switch of the transmission control module on the operation side. . The operation / standby state of the transmission control module is indicated by an LED on the front surface of the module.
[0040]
As described above, the transmission control module always keeps track of the operating / standby state of the IO module, and when the switch is operated, both IO module pairs are normal and the IO module is mounted in an odd slot number. Only when is operating, an operation / standby switching command is transmitted to the IO module via the IO bus. The IO module that has received the command switches the operation / standby by controlling the * MSTC signal. In FIG. 12, for example, 16 switches are required for 8 pairs of IO modules, but in the case of FIG. 13, only 2 switches are required.
[0041]
Next, an eighth embodiment will be described. FIG. 14 shows an eighth embodiment. In this embodiment, one switch SW is prepared on the IO shelf 61, and this is connected to a processor (not shown) in the transmission control modules 7A and 7B via the mounting connector of the transmission control modules 7A and 7B on the IO shelf 61. Connect to When this switch SW is operated, the processors of the transmission control modules 7A and 7B recognize this, and operate / standby to the IO modules 91A, 91B to 98A and 98B via the IO buses 8A and 8B as in the case of FIG. The switching command is sent. At this time, the switch operation is recognized by the processors of both the active / standby transmission control modules 7A and 7B, but only the transmission control module on the active side transmits a command to the IO modules 91A, 91B to 98A, 98B. It is. The IO modules 91A, 91B to 98A, 98B that have received the command control the * MSTC signal to switch between operation and standby.
[0042]
Next, a ninth embodiment will be described. FIG. 15 shows a ninth embodiment, in which 7A and 7B are transmission control module pairs, 8A and 8B are IO buses, and 91A and 91B are IO module pairs. In this illustrated example, only one IO module pair is shown. TR is an IO bus driver / receiver, and XC is an IO bus transmission control LSI. The IO bus is duplicated, and both the transmission control module and the IO module have two drivers / receivers in the IO bus interface unit.
[0043]
In this embodiment, the operation / standby switching method is the same as the IO module switching method of each embodiment described above. In FIG. 15, the operating side of the duplexed pair of transmission control modules 7A and 7B exchanges data with the IO modules 91A and 91B using one of the duplexed IO buses 8A and 8B. At this time, the transmission control modules 7A and 7B are masters and the IO modules 91A and 91B are slaves. The IO modules 91A and 91B respond to the polling access of the transmission control modules 7A and 7B, and when the operation / standby of the transmission control modules 7A and 7B of the duplex pair is switched, the accessed IO buses 8A and 8B are also switched. It will be.
[0044]
That is, the IO modules 91A and 91B detect which of the IO buses 8A and 8B is accessed, and respond to the accessed IO buses 8A and 8B. FIG. 16 shows a detailed block diagram of the IO bus interface unit of the IO modules 91A and 91B. The response operation of the IO modules 91A and 91B will be described. First, the microprocessor 142 of the IO module sets the two drivers / receivers 146A and 146B to the receive state at all times, and the IO bus 8A, When accessed by any of 8B, it is detected by carrier detection circuits 145A and 145B.
[0045]
The IO buses 8A and 8B are high-speed serial buses as described above. Further, since the carrier detection circuits 145A and 145B can be easily configured with a general counter, a specific internal configuration is not shown, but the serial pulses transmitted from the transmission control module are counted, and predetermined pulses are counted. At the time, the latch signals LA and LB are output. The latch signals LA and LB become gate signals for the transceivers 144A and 144B, and are also input to the microprocessor 142 as status signals. For example, if it is now accessed from the IO bus 8A, the output LA of the carrier detection circuit 145A becomes valid and the gate of the transceiver 144A is driven.
[0046]
The signal of the IO bus 8A is input to the transmission control LSI 143 via the driver / receiver 146A and the transceiver 144A, and the transmission data is stored in the memory 141. The microprocessor 142 decodes this and returns response data to the transmission control module. In this case, since the status signal LA is valid, the driver / receiver 146A side is set to the drive state, and the transmission control LSI 143 is activated. Response data on the memory 141 is transmitted via the IO bus 8A. After the transmission is completed, the carrier detection circuit 145A is reset, the status signal LA is invalidated, and the drivers / receivers 146A and 146B are set to the receive state again.
[0047]
Next, a tenth embodiment will be described. FIG. 17 shows a tenth embodiment. In the figure, the transmission control modules 7A and 7B are a duplex pair, and the transmission control modules 7A and 7B are also mounted on the motherboard of the IO shelf in the same manner as the IO module. Is set in Now, assume that the transmission control module 7A is mounted in an even slot and the transmission control module 7B is mounted in an odd slot. When the power is turned on in this state, the operation / standby is determined between the transmission control modules 7A and 7B. In this case, as described above, the transmission control module 7A is activated.
[0048]
At this time, the transmission control module 7A enables the driver / receiver 151 and exchanges data with the IO module using the IO bus 8A. If any abnormality occurs in the transmission control module 7A, the transmission control module 7B is activated and the transmission control module 7A is in standby by the operation / standby switching circuit described above. And data exchange with the IO module is performed using the IO bus 8B.
[0049]
Next, an eleventh embodiment of the duplex process input / output device will be described with reference to FIG. When the transmission control module 7A is activated when the power is turned on, the transmission control module 7B also enables the driver / receiver 153. However, in this case, since the transmission control module 7B is in a standby state, it operates as a slave of the IO bus 8A. The transmission control module 7A operates as a master of the IO bus 8A, transmits necessary data to the transmission control module 7B, and equalizes the data.
[0050]
When the transmission control module 7A has some abnormality, the operation / standby is replaced. However, when the transmission control module 7A is replaced with a non-defective product, the transmission control module 7A starts up in a standby state. The driver / receiver 152 is enabled, the transmission control module 7A operates as a slave of the IO bus 8B, and data equalization is performed from the transmission control module 7B to the transmission control module 7A.
[0051]
【The invention's effect】
As described above, according to the present invention, in the process input / output device connected to the control MPU by the IO link, the IO module and the IO bus are duplicated, so that the process from the control MPU to the process in the controller can be performed. Can be completely duplicated, and the reliability of the process control system can be further improved.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram showing a configuration and operation of a first exemplary embodiment of the present invention.
2 is an enlarged view of a main part of FIG.
FIG. 3 is an enlarged view showing a main part of FIG. 1;
FIG. 4 is an explanatory diagram showing a configuration and operation of a second exemplary embodiment of the present invention.
FIG. 5 is an explanatory diagram showing a data flow in FIG. 4;
FIG. 6 is an explanatory diagram showing the configuration and operation of a third embodiment of the present invention.
7 is an enlarged view of a main part of FIG.
FIG. 8 is a time chart showing the operation of FIG. 6;
FIG. 9 is a time chart showing the operation of FIG. 6;
FIG. 10 is an explanatory diagram showing the configuration and operation of a fourth embodiment of the present invention.
FIG. 11 is an explanatory diagram showing a configuration and operation of a fifth exemplary embodiment of the present invention.
FIG. 12 is an explanatory diagram showing the configuration and operation of a sixth embodiment of the present invention.
FIG. 13 is an explanatory diagram showing a configuration and operation of a seventh exemplary embodiment of the present invention.
FIG. 14 is an explanatory diagram showing the configuration and operation of an eighth embodiment of the present invention.
FIG. 15 is an explanatory diagram showing the configuration and operation of a ninth embodiment of the present invention.
16 is an enlarged view of a main part of FIG.
FIG. 17 is an explanatory diagram showing the configuration and operation of the tenth and eleventh embodiments of the present invention.
FIG. 18 is a diagram illustrating a configuration example of a distributed control system to which the present invention is applied.
FIG. 19 is an enlarged view of a main part of FIG.
FIG. 20 is a diagram illustrating a conventional example.
21 is an enlarged view of a main part of FIG.
[Explanation of symbols]
4A Control MPU
5A, 5B IO link
7A, 7B Transmission control module
8A, 8B IO bus
61 IO shelf
71A IO bus master controller
72A memory
73A Microprocessor
91A, 91B-98A, 98B IO module
100A, 100B IO bus slave controller
101A, 101B IO bus interface
102A, 102B Microprocessor
103A, 103B DA converter / AD converter circuit
104A, 104B Operation / standby control signal
105A, 105B operation / standby switching circuit
106A, 106B Output switching signal
107A, 107B Output changeover switch
108A, 108B Constant current circuit
109A, 109B memory

Claims (9)

A duplexed transmission control module called active side and standby side connected to the IO link to communicate with the control MPU;
A duplexed IO bus connected to one transmission control module with two wires, and also connected to the other transmission control module with two wires;
An IO module for output of a duplexed pair of an operating side and a standby side, which is connected to each of the duplexed IO buses and processes, and can be switched by an operation / standby switching circuit,
An IO module for input of a duplexed pair of an active side and a standby side that is connected to each of the duplexed IO buses and processes and is switchable by an operation / standby switching circuit;
A process input / output device comprising:
In a duplexed pair transmission control module, the standby transmission control module operates as a slave of the IO bus accessed by the active transmission control module, and the active transmission control module waits via the IO bus accessed. The necessary data is sent to the transmission control module to equalize the data between the active and standby transmission control modules.
The output IO module of the duplexed pair of the operating side and the standby side both processes the signal transmitted from the duplexed IO bus, and only the output IO module on the operating side outputs to the process,
The duplex pair input IO module of the active side and the standby side both processes the input from the process, and outputs both to the duplex pair transmission control module via the duplex IO bus, thereby outputting the duplex pair transmission control module. Outputs only the output from the operating IO module to the control MPU.
Process input and output equipment which is characterized a call. Oite process input and output equipment according to claim 1,
One slot for mounting one IO module;
An IO shelf that accommodates multiple slots;
With
Wherein the plurality of slots, while continuously in operation side and the slots of the IO module duplexing pair of stand-by side, the process input and output equipment, characterized in that subjecting a series of slot number. Oite to process input and output equipment of 請 Motomeko 2, wherein,
Each of the transmission control module and the IO module includes transmission control means configured by hardware,
These transmission control means performs equalized data sent to each redundant pair IO module, process input and output equipment which was characterized by performing the data transmission in the order of slot number. Oite process input and output equipment according to claim 2 or claim 3,
Odd the slot number IO module is mounted slot, bisecting the even number, the process input and output equipment which is characterized by operating one of the IO module at power on, the other is set as a standby. Oite claims 2 to process input and output equipment according to any one of claims 4,
Process input and output equipment, characterized in that the setting means for duplicating each IO module duplicated pairwise was provided for each IO module. Oite claims 2 to process input and output equipment according to any one of claims 4,
Setting means for duplicating each IO module duplicated pairwise process input equipment, characterized in that provided on the IO shelf. Oite claims 2 to process input and output equipment according to any one of claims 4,
A switch for operation / standby switching is installed for each IO module, and the operation of this switch is detected by each IO module , and the operation / standby setting is switched between the IO modules in a duplex pair . process input and output equipment. Oite claims 2 to process input and output equipment according to any one of claims 4,
The switch operating / standby switching we established for each transmission control module, the operation of this switch is detected by the respective transmission control module, and then sends a switching command via the IO bus from the transmission control module to each IO module , whereby the process input and output equipment which was characterized by switching the operation / standby between the IO module IO shelf units. Oite claims 2 to process input and output equipment according to any one of claims 4,
An operation / standby switching switch is installed on the IO shelf, the operation of this switch is detected by the transmission control module, and then a switching command is sent from the transmission control module to each IO module via the IO bus. process input and output equipment which was characterized by to switch between the IO shelf units operating / standby between IO module.

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