JP3789056B2 - Security circuit and security system for semiconductor memory device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present invention relates to a security circuit and a security system for a semiconductor memory device that can prevent unauthorized access and erroneous access to the semiconductor memory device.
[0002]
[Prior art]
  The contents stored in the nonvolatile semiconductor memory device may include data that is not desirable for reading or rewriting by a third party, such as information relating to personal privacy or information protected by copyright. Further, in a rewritable nonvolatile semiconductor memory device such as an EEPROM (electrically erasable / writable read-only memory), erroneous data rewriting may occur due to noise of the system or the nonvolatile semiconductor memory device itself. In order to protect memory contents from access to these unexpected memory contents, there is a nonvolatile semiconductor memory device in which a security circuit is incorporated.
[0003]
  FIG. 5 is a schematic block diagram for explaining the security operation of the nonvolatile semiconductor memory device in which the security circuit is incorporated.
[0004]
  In FIG. 5, reference numeral 503 denotes an interface circuit to which an input signal 501 from an external system (not shown) is inputted and is connected to the external system via the data input / output bus 502, and reference numeral 506 denotes an address from the interface circuit 503. The bus control circuit 509 receives the signal 504 and is connected to the interface circuit 503 via the data input / output bus 505, and the address signal 507 from the bus control circuit 506 is input to the bus control circuit 506. 508 is a memory space connected via 508. The interface unit 503 and the bus control circuit 506 constitute a security circuit.
[0005]
  Next, a read security operation of the nonvolatile semiconductor memory device will be described. A read command and a read address are input to the nonvolatile semiconductor memory device by an input signal 501. When the interface circuit 503 analyzes the input signal 501 and a read operation is requested, the interface circuit 503 transmits a read address to the bus control circuit 506 by the address signal 504, and the bus control circuit 506 outputs data to be output. It is received via the data input / output bus 505. At this time, the bus control circuit 506 determines whether or not the address indicated by the sent address signal 504 is within the memory space where the read operation is permitted. If the bus control circuit 506 determines that the address indicated by the address signal 504 is located in a memory space that is not permitted to be read, it performs some operation on the data input / output bus 505 and the read address signal 507, and outputs incorrect data. Thus, a normal read operation is not performed. On the other hand, when the bus control circuit 506 determines that the address indicated by the address signal 504 is located in a memory space where reading is permitted, the bus control circuit 506 correctly issues the address signal 507 and sets the address in the memory space 509 to the designated address. The written data is read out via the data input / output bus 508 and output correctly via the data input / output bus 505. Then, the interface circuit 503 having received the correct output outputs the received correct data to the data input / output bus 502 connected to the external system.
[0006]
  As means for outputting incorrect data, there are means for generating an address signal other than means for outputting a constant value as a data input / output signal (see Japanese Patent Laid-Open No. 59-152599), and disturbing the address signal. Means (see Japanese Patent Laid-Open No. 63-225839) and means for disturbing received data (see Japanese Patent Laid-Open No. 6-250929).
[0007]
  FIG. 6 is a schematic block diagram of a nonvolatile semiconductor memory device incorporating a security circuit that uses a password input as a security release means. In FIG. 6, reference numeral 603 denotes an interface circuit that receives an input signal 601 from an external system (not shown) and is connected to the external system via a data input / output bus 602, and reference numeral 606 denotes an address from the interface circuit 603. A bus control circuit connected to the interface circuit 603 via the data input / output bus 605 is input to the interface circuit 603, and an address signal 607 from the bus control circuit 606 is input to the bus control circuit 606. A memory space connected via the output bus 608, a unique password storage circuit 610 that outputs a unique password signal 611, a unique password signal 611 from the unique password storage circuit 610, and a password signal 612 from the interface circuit 603. In response to The Kyuriti release signal 614 is a comparator circuit for outputting to the bus control circuit 606. The interface circuit 603, the bus control circuit 606, the unique password storage circuit 610, and the comparison circuit 613 constitute a security circuit.
[0008]
  Next, the security releasing operation of the nonvolatile semiconductor memory device having the above configuration will be described. When the “password input command” is externally input to the interface circuit 603 by the input signal 601, the nonvolatile semiconductor memory device receives the “input password” from the data input / output bus 602. Then, the interface circuit 603 sends a password signal 612 representing “input password” to the comparison circuit 613. The unique password storage circuit 610 stores a “unique password” and sends a unique password signal 611 representing the “unique password” to the comparison circuit 613. The comparison circuit 613 compares the unique password signal 611 representing the “unique password” with the password signal 612 representing the “input password”, and if the unique password signal 611 and the password signal 612 match, the comparison circuit 613 A release signal 614 is issued. Thus, when the security release signal 614 is issued, the bus control circuit 606 normally performs subsequent access to the protected memory space.
[0009]
[Problems to be solved by the invention]
  However, the method using the input of “unique password” as the security cancellation condition of the nonvolatile semiconductor memory device has a drawback that the “unique password” and “password input command” can be easily solved by probing the input signal. . In addition, the provision of a dedicated command for security control has a drawback that it becomes a big clue for elucidating the method of the release operation by analyzing the input signal.
[0010]
  SUMMARY OF THE INVENTION An object of the present invention is to provide a security circuit and a security system for a semiconductor memory device having a security function that is stronger and difficult to elucidate.
[0011]
[Means for Solving the Problems]
[0012]
[0013]
  To achieve the above objective,Claim1The semiconductor memory device security circuit inactivates a predetermined memory space according to a security setting condition, and activates the predetermined memory space according to a security release condition. An indefinite value generation unit that generates an indefinite value and outputs the indefinite value, a calculation unit that performs a predetermined calculation based on the indefinite value from the indefinite value generation unit, and a password that receives a password input command from the outside Input command input section and the above calculation sectionFor password input commandA password input command determination unit for determining whether or not the calculation result matches the password input command input to the password input command input unit, and the password input command determination unit includes the calculation unitFor password input commandWhen it is determined that the calculation result matches the password input command, a password input unit for inputting the input password;Whether the calculation result for the unique password of the calculation unit matches the input password input to the password input unit, or a preset unique passwordThe input password entered in the password input sectionAndA password discriminating unit for discriminating whether or not they match,The password determination unit determines that the calculation result for the unique password of the calculation unit and the input password match, orThe password discrimination partThe above-mentioned unique password andThe above input passwordAndAnd a memory activation unit that activates the predetermined memory space when the security release condition is satisfied.
[0014]
  Claims above1According to the semiconductor memory device security circuit, when the predetermined memory space is activated from the deactivated state according to the security setting condition, the external system that accesses the semiconductor memory device is generated by the indefinite value generation unit. Further, one or more indefinite values are read out, and the same predetermined calculation as that of the arithmetic unit is performed based on the indefinite values. Next, the calculation result calculated by the external system is input to the password input command input unit as a password input command. Then, the password input command determination unitFor password input commandIt is determined whether or not the calculation result matches the password input command. At this time, the password input command input from the external system is obtained by performing the same predetermined calculation as the calculation unit based on the indefinite value.For password input commandMatches the operation result. Therefore, the password input command determination unit isFor password input commandIt is determined that the calculation result matches the password input command. The password input command determination unit isFor password input commandIf it is determined that the calculation result matches the password input command, the password input unit is permitted to input the input password and inputs an input password (same content as a unique password described later) from the external system. Then, the password discrimination unitWhether the calculation result for the unique password of the calculation unit matches the input password input to the password input unit, orPre-set unique password andWith the above input passwordIf it is determined that the two match, the memory activation unit activates the predetermined memory space on the assumption that the security release condition is satisfied. In this way, the password input command for entering the input password for releasing the security by changing the indefinite value by the indefinite value generation unit every time the security is released.And input passwordI.e.For password input commandCalculation resultAnd calculation results for unique passwordsMakes it possible to change
  Therefore, unauthorized access to the protected memory space becomes extremely difficult, and a semiconductor memory device having a security function that is stronger and difficult to elucidate can be realized.
[0015]
  Claims2The semiconductor storage device security circuit of claim1'sIn the security circuit for a semiconductor memory device, the indefinite value generation unit has a rewritable nonvolatile memory cell for storing the generated indeterminate value.
[0016]
  Claims above2According to the semiconductor memory device security circuit, by storing a non-volatile memory cell that can rewrite the indeterminate value generated by the indeterminate value generator, the indefinite value is stored without being cleared when the power is turned off. The accumulated number of operations in the semiconductor memory device can be used as an indefinite value, or a pseudo random number generated by the mixed congruence method can be used as an indefinite value, which is effective for generating an indefinite value next.
[0017]
[0018]
[0019]
  Claims3The semiconductor memory device security circuit inactivates a predetermined memory space according to a security setting condition, while the semiconductor memory device security circuit activates the predetermined memory space according to a security release condition. A numerical value input unit, a calculation unit for performing a predetermined calculation based on the numerical value input to the numerical value input unit, a password input command input unit for inputting a password input command from the outside, and the calculation unitFor password input commandA password input command determination unit for determining whether or not the calculation result matches the password input command input to the password input command input unit, and the password input command determination unit includes the calculation unitFor password input commandWhen it is determined that the calculation result matches the password input command, a password input unit for inputting the input password;Calculation result for the unique password of the calculation unit and the password Whether the input password entered in the input unit matches or a unique password set in advanceThe input password entered in the password input sectionAndA password discriminating unit for discriminating whether or not they match,The password determination unit determines that the calculation result for the unique password of the calculation unit and the input password match, orThe password discrimination partThe above-mentioned unique password andAnd a memory activation unit that activates the predetermined memory space when the security cancellation condition is satisfied when it is determined that the input password matches.
[0020]
  Claims above3According to the semiconductor memory device security circuit, when the predetermined memory space is activated from the deactivated state by the security setting condition, a numerical value is input to the numerical value input unit from an external system that accesses the semiconductor memory device. The arithmetic unit performs an operation based on the numerical value input to the numerical value input unit. Next, the external system performs the same calculation as the calculation unit based on the numerical value, and inputs the calculation result to the password input command input unit as a password input command. Then, the password input command determination unitFor password input commandIt is determined whether or not the calculation result matches the password input command. At this time, the password input command input from the external system is obtained by performing the same predetermined calculation as the calculation unit based on the numerical value.For password input commandMatches the operation result. Therefore, the password input command determination unit isFor password input commandIt is determined that the calculation result matches the password input command. The password input command determination unit isFor password input commandIf it is determined that the calculation result matches the password input command, the password input unit is permitted to input the input password and inputs an input password (same content as a unique password described later) from the external system. Then, the password discrimination unitWhether the calculation result for the unique password of the calculation unit matches the input password input to the password input unit, orPre-set unique password andWith the above input passwordIf it is determined that the two match, the memory activation unit activates the predetermined memory space on the assumption that the security release condition is satisfied. A password input command for entering an input password to cancel security by changing the numerical value input to the numerical value input section every time security is canceledOr input password,In other words,For password input commandCalculation resultAnd calculation results for unique passwordsMakes it possible to change
  Therefore, unauthorized access to the protected memory space becomes extremely difficult, and a semiconductor memory device having a security function that is stronger and difficult to elucidate can be realized.
[0021]
  Claims4The security circuit for a semiconductor memory device of claim 1 is provided.Or 3In the security circuit for a semiconductor memory device, the arithmetic unit has a rewritable nonvolatile memory cell for storing a constant set under a predetermined condition, and the constant stored in the rewritable nonvolatile memory cell It is characterized by being used for computation.
[0022]
  Claims above4According to the semiconductor memory device security circuit, it is possible to easily change the operation content of the operation unit by rewriting the constant stored in the nonvolatile memory cell.
[0023]
[0024]
[0025]
  Claims5The semiconductor storage device security circuit of claim1Or3In the security circuit for a semiconductor memory device, the password input command determination unit isFor password input commandIf it is determined that the calculation result does not match the password input command input to the password input command input unit, the calculation unit further adds a calculation to the calculation result and changes the calculation result.
[0026]
  Claims above5According to the semiconductor memory device security circuit ofFor password input commandIf the calculation result and the password input command do not match,For password input commandSince further calculation is added to the calculation result to change the calculation result, it is possible to prevent the security release condition from being clarified by trying all combinations of the password input command and the input password.
[0027]
  Claims6The security circuit for a semiconductor memory device of claim 1 is provided.Or 3In the security circuit for a semiconductor memory device, when a key address set under a predetermined condition is selected, the calculation unit further adds a calculation to the calculation result and changes the calculation result.
[0028]
  Claims above6According to the security circuit for semiconductor memory device of the present invention, since the calculation result is changed by further adding the calculation result of the calculation unit by selecting the key address which is not related to the security control, the third party can It becomes difficult to clarify the release conditions.
[0029]
  Claims7The semiconductor memory device security circuit of claim 1 to claim 1.6Any one of the security circuits for a semiconductor memory device is provided with a rewritable nonvolatile memory cell for storing the calculation result of the calculation unit.
[0030]
  Claims above7According to the security circuit for a semiconductor memory device of the present invention, the operation result is stored without being cleared when the power is turned off by storing the rewritable nonvolatile memory cell. It becomes possible to change the contents of the calculation using, making it difficult for a third party to elucidate the conditions for releasing the security.
[0031]
  Claims8The semiconductor storage device security circuit of claim6In the semiconductor memory device security circuit, the key address is stored in a rewritable nonvolatile memory cell.
[0032]
  Claims above8According to the semiconductor memory device security circuit, by storing the key address in a rewritable non-volatile memory cell, the key address can be changed every time the security is released, and the security is illegally released. Can be prevented more reliably.
[0033]
  Claims9The semiconductor storage device security circuit of claim8In the semiconductor memory device security circuit, a redundant memory cell constituting a part of the memory of the semiconductor memory device is used as the rewritable nonvolatile memory cell for storing the key address.
[0034]
  Claims above9According to the semiconductor memory device security circuit, the key address is stored in an unused redundant memory cell constituting a part of the memory of the semiconductor memory device, thereby storing the key address. In addition, it is not necessary to provide a separate memory cell and cost can be reduced.
[0035]
  Claim 10The semiconductor storage device security circuit of claim8In the semiconductor memory device security circuit, a memory cell assigned to an address set under a predetermined condition is used as a rewritable nonvolatile memory cell for storing the key address.
[0036]
  Claim 1 above0According to the semiconductor memory device security circuit, the key address is stored in a memory cell assigned to an address set under a predetermined condition of the memory of the semiconductor memory device, so that the key address can be stored separately. There is no need to provide a memory cell, and the cost can be reduced.
[0037]
  Claim 11The security system of claim 1 to 1.0A security system comprising any one of the security circuits for a semiconductor memory device and a plurality of semiconductor devices including the semiconductor memory device, wherein at least one of the semiconductor devices is a predetermined memory of the semiconductor memory device A security setting unit that deactivates the space; and the semiconductor memory device includes the memory activation unit of the security circuit for the semiconductor memory device, and at least one of the semiconductor devices includes the semiconductor memory device. And a security release unit having a configuration in which the memory activation unit is excluded from the security circuit.
[0038]
  Claim 1 above1According to the security system, in the semiconductor device having the security release unit, when the security release condition of the security release unit is satisfied, a security release signal for releasing the security from the security release unit is sent to activate the memory of the semiconductor storage device. To the output. Then, the memory activation unit that has received the security release signal activates a predetermined memory space of the semiconductor memory device. Therefore, it is possible to realize a security system having a security function that is stronger and difficult to elucidate.
[0039]
  Claim 12The security system of claim 11In the security system, there are a plurality of the semiconductor devices having the security release unit, and the memory activation unit of the semiconductor storage device is based on security release signals from the security release units of the plurality of semiconductor devices. It is characterized by activating a predetermined memory space.
[0040]
  Claim 1 above2According to the security system, in each semiconductor device having the security release unit, when the security release condition of the security release unit is satisfied, the security release signal is sent from the security release unit of each semiconductor device to the memory activation of the semiconductor memory device. Output to each part. Then, the memory activation unit that receives the security release signal from each semiconductor memory device activates a predetermined memory space of the semiconductor memory device. For example, when the security release condition is not satisfied in all the semiconductor devices having the security release unit, the security function can be further strengthened by preventing the memory activation unit from activating the memory space of the semiconductor storage device. . Note that the memory space may be activated by the memory activation unit when at least one of the semiconductor devices having the security cancellation unit satisfies the security cancellation condition.
[0041]
DETAILED DESCRIPTION OF THE INVENTION
  The semiconductor memory device security circuit and security system according to the present invention will be described in detail below with reference to embodiments shown in the drawings.
[0042]
  (First embodiment)
  FIG. 1 is a schematic block diagram showing the configuration of a nonvolatile semiconductor memory device using the semiconductor memory device security circuit according to the first embodiment of the present invention. In FIG. 1, 3 is an interface circuit to which an input signal 1 from an external system (not shown) is input and is connected to the external system via a data input / output bus 2, and 6 is an address from the interface circuit 3. A bus control circuit as a memory activating unit connected to the interface circuit 3 via a data input / output bus 5 is input to the interface circuit 3, and an address signal 7 from the bus control circuit 6 is input to the bus control circuit 9. This is a memory space connected to the control circuit 6 via the data input / output bus 8. The memory space 9 may be the entire memory area of the nonvolatile semiconductor memory device or a part of the memory area. Further, 16 receives an indefinite value generation command signal 15 from the interface circuit 3, and outputs an indeterminate value output signal 17 to the interface circuit 3. An indefinite value generation circuit 20 serves as the indefinite value generation unit. As an arithmetic unit that receives an indefinite value output signal 17 from the circuit 16 and an additional arithmetic command signal 18 from the interface circuit 3 and outputs a password input command signal 19 to the interface circuit 3 and outputs a unique password signal 21. The arithmetic circuit 13 receives a unique password signal 21 from the arithmetic circuit 20 and a password signal 12 from the interface circuit 3 and outputs a security release signal 14 to the bus control circuit 6 as a password determination unit. Circuit. The interface circuit 3 also serves as a password input unit, a password input command input unit, and a password input command determination unit. Further, the interface circuit 3, the bus control circuit 6, the indeterminate value generation circuit 16, the arithmetic circuit 20, and the comparison circuit 13 constitute a security circuit for a semiconductor memory device.
[0043]
  In the nonvolatile semiconductor memory device having the above configuration, when security is set, the access to the memory space 9 by the bus control circuit 6 does not operate normally. In order to release the security from the state in which the security is set, first, an “indefinite value generation command” is input from the outside to the interface circuit 3 by the input signal 1. When receiving the “indefinite value generation command”, the interface circuit 3 issues an indefinite value generation command signal 15 to the indefinite value generation circuit 16.
[0044]
  Next, the indefinite value generation circuit 16 that has received the indefinite value generation command signal 15 generates an indefinite value and sends the indefinite value to the interface circuit 3 and the arithmetic circuit 20. When an “undefined value read command” is input from the outside, the interface circuit 3 outputs the currently set undefined value to the outside through the data input / output bus 2. The arithmetic circuit 20 generates a “password input command” and a “unique password” by performing a specific operation based on the indefinite value output signal 17 sent from the indeterminate value generation circuit 16, A password signal 21 representing “password” is transmitted to the comparison circuit 13, and a password input command signal 19 representing “password input command” is transmitted to the interface circuit 3. Further, when the control signal input from the outside coincides with the password input command signal 19, the interface circuit 3 receives the input of the "input password" from the outside, and compares the password signal 12 indicating "input password" with the comparison circuit. 13 to send. Next, the comparison circuit 13 compares the unique password signal 21 representing the “unique password” generated by the arithmetic circuit 20 with the password signal 12 representing the “input password”, and the unique password signal 21 and the password signal 12. If they match, a security release signal 14 is issued. When the bus control circuit 6 receives the security release signal 14, the bus control circuit 6 releases the security and normally executes subsequent access to the protected memory space.
[0045]
  Therefore, in order to release the security, an external system reads an indefinite value from the nonvolatile semiconductor memory device, executes the same operation as the arithmetic circuit 20, and calculates a “password input command” and a “unique password”. Thus, security can be released only when the calculation result of the external system matches the calculation result in the semiconductor device. Therefore, unauthorized access to the protected memory space 9 becomes extremely difficult, and a more robust and difficult to elucidate nonvolatile semiconductor memory device having a security function can be realized.
[0046]
  Further, when the interface unit 3 receives a specific command from the outside, the interface unit 3 issues an additional calculation command signal 18, and the calculation circuit 20 that has received the additional calculation command signal further calculates the current “password input command” and “unique password”. Thus, even when the same indefinite value is generated, the “password input command” and the “unique password” can be changed by subsequent external operations. As a condition for issuing the additional operation command signal 18, it is possible to make it more difficult to elucidate the security release condition by using a control seemingly unrelated to security control such as selection of a key address or ID read command, for example. . When the additional operation command signal 18 is used, it is necessary for an external system to grasp the conditions for the additional operation and the content of the additional operation.
[0047]
  In addition, by storing the key address in a rewritable nonvolatile memory cell, the key address can be changed every time security is released, and it is possible to more reliably prevent unauthorized release of security. Can do.
[0048]
  Further, the rewritable nonvolatile memory cell for storing the key address is stored in an unused redundant memory cell among redundant memory cells constituting a part of the memory of the nonvolatile semiconductor memory device, or By storing the key address in the memory cell assigned to the address set under a predetermined condition, it is not necessary to provide a separate memory cell for storing the key address, and the cost can be reduced.
[0049]
  Further, according to the first embodiment, in order to prevent security from being released by trying all combinations of “password input command” and “unique password”, “password input command” and “unique password” If the value does not match the calculation result, an indefinite value is newly generated, or the additional calculation command signal 18 is issued to update the “password input command” and “unique password”. Therefore, since it is possible to change the “password input command” and the “unique password”, it is difficult to clarify the security release condition only by probing the input signal.
[0050]
  Further, by using a constant stored in a rewritable nonvolatile memory cell for the operation executed by the arithmetic circuit 20, the operation can be changed by rewriting the contents of the rewritable nonvolatile memory cell. become. In particular, by using a rewritable nonvolatile memory cell such as an EEPROM, it becomes easy to use a different calculation method for each chip and to change the calculation method later.
[0051]
  The “password input command” and the “unique password” do not necessarily need to use calculation results for both, and either one may be fixed. The security is reduced by fixing either the “password input command” or the “unique password”, but the trouble of releasing the security can be reduced.
[0052]
  Further, it is not necessary to use a single “indefinite value” and “password”, and a plurality of “indefinite values” and “passwords” can be set. In this case, as the combination of “indefinite value” and “password” increases, the probability that the security release condition is accidentally solved is lowered.
[0053]
  FIG. 2 is a schematic block diagram of a specific example of the indeterminate value generation circuit 16 (shown in FIG. 1) of the first embodiment, in which 31 is a power supply voltage, 32 is a power-on detection circuit, 33 is a power-on signal, Reference numeral 34 is a counter circuit, 35 is a read data bus for cumulative power-on times, 36 is a write data bus for cumulative power-on times, and 37 is a rewritable nonvolatile memory cell. In this indeterminate value generation circuit, by providing a rewritable nonvolatile memory cell, the accumulated power-on count is used as an “indeterminate value”.
[0054]
  Next, the operation of the indefinite value generation circuit will be described.
  When the nonvolatile semiconductor memory device shown in FIG. 1 is powered on, the power-on detection circuit 32 detects the power-on 31 and issues a power-on signal 33. When the counter circuit 34 receives the power-on signal 33, the counter circuit 34 reads the cumulative power-on count so far from the non-volatile memory cell 37 via the read data bus 35 of the cumulative power-on count, increments it, and nonvolatile The memory cell 37 is written via the write data bus 36 for the cumulative number of power-on times. Since the cumulative power-on count stored in the nonvolatile memory cell 37 changes every time the power is turned on, it can be used as an “indefinite value” used in the first embodiment. Writing the “indefinite value” or the operation result to the nonvolatile memory cell 37 is very effective for generating the next “indefinite value”. Since it is not cleared when the power is turned off, the cumulative number of operations (such as power-on shown in FIG. 2) for the nonvolatile semiconductor memory device is used as an “indefinite value”, or a pseudo-random number generated by the mixed congruential method is It may be used for “undefined value”.
[0055]
  In the first embodiment, the “password input command” and the “unique password” are obtained by a predetermined calculation based on the “indefinite value” by the arithmetic circuit 20 as the arithmetic unit. The “password input command” may be a fixed condition. On the other hand, only the “password input command” may be obtained by calculation based on the “undefined value” by the calculation circuit 20 as the calculation unit, and the “unique password” may be a fixed condition.
[0056]
  (Second Embodiment)
  FIG. 3 is a schematic block diagram of a nonvolatile semiconductor memory device using the security circuit for a semiconductor memory device according to the second embodiment of the present invention. Reference numeral 103 denotes an input signal 101 from an external system (not shown). An interface circuit 106 that is input and connected to an external system via the data input / output bus 102 is input to the address signal 104 from the interface circuit 103, and is connected to the interface circuit 103 via the data input / output bus 105. The bus control circuit 109 serving as the memory activation unit 109 receives the address signal 107 from the bus control circuit 106 and is connected to the bus control circuit 106 via the data input / output bus 108, 120 The “unique password” and “password” from the interface circuit 103 An arithmetic unit as an arithmetic unit that receives a signal 115 representing an arbitrary “numerical value” from which the “input command” is generated, outputs a password input command signal 119 to the interface circuit 103 and outputs a unique password signal 121. A circuit 113 is a comparison circuit as a password determination unit that receives the unique password signal 121 from the arithmetic circuit 120 and the password signal 112 from the interface circuit 103 and outputs a security release signal 114 to the bus control circuit 106. The interface circuit 103 also serves as a numerical value input unit, a password input unit, a password input command input unit, and a password input command determination unit. The interface circuit 103, the bus control circuit 106, the arithmetic circuit 120, and the comparison circuit 113 constitute a semiconductor memory device security circuit. The memory space 109 may be the entire memory area of the nonvolatile semiconductor memory device or a part of the memory area.
[0057]
  In the nonvolatile semiconductor memory device having the above configuration, when security is set, the bus control circuit 106 does not operate normally to access a specific memory space. In order to release the security from the state where the security is set, an arbitrary “numerical value” is first input from the outside to the interface circuit 103 via the data input / output bus 102. The interface circuit 103 sends a signal 115 representing this “numerical value” to the arithmetic circuit 120. Then, the arithmetic circuit 120 generates a specific password signal 121 and a password input command signal 119 by performing a specific calculation based on the signal 115 representing “numerical value”. When a “password input command” generated by executing the same operation as that of the arithmetic circuit 120 by an external system is input by the input signal 101, the interface circuit 103 uses the input signal 101 as the password signal 112 and the comparison circuit 113. Send to. The comparison circuit 113 compares the unique password signal 121 generated by the arithmetic circuit 120 with the password signal 112 input from the outside, and issues a security release signal 114 when the unique password signal 121 and the password signal 112 match. To do. When the bus control circuit 106 receives the security release signal 114, the bus control circuit 106 releases the security and normally executes subsequent access to the protected memory space.
[0058]
  Further, in the second embodiment, as in the first embodiment, it is possible to cause the arithmetic circuit 20 to perform an additional operation by performing a specific operation.
[0059]
  In order to cancel security, the external system needs to perform the same operation as the arithmetic circuit 120 on the “numerical value” input to the nonvolatile semiconductor memory device, and calculate the “password input command” and the “unique password”. is there. In the second embodiment, unlike the first embodiment, it is not necessary to incorporate a circuit for generating an “undefined value” in the nonvolatile semiconductor memory device. Also, if you have external “undefined value” generation means such as random numbers, enter the “undefined value” generated externally as the “numeric value” that will be the basis of the “unique password” and “password input command”. As a result, the same effects as those of the first embodiment can be obtained, and the indeterminate value generation circuit of the first embodiment becomes unnecessary. In the nonvolatile semiconductor memory device, when the same “numerical value” is input, the same “unique password” and “password input command” are generated. Therefore, exactly the same effect as the first embodiment is obtained. Although not necessarily obtained, the first embodiment is different in that an arbitrary “numeric value”, “unique password”, and “password input command” that are different each time can be used, and the input cannot be specified after the security cancellation condition is solved. Equivalent effect is obtained.
[0060]
  Therefore, unauthorized access to the protected memory space 109 becomes extremely difficult, and a non-volatile semiconductor memory device having a security function that is stronger and difficult to elucidate can be realized.
[0061]
  In the second embodiment, the “password input command” and the “unique password” are obtained by a predetermined computation by the computation circuit 120 as the computation unit, but the computation unit obtains only the “unique password” by computation, The “password input command” may be a fixed condition. On the other hand, only the “password input command” may be obtained by calculation by the calculation circuit 20 as the calculation unit, and the “unique password” may be a fixed condition.
[0062]
  (Third embodiment)
  FIG. 4 is a schematic block diagram showing the configuration of the security system according to the third embodiment of the present invention. As shown in FIG. 4, the non-volatile semiconductor memory device A (hereinafter referred to as device A) receives an input signal 201 from an external system (not shown), and passes the data input / output bus 202 to the external system. Connected to the interface circuit 203, the bus control circuit 206 connected to the interface circuit 203 via the data input / output bus 205, and the bus control circuit 206. And a memory space 209 connected to the bus control circuit 206 via the data input / output bus 208. Also, the nonvolatile semiconductor memory device B (hereinafter referred to as device B) receives the interface circuit 223 to which the input signal 222 is input and the input signal from the interface circuit 223, and the bus control circuit 206 of the device A has security. A security setting unit that outputs a cancellation signal 214 and a security system circuit 224 as a security cancellation unit are provided. The security system circuit 224 of the device B is a circuit composed of the indefinite value generation circuit, the arithmetic circuit and the comparison circuit shown in the first embodiment, or is composed of the arithmetic circuit and the comparison circuit shown in the second embodiment. Can be used.
[0063]
  In the security system configured as described above, when the security is set, the bus control circuit 206 does not normally access the specific memory space of the device A. In order to cancel the security from the state where the security is set, first, a “security cancellation command” is input to the apparatus B from the outside. Then, the interface circuit 223 of the device B receives this “security release command” and issues a security control execution command to the security system circuit 224 by the input signal 225. The security system circuit 224 that has received the security control execution command executes the security control. With this security control, a password is generated by performing a specific operation based on the “indefinite value” generated by the indefinite value generation circuit shown in the first embodiment, and compared with a password input from the outside. Based on the control to be executed or any “numerical value” input from the outside shown in the second embodiment, a password is generated by performing a specific calculation and compared with the password input from the outside. Use the control to be executed. The security system circuit 224 issues a security release signal 214 to the device A when security release is permitted in the security control. When the bus control circuit 226 of the device A receives the security release signal 214, the bus control circuit 226 releases the security and normally executes access to the protected memory space of the device A thereafter.
[0064]
  Therefore, it is possible to realize a security system having a security function that is stronger and difficult to elucidate.
[0065]
  In the third embodiment, the security control is executed by inputting the security cancellation signal 214 to the bus control circuit 206 in the device A. However, the security control is performed by inputting this security cancellation signal to the interface circuit 203. May be executed.
[0066]
  In the third embodiment, the security release signal 214 does not need to be single, and security control can be executed using a plurality of security release signals.
[0067]
  In the third embodiment, the security system having two nonvolatile semiconductor memory devices as the semiconductor device has been described. However, the security system is not limited to this, and includes a plurality of semiconductor devices including at least one semiconductor memory device. May be good. In addition, security control may be performed on a plurality of semiconductor memory devices at the same time using the same method.
[0068]
  In the first to third embodiments, the security circuit for a semiconductor memory device is applied to a nonvolatile semiconductor memory device. However, the present invention may be applied to a semiconductor memory device having no nonvolatile memory.
[0069]
【The invention's effect】
[0070]
  As is clear from the above,, Claims1According to the security circuit for a semiconductor memory device of the present invention, the password input command for inputting the input password by changing the indefinite value by the indefinite value generation unit every time security is releasedOr input password,In other words,For password input commandCalculation resultAnd calculation results for unique passwordsThe security function of the semiconductor memory device can be strengthened, and illegal (or erroneous) read, write and copy can be prevented. It is extremely effective.
[0071]
  Claims2According to the semiconductor memory device security circuit of the present invention,1'sIn the semiconductor memory device security circuit, by storing a non-volatile memory cell that can rewrite the indeterminate value generated by the indeterminate value generator, the indeterminate value is stored without being cleared when the power is turned off. Indefinite values can then be used effectively to generate indeterminate values.
[0072]
[0073]
  Claims3According to the semiconductor memory device security circuit of the present invention, a password input command for inputting an input password by changing a numerical value input to the numerical value input unit every time security is releasedOr input password,In other words,For password input commandCalculation resultAnd calculation results for unique passwordsThe security function of the semiconductor memory device can be strengthened, and illegal (or erroneous) read, write and copy can be prevented. It is extremely effective.
[0074]
  Claims4According to the security circuit for a semiconductor memory device of the present invention,Or 3In the security circuit for a semiconductor memory device, since the constant used for the calculation of the calculation unit is stored in a rewritable nonvolatile memory cell, the constant stored in the rewritable nonvolatile memory cell can be rewritten as described above. It is possible to easily change the calculation contents of the calculation unit.
[0075]
[0076]
  Claims5According to the semiconductor memory device security circuit of the present invention,1Or3In the security circuit for a semiconductor memory device, the password input command determination unit isFor password input commandIf the calculation result does not match the password input command entered in the password input command input section, the calculation sectionFor password input commandSince further calculation is added to the calculation result and the calculation result is changed, it is possible to prevent the security release condition from being clarified by trying all combinations of the password input command and the input password.
[0077]
  Claims6According to the security circuit for a semiconductor memory device of the present invention,Or 3In the security circuit for semiconductor memory device, the calculation result is changed by further adding the calculation result of the calculation unit by selecting the key address which is not related to the security control. It can be prevented more reliably.
[0078]
  Claims7According to the security circuit for a semiconductor memory device of the present invention, claims 1 to6In any one of the security circuits for a semiconductor memory device, the operation result is not cleared when the power is turned off by storing the rewritable nonvolatile memory cell, so that the operation result is used next. It is possible to change the calculation contents.
[0079]
  Claims8According to the semiconductor memory device security circuit of the present invention,6In this semiconductor memory device security circuit, by storing the key address in a rewritable non-volatile memory cell, the key address can be rewritten, and unauthorized release of security can be prevented more reliably.
[0080]
  Claims9According to the semiconductor memory device security circuit of the present invention,8In the security circuit for a semiconductor memory device, a memory cell for storing a key address is stored by storing the key address in a redundant memory cell that is not used among redundant memory cells constituting a part of the memory of the semiconductor memory device. It is not necessary to provide a new one, and the cost can be reduced.
[0081]
  Claim 10According to the semiconductor memory device security circuit of the present invention,8In the security circuit for a semiconductor memory device, the memory cell for storing the key address is stored by storing the key address in a memory cell assigned to an address set under a predetermined condition of the memory of the semiconductor memory device. There is no need to provide a new one, and the cost can be reduced.
[0082]
  Claim 11According to the security system of the present invention, claims 1 to 10A security system comprising any one of the security circuits for a semiconductor storage device and a plurality of semiconductor devices including the semiconductor storage device, wherein in the semiconductor device having the security release unit, the security release condition of the security release unit is When satisfied, the security release unit outputs a security release signal to the memory activation unit of the semiconductor storage device, and the memory activation unit receiving the security release signal activates a predetermined memory space of the semiconductor storage device. Therefore, it is possible to realize a security system having a security function that is stronger and difficult to elucidate.
[0083]
  Claim 12According to the security system of the present invention,1In the security system, there are a plurality of the semiconductor devices having the security release unit, and the memory activation unit of the semiconductor storage device is a predetermined memory based on a security release signal from the security release unit of the plurality of semiconductor devices. Since the space is activated, it is possible to realize a security system having a security function that is more robust and difficult to elucidate.
[Brief description of the drawings]
FIG. 1 is a schematic block diagram of a nonvolatile semiconductor memory device using a security circuit for a semiconductor memory device according to a first embodiment of the present invention.
FIG. 2 is a schematic block diagram of a specific example of an indefinite value generation circuit used in the nonvolatile semiconductor memory device.
FIG. 3 is a schematic block diagram of a nonvolatile semiconductor memory device using a security circuit for a semiconductor memory device according to a second embodiment of the present invention.
FIG. 4 is a schematic block diagram of a security system according to a third embodiment of the present invention.
FIG. 5 is a schematic block diagram of a nonvolatile semiconductor memory device using a conventional security circuit for a semiconductor memory device.
FIG. 6 is a schematic block diagram of a nonvolatile semiconductor memory device using another conventional semiconductor memory device security circuit.
[Explanation of symbols]
  1 ... Input signal,
  2. Data input / output bus,
  3 ... interface circuit,
  4 ... Address signal,
  5. Data input / output bus,
  6: Bus control circuit,
  7 ... Address signal,
  8: Data input / output bus,
  9 ... Memory space,
  12 ... Password signal,
  13: Comparison circuit,
  14: Security release signal,
  15: Indefinite value generation command signal,
  16: Indeterminate value generation circuit,
  17: Undefined value output signal,
  18: Additional operation command signal,
  19 ... Password input command signal,
  20 ... arithmetic circuit,
  21: Unique password signal,
  31 ... Power supply voltage,
  32 ... Power-on detection circuit,
  33 ... Power-on signal,
  34 ... Counter circuit,
  35 ... Read data bus for cumulative power-on count,
  36: Write data bus for cumulative power-on count,
  37 ... Nonvolatile memory cell,
  101 ... Input signal,
  102: Data input / output bus,
  103 ... interface circuit,
  104: Address signal,
  105: Data input / output bus,
  106: Bus control circuit,
  107: Address signal,
  108: Data input / output bus,
  109 ... memory space,
  113 ... comparison circuit,
  114 ... Security release signal,
  115 ... Signal representing the numerical value of the password,
  119: Password input command signal,
  120 ... arithmetic circuit,
  121 ... Unique password signal,
  201 ... input signal,
  202: Data input / output bus,
  203 ... interface circuit,
  204: Address signal,
  205: Data input / output bus,
  206: Bus control circuit,
  207 ... Address signal,
  208: Data input / output bus,
  209 ... memory space,
  222: Input signal,
  223 ... interface circuit,
  224 ... Security system circuit,
  225 ... Input signal,
  214: Security release signal.

Claims (12)

In the security circuit for a semiconductor memory device, wherein the predetermined memory space is deactivated by a security setting condition, and the predetermined memory space is activated by a security release condition.
An indeterminate value generator that generates one or more indeterminate values and outputs the indeterminate values;
A calculation unit that performs a predetermined calculation based on the indefinite value from the indefinite value generation unit;
A password input command input part for inputting a password input command from the outside;
A password input command determination unit for determining whether or not the calculation result for the password input command of the calculation unit matches the password input command input to the password input command input unit;
When the password input command determination unit determines that the calculation result for the password input command of the calculation unit matches the password input command, a password input unit for inputting the input password;
Whether the calculation result for the unique password of the calculation unit matches the input password input to the password input unit, or the preset unique password and the input password input to the password input unit. and password determination section for determining whether or not the de match,
Or the password determination unit determines that the operation result and the input password for specific password in the operational unit match, or the password determination section performs the above preset specific password and the input password and match And a memory activating unit that activates the predetermined memory space when the security cancellation condition is satisfied. The security circuit for a semiconductor memory device according to claim 1 ,
The indefinite value generation unit includes a rewritable nonvolatile memory cell for storing the generated indeterminate value. In the security circuit for a semiconductor memory device, wherein the predetermined memory space is deactivated by a security setting condition, and the predetermined memory space is activated by a security release condition.
A numerical value input section for inputting numerical values from the outside;
A calculation unit that performs a predetermined calculation based on the numerical value input to the numerical value input unit;
A password input command input part for inputting a password input command from the outside;
A password input command determination unit for determining whether or not the calculation result for the password input command of the calculation unit matches the password input command input to the password input command input unit;
When the password input command determination unit determines that the calculation result for the password input command of the calculation unit matches the password input command, a password input unit for inputting the input password;
Whether the calculation result for the unique password of the calculation unit matches the input password input to the password input unit, or the preset unique password and the input password input to the password input unit. and password determination section for determining whether or not the de match,
The password determination unit determines that the calculation result for the unique password of the calculation unit matches the input password, or the password determination unit matches the preset unique password and the input password A memory activating unit that activates the predetermined memory space when the security release condition is satisfied. The security circuit for a semiconductor memory device according to claim 1 or 3 ,
The arithmetic unit has a rewritable nonvolatile memory cell that stores a constant set under a predetermined condition, and uses the constant stored in the rewritable nonvolatile memory cell for the calculation. Security circuit for storage devices. The security circuit for a semiconductor memory device according to claim 1 or 3 ,
When the password input command determination unit determines that the calculation result for the password input command of the calculation unit does not match the password input command input to the password input command input unit, the calculation unit further calculates the calculation result. In addition, a security circuit for a semiconductor memory device, wherein the operation result is changed. The security circuit for a semiconductor memory device according to claim 1 or 3 ,
A security circuit for a semiconductor memory device, wherein when a key address set under a predetermined condition is selected, the calculation unit further adds a calculation to the calculation result and changes the calculation result. The security circuit for a semiconductor memory device according to any one of claims 1 to 6 ,
A security circuit for a semiconductor memory device, comprising a rewritable nonvolatile memory cell for storing a calculation result of the calculation unit. The security circuit for a semiconductor memory device according to claim 6 ,
A security circuit for a semiconductor memory device, wherein the key address is stored in a rewritable nonvolatile memory cell. The security circuit for a semiconductor memory device according to claim 8 ,
A security circuit for a semiconductor memory device, wherein a redundant memory cell constituting a part of a memory of the semiconductor memory device is used as the rewritable nonvolatile memory cell for storing the key address. The security circuit for a semiconductor memory device according to claim 8 ,
A security circuit for a semiconductor memory device, wherein a memory cell assigned to an address set under a predetermined condition is used as a rewritable nonvolatile memory cell for storing the key address. A semiconductor memory device security circuit according to any one of claims 1 to 1 0, a security system comprising a plurality of semiconductor devices including a semiconductor memory device,
At least one of the semiconductor devices has a security setting unit that deactivates a predetermined memory space of the semiconductor memory device,
The semiconductor memory device includes the memory activation unit of the security circuit for the semiconductor memory device,
At least one of the semiconductor devices includes a security release unit having a configuration in which the memory activation unit is excluded from the semiconductor memory device security circuit. The security system of claim 1 1,
The semiconductor device having the security release unit is plural,
The memory activation unit of the semiconductor memory device activates a predetermined memory space based on a security release signal from the security release unit of the plurality of semiconductor devices.

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