JP3779279B2 - Image display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a scanning signal line driving circuit provided in an image display device having a function of displaying an image corresponding to a plurality of image formats using all or a part of pixels arranged in a matrix, and an image display device. Is.
[0002]
[Prior art]
There are various types of image display devices that have been used conventionally. Here, an active matrix type liquid crystal display device will be described as an example.
[0003]
In general, in a liquid crystal display device, an active substrate in which a large number of pixels, signal lines, and the like are formed and an opposite substrate in which a transparent electrode, a color filter, and the like are formed on the entire display area are bonded to each other with a predetermined gap therebetween. A desired signal is written in a liquid crystal cell into which liquid crystal has been injected for display.
[0004]
FIG. 11 shows an example of the configuration of a conventional active matrix liquid crystal display device. As shown in FIG. 11, the liquid crystal display device includes a pixel array ARY, a scanning signal line driving circuit GD, and a data signal line driving circuit SD. In the pixel array ARY, a portion surrounded by a plurality of scanning signal lines GL connected to the scanning signal line driving circuit GD and a plurality of data signal lines SL connected to the data signal line driving circuit SD In addition, the pixels PIX are arranged in a matrix.
[0005]
As shown in FIG. 12, each of the pixels PIX includes a switching element SW made up of a field effect transistor and the like, and a pixel capacitor (made up of a liquid crystal capacitor CL and an auxiliary capacitor CS added if necessary). In FIG. 12, the data signal line SL and one electrode of the pixel capacitor are connected via the drain and source of the switching element SW, the gate of the switching element SW is connected to the scanning signal line GL, and the other electrode of the pixel capacitor is connected. Are connected to a common electrode line common to all pixels.
[0006]
The data signal line driving circuit SD samples the video signal DAT input from an external circuit (not shown) in synchronization with a timing signal such as the clock signal CKS, amplifies it as necessary, and writes it to each data signal line SL. . On the other hand, the scanning signal line driving circuit GD sequentially selects the scanning signal lines GL in synchronization with a clock signal such as the clock signal CKG, and controls opening and closing of the switching element SW provided in the pixel PIX. As a result, the video signal DAT written to each data signal line SL is written to each pixel PIX, and the data written to each pixel PIX is held. Thereby, the transmittance or reflectance of the liquid crystal is modulated in accordance with the voltage applied to each liquid crystal capacitor CL, and display is performed.
[0007]
Conventional active matrix type liquid crystal display devices mainly correspond to one image format. That is, for example, the number of pixels in a liquid crystal display device with VGA specifications is 640 × 480, and the number of pixels in a liquid crystal display device with XGA specifications is 1024 × 768. In the case of color display, the number of pixels is tripled. The display is performed using the entire pixel array ARY.
[0008]
By the way, in recent years, an image display apparatus corresponding to a plurality of image formats has been developed in one image display apparatus. That is, there are a case where a single image display device switches between XGA specification and VGA specification images, a case where both high-vision specification and NTSC specification images are switched, and the like.
[0009]
For example, when the image display device supports an XGA specification image format, the number of pixels is 1024 × 768, and this image display device is used to create a television image with a 16: 9 aspect ratio (the number of pixels is 1024 x 480) or SVGA specification image format (number of pixels is 800 x 600). (1) Generate an interpolation signal externally and perform interpolation scanning to display the entire screen. (2) There are a method of performing display with the original number of pixels using a part of the screen as shown in (a) or (b) of FIG. 13A shows a case where non-display areas are provided above and below the image display area, and FIG. 13B shows a case where non-display areas are provided above and below the image display area.
[0010]
In the case of the former {circle around (1)}, by performing interpolation scanning, there is a possibility that the display pattern slightly changes depending on the position in the screen. On the other hand, in the latter case (2), since interpolation scanning is not performed, there is no character collapse in the character display. Therefore, it is preferable to use the latter method (2) as a method.
[0011]
By the way, when the method (2) is used, an area that does not contribute to display (hereinafter referred to as a non-display area) is generated on the screen. Generally, an appropriate pattern or black color is applied to the area. It is displayed. For example, Japanese Patent Laid-Open No. 6-189231 discloses a technique for displaying an image having a predetermined pattern such as a wood grain in an area that does not contribute to display.
[0012]
[Patent Document 1]
Japanese Patent Laid-Open No. 6-189231 (publication date: July 08, 2006)
[0013]
[Patent Document 2]
Japanese Patent Laid-Open No. 9-212139 (publication date: August 15, 2009)
[0014]
[Patent Document 3]
Japanese Laid-Open Patent Publication No. 8-043852 (Publication Date Feb. 16, 2008)
[0015]
[Problems to be solved by the invention]
However, as shown in Japanese Patent Laid-Open No. 6-189231, when a video is displayed in a non-display area, a new clock signal and video signal for this display are required, and the configuration of the external circuit is complicated. There was a problem of becoming.
[0016]
In addition, when the non-display areas exist above and below the display area, more scanning signal lines than the scanning signal lines necessary for displaying the original image format can be scanned within a predetermined period. Therefore, it is necessary to increase the frequency of the clock signal CKG of the scanning signal line driving circuit or to generate a new clock signal, which causes a problem that the external circuit becomes more complicated.
[0017]
In view of this, Japanese Patent Application Laid-Open No. 9-212139 discloses that when a non-display area is displayed in black and the non-display areas exist above and below the display area, the scanning signal lines of the non-display area are displayed during a vertical blanking period. A technique is disclosed in which data signals corresponding to black display are written to the pixels in the non-display area by operating all at once. This eliminates the need to increase the frequency of the clock signal CKG of the scanning signal line driving circuit.
[0018]
However, according to the technique disclosed in Japanese Patent Laid-Open No. 9-212139, the switching elements SW connected to the plurality of scanning signal lines corresponding to the non-display area are simultaneously controlled, so that the switching elements SW are opened. When the state (OPEN) changes to the closed state (CLOSE) or changes from the closed state to the open state, that is, when the potential levels of the plurality of scanning signal lines corresponding to the non-display area are switched, a large current flows in the scanning signal line driver circuit. As a result, there is a possibility that the potential level of the scanning signal line corresponding to the display region may fluctuate due to the influence. In particular, if the level of the potential for opening the switching element SW (if the switching element SW is n-ch, the level of the low-potential power supply) varies, the holding characteristics of the pixel switch may be impaired, and the display quality is reduced. It will be significantly reduced.
[0019]
Note that when the switching element SW is in the closed state, it means that the switching element SW is turned on, and when it is in the open state, it means that the switching element SW is turned off.
[0020]
The present invention has been made in view of the above-described problems, and is capable of supporting a plurality of image formats with a relatively simple configuration and capable of displaying an image with good display quality. An object is to provide a circuit and an image display device.
[0021]
[Means for Solving the Problems]
The scanning signal line driving circuit of the present invention is a scanning signal line driving circuit that drives scanning signal lines that control opening and closing of a plurality of switching elements arranged in a matrix. The scanning signal lines are divided in accordance with a region for sequentially driving the scanning signal lines and a region for simultaneously driving the plurality of scanning signal lines, and a power line connected to an external circuit sequentially drives the plurality of scanning signal lines. It is characterized in that it is divided corresponding to a region to be driven and a region to drive the plurality of scanning signal lines simultaneously.
[0022]
In the scanning signal line driving circuit, among the power supply lines connected to the external circuit, only a power supply line for supplying a signal for opening a switching element connected to the scanning signal line is the plurality of the plurality of power supply lines. A configuration may be adopted in which the scanning signal lines are sequentially separated from the region where the scanning signal lines are sequentially driven and the region where the plurality of scanning signal lines are simultaneously driven.
[0023]
Further, the image display device of the present invention is configured such that a plurality of pixels and switching elements arranged in a matrix, a scanning signal line for controlling opening and closing of the switching elements, and selectively passing through the switching elements to each pixel. Data signal lines for supplying data signals, scanning signal line driving circuits and data signal line driving circuits for driving the scanning signal lines and data signal lines, and externals for supplying desired signals to the driving circuits The scanning signal line driving circuit is configured to display an image corresponding to a plurality of image formats using all or a part of the pixel and using a part of the pixel. In the image display device that simultaneously scans a plurality of scanning signal lines corresponding to a non-display area where no image is displayed, the scanning signal line drive circuit includes the plurality of image formats. Is divided correspond to and, the power supply line connecting the said external circuit and the scanning signal line driving circuit is characterized in that it is separated in correspondence with the image format.
[0024]
The above image display device includes only a power supply line for supplying a signal for opening a switching element connected to the scanning signal line among power supply lines connecting the external circuit and the scanning signal line driving circuit. However, it may be configured to be separated corresponding to each image format.
[0025]
The image display device may have a configuration in which each of the separated power supply lines connecting the external circuit and the scanning signal line driving circuit has a separate terminal.
[0026]
The image display device may be configured such that the separated power lines connecting the external circuit and the scanning signal line driving circuit each have a common terminal.
[0027]
The image display device may have a configuration in which the plurality of pixels, switching elements, scanning signal line driving circuits, and data signal line driving circuits are formed on the same substrate.
[0028]
In the above image display device, at least the transistors constituting the scanning signal line driving circuit and the data signal line driving circuit may be a polycrystalline silicon thin film transistor formed by a process of 600 ° C. or lower.
[0029]
Hereinafter, the operation of the above configuration will be described. In the image display device of the present invention, when the display is performed using a part of the pixels by separating the power supply line connecting the external circuit and the scanning signal line driving circuit corresponding to each image format, Since the opening and closing of the switching elements connected to the plurality of scanning signal lines corresponding to the non-display area are simultaneously controlled, when the switching element SW changes from the open state to the closed state, or from the closed state to the open state, that is, Even when a large current flows through the scanning signal line driver circuit when the potential level of the scanning signal line corresponding to the non-display area is switched, the potential level of the scanning signal line corresponding to the display area varies due to the influence. Therefore, the occurrence of display defects can be suppressed.
[0030]
In addition, among the power supply lines connecting the external circuit and the scanning signal line driving circuit, only the power supply line for supplying a signal for opening the switching element connected to the scanning signal line is provided for each image format. You may make it isolate | separate corresponding to. This is because, when the potential level of a signal that opens the switching element connected to the scanning signal line among the potential levels input to the scanning signal line corresponding to the display region changes, the holding characteristics of the switching element This is because the influence on the display is very large. This also makes it possible to suppress the increase in power supply lines as much as possible.
[0031]
The separated power lines connecting the external circuit and the scanning signal line driving circuit may have separate terminals. In this case, it is possible to further reduce the influence of potential fluctuations occurring in each power supply line.
[0032]
The separated power lines connecting the external circuit and the scanning signal line driver circuit may have a common terminal. In this case, an increase in the number of connection terminals between the external circuit and the scanning signal line driving circuit can be avoided, so that an increase in circuit scale and mounting cost can be suppressed.
[0033]
In addition, by forming the plurality of pixels, switching elements, scanning signal line drive circuits, and data signal line drive circuits on the same substrate, it is possible to reduce the component cost and mounting cost of each drive circuit and improve the reliability. It becomes possible to plan.
[0034]
Further, by forming at least the transistors constituting the scanning signal line driving circuit and the data signal line driving circuit as a polycrystalline silicon thin film transistor formed by a process of 600 ° C. or lower, a large area can be formed on a low cost substrate such as glass. An image display device can be formed. In addition, since the scanning signal line driving circuit and the data signal line driving circuit having sufficient driving capability can be configured, the circuit scale of the external circuit can be suppressed.
[0035]
DETAILED DESCRIPTION OF THE INVENTION
[Embodiment 1]
A first embodiment of the present invention will be described with reference to FIGS. In the present embodiment, as shown in FIG. 1, the pixel array ARY, the scanning signal line drive circuit GD, and the data signal line drive circuit SD have a so-called driver monolithic structure in which they are formed on the same glass substrate SUB. An active substrate and a counter substrate (not shown) on which a counter electrode, a color filter, etc. are formed are bonded together with a predetermined gap, a liquid crystal material (not shown) is injected into this gap, and the back surface is illuminated. A direct view type liquid crystal display device provided with a device (not shown) will be described.
[0036]
The active substrate in this liquid crystal display device is connected to the scanning signal line driving circuit GD in the pixel array ARY and connected to the scanning signal line GL in the row direction, and to the data signal line SD in the column direction. A plurality of arranged data signal lines SL and a plurality of pixels PIX arranged in a matrix form in a region surrounded by the scanning signal lines GL and the data signal lines SL are formed. Further, the scanning signal line drive circuit GD and the data signal line drive circuit SD are driven by a signal from the external control circuit CTL and a power supply potential from the external power supply circuit VGEN.
[0037]
As shown in FIG. 12, each of the pixels PIX includes a switching element SW made up of a field effect transistor and the like, and a pixel capacitor (made up of a liquid crystal capacitor CL and an auxiliary capacitor CS added if necessary). .
[0038]
As described above, the scanning signal line driving circuit GD and the data signal line driving circuit SD are formed on the same substrate as the pixel array ARY, that is, monolithically, so that they are driven rather than separately configured and mounted. Circuit manufacturing costs and mounting costs can be reduced, and reliability can be improved.
[0039]
In order to achieve a driver monolithic structure, it is desirable that the scanning signal line driving circuit GD and the data signal line driving circuit SD are formed using polycrystalline silicon thin film transistors having a high electron mobility. An example of the structure of this polycrystalline silicon thin film transistor is shown in FIG.
[0040]
In FIG. 2, 1 is an insulating substrate, 2 is a base coat layer, 3 is a source region, 4 is a channel region, 5 is a drain region, 6 is a gate insulating film, 7 is a gate electrode, 8 is an interlayer insulating film, 9 and 10 are Metal wiring. The source region 3, the channel region 4 and the drain region 5 are made of a polycrystalline silicon thin film. In particular, impurity ions are implanted into the source region 3 and the drain region 5.
[0041]
A manufacturing process for forming this polycrystalline thin film transistor on a glass substrate will be briefly described below with reference to FIG. FIG. 3 illustrates a CMOS-TFT configured by combining an n-type transistor and a p-type transistor.
[0042]
First, an amorphous silicon thin film 12 is deposited on the glass substrate 11 as shown in FIG. 3A, and then the amorphous silicon thin film 12 is irradiated with an excimer laser as shown in FIG. 3B. At this time, the amorphous silicon 12 is crystallized to become polycrystalline silicon 13. Although omitted in FIG. 3, SiO 2 is formed on the glass substrate 1 in order to prevent diffusion of ions in the glass. ₂ An overcoat layer made of or the like is formed.
[0043]
Next, as shown in FIGS. 3C to 3E, the polycrystalline silicon 13 is patterned into a desired shape, and SiO 2 is patterned. ₂ A gate insulating film 14 made of, for example, is formed, and a gate electrode 15 of the transistor is formed of aluminum or the like. Thereafter, as shown in FIG. 3F, P (phosphorus) is added as an impurity to the source and drain regions of the n-type transistor in a state where the formation region of the p-type transistor is covered with a resist 16, and subsequently FIG. As shown in g), B (boron) is added as an impurity to the source and drain regions of the p-type transistor with the n-type transistor formation region covered with a resist 17.
[0044]
Then, as shown in FIGS. 3 (h) to (j), SiO ₂ Or SiN _X After the interlayer insulating film 18 made of, for example, is deposited and the contact hole 19 is opened, the metal wiring 20 such as aluminum is formed to complete the CMOS-TFT.
[0045]
According to the manufacturing method described above, the maximum temperature of the process is about 600 ° C. when the gate insulating film 14 is formed. Therefore, for example, a high heat-resistant glass such as 1737 glass manufactured by Corning, USA can be used at low cost. A large area can be realized.
[0046]
If the polycrystalline silicon thin film transistor as shown in FIG. 2 is used as the field effect switching element SW provided in each pixel PIX in the pixel array ARY, the scanning signal line driving circuit GD and the data signal line driving circuit SD are used. It is possible to manufacture the transistor inside and the transistor provided in each pixel PIX through substantially the same process.
[0047]
Next, a case where display is performed using the image display apparatus of the present embodiment will be described below. Here, an image format (hereinafter, referred to as a first image format) that is displayed using the entire pixel array ARY, and black at least above and below the pixel array ARY as shown in FIGS. 13 (a) and 13 (b). An example is a liquid crystal display device which can provide a non-display area where display is performed and can display an image format (hereinafter referred to as a second image format) displayed using a pixel array ARY excluding the non-display area. The case where the second image format is displayed will be described.
[0048]
When black display areas (non-display areas) exist on the left and right sides of the display area, the black display area is blackened simultaneously with the original image data writing by using a dedicated circuit for writing black display data, for example. Display data can be written to the data signal line SL. Then, by activating the scanning signal line GL, the black display data and the image data written to the data signal line SL can be written to the corresponding pixels. Note that the dedicated circuit for writing the black display data can be formed with a simple structure because it may be a circuit that only supplies a certain level of potential, and the circuit structure is not complicated.
[0049]
On the other hand, with respect to the black display areas (non-display areas) above and below the display area, it is necessary to write black display data to all the data signal lines SL and cannot write simultaneously with the original image data. Write black display data using. Further, when the number of scanning signal lines GL corresponding to the black display areas (non-display areas) above and below the display area is large, it is impossible to sequentially scan all of them during the vertical blanking period. For example, when the first image format is the XGA format (pixel number 1024 × 768) and the second image format is a wide television image (pixel number 1024 × 480), the scanning signal line corresponding to the non-display area The number of GLs is 288, and it is impossible to sequentially scan all of them during the vertical blanking period. Therefore, during the vertical blanking period, a plurality of scanning signal lines GL corresponding to the non-display area are simultaneously scanned to write black display data.
[0050]
Signal waveforms of the scanning signal line GL at this time are shown in FIGS. Here, as an example, there is shown a case where there are k scanning signal lines GL in total, and the scanning signal lines GLi to GLj−1 of the i-th to j−1th rows correspond to the display area of the second image format. ing.
[0051]
In FIG. 4, the scanning signal lines GLi to GLj−1 are sequentially scanned during the image display period (period in which the video signal DAT is output), and correspond to the non-display area during the vertical blanking period. The scanning signal lines GL1 to GLi-1 and GLj to GLk are simultaneously closed. In FIG. 5, the vertical blanking period is divided into two periods, and the scanning signal lines GL1 to GLi-1 corresponding to the non-display area on the upper side of the image display area are simultaneously provided in the first half of the vertical blanking period. In the second half of the vertical blanking period, the scanning signal lines GLj to GLk corresponding to the non-display area below the image display area are simultaneously closed.
[0052]
Then, by using the video signal DAT as black display data during the vertical blanking period, black display data can be written in the non-display areas above and below the display area.
[0053]
When operated as shown in FIG. 4, the entire non-display area can be controlled by one kind of timing signal, and the circuit configuration can be simplified. Further, when the operation is performed as shown in FIG. 5, the timing is shifted by dividing the non-display area into two parts, so that the peak of potential fluctuation that occurs when the potential level of the scanning signal line corresponding to the non-display area is switched is suppressed. Therefore, it is possible to reduce the supply capacity of the external power supply circuit VGEN that supplies power, thereby reducing the circuit scale and power consumption.
[0054]
Next, the configuration of the scanning signal line drive circuit GD will be described in detail below. The scanning signal line drive circuit GD used in the liquid crystal display device of the present embodiment enables three scanning signal line drives as shown in FIGS. 6A and 6B in order to enable display as described above. The circuits are divided into circuits GD1, GD2, and GD3. The first image format is displayed using areas corresponding to all the scanning signal line driving circuits GD1, GD2, and GD3, and the second image format includes an area corresponding only to the central scanning signal line driving circuit GD2. Displayed.
[0055]
6A shows power supply potentials VGL1 and VGH1 for driving the scanning signal line drive circuits GD1 and GD3 among the power supply lines connecting the external power supply circuit VGEN and the scanning signal line drive circuits GD1, GD2, and GD3. A power supply line for inputting and a power supply line for inputting power supply potentials VGL2 and VGH2 for driving the scanning signal line drive circuit GD2 are separately provided. In FIG. 6B, power supply lines for inputting the power supply potentials VGL1, VGL2, VGL3, VGH1, VGH2, and VGH3 for driving the scanning signal line drive circuits GD1, GD2, and GD3 are separately provided. Is.
[0056]
By adopting such a configuration, even when a large current flows in a certain scanning signal line driving circuit, it does not affect the potential of other scanning signal line driving circuits, so that the occurrence of display defects is suppressed. be able to. That is, when the second image format is displayed, when the potential levels of the plurality of scanning signal lines GL corresponding to the non-display area are simultaneously switched during the vertical blanking period, a large current is supplied to the scanning signal line driving circuits GD1 and GD3. Even if a potential fluctuation occurs in the driving circuit, the potential fluctuation may affect the potential of the scanning signal line driving circuit GD2 corresponding to the display area by separating the power supply lines as described above. Absent. Therefore, the potential of the scanning signal line connected to the scanning signal line drive circuit GD2 corresponding to the display area is not disturbed, and a good image display can be obtained.
[0057]
In order to further reduce the effect of suppressing the influence of the above-described potential fluctuation, as shown in FIG. 7, the separated power lines may be formed to have separate terminals.
[0058]
On the other hand, in order to prevent an increase in the number of terminals, a corresponding increase in mounting cost, or an increase in circuit scale, the separated power lines may be formed so as to have common terminals as shown in FIG. .
[0059]
[Embodiment 2]
Hereinafter, a second embodiment of the present invention will be described. The configuration of the scanning signal line drive circuit GD in this embodiment is shown in FIG.
[0060]
As shown in FIG. 9, the scanning signal line driving circuit GD in the present embodiment is the same as that in the first embodiment in that it is divided into three scanning signal line driving circuits GD1, GD2, and GD3. Only a power supply line for inputting the power supply potential VGL for opening the switching element SW provided in the PIX is provided separately, and for inputting the power supply potential VGH for closing the switching element SW. This embodiment is different from the first embodiment in that the power supply line is common.
[0061]
In such a configuration, when the second image format is displayed, as shown in the first embodiment, each of the scanning signal line drive circuits GD1, GD2, GD3 is based on the drive waveform shown in FIG. 4 or FIG. To work.
[0062]
In this case, when the plurality of scanning signal lines GL corresponding to the non-display area simultaneously change from the closed state to the open state during the vertical blanking period, a large current flows through the scanning signal line drive circuits GD1 and GD3, and the switching element Potential fluctuation occurs in the power supply line that opens the SW. Further, when the plurality of scanning signal lines GL corresponding to the non-display area are simultaneously changed from the open state to the closed state, the power supply line potential fluctuation that causes the switching element SW to be closed occurs.
[0063]
In the scanning signal line connected to the scanning signal line driver circuit GD2 corresponding to the display area during the vertical blanking period, the potential for opening the switching element SW (when the pixel transistor used as the switching element SW is n-ch) Since a low potential is applied to the power supply line that opens the switching element SW, a leakage current is generated in the switching element SW, and the holding characteristics of the switching element SW are impaired. As a result, the display quality is greatly reduced.
[0064]
Accordingly, the power supply potential VGL that opens the switching element SW provided in each pixel PIX among the power supply lines connecting the external power supply circuit VGEN and the scanning signal line drive circuits GD1, GD2, and GD3 is input. For this purpose, it is sufficient to provide only a separate power line for the purpose. With such a configuration, an increase in power supply lines can be suppressed, so that an increase in circuit scale can be suppressed.
[0065]
In the present embodiment, similarly to the first embodiment described above, the power supply lines for inputting the power supply potential VGL for opening the switching element SW are further provided by the scanning signal line drive circuits GD1 and GD3. May be separated. Further, the terminals of the separated power supply lines may be provided in common or separated as in the first embodiment.
[0066]
Note that the image display devices described in Embodiments 1 and 2 described above can be used not only as a transmission type but also as a reflection type. Furthermore, it is possible to use not only the direct view type but also a projection type. 1 shows a system configuration including an optical system when the image display apparatus of the present invention is applied to a projection type. In FIG. 10, 21 is a light source, 22 is a dichroic mirror that reflects light of a specific wavelength and transmits other light, 23 is a reflection mirror, and 24R, 24G, and 24B correspond to red, green, and blue displays, respectively. Three liquid crystal display panels, 25 is a projection lens, and 26 is a screen.
[0067]
In such a projection-type image display device, when a plurality of image formats are switched and displayed, the non-display area can be eliminated from the screen by appropriately changing the projection magnification by setting the non-display area as black display. Display without any discomfort. In addition, as a projection type, it can apply to both a front projection type and a rear projection type.
[0068]
【The invention's effect】
As described above, in the image display device of the present invention, the power supply line connecting the external circuit and the scanning signal line driving circuit is separated corresponding to each image format, so that a part of the pixel is used. When performing display, the switching elements SW connected to the plurality of scanning signal lines corresponding to the non-display area are simultaneously controlled, so that the switching element SW is changed from the open state to the closed state, or from the closed state to the open state. Even when a large current flows through the scanning signal line driver circuit when the potential level of the scanning signal line corresponding to the non-display area is switched, the scanning signal line corresponding to the display area is affected by the influence. The potential level is not changed, and the occurrence of display defects can be suppressed.
[0069]
In addition, among the power supply lines connecting the external circuit and the scanning signal line driving circuit, only the power supply line for supplying a signal for opening the switching element connected to the scanning signal line is provided for each image format. By separating them according to the above, it is possible to suppress an increase in power supply lines as much as possible and to suppress an increase in circuit scale.
[0070]
The separated power lines connecting the external circuit and the scanning signal line driving circuit have separate terminals, thereby minimizing the influence of potential fluctuations occurring in the power lines. There is an effect that it can be reduced.
[0071]
Further, the separated power lines connecting the external circuit and the scanning signal line driving circuit have a common terminal, thereby connecting the external circuit and the scanning signal line driving circuit. Since an increase in the number can be avoided, an increase in circuit scale and mounting cost can be suppressed.
[0072]
In addition, by forming the plurality of pixels, switching elements, scanning signal line drive circuits, and data signal line drive circuits on the same substrate, it is possible to reduce the component cost and mounting cost of each drive circuit and improve the reliability. There is an effect that it can be achieved.
[0073]
Further, by forming at least the transistors constituting the scanning signal line driving circuit and the data signal line driving circuit as a polycrystalline silicon thin film transistor formed by a process of 600 ° C. or lower, a large area can be formed on a low cost substrate such as glass. There is an effect that an image display device can be formed. In addition, since the scanning signal line driving circuit and the data signal line driving circuit having sufficient driving capability can be configured, the circuit scale of the external circuit can be reduced.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of an image display device of the present invention.
FIG. 2 is a cross-sectional configuration diagram of a polycrystalline silicon thin film transistor used in the image display device of the present invention.
FIG. 3 is a cross-sectional flow diagram showing a manufacturing process of the polycrystalline silicon thin film transistor shown in FIG. 2;
FIG. 4 is a diagram showing an example of a drive waveform when driving the image display apparatus of the present invention.
FIG. 5 is a diagram showing another example of drive waveforms when driving the image display device of the present invention.
FIG. 6 is a diagram showing a configuration of a scanning signal line drive circuit and a configuration of a power supply line connected thereto in Embodiment 1 of the present invention. FIG. 6A shows an external power supply circuit VGEN and each scanning signal. Of the power supply lines connecting the line drive circuits GD1, GD2, and GD3, the power supply lines for inputting the power supply potentials VGL1 and VGH1 for driving the scan signal line drive circuits GD1 and GD3 and the scan signal line drive circuit GD2 are driven. FIG. 6B shows a case where power supply lines for inputting power supply potentials VGL2 and VGH2 to be input are separately provided. FIG. 6B shows power supply potentials VGL1 for driving the scanning signal line drive circuits GD1, GD2, and GD3. This shows a case where power supply lines for inputting VGL2, VGL3, VGH1, VGH2, and VGH3 are separately provided.
7 is a diagram showing a terminal structure of the power supply line shown in FIG.
8 is a diagram showing another terminal structure of the power supply line shown in FIG.
FIG. 9 is a diagram showing a configuration of a scanning signal line drive circuit and a configuration of a power supply line connected thereto in Embodiment 2 of the present invention.
FIG. 10 is a configuration diagram when the image display device of the present invention is applied to a projection display device.
FIG. 11 is a diagram illustrating a configuration example of a conventional active matrix liquid crystal display device.
12 is a detailed diagram of a pixel PIX in FIG.
13 is a diagram showing a display example in the case where display is performed using a part of pixels, and FIG. 13A shows a case where non-display areas are provided above and below the image display area. (B) is a case where non-display areas are provided above and below and to the left and right of the image display area.
[Explanation of symbols]
1 Insulating substrate
2 Base coat layer
3 Source area
4 channel region
5 Drain region
6 Gate insulation film
7 Gate electrode
8 Interlayer insulation layer
9 Metal wiring
10 Metal wiring
ARY pixel array
GD scanning signal line drive circuit
GL scanning signal line
SD data signal line drive circuit
SL data signal line
PIX pixel
CTL external control circuit
VGEN External power supply circuit
SW switching element
CL LCD capacity
CS auxiliary capacity
VGL Power supply potential for driving the scanning signal line drive circuit
VGH Power supply potential for driving the scanning signal line driving circuit

Claims (6)

A plurality of pixels and switching elements arranged in a matrix, scanning signal lines for controlling opening and closing of the switching elements, and data signal lines for selectively supplying data signals to the pixels via the switching elements A scanning signal line driving circuit and a data signal line driving circuit for driving the scanning signal line and the data signal line, and an external circuit for supplying a desired signal to each of the driving circuits. The image corresponding to a plurality of image formats is displayed using all or a part of the image, and in the case of the image format using a part of the pixels, the scanning signal line driving circuit scans corresponding to a non-display area where no image is displayed with scanning signal lines plurality simultaneously, image data to be hidden except black display data in the non-display region through a data signal line is written In the shown apparatus,
The scanning signal line driving circuit is divided corresponding to the plurality of image formats, and a power line connecting the external circuit and the scanning signal line driving circuit is separated corresponding to each image format. An image display device characterized by the above. Of the power lines connecting the external circuit and the scanning signal line driving circuit, only the power lines for supplying a signal for opening the switching element connected to the scanning signal line correspond to each image format. The image display device according to claim 1 , wherein the image display device is separated. The image display apparatus according to claim 1 , wherein the separated power supply lines connecting the external circuit and the scanning signal line driving circuit have separate terminals. The image display apparatus according to claim 1 , wherein the separated power supply lines connecting the external circuit and the scanning signal line driving circuit each have a common terminal. 5. The image display device according to claim 1 , wherein the plurality of pixels, the switching element, the scanning signal line driving circuit, and the data signal line driving circuit are formed on the same substrate. 6. . The transistors constituting at least the scanning signal line driving circuit and the data signal line drive circuit, to any one of claims 1 to 5, characterized in that a polycrystalline silicon thin film transistor formed at 600 ° C. the following process The image display device described.

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