JP3763695B2 - CAD system for electronic circuit board design and recording medium storing program used therefor - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a CAD system for designing an electronic circuit board and a recording medium storing a program used therefor.
[0002]
[Prior art]
Semiconductor chips such as ICs and microprocessors have been rapidly integrated in recent years, so that the number of terminals at the input / output section of the chip is also increasing significantly. As a result, the number of wiring parts in electronic circuit boards for connecting such chips has also increased rapidly, and a multilayer type in which a multilayer wiring part is formed through an insulating layer such as a polymer material or ceramic. The number of package substrates is increasing. Such an electronic circuit board has a conductive portion serving as a connection terminal, such as a pad (or land) for connecting to a chip and a pad for connecting itself to another wiring board such as a motherboard. It is usually formed by exposing many on the surface. For example, in the electronic circuit board B shown in FIG. 1, a wiring part 201 is formed in an insulating layer 200 made of resin or ceramic, and the terminal part of the wiring part 201 is bonded for connection to a terminal on the chip side. While the pad 203 is formed, the intermediate part of the wiring part 201 is connected to a pin pad 202 (for connecting the connection pin 206) formed on the back side of the substrate through a via 207.
[0003]
Recently, in order to efficiently design such an electronic circuit board, a so-called CAD (Computer Aided Designing) system using a computer drawing process has been used. This is done by opening a drawing screen on the display device and drawing a figure such as a wiring part, pad, or via for connecting between different wiring layers on the drawing screen using an input device such as a mouse. Is what you get.
[0004]
By the way, in the substrate as described above, the pads, lands, etc. are usually plated to ensure the connection. In order to perform such plating, generally, a plated wire portion 204 is formed in the wiring portion 201, and this is connected to a metallization layer 205 for energizing plating formed on the side surface of the substrate. A method of energizing through 201 is adopted. Therefore, it is important in design that the wiring portion connected to each pad or the like is such that the plated wire is surely connected to the metallized layer. For example, if a plated wire is missing from a certain wiring portion, it may lead to a defect such as a plating drop or uneven plating on a pad or the like to which the wiring portion is connected.
[0005]
And if the number of wiring parts built in one board increases and they are complicatedly crossed over multiple layers, one by one even during drawing of a design drawing using a CAD system It is very difficult to accurately grasp the formation state of the plated wire on the wiring portion, and the above-mentioned defect is inevitably generated due to oversight of the plated wire missing. In view of this, various inspection methods on CAD have been proposed, such as Japanese Patent Application Laid-Open No. 63-188267.
[0006]
[Problems to be solved by the invention]
Here, in an actual electronic circuit board, the shape, the formation position, or the number of formation of the energized metallized layer is often different depending on the type. This means that the setting contents (for example, the number of areas, positions, and shapes) of the connection determination target areas differ depending on the product type on the drawing screen. Also, the plating energization method may differ depending on the product type, which causes a difference in the determination condition of the connection state of the plated wire. However, the conventional inspection methods cannot change the inspection settings, or the setting changes are very troublesome, and cannot be flexibly handled according to the inspection purpose and the board type. There were many.
[0007]
The object of the present invention is to accurately grasp or check the continuity of the wiring part, such as the bonding between the plated wire and the side metallized layer, with simple processing, and according to the purpose of inspection and the difference in the substrate type. An object of the present invention is to provide an electronic circuit board design CAD system having a function capable of changing the setting contents flexibly and easily, and a recording medium storing a program used for the CAD system.
[0008]
[Means for solving the problems and actions / effects]
In the present invention, a plurality of wiring layers are laminated via an insulating layer, and a portion to be plated is formed on the surface of the substrate where a wiring portion formed in the wiring layer is electrically conductive. The present invention relates to a CAD system for designing an electronic circuit board in which a metallization layer for energization to be connected is formed on a side surface,
A wiring pattern figure input means for inputting a wiring pattern figure which is a figure of a wiring part or a plated part on a drawing screen;
Area setting for setting the reference area corresponding to the main surface outline of the board and the connection determination target area formed outside the reference area in a form including the energization connection area corresponding to the metallization layer for energization on the drawing screen Means,
Element region setting means for setting a plurality of element regions including one or a plurality of energized connection regions for the connection determination target region;
A pattern set variable setting means for setting a variable (hereinafter referred to as a pattern set variable) representing a set of wiring pattern figures connected to the element area corresponding to each element area;
Arithmetic expression storage means for storing an arithmetic expression described using the pattern set variable and one or more operators combined therewith;
An operation program module storage unit that stores an operation program module that is prepared for each operator and that executes a set operation content predefined for each operator;
An arithmetic expression reading means for reading the arithmetic expression from the arithmetic expression storage means;
The pattern set variable included in the read arithmetic expression is detected, and among the wiring pattern figures, the one connected to the element area corresponding to the pattern set variable is extracted to correspond to the pattern set variable. Pattern set generation means for generating a set of interconnected pattern figures,
According to the description content of the arithmetic expression, an arithmetic execution means for executing a set operation defined by each operator on a set of wiring pattern figures indicated by each pattern set variable using a corresponding arithmetic program module;
Wiring pattern connection information generating means for generating information related to the connection state between the wiring pattern figure and the energized connection region based on the calculation result;
Wiring pattern connection information output means for outputting the generated wiring pattern connection information; and
[0009]
In the CAD system, the connection determination target area is subdivided into a plurality of element areas including the energization connection area, and a set of wiring net figures connected to each element area that is a connection determination target is generated. A set operation according to a predetermined arithmetic expression is performed between the sets, and wiring net connection information is generated based on the calculation result. As a result, even when the discrimination conditions differ depending on the purpose of discrimination and the board type, it becomes possible to set the desired discrimination conditions accurately by using arithmetic expressions, and in response to various needs. it can.
[0010]
The recording medium of the present invention stores a program for causing a computer to function as each means constituting the CAD system of the present invention. Thus, the CAD system of the present invention can be easily realized by installing the program stored in the recording medium in the computer.
[0011]
Operators are registered as a sum operator for obtaining the union of two wiring pattern figures, a difference operator for obtaining a difference set, and a product operation operator for obtaining a common set. It is possible to include at least one of a negation operator for obtaining a negative set of a set of wiring pattern figures for a set of all wiring pattern figures. As a result, except for a special substrate, it is possible to cover most of the determination conditions required for the design regarding the connection state of the plated wires. This will be described in detail in the section of the embodiment of the invention. For example, as an arithmetic expression, pattern set variables corresponding to all the energized connection regions set are connected in series by a sum operation, and the result is a negative operation. If the contents to be applied are stored, it is possible to obtain information on the existence of a wiring pattern figure that is not connected to any energization connection region (that is, a wiring pattern figure from which a plated wire has been removed).
[0012]
In the above configuration, arithmetic expression input means for inputting an arithmetic expression can be provided. In this case, the arithmetic expression storage means can be provided with an arithmetic expression registration unit for registering and storing the input arithmetic expression. This is convenient because an arithmetic expression can be freely created and registered in order to set a discrimination condition according to the purpose. In this case, a plurality of arithmetic expressions can be stored in the arithmetic expression storage unit. An arithmetic expression selecting means for selecting an expected one from the stored arithmetic expressions is provided, and the arithmetic executing means can be configured to execute only an operation related to the selected arithmetic expression. . This is more convenient because a plurality of arithmetic expressions describing the contents of various discrimination conditions are prepared and can be freely selected and used according to the purpose.
[0013]
In the CAD system of the present invention,
A drawing layer setting means for setting a plurality of drawing layers corresponding to the wiring layers to be formed in the substrate on the drawing screen;
An object input means for inputting an object as a drawing unit of the wiring pattern figure to the drawing layer;
Via input means for inputting via shapes connecting wiring portions between different wiring layers to a drawing layer corresponding to those wiring layers;
Register multiple objects that are located in a connected state on the same drawing layer, or objects that are connected to each other via via graphics between different drawing layers, as an integrated wiring net figure Wiring net figure registration means;
Can be provided. In this case, the wiring pattern connection information generating means generates information related to the connection state between the wiring net graphic and the energized connection area based on the positional relationship between the registered wiring net graphic and the connection determination target area. Is done.
[0014]
In the above configuration, the wiring pattern figure is input in units of objects, and the objects are integrated by connecting the objects on the same layer or by connecting the objects between the i-layers via the vias. It is registered as a graphic, and it is determined whether or not the wiring net graphic is connected to a connection determination target region that is set including an energization connection region representing the energization metallization layer. That is, since the objects connected to each other, that is, the wiring net figure means a wiring net that is connected without disconnection, it is only necessary to determine the connection relationship between this and the current-carrying connection region representing the current-carrying metallization layer, for example. It is possible to easily and reliably check for missing plated wires.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to examples shown in the drawings.
FIG. 2 is a block diagram showing the overall configuration of an embodiment of a CAD system 1 for designing an electronic circuit board (hereinafter also simply referred to as a CAD system) according to the present invention. The CAD system 1 includes a computer main body 12 including an I / O port 2 and a CPU 3, a ROM 4 and a RAM 5 connected to the I / O port 2, and input means such as a keyboard 6 or a mouse 7 as a peripheral device, a CD-ROM drive. 8 or a floppy disk drive 9 or the like, a recording medium reading means, a hard disk drive (hereinafter referred to as HDD) 10, a monitor 13 connected via a monitor control unit 11, a printer 14, etc. Has been built.
[0016]
The CPU 3 is a main component of area setting means, wiring pattern connection information generation means, element area setting means, arithmetic expression reading means, pattern set generation means, calculation execution means, arithmetic expression input means, and the like. Also, drawing screen display means, wiring pattern graphic input means, wiring pattern connection information output means, element area setting data storage means, arithmetic expression storage means, arithmetic program module storage section, arithmetic expression input means, arithmetic expression registration section, arithmetic expression It also functions as a control entity such as selection means. The keyboard 6 or mouse 7 is the main part of the wiring pattern graphic input means, arithmetic expression input means, and arithmetic expression selection means. The HDD 10 and the RAM 5 constitute the main parts of an element area setting data storage unit, an arithmetic expression storage unit, an arithmetic program module storage unit, and an arithmetic expression registration unit. The monitor 13 functions as a drawing screen display means and a wiring pattern connection information output means. The printer 14 functions as a wiring pattern connection information output unit and the like in addition to a drawing output unit that prints out a design drawing of an electronic circuit board that has been drawn.
[0017]
The HDD 10 stores an operating system program (hereinafter referred to as OS) 61 and an application program (hereinafter referred to as application) 62. The application 62 is a basic program for realizing the functions of the CAD system 1 and operates on the OS 61. This is stored in a computer-readable state on the CD-ROM 20 or the like, for example, and is installed using, for example, a dedicated installer program. The HDD 10 stores a data file 63 of a created drawing. On the other hand, the work memory 51 of the OS 61 and the work memory 52 of the application are formed in the RAM 5.
[0018]
As shown in FIG. 3, the application program 62 includes a control program 71, a drawing tool program 72, a check language system program 73, arithmetic expression data 74, element area setting data 75, a display / output program 76, and the like. Among these, the control program 71 is a program for performing basic processing for causing a computer to function as the CAD system 1. The other programs complement the functions of the control program 71, and their roles will be described later. The ROM 4 stores various basic programs for hardware control of the computer system. When the application program 62 is started, the control program 71 is stored in the control program resident memory 52a formed in the application work memory 52, the drawing tool program 72 is stored in the drawing tool resident memory 52b, and the check language system program 73 is stored in the same manner. In the check language system resident memory 52c, the display / output program 76 is also loaded into the display / output program resident memory 52d. These resident memories function as work areas for the corresponding programs. The arithmetic expression data 74 is loaded into the arithmetic expression memory 52e.
[0019]
The application work memory 52 is provided with a drawing data memory 52f for storing drawing data, which is image data of the drawing being drawn, and element region setting data 75 for drawing an element region to be described later. Is loaded into the element area setting data memory 52g. Further, a wiring net data registration memory 52 i is formed in the RAM 5. FIG. 5 shows the contents, details of which will be described later.
[0020]
As shown in FIG. 4, the check language system program 73 includes a sum operation module 73a, a difference operation module 73b, a product operation module 73c, a negative operation module 73d, and an oblique connection net detection module 73e.
[0021]
Hereinafter, the operation of the CAD system 1 will be described in detail.
When the application program 62 of FIG. 3 is activated, the control program 71 displays the drawing screen 40 on the monitor 13 (FIG. 2) as shown in FIG. The application program 62 of the present embodiment is constructed as a draw-type graphic software in the same manner as a known CAD system, and a wiring pattern that is a figure of a wiring part or a plated part by operating the mouse 7 on the drawing screen 40. The drawing work is advanced while inputting figures in units of objects. In this embodiment, when the drawing screen 40 for a new drawing is launched, the outline of the main surface of the board to be designed / drawn is displayed in the drawing screen 40 based on display data separately stored in the HDD 10 or the like. Corresponding quadrilateral reference areas 51, and as a default object graphic, a figure of a portion to be plated formed on the substrate surface, for example, a specific pin pad graphic 53 and a bonding pad graphic 55 are displayed. . In this case, a default object data storage unit that stores default object data in association with the product number is provided in the HDD 10, for example, and the product number is input by the keyboard 6 (or by clicking a soft button on the screen with the mouse 7). It is convenient if the default object data to be read is read and displayed on the drawing screen.
[0022]
Here, the substrate to be designed is a package substrate or the like in which a plurality of wiring layers are stacked via an insulating layer. Then, a plurality of drawing layers corresponding to the wiring layer to be formed are set on the drawing screen 40 by the operation of the control program 71. These drawing layers (hereinafter, also simply referred to as layers) cannot be visually discriminated because they overlap in FIG. In addition, the figure written in each layer is overlaid on the drawing screen 40, but other figures can be displayed by displaying only the figure on a specific layer or changing the color, brightness, shading, fill pattern, etc. The display state can be different from the figure on the layer.
[0023]
FIG. 6 is a flowchart showing the flow of the drawing process. First, in S1, a layer to which an object is to be written is selected. This layer selection can be performed, for example, by clicking a soft button (not shown) for layer selection displayed on the screen with the mouse 7 (FIG. 2). The figure that can be input is the above-described object and the via figure for connecting the objects between different layers. In S2 and S8, which one is selected is determined by command input. This command input can also be performed by a mouse click of a soft button (not shown) for selecting object input or via input.
[0024]
If the object input is selected, the process proceeds from S2 to S3 to perform object drawing. When drawing an object, a drawing tool program 72 (FIG. 3) is prepared for each type of object to be drawn, such as wiring drawing and pad drawing, as in the known CAD system software. A drawing tool can also be selected by a mouse click of a drawing tool selection button (not shown) formed as a soft button on the screen. When the desired drawing tool is selected, as shown in FIG. 10B, the pointer P indicating the drawing position is moved by the mouse operation, and the mouse is clicked or dragged (the mouse is moved while the mouse button is held down). ) Draw an object while combining operations such as. The figure shows a state in which the figure of the wiring portion connecting the figure 53 of each pin pad and the figure of the bonding pad 55 has been drawn as an object.
[0025]
As shown in FIG. 12B, each time an object is drawn, the object description data, which is graphic data, is associated with object specifying data (for example, object code) and layer specifying data (for example, layer number). In this manner, it is stored in the drawing data memory 52g of FIG. The object description data is vector data for defining the shape, size, and drawing position of the objects OB11, OB12, OB13 and the like on a coordinate plane set on the screen 40 as shown in FIG. It is expressed as a set of functional formula data or coordinates of specific reference points and dimension defining data such as radius and length. For example, the object OB11 circulates in a predetermined direction (for example, clockwise) starting from the reference point A11 (x0, y0), while A11 (x1, y1), A11 (x2, y2), A11 (x3, y3) , A11 (x0, y0) are represented as a data set of coordinates of the end point position of each vector when the outline of the object is drawn by connecting the vectors in the order. The same applies to the object OB12. A circular object OB13 representing a pad or the like is represented as a data set of its center coordinates C13 and radius r13. Further, although not shown, for example, a figure of a wiring portion having a constant width can be expressed as a data set of coordinates of the starting point position and the ending point position and a line width. In FIG. 12, all three objects OB11, OB12, and OB13 are drawn on the same layer (No. 1).
[0026]
On the other hand, when the via input is selected in FIG. 6, the process proceeds to S9 and the via input process is performed. As shown in FIG. 13A, the via V connects the wiring portions W1 and W2 of different wiring layers. In this embodiment, the input of the figure of the via V is, for example, a pointer on the screen. Can be positioned at a position where vias are to be input, and a layer that is the end point as well as a layer that is the starting point of the via can be designated. Then, as shown in FIG. 13B, the via graphic data is associated with via specifying data (for example, via code) as a set of via position data and layer specifying information of a layer serving as a via start point and end point. And stored in the drawing data memory 52f.
[0027]
Returning to FIG. 6, when the object is drawn, the process proceeds to S4, and as shown in FIG. 14A, the input partially overlaps (that is, is connected) with the input object OB12 in the same layer. It is determined whether or not the completed object OB11 exists. If it is No, it will progress to S5 further, and as shown in FIG. 15, it will be determined whether it is not connected to another object OB31 by the connection between different layers via via VA11. If this is also No, the object OB12 is set as a wiring net figure, for example, only the object specifying information is written in the wiring net data registration memory 52i of FIG. Register this.
[0028]
Further, in the case of Yes in S4 or S5 of FIG. 6, the process proceeds to S7, and the process of incorporating into the registered wiring net figure to which the object as the connection destination of the object belongs, that is, the object specifying data of the newly drawn object is A process of adding to the corresponding net data in the wiring net data registration memory 52i is performed. In the case of connection by via, the via specifying data is also added to the net specifying information. Thus, as shown in FIG. 5, in the wiring net data registration memory 52i, each net specifying information net1, net2,..., And object specifying data OB11, OB12,. Net data in which VA11, VA12,... Are associated with each other are stored.
[0029]
On the other hand, as shown in FIG. 14B, when objects that overlap between different layers occur, the object specifying data is not added to the overlapping net data. However, in S10 of FIG. 6, when a wiring net figure connected to each other by a newly input via graphic is generated, the process proceeds to S11, and the net data of those wiring net figures are merged. Is re-registered as net data of one wiring net figure. In this case, the net specific information may be left as one corresponding to one of the wiring net figures before integration, and the other may be deleted and treated as a missing number. You may make it provide net specific information.
[0030]
When the drawing operation is completed after repeating the drawing input of the object or via as described above, the process proceeds from S12 to S13, and the graphic data stored in the drawing data memory 52g, that is, the drawing data, A file name is given together with the net data in the wiring net data registration memory 52i, and the file name is written and saved in the drawing data file 63 of the HDD 10 (FIG. 2). In the example shown in FIG. 11, for convenience, 13 wiring net figures N1 to N13 are formed in the created drawing.
[0031]
The created drawing can be printed out from the printer 14 based on the drawing data.
[0032]
Next, FIG. 7 is a flowchart showing a flow of element area setting and check processing. First, in S101, an element area is set on the drawing screen. The setting of the element area may be performed in the middle of drawing or after the drawing is completed. In FIG. 11, four rectangles representing the metallization layer for energization on the side surface of the substrate corresponding to each side of the reference region 51 representing the outline of the main surface of the substrate are imitated in a manner in which the design target substrate is expanded and displayed. The current-carrying connection areas T, L, B, and R are set as element areas, and graphics representing these areas are displayed on the screen. The setting of the element area may be performed using standard element area setting data prepared in advance (for example, the data included in the application program 62 as shown in FIG. 3) or drawn by the operator. You may make it draw on a screen using a tool. In either case, the element area setting data can be described in the same format as the graphic data of the object. The element area setting data forms part of the drawing data, and as shown in FIG. 3, an element area name (element area specifying data) is stored in the element area setting data memory 52g formed in the drawing data memory 52f. Are stored in a form associated with.
[0033]
In FIG. 7, the process proceeds to S102, and the type of check to be performed is selected. This can be done, for example, by opening a check type selection window 41 as shown in FIG. The window 41 is formed with check names that can be executed, an arithmetic expression that gives the contents of the check, and a check selection button 42 for selecting whether or not to execute the check. Correspondingly, arithmetic expression data 74 is stored in the storage area of the application 62 of the HDD 10 as shown in FIG. 3, and is loaded into the arithmetic expression memory 52e of the work memory 52 of the RAM. It has become. As shown in FIG. 16A, the arithmetic expression data 74 is stored in such a manner that each arithmetic expression is associated with a check name (arithmetic expression specifying data), and an execution flag is attached to each arithmetic expression data 74. The check selection button 42 in the window 41 is turned on / off by a mouse click, and accordingly, the corresponding execution flag is turned on / off (for example, “1” is on and “0” is on). Off) is switched. Only the arithmetic expression whose execution flag is on is executed (FIG. 7: S103).
[0034]
For example, as shown in FIG. 11, for example, a check execution button 43 is formed in the drawing screen 40 so that the check can be executed when the mouse is clicked so that the check can be immediately started from the drawing work. It is convenient to leave. Thus, the process proceeds from S104 to S105 in FIG. If it is desired to change the contents of the check, the process returns from S104 to S102 through S108, and the check type is selected again.
[0035]
FIG. 8 is a flowchart showing details of the check process. Hereinafter, an outline of the principle of a check method using an arithmetic expression will be described. FIG. 17 is a somewhat simplified example of a drawing drawn on the drawing screen. Four element regions (energization connection regions) T, L, B, and R are in contact with each side of the reference region 51. Is formed. Also, it is assumed that seven conveniences a to g are registered for the wiring net figure. Whether or not these wiring net figures are connected to a certain element area is determined by considering each element area as an object by the same method as that for determining the connection between objects in the drawing process (FIG. 6). be able to. When a certain element area is designated, a set of connection nets to the element area can be obtained by searching all the wiring net figures connected to the element area based on the determination process. This search is performed using the check search / determination memory 52h of FIG. If a connection destination element area name (element area specifying information) is associated with a set of wiring net figures obtained in this way, it can be considered that the element area name represents one set variable. Hereinafter, this is called a net set variable.
[0036]
In the case of FIG. 17, the following four collective variables can be defined corresponding to each element region T, L, B, R.
T = {b, a}, L = {a, f}, B = {e, d}, R = {d, c} (1)
In addition, the wiring net figure that is not connected to any of the set element regions is g, and a set of all registered wiring net figures, that is, a mother set G can be considered, which is expressed as follows. (However, G does not represent a specific element region).
G = {a, b, c, d, e, f, g} (2)
As can be seen from this, the wiring net figure g represents a wiring net that does not conduct to any energizing metallization layer, that is, a wiring net with no plated wire, and in the drawing, the element regions T, L, B , R can be regarded as a wiring net figure that is not connected to any of R and R. When this set of nets with missing plated wires is Z, this can be expressed as follows using the symbol of a general set algebra (however, “′” is a complementary set ( Negation operator).
Z = (T∪L∪B∪R) '(3)
Further, for example, a difference operation for obtaining a difference set between the set A and the set B is defined as follows (however, if the same result is obtained, the content of the operation is not limited to this). .
A-B≡ (A∪B) ∩B '(4)
[0037]
Based on the above, the meaning and description method of the arithmetic expression used in this embodiment will be described. First, this arithmetic expression is an arithmetic expression of a set algebra applied between the net set variables as described above (the set element uses wiring net figure specifying information for processing). In this embodiment, an operation in a general set algebra is described by the following inverse Polish notation, that is, a notation in which an operator is placed after the operation number.
A∪B⇔AB | (∪⇔ |) (5)
A∩B⇔AB & （∩⇔ &） …… (6)
A-B ＾ AB ^ (-⇔ ^) (7)
A'⇔A! ('⇔!) (8)
[0038]
In addition, in the set algebra, the combination rule is established for the sum operation and the product operation, but in this notation, it can be expressed as follows.
(A∪B) ∪C = A∪ (B∪C) ⇔AB | C | = ABC || (9)
(A ∩ B) ∩ C = A ∩ (B ∩ C) ⇔ AB & C & = ABC && (10)
Using this, for example, it can be seen that the same result can be obtained even if expression (3) is expressed by any of the following.
Z = TL | B | R |! (11)
Z = TLB | R ||! (12)
Z = TLBR |||! ‥‥(13)
[0039]
Next, a program for reading the stored arithmetic expression, analyzing the contents, and executing the arithmetic operation is a check language system program 73 shown in FIG. The program 73 includes program modules 73a to 73d for performing a sum operation, a product operation, a difference operation, and a negation operation of the set when the set of wiring net figure specifying information is given. Further, a module 73e for detecting an oblique connection net described later is also provided. It also controls the input of arithmetic expressions. An arithmetic expression can be input using, for example, the keyboard 6 (FIG. 2) or the like and stored as arithmetic expression data 74 (FIG. 3).
[0040]
As the arithmetic expression execution processing by the check language system program 73, for example, the following method can be adopted. First, a memory area having a structure as shown in FIG. 19 is set in the check search / determination memory 52h (FIG. 3). This includes a plurality of input memories IM1, IM2, IM3,..., An operation result memory RM1 for storing operation results, and an operator memory OM for storing operators. Hereinafter, the flow of processing will be described with reference to the flowchart of FIG.
[0041]
First, in S201, an arithmetic expression designated for execution is read. An arithmetic expression is described by a net set variable and an operator. Hereinafter, these are collectively referred to as a syntax element. First, since the reverse Polish notation described above is used for the arithmetic expression, the syntax element at the head is always a net set variable (that is, an element region name). In S202, this is first read out, and the process proceeds to a process of searching for a net connected to the element area specified by the element area name (net search process) (S203).
[0042]
FIG. 9 shows details of the net search process. First, an element area corresponding to the element area name read in S301 is designated, and then it is checked whether there is an object connected to the element area (S305). If there is an object to be connected, all the net specifying information of the wiring net figure to which the object belongs is extracted (S306), and the first one (in this case, IM1) with respect to the input memories IM1, IM2, IM3,. Store. That is, what is stored in the input memory IM1 is a set of net specifying information belonging to the net set variable indicated by the element region name.
[0043]
On the other hand, in the arithmetic expression, an auxiliary operator for detecting an oblique connection net (hereinafter referred to as an oblique connection operator) can be attached to the net set variable. This diagonal connection operator is represented by “˜” in the notation of this embodiment, and is placed before the target operator. For example, a set of wiring net figures obliquely connected to the element area A is represented by “˜A”. If this diagonal connection operator is detected in S304, the process proceeds to S307, where it is checked whether there is an object such as a wiring connected diagonally in the corresponding element area. Extract the net identification information of the wiring net figure to which it belongs. For example, as shown in FIG. 20, in the case of the wiring part object specified by designating the starting point K1, the ending point, and K2, it is parallel to the corresponding edge (in this case, the side part) of the reference area 51 to the element area. The set reference vector B0B1 is set, the scalar product of the vector K1K2 and the reference vector B0B1 is calculated, and if the result is zero (or within a certain numerical range centered on zero), normal connection is established. Otherwise, it is determined that the connection is diagonal.
[0044]
Returning to FIG. 8, the process proceeds to S204. If the next syntax element is a net set variable, the process proceeds to S206, where the variable is read and the same net search process is performed (S206, S207). The generated set of net specific information is stored in the left-justified form following the input memory IM1, IM2, IM3,... If there is a memory in which the set (or operator) is stored first. . On the other hand, if the read syntax element is neither a net set variable nor an operator (for example, if it is an undefined code), the process proceeds to S211 and an error is notified.
[0045]
If the read syntax element is an operator, it is stored in the operator memory OM (FIG. 19), and the process proceeds to S212. If the operator is a binary operator such as sum (|), difference (^) or product (&), it is stored in the last two of input memory IM1, IM2, IM3,. The set operation of the contents indicated by the stored operator is performed on the set of net specific information, and the result set is stored in the operation result memory RM1 (S212). On the other hand, if the operator is a unary operator such as negation (!), The stored operation is performed on the set of net specific information stored in the last one of the input memories IM1, IM2, IM3,. A set operation of the contents indicated by the child is performed, and the set of results is stored in the operation result memory RM1 (S212). In any case, when the calculation is completed, the set of calculated net specifying information is cleared from the input memory, and instead, the set of calculation results is written in a left-justified manner (S213).
[0046]
If the next syntax element remains in S208, the process returns to S204, and the same processing is repeated until the processing for all the syntax elements is completed. At the stage where processing for all the syntax elements has been completed (S209), if an uncalculated set (variable) remains in the input memory, it means that the calculation has not been performed correctly, and the process proceeds to S211. An error notification is made at. On the other hand, if an uncalculated set (variable) does not remain, a set indicating the final calculation result should be stored in the calculation result memory RM1, and this is output as a check result (S210).
[0047]
Arithmetic expressions written in reverse Polish notation are not limited to parentheses as in normal algebraic notation, so the order of operations is determined only by the position of the operator. It is possible to process sequentially from the top. As a result, the structure of the arithmetic memory is simplified and the processing speed is improved. FIG. 21 is a calculation example of AB & C & and ABC && when A = {a, b, c}, B = {b, c, d}, and C = {c, d, e}. In the case of AB & C &, first, as shown in (a), A and B are stored in IM1 and IM2, the first & is stored in OM, AB & is calculated, and the calculation result {b, c} (= R) Is stored in RM1. Next, as shown in (b), IM1 and IM2 are cleared, and the operation result R = {b, c} is stored in IM1. Then, C is stored in IM2, the second & is stored in OM, and RC & is calculated. The result is {c}.
[0048]
On the other hand, in the case of ABC &&, as shown in (c), A, B, and C are stored in IM1, IM2, and IM3, and the first & is stored in OM. In this case, the & operation on the last two variables, that is, the BC & operation is performed first, and the operation result {c, d} (= R) is stored in RM1. Next, as shown in (b), the calculated IM2 and IM3 are cleared, and the calculation result R = {c, d} has an uncalculated A remaining in IM1. Stored. Then, the second & is stored in the OM, and the calculation of AR & is performed. The result is the same {c} as before. That is, it can be seen that AB & C & = ABC &&, and that an operation in accordance with the coupling rule is possible.
[0049]
FIG. 22 shows the contents of the arithmetic processing in the case where the arithmetic expression represented by (13) (Z = TLBR |||!) Is executed in order to check for missing plated wires in the drawing of FIG. Show. According to this, the calculation is performed in the following order.
U1 = BR | = {c, d, e} (14)
U2 = LU1 | = {a, c, d, e, f} (15)
U3 = TU2 | = {a, b, c, d, e, f} (16)
Z = U3! = {G} (17)
(Note that the mother collection is G = {a, b, c, d, e, f, g})
It turns out that the correct result is obtained.
[0050]
Next, one energizing metallized layer pair is insulated from the other pair, and the energizing metallized layers belonging to the same pair are electrically connected by a wiring net across them, that is, diagonally. Whether or not the connection state is realized can be easily checked by combining several arithmetic expressions as described above. For example, in FIG.
(1) A pair of energized connection areas T, L (first connection area pair) and B, R (second connection area pair) each span a wiring net figure (in the former case, a (first diagonal connection net figure) ), The latter is connected by d (second diagonal connection net figure)),
(2) L, B and R, T are not connected (that is, there is no complementary diagonal connection net),
Think about the case.
[0051]
First, check (1)
Q1 = BL | TR | & …… (17)
It can be performed by the following calculation. FIG. 23 shows an example of the calculation.
According to this, the calculation is performed in the following order.
V1 = BL | = {a, d, e, f} (18)
V2 = RT | = {a, b, c, d} (19)
Q = V1V2 & = {a, d} (20)
That is, it can be seen that a correct result is obtained. In order to check (2), it is necessary to individually indicate that L, B and R, T do not have a complementary diagonal connection net. Therefore, another two arithmetic expressions:
Q2 = BL & ... (21)
Q3 ＝ TR ＆ …… (22)
It is sufficient to check that all of the results are empty sets.
[0052]
In addition, in the case of FIG. 17, it is determined whether or not a state in which the metallization layers for energization between all adjacent sides are electrically connected to each other by the wiring nets extending over them, that is, a four-side connection state). Is the following four arithmetic expressions:
P1 = TL & ... (23)
P2 = LB & ... (24)
P3 = BR & ... (25)
P4 ＝ RT ＆ …… (26)
It is sufficient to confirm that the results of are not empty sets. For example, in FIG. 17, when new wiring net figures h and i are considered, it is normal if the results of the above four formulas are {a}, {i}, {d}, and {h}, respectively. If any one becomes an empty set, it becomes abnormal. This arithmetic expression can also be used for checking the diagonal connection state. That is, when FIG. 17 is considered again in a state where the wiring net figures h and i do not exist, it is normal if the results of the above four formulas are {a}, {}, {d}, and {}, respectively. It is.
[0053]
You can also check that the diagonal connection net does not exist by using the following formula:
W = ~ T ~ L ~ B ~ R ||| (27)
It is sufficient to confirm that the result of is an empty set. In FIG. 17, if there is a wiring net figure (for example, k) that is obliquely connected to any one of the element regions T to R, all of them are extracted by the above calculation.
[0054]
Hereinafter, a method for outputting the above calculation result, that is, the check result will be described. The display control program 76 shown in FIG. 3 controls this display / output processing. For example, FIG. 24A shows an example in which a wiring net figure N6 extracted as a missing plating line is displayed on the drawing screen by changing its color. In this case, the wiring net name can be displayed on a separate check result display window 45. On the other hand, in the example shown in FIG. 24B, a wiring net name display area 46 is formed in the vicinity of the extracted wiring net figure N6, and the wiring net name is displayed here. In either case, the operator can see the result and immediately enter a drawing correction operation for eliminating the plated wire missing state. In addition, as shown in FIG. 25, a check result display screen 47 may be displayed separately from the drawing screen, and a wiring net name as a check result may be displayed here.
[0055]
On the other hand, when the diagonal connection net figure that should originally exist is not detected in the check of the diagonal connection state, element regions (areas B and R in FIG. 26) that require the existence of the diagonal connection net graphic are selected. For example, notification can be made by changing the color or the like.
[0056]
The element region can be set in various forms other than the energization connection region as shown in FIG. In FIG. 27, when finishing the substrate as a product, the reference region 51 of the substrate is set to correspond to the cut outline, on the premise that the edge portion where the metallization layer for energization is formed is cut. In addition, a boundary line 51a corresponding to the outline before cutting is set outside thereof, and an area located between the reference area 51 and the boundary line 51a is set as an element area J. Further, a limit line 51b is set outside the boundary line 51a, and a region excluding the energization connection regions T, L, B, and R among regions sandwiched between the limit line 51b and the boundary line 51a. Is set as the element region H. FIG. 27 also shows examples of execution results of some arithmetic expressions when the wiring net figures a to e are formed.
[Brief description of the drawings]
FIG. 1 is a partial perspective view showing an example of an electronic circuit board.
FIG. 2 is a block diagram showing an electrical configuration of a CAD system for designing an electronic circuit board according to the present invention.
FIG. 3 is a map showing the contents of the application program and application work memory.
FIG. 4 is a map showing the contents of a check language system program.
FIG. 5 is a map showing the contents of a wiring net data registration memory.
FIG. 6 is a flowchart showing a flow of drawing processing.
FIG. 7 is a flowchart showing a flow of element region setting / checking processing.
FIG. 8 is a flowchart showing details of the check processing.
FIG. 9 is a flowchart showing a flow of net search processing.
FIG. 10 is an explanatory diagram of an operation process on a drawing screen in a CAD system for designing an electronic circuit board according to the present invention.
FIG. 11 is an explanatory diagram following FIG. 10;
FIG. 12 is a conceptual diagram of an object and its graphic data.
FIG. 13 is a conceptual diagram of a via graphic and its graphic data.
FIG. 14 is an explanatory diagram of an overlapping connection state of objects.
FIG. 15 is an explanatory diagram of a via connection state of an object.
FIG. 16 is an explanatory diagram of calculation formula data and a check type selection window.
FIG. 17 is a diagram for explaining the concept of an aggregate variable whose elements are wiring net figures.
FIG. 18 is an explanatory diagram illustrating an example of an operator and an arithmetic expression using the operator.
FIG. 19 is an explanatory diagram showing the contents of a check search / determination memory.
FIG. 20 is an explanatory diagram illustrating a determination calculation method for an oblique connection net.
FIG. 21 is an explanatory diagram showing that a combination rule of product operation is established.
FIG. 22 is an explanatory diagram showing a calculation example of plating wire missing check.
FIG. 23 is an explanatory diagram showing a calculation example of diagonal connection check.
FIG. 24 is an explanatory diagram illustrating some output examples of check results.
FIG. 25 is an explanatory view showing another output example.
FIG. 26 is an explanatory view showing still another output example.
FIG. 27 is an explanatory diagram showing another setting example of an element region.
[Explanation of symbols]
1 CAD system for electronic circuit board design
3 CPU (area setting means, wiring pattern connection information generation means, element area setting means, arithmetic expression reading means, pattern set generation means, arithmetic execution means, arithmetic expression input means)
5 RAM (net specific information storage means, net image data storage means, element area setting data storage means, arithmetic expression storage means, arithmetic program module storage part, arithmetic expression registration part)
6 Keyboard
7 Mouse (wiring pattern graphic input means, arithmetic expression input means, arithmetic expression selection means)
8 CD-ROM drive
10 Hard disk drive (element area setting data storage means, arithmetic expression storage means, arithmetic program module storage section, arithmetic expression registration section)
12 Computer body
13 Monitor (drawing screen display means, wiring pattern connection information output means)
14 Printer (wiring pattern connection information output means)
20 CD-ROM (recording medium)

Claims (6)

A plurality of wiring layers are stacked via an insulating layer, and a portion to be plated is formed on the surface of the substrate where the wiring portion formed in the wiring layer is electrically connected. A CAD system for designing an electronic circuit board having a metallized layer for a side surface,
A wiring pattern figure input means for inputting a wiring pattern figure which is a figure of a wiring part or a plated part on a drawing screen;
A reference area corresponding to the main surface outline of the substrate and a connection determination target area formed outside the reference area in a form including an energization connection area corresponding to the metallization layer for energization with respect to the drawing screen Area setting means to be set;
Element region setting means for setting a plurality of element regions including one or a plurality of the energized connection regions with respect to the connection determination target region;
Corresponding to each element area, pattern set variable setting means for setting a variable representing a set of wiring pattern figures connected to the element area (hereinafter referred to as a pattern set variable);
Arithmetic expression storage means for storing an arithmetic expression described using the pattern set variable and one or more operators combined therewith;
An operation program module storage unit that stores an operation program module that is prepared corresponding to each of the operators and that executes a set operation content defined in advance for each operator;
Arithmetic expression reading means for reading the arithmetic expression from the arithmetic expression storage means;
A pattern set variable included in the read arithmetic expression is detected, and among the wiring pattern figures, one connected to an element region corresponding to the pattern set variable is extracted, and the pattern set variable is extracted. Pattern set generation means for generating a set of corresponding wiring pattern figures;
In accordance with the description content of the arithmetic expression, an arithmetic execution means for executing a set operation defined by each operator on a set of wiring pattern graphics indicated by each pattern set variable using a corresponding arithmetic program module;
Wiring pattern connection information generating means for generating information related to the connection state between the wiring pattern figure and the energized connection region based on the calculation result;
Wiring pattern connection information output means for outputting the generated wiring pattern connection information;
A CAD system for designing an electronic circuit board, comprising: The operators are registered as a sum operator for obtaining a union of a set of two wiring pattern figures, a difference operator for obtaining a difference set, and a product operator for obtaining a common set. 2. The CAD system for designing an electronic circuit board according to claim 1, comprising at least one of a negation operator that obtains a negative set of a set of wiring pattern figures for a set of all wiring pattern figures. An arithmetic expression input means for inputting the arithmetic expression is provided,
The CAD system for designing an electronic circuit board according to claim 1, wherein the arithmetic expression storage unit includes an arithmetic expression registration unit that registers and stores the input arithmetic expression. A plurality of the arithmetic expressions can be stored in the arithmetic expression storage unit,
Arithmetic expression selecting means for selecting an expected one from the stored arithmetic expressions is provided,
The CAD system for designing an electronic circuit board according to any one of claims 1 to 3, wherein the calculation execution unit executes only a calculation related to the selected calculation formula. The wiring pattern connection information generating means
The arithmetic expression storage unit stores, as the arithmetic expression, a pattern set variable corresponding to all the energized connection areas set in series by a sum operation, and the result of performing a negative operation on the result is stored.
The information on the presence of a wiring pattern figure not connected to any energization connection region is generated as the wiring pattern connection information based on a calculation result based on the calculation formula of the calculation execution means. 5. A CAD system for designing an electronic circuit board according to any one of 4 above. 6. A recording medium storing a computer-readable program for causing a computer to function as each means constituting the CAD system for designing an electronic circuit board according to claim 1.

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