JP3760912B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for forming a semiconductor device using copper as a wiring material.
[0002]
[Prior art]
In recent semiconductor integrated circuits, copper is used as a wiring material. In this processing step, a damascene method is used in which a wiring groove is formed using a dry etching technique and a wiring material is embedded in the wiring groove.
[0003]
Hereinafter, a conventional method for manufacturing a wiring will be described with reference to FIG.
[0004]
11 is a cross-sectional view of a semiconductor device when a wiring material is manufactured by a conventional technique. FIG. 11A shows a state after a wiring pattern is formed by photolithography, and FIG. 11B shows a dry etching. 11 (c) shows a state after ashing, and FIG. 11 (d) shows a state in which an upper layer wiring is formed.
[0005]
First, in the resist pattern forming step shown in FIG. 11A, for example, a copper wiring 113 is formed on a semiconductor substrate 111 made of silicon so that the periphery thereof is covered with an insulating film 112 made of silicon oxide. Subsequently, after an interlayer insulating film 114 is formed over the copper wiring 113 on the insulating film 112, a resist pattern 115 having an opening 115a is formed.
[0006]
Next, in the metal wiring exposure step shown in FIG. 11B, etching using the resist pattern 115 as a mask is performed on the interlayer insulating film 114 by plasma dry etching to form the copper wiring 113 on the interlayer insulating film 114. An exposed opening 114a is formed. For example, using a parallel plate RIE apparatus, the flow rate of CF _{4 as} an etching gas is set to 50 sccm, the flow rate of O _{2 as} a control gas for etching deposit is set to 10 sccm, the substrate temperature is set to 25 ° C., the RF output is set to 1000 W, The pressure is 5 Pa.
[0007]
Next, as shown in FIG. 11C, the resist pattern 115 is removed by ashing the resist pattern 115. At this time, a copper oxide layer 113 a is formed on the surface of the copper wiring 113.
[0008]
At this time, a microwave plasma ashing apparatus is used, the oxygen gas flow rate is 1000 sccm, the microwave output is 1000 W, the pressure is about 100 Pa, and the discharge time is about 20 minutes. At this time, in order to prevent oxidation of Cu, the substrate temperature is set to about 25 ° C.
[0009]
Next, as shown in FIG. 11 (d), after removing the copper oxide layer 113 a generated during ashing by organic acid cleaning containing ammonium fluoride or Ar sputtering, interlayer insulation including the bottom surface and wall surface of the opening 114 a is performed. A wiring 116 is formed over the film 114.
[0010]
It is known that oxidation of Cu proceeds in a high temperature oxygen atmosphere. Therefore, in the conventional method for forming a copper wiring, ashing is performed on the resist pattern 115 at a low substrate temperature of about 25 ° C. in order to prevent the copper wiring 113 from being oxidized. However, the ashing process is highly temperature dependent, and the ashing speed is significantly reduced by lowering the substrate temperature. In order to improve this, a method of adding CF ₄ gas to the ashing process is known (see, for example, Patent Document 1).
[0011]
Ashing reaction of the resist pattern 115 (shown by C _x H _y) in the case of adding CF ₄ is the reaction proceeds in the following steps.
[0012]
O ₂ + CF ₄ → O ^* + F ^* + CO ↑ + CO ₂ ↑ (1)
^{_{C x H y + F * →}} C x H (y-1) * + HF (2)
C _x H _(y-1) ^* + O ^* → CO ↑ + CO ₂ ↑ + H ₂ O ↑ (3)
Reaction formula (1) shows a reaction in which O ₂ and CF ₄ are dissociated in plasma to form oxygen radicals (O ^* ) and fluorine radicals (F ^* ). C contained in CF ₄ reacts with O ^* in the plasma to form CO and CO ₂ .
[0013]
Reaction formula (2) F ^* is pulling the H of C _x H _y, is a reaction to form a dangling bond in the C _x H _y.
[0014]
Reaction formula (3) is a reaction in which dangling bonds formed on C _x H _y react with oxygen radicals to form CO, CO ₂ , and H ₂ O, that is, ashing.
[0015]
Fluorine radicals produced by the reaction formula (1) may pull the H of C _x H _y by the reaction formula (2), C _x H dangling bonds in _{y (C x H (y-} 1) *) to form a. Since dangling bonds are chemically very active, this becomes an attack site for oxygen radicals generated in reaction formula (1). Therefore, the activation energy of the combustion reaction in the oxygen radical represented by the reaction formula (3) and the resist pattern 115 is lower than that in the case where no fluorine radical is present, so that the ashing rate is increased.
[0016]
From the above, the ashing reaction represented by the reaction formulas (1) to (3) becomes the rate control of F radical supply in the reaction formula (2), and therefore the ashing rate increases as the supply amount of F radicals increases. Therefore, as a method of increasing the F radical, a method of increasing the amount of added CF ₄ in the reaction formula (1) is used.
[0017]
[Patent Document 1]
Japanese Patent Laid-Open No. 2001-110895
[Problems to be solved by the invention]
However, the conventional method for manufacturing a semiconductor device has a problem that when the amount of CF ₄ added is increased, the fluorine remaining on the substrate reacts with moisture in the air, so that the oxidation of the copper wiring 113 is promoted.
[0019]
An object of the present invention is to improve the ashing speed while suppressing oxidation of Cu.
[0020]
[Means for Solving the Problems]
A method of manufacturing a semiconductor device according to the present invention includes a step of forming a copper wiring on a semiconductor substrate, a step of forming an insulating film on the copper wiring , and a resist patterned in a predetermined shape on the insulating film. A step of forming an opening exposing the copper wiring in the insulating film using the resist as a mask, an oxygen gas, a fluorocarbon gas, and a fluorocarbon gas from the outside for decomposing the fluorocarbon gas. And a step of plasma ashing the resist at a temperature of 0 ° C. or more and 100 ° C. or less using a supplied copper-based decomposition accelerator.
According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: forming a copper wiring on a semiconductor substrate; forming an insulating film on the copper wiring; and patterning the insulating film on a predetermined shape. A step of forming the resist, a step of forming an opening exposing the copper wiring in the insulating film using the resist as a mask, an oxygen gas and a fluorocarbon gas, and the semiconductor substrate temperature is set to 0 ° C. or higher, 100 And a step of plasma ashing the resist at a temperature of less than or equal to ° C., and the opening formed in the insulating film includes a dummy hole not related to the operation of the semiconductor device, and the opening is formed in the insulating film in the surface of the copper wiring The area of the portion exposed by the step of forming is 6% or more of the total area of the semiconductor substrate.
[0021]
According to the configuration of the present invention, the dissociation of the fluorocarbon gas is promoted by the copper-based decomposition promoting substance supplied from the outside of the semiconductor substrate or the copper supplied from the copper wiring through the opening . Fluorine radical concentration increases. As a result, dangling bonds are formed in the resist by fluorine radicals in the plasma, and the attack sites of oxygen radicals increase, so that the resist ashing speed is improved.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
Hereinafter, a method for manufacturing a semiconductor device according to the first embodiment of the present invention will be described with reference to the drawings.
[0023]
FIG. 1A to FIG. 1D show cross-sectional structures in the order of steps in the method of manufacturing a semiconductor device according to the first embodiment. FIG. 1A shows a state after a wiring pattern is formed by photolithography. FIG. 1B shows a state in which an insulating film is opened by dry etching, FIG. 1C shows a state after ashing, and FIG. 1D shows a state in which an upper layer wiring is formed.
[0024]
A manufacturing process of the semiconductor device according to the first embodiment will be described.
[0025]
First, in the resist pattern forming step shown in FIG. 1A, for example, a copper wiring 13 which is a metal film is formed on a semiconductor substrate 11 made of silicon so that the periphery thereof is covered with an insulating film 12 made of silicon oxide. To do. Subsequently, after an interlayer insulating film 14 made of silicon nitride is formed above the copper wiring 13 on the insulating film 12, a resist pattern 15 having an opening 15a is formed.
[0026]
Next, in the metal wiring exposure step shown in FIG. 1B, etching using the resist pattern 15 as a mask is performed on the interlayer insulating film 14 by plasma dry etching to form the copper wiring 13 on the interlayer insulating film 14. An exposed opening 14a is formed. For example, using a parallel plate RIE apparatus, the flow rate of CF _{4 as} an etching gas is set to 50 sccm, the flow rate of O _{2 as} a control gas for etching deposit is set to 10 sccm, the substrate temperature is set to 25 ° C., the RF output is set to 1000 W, The pressure is 5 Pa.
[0027]
Next, the resist pattern 15 is removed by ashing the resist pattern 15 as shown in FIG. At this time, a copper oxide layer 13 a is formed on the surface of the copper wiring 13.
[0028]
As an apparatus used for the ashing process, for example, a microwave plasma type ashing apparatus shown in FIG. 2 is used. The ashing device comprises an ashing chamber part (A) and a gas line part (B). The ashing chamber portion (A) includes a chamber 21, a stage 22, a microwave waveguide 23, and a microwave transmission window 24. A stage 22 for holding a silicon wafer 28 is installed in the chamber 21. The silicon wafer 28 refers to the semiconductor substrate 11 on which a structure such as the copper wiring 13 is formed. A microwave transmission window 24 is provided above the stage 22, and a microwave waveguide 23 is installed above the microwave transmission window 24, and the microwave propagating through the microwave waveguide 23 is introduced into the chamber 21 from the microwave transmission window 24. . The gas line portion (B) includes a mass flow controller 25, a heater 26, and a copper acetate (I) solution 27. Since copper (I) acetate has a melting point of 99 ° C., it needs to be heated to about 120 ° C. using the heater 26. Then, a copper (I) acetate solution 27 is bubbled using He as a carrier gas, and steam is introduced into the chamber 21. Since He is an inert gas, it does not affect the ashing characteristics. Ashing is performed by introducing a mixed gas of oxygen, copper acetate (I), and He from the gas line portion (B), and generating plasma by the microwave introduced from the microwave transmission window 24.
[0029]
Ashing conditions are: oxygen gas flow rate is about 1000 sccm, CF ₄ flow rate is 5 sccm, microwave output is 1000 W, chamber pressure is 200 Pa, substrate temperature is 0 to 100 ° C. (for example, 25 ° C.), and discharge time is about 2 minutes. The reason for setting the substrate temperature to 0 to 100 ° C. is that Cu is oxidized when the temperature is 100 ° C. or higher, and the ashing rate is decreased when the temperature is 0 ° C. or lower.
[0030]
At this time, the flow rate of copper (I) acetate is set to 0.2 to 1.0 sccm. In this embodiment, it is 0.6 sccm. The reason for this is shown in FIG. 3 which shows the relationship between the addition amount of copper acetate (I) and the ashing rate, but the ashing rate increases when the addition amount of copper acetate (I) exceeds 0.2 sccm. This is because it is almost saturated at about 0.6 sccm.
[0031]
Returning to the description of FIG. After the ashing process is completed, the silicon wafer 28 is cleaned with an organic acid chemical solution containing ammonium fluoride, and the copper oxide layer 13a is removed by Ar sputtering. Then, in the upper wiring formation process shown in FIG. An upper wiring 16 is formed on 14 so as to fill the opening 14a. Thereafter, the next wiring layer or passivation film or the like (not shown) is formed as necessary.
[0032]
Here, the reason why the ashing speed is increased when CF ₄ and copper acetate (I) are added to oxygen gas to perform ashing of the resist pattern 15 will be described.
[0033]
FIG. 4 shows the relationship between the added amount of copper (I) acetate and the F radical concentration in the plasma. As the flow rate of copper (I) acetate increases, the F radical concentration in the plasma increases, and the addition of about 0.6 sccm almost saturates the F radical concentration. This is because Cu serves as a catalyst and the dissociation of CF ₄ is promoted.
[0034]
As described above, the ashing reaction of the resist pattern when CF ₄ is added proceeds in the following three steps.
[0035]
O ₂ + CF ₄ → O ^* + F ^* + CO ↑ + CO ₂ ↑ (1)
^{_{C x H y + F * →}} C x H (y-1) * + HF (2)
C _x H _(y-1) ^* + O ^* → CO ↑ + CO ₂ ↑ + H ₂ O ↑ (3)
The ashing reaction of the present embodiment is F * supply-limited in the reaction formula (2). Therefore, the addition of copper (I) acetate promotes the reaction of reaction formula (1), increases F ^* in the plasma, and increases the ashing rate.
[0036]
FIG. 5 shows the relationship between the added amount of CF ₄ and the oxidized amount of Cu. It can be seen that although the oxidation of Cu does not proceed until the amount of CF ₄ added is 5 sccm, the oxidation of Cu is promoted when more CF ₄ is added. This is because when the substrate is exposed to the atmosphere, the remaining fluorine reacts with moisture in the atmosphere to promote oxidation.
[0037]
As described above, according to the first embodiment, the dissociation of CF ₄ can be promoted by adding the mixed gas of Cu and CF ₄ in the ashing process of the resist pattern 15. As a result, the concentration of F radicals in the plasma increases and the ashing speed is improved. Therefore, since the amount of CF ₄ added can be reduced, Cu oxidation does not proceed. In Embodiment 1, copper (I), which is an organic metal, is used as the Cu compound. However, generally, an organic metal has a low melting point and can be supplied in a gas phase, so that the addition amount can be easily controlled. is there.
[0038]
In the present embodiment CF ₄ to fluorocarbon gas, copper (I) acetate as a decomposition accelerator of the fluorocarbon gas, although using a microwave plasma type ashing apparatus ashing apparatus, CF ₄ except those as fluorocarbon gas (e.g. , C ₅ F _8, etc.) The same results can be obtained by using a plasma ashing apparatus other than a microwave (such as copper acetate (II)) or microwave ashing as a fluorocarbon gas decomposition accelerator. be able to.
[0039]
(Embodiment 2)
Hereinafter, a method for manufacturing a semiconductor device according to the second embodiment of the present invention will be described with reference to the drawings.
[0040]
6A to 6D show cross-sectional structures in the order of steps in the method of manufacturing a semiconductor device according to the second embodiment, and FIG. 6A shows a state after a wiring pattern is formed by photolithography. 6B shows a state in which the insulating film is opened by dry etching, FIG. 6C shows a state after ashing, and FIG. 6D shows a state in which an upper layer wiring is formed.
[0041]
A manufacturing process of the semiconductor device according to the second embodiment will be described.
[0042]
First, in the resist pattern forming step shown in FIG. 6A, for example, a copper wiring 63 which is a metal film is formed on a semiconductor substrate 61 made of silicon so that the periphery thereof is covered with an insulating film 62 made of silicon oxide. To do. Subsequently, after an interlayer insulating film 64 made of silicon nitride is formed above the copper wiring 63 on the insulating film 62, a resist pattern 65 having an opening 65a is formed.
[0043]
Next, in the metal wiring exposure step shown in FIG. 6B, the interlayer insulating film 64 is etched using the resist pattern 65 as a mask by plasma dry etching, and the copper wiring 63 is formed on the interlayer insulating film 64. An exposed opening 64a is formed. For example, using a parallel plate RIE apparatus, the flow rate of CF _{4 as} an etching gas is set to 50 sccm, the flow rate of O _{2 as} a control gas for etching deposit is set to 10 sccm, the substrate temperature is set to 25 ° C., the RF output is set to 1000 W, The pressure is 5 Pa.
[0044]
Next, the resist pattern 65 is removed by performing ashing on the resist pattern 65 as shown in FIG. At this time, a copper oxide layer 63 a is formed on the surface of the copper wiring 63.
[0045]
As an apparatus used for the ashing process, for example, a microwave plasma ashing apparatus is used. As an ashing condition, an oxygen gas flow rate is about 1000 sccm, a CF ₄ flow rate is 5 sccm, a microwave output is 1000 W, a chamber pressure is 200 Pa, a substrate temperature Is 0 to 100 ° C. (for example, 25 ° C.), and the discharge time is about 2 minutes. The reason for setting the substrate temperature to 0 to 100 ° C. is that Cu is oxidized when the temperature is 100 ° C. or higher, and the ashing rate is decreased when the temperature is 0 ° C. or lower.
[0046]
FIG. 7 shows the relationship between the ashing rate and the Cu aperture ratio (the total area of portions exposed by the step of forming the opening 64a in the interlayer insulating film 64 in the surface of the copper wiring 63 / the area of the semiconductor substrate 61 × 100). Show. As the aperture ratio of Cu increases, the ashing rate increases and the Cu aperture ratio is saturated at about 6%. This is because, as in the first embodiment, Cu serves as a catalyst to promote the dissociation of CF ₄ and increase the concentration of F radicals in the plasma. Even in an element having a Cu opening ratio of less than 6%, a dummy hole (a hole opened to control the opening ratio of Cu, which is finally filled with Cu but is not related to the operation of the semiconductor device) is formed. The ashing speed can be increased by setting the Cu aperture ratio to 6%.
[0047]
Returning to the description of FIG. After completion of the ashing process, after the copper oxide layer 63a is removed by cleaning with an organic acid chemical solution containing ammonium fluoride and Ar sputtering, an opening is formed on the interlayer insulating film 64 in the upper layer wiring forming process shown in FIG. Upper wiring 66 is formed to fill portion 64a. Thereafter, the next wiring layer or passivation film or the like (not shown) is formed as necessary.
[0048]
Thus, in the case of the second embodiment, as in the first embodiment, in the resist ashing process, there is copper supplied from the copper wiring 63 through the opening 64a, so that the dissociation of CF ₄ can be promoted. Therefore, the concentration of F radicals in the plasma is increased and the ashing speed is improved. Since the amount of CF ₄ added is also 5 sccm or less, the amount of Cu oxidation is not promoted. Further, in the present embodiment, unlike the case of the first embodiment, it is not necessary to use a Cu-based additive gas, so that no special equipment for adding a Cu-based gas is required. The ashing speed can be increased.
[0049]
(Embodiment 3)
Hereinafter, a method for manufacturing a semiconductor device according to the third embodiment of the present invention will be described with reference to the drawings.
[0050]
8A to 8D show cross-sectional structures in the order of steps in the method of manufacturing a semiconductor device according to the third embodiment, and FIG. 8A shows the state after the formation of the wiring pattern by photolithography. 8B shows a state in which the insulating film is opened by dry etching, FIG. 8C shows a state after ashing, and FIG. 8D shows a state in which the upper layer wiring is formed.
[0051]
A manufacturing process of the semiconductor device according to the third embodiment will be described.
[0052]
First, in the resist pattern forming step shown in FIG. 8A, for example, a copper wiring 83, which is a metal film, is formed on a semiconductor substrate 81 made of silicon so as to be covered with an insulating film 82 made of silicon oxide. To do. Subsequently, an interlayer insulating film 84 made of a silicon nitride film is formed above the copper wiring 83 on the insulating film 82, and then a resist pattern 85 having an opening 85a is formed.
[0053]
Next, in the metal wiring exposure step shown in FIG. 8B, the interlayer insulating film 84 is etched using the resist pattern 85 as a mask by plasma dry etching, and the copper wiring 83 is formed on the interlayer insulating film 84. An exposed opening 84a is formed. For example, using a parallel plate RIE apparatus, the flow rate of CF _{4 as} an etching gas is set to 50 sccm, the flow rate of O _{2 as} a control gas for etching deposit is set to 10 sccm, the substrate temperature is set to 25 ° C., the RF output is set to 1000 W, The pressure is 5 Pa.
[0054]
Next, the resist pattern 15 is removed by ashing the resist pattern 85 as shown in FIG. At this time, a copper oxide layer 83 a is formed on the surface of the copper wiring 83.
[0055]
As an apparatus related to the ashing process, for example, a microwave plasma type ashing apparatus shown in FIG. 9 is used. The ashing device includes a chamber 91, a stage 92, a microwave waveguide 93, a microwave transmission window 94, a copper ring 95 for supplying copper into the plasma, and a gas line 96. Ashing is performed by introducing O ₂ gas from the gas line 96 and generating plasma by the microwave introduced from the microwave transmission window 94.
[0056]
Ashing conditions are: oxygen gas flow rate is about 1000 sccm, CF ₄ flow rate is 5 sccm, microwave output is 1000 W, chamber pressure is 200 Pa, substrate temperature is 0 to 100 ° C. (for example, 25 ° C.), and discharge time is about 2 minutes. The reason for setting the substrate temperature to 0 to 100 ° C. is that Cu is oxidized when the temperature is 100 ° C. or higher, and the ashing rate is decreased when the temperature is 0 ° C. or lower.
[0057]
At this time, in the ashing apparatus shown in FIG. 9, the copper ring 95 is sputtered by the generated plasma, and Cu is supplied into the plasma. FIG. 10 is a diagram comparing the ashing speeds in the Cu ring specification chamber (A) used in the present embodiment and the conventional chamber (B) (no Cu ring, not shown). In the Cu ring chamber (A), the ashing speed increases about three times as compared with the conventional chamber (B). This is because, as in the first embodiment, Cu supplied from the Cu ring serves as a catalyst to promote dissociation of CF ₄ and increase the concentration of F radicals in the plasma.
[0058]
Returning to the description of FIG. After completion of the ashing process, after cleaning the silicon wafer 98 with an organic acid chemical solution containing ammonium fluoride and removing the copper oxide layer 83a by Ar sputtering, in the upper wiring formation process shown in FIG. An upper wiring 86 is formed so as to fill the opening 84a. Thereafter, the next wiring layer or passivation film or the like (not shown) is formed as necessary.
[0059]
Thus, in the case of the third embodiment, the dissociation of CF ₄ can be promoted in the resist ashing process as in the first embodiment. Therefore, the concentration of F radicals in the plasma is increased and the ashing speed is improved. Since the amount of CF ₄ added is also 5 sccm or less, the amount of Cu oxidation is not promoted. Although the copper ring 95 is used in the present embodiment, the same effect can be expected if there is a copper compound on the inner wall of the chamber (for example, the inner wall material of the chamber 91 is a copper compound).
[0060]
Further, it has a feature that an increase in ashing speed can be realized with the same gas system as in the prior art.
[0061]
【The invention's effect】
According to the method for forming a copper wiring according to the present invention, the fluorine radical concentration in the plasma can be increased in the ashing process. Therefore, the ashing speed can be increased while suppressing the oxidation of Cu.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing each process of forming a wiring pattern in the first embodiment of the present invention. FIG. 2 is a cross-sectional view of an ashing device used in the first embodiment of the present invention. FIG. 4 shows the relationship between the flow rate of copper (I) acetate and the ashing rate. FIG. 4 shows the relationship between the flow rate of copper (I) acetate and the F radical concentration in the plasma in the first embodiment. FIG. 6 is a cross-sectional view showing each step of forming a wiring pattern in the second embodiment of the present invention. FIG. 7 is a sectional view showing the relationship between the CF ₄ addition amount and the Cu oxidation amount in the first embodiment. FIG. 8 is a diagram showing the relationship between the Cu aperture ratio and the ashing speed. FIG. 8 is a cross-sectional view showing each process of forming a wiring pattern in the third embodiment of the present invention. FIG. 9 is the ashing used in the third embodiment of the present invention. FIG. 10 is a cross-sectional view of the apparatus. There are cross-sectional views illustrating steps of a wiring pattern formation in the present invention and the conventional method Figure 11 conventional method of comparing the ashing rate of the REFERENCE NUMERALS]
11 Semiconductor substrate 12 Insulating film 13 Copper wiring 13a Copper oxide layer 14 Interlayer insulating film 14a Opening 15 Resist pattern 15a Opening 16 Upper wiring 21 Chamber 22 Stage 23 Microwave waveguide 24 Microwave transmission window 25 Mass flow controller 26 Heater 27 Acetic acid Copper (I)
28 silicon wafer 61 semiconductor substrate 62 insulating film 63 copper wiring 63a copper oxide layer 64 interlayer insulating film 64a opening 65 resist pattern 65a opening 66 upper layer wiring 81 semiconductor substrate 82 insulating film 83 copper wiring 83a copper oxide layer 84 interlayer insulating film 84a Opening 85 Resist pattern 85a Opening 86 Upper layer wiring 91 Chamber 92 Stage 93 Microwave waveguide 94 Microwave transmission window 95 Cu ring 96 Gas line 98 Silicon wafer 111 Semiconductor substrate 112 Insulating film 113 Copper wiring 113a Copper oxide layer 114 Interlayer insulation Film 114a Opening 115 Resist pattern 115a Opening 116 Upper layer wiring

Claims (6)

Forming a copper wiring on a semiconductor substrate; forming an insulating film on the copper wiring ; forming a resist patterned in a predetermined shape on the insulating film; and using the resist as a mask A step of forming an opening exposing the copper wiring in the insulating film; an oxygen gas; a fluorocarbon gas; and a copper-based decomposition accelerator supplied from the outside of the semiconductor substrate for decomposing the fluorocarbon gas; And a step of plasma ashing the resist at a temperature of the semiconductor substrate of 0 ° C. or higher and 100 ° C. or lower . 2. The method of manufacturing a semiconductor device according to claim 1 , wherein the copper-based decomposition accelerator is copper (I) acetate or copper ( II ) acetate . 2. The method of manufacturing a semiconductor device according to claim 1, wherein the copper-based decomposition promoting substance is supplied during the plasma ashing from a copper ring installed around the semiconductor substrate . Forming a copper wiring on a semiconductor substrate; forming an insulating film on the copper wiring ; forming a resist patterned in a predetermined shape on the insulating film; and using the resist as a mask Forming an opening exposing the copper wiring in the insulating film; and plasma ashing the resist using an oxygen gas and a fluorocarbon gas at a temperature of 0 ° C. to 100 ° C. The opening formed in the insulating film includes a dummy hole that is not related to the operation of the semiconductor device, and the area of the portion of the surface of the copper wiring exposed by forming the opening in the insulating film is the semiconductor. A method for manufacturing a semiconductor device, wherein the area is 6% or more of the total area of the substrate . Said fluorocarbon gas is _{CF 4, CHF 3, CH 2} F 2, C 4 F 8, C 5 semiconductor device according to any one of claims 1-4, characterized in that it comprises at least one of _{F 8} Production method. In the plasma ashing process, a method of manufacturing a semiconductor device according to claim 1 the flow rate of the fluorocarbon gas is equal to or less than 5 sccm.

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