JP3756234B2 - Semiconductor device including semiconductor chip and functional test trace repair method for the chip - Google Patents
Semiconductor device including semiconductor chip and functional test trace repair method for the chip Download PDFInfo
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- JP3756234B2 JP3756234B2 JP3527096A JP3527096A JP3756234B2 JP 3756234 B2 JP3756234 B2 JP 3756234B2 JP 3527096 A JP3527096 A JP 3527096A JP 3527096 A JP3527096 A JP 3527096A JP 3756234 B2 JP3756234 B2 JP 3756234B2
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Description
【0001】
【発明の属する技術分野】
本発明は、機能試験済みの半導体チップを具備する半導体装置及び同チップの機能試験痕跡補修方法に関する。
【0002】
【従来の技術】
従来、半導体チップには、ワイヤリング用パッドとは別途に、ICの製造工程中に半導体チップの機能試験を行うための機能試験用パッドが形成されており、パッケージ工程に先立ち、上記機能試験用パッドに機能試験装置のプローブを圧接導通させて、上記半導体チップの機能試験を行うようにしている。
【0003】
【発明が解決しようとする課題】
ところが、上記プローブが針状であるため、機能試験用パッドの上面に針で突いた跡のようなプローブ跡孔が残り、モールド樹脂で封止しても、この跡孔を充分に充填することができず、そのため、モールド樹脂での封止後も、上記跡孔に水分や空気が残留することになり、この水分や空気中の酸素が、機能試験用パッドやこれに隣接したワイヤリング用パッドを腐食したり、酸化させたりして、不良品発生や信頼性低下の一因となっていた。
【0004】
そこで、本発明の半導体チップを具備する半導体装置では、ワイヤボンディング装置によって低腐食性物質からなるワイヤがボンディングされるワイヤリング用パッドと、このワイヤリング用パッドとは別途に設けたパッドを有し、ワイヤリング用パッドとは別途に設けたパッドに凹部が形成された半導体チップを具備する半導体装置であって、凹部を有するパッドの凹部には前記ワイヤボンディング装置によってワイヤを圧着してからワイヤを切断することにより凹部に低腐食性物質を充填し、ワイヤリング用パッドには前記ワイヤボンディング装置によってワイヤをボンディングしてワイヤリングを行った半導体チップを具備する半導体装置とした。
【0005】
また、本発明の半導体チップの機能試験痕跡補修方法では、低腐食性物質からなるワイヤがボンディングされるワイヤリング用パッドと、このワイヤリング用パッドとは別途に設けた機能試験用パッドを有する半導体チップの機能試験用パッドに形成されたプローブ跡孔を、制御プログラムによってワイヤリングモードと補修モードとを連続して実行するワイヤボンディング装置のワイヤリングモードにおいてワイヤリング用パッドへのワイヤリングを行うとともに、補修モードにおいて機能試験用パッドにワイヤを圧着するとともにワイヤを切断することにより、プローブ跡孔を低腐食性物質で埋め戻すこととした。さらに、ワイヤリングモードは、半導体チップへ行う一次ワイヤボンディング工程と、同半導体チップを搭載したリードフレームへ行う二次ワイヤボンディング工程と、ボンディング終了後のワイヤ切断工程とからなり、補修モードでは、二次ワイヤボンディング工程を省略して、一次ワイヤボンディング工程から、直接ワイヤ切断工程に移行することにも特徴を有するものである。
【0006】
【発明の実施の形態】
本発明の半導体装置では、半導体チップの上面側に形成された凹部を低腐食性物質で覆っており、また、半導体チップは、機能試験用パッドのプローブ跡孔を低腐食性物質で埋め戻しているので、モールド樹脂で封止した後に、プローブ跡孔に空気や水分が残留せず、従って、機能試験用パッドの酸化や腐食が防止され、不良品発生や信頼性低下を防止することができる。
【0007】
また、本発明の補修方法では、半導体チップのワイヤリング用パッドに対して行うワイヤボンディングと同一処理を、機能試験用パッドに残ったプローブ跡孔に施し、その後、ワイヤを切断することにより、プローブ跡孔に溶着した残留ワイヤたるボールで埋め戻して跡孔を補修するものである。
【0008】
即ち、ワイヤリングのためのボンディング制御を一部変更して、機能試験用パッドのプローブ跡孔の直上方にキャピラリを位置させ、この状態でキャピラリを下動させて、キャピラリを挿通したワイヤの先端の金ボールを機能試験用パッドのプローブ跡孔に圧着してワイヤボンディングを行い、同ワイヤボンディング後、キャピラリを上動させてワイヤリング用パッドから離隔し、ワイヤを切断することにより、プローブの痕跡を補修するようにしている。
【0009】
なお、本来のワイヤリングのためのボンディングでは、ワイヤリング用パッドの直上方にキャピラリを位置させ、キャピラリを下動させて、キャピラリを挿通したワイヤの先端に形成されたボールをワイヤリング用パッドに圧着して一次ワイヤボンディングを行い、同一次ワイヤボンディング後、キャピラリを上動させてワイヤリング用パッドから離隔し、次いで、キャピラリをインナーリード上方に移動させて、キャピラリを下動させて二次ワイヤボンディングを行い、その後、ワイヤを切断するという制御動作を一連して行うようにしている。
【0010】
ところが、本発明の補修方法で行うワイヤボンディング制御では、本来のワイヤリングのためのボンディング制御にはない制御、即ち、機能試験用パッドのプローブ跡孔上にキャピラリを位置させるという制御があり、更には、本来のワイヤリングのためのボンディング制御、即ち、キャピラリをリードフレーム上に移動させ、二次ワイヤボンディングを行う制御が省略されており、一次ワイヤボンディング終了後、本来の二次ワイヤボンディング後に行われるワイヤ切断制御に直ちに移行するものである。
【0011】
従って、本来のワイヤボンディング装置の制御プログラム中に、本来のワイヤリング工程よりなるワイヤリングモードと、本発明に係るプローブ跡孔補修のための補修モードとを設定しておけば、一台のワイヤボンディング装置で本来のワイヤリングと本発明のプローブ跡孔補修とを実行することができ、しかも、これらを連続して行うことができる。
【0012】
【実施例】
本発明の実施例について図面を参照して説明する。
【0013】
図1は、本発明に使用するワイヤボンディング装置Aを示しており、同装置Aは、半導体チップCを搭載したリードフレーム17を供給・搬送・収納するためのローダ部1、フィーダ部2及びアンローダ部3と、フィーダ部2の一側に設置したX−Yテーブル4と、同X−Yテーブル4上に載設したボンディングヘッド部5とで構成されている。
【0014】
ボンディングヘッド部5は、フィーダ部2の上方に延出したツールホルダ6と、同ツールホルダ6の先端に垂設したキャピラリ7と、同キャピラリの上方に設置したクランパ8と、キャピラリ7の斜め上方に設置したカメラ9とで構成されている。図中、10はモニタ用CRTである。
【0015】
かかる構成によって、通常のワイヤリング作業を行う場合には、カメラ9が撮影した画像からワイヤリングすべきパッドとリードフレームとの座標を判断し、同座標に基づきX−Yテーブル4を作動させて、半導体チップCとリードフレームとの間のワイヤリングを行うことができる。
【0016】
図2及び図3は、プローブ跡孔11がある機能試験用パッド12を示しており、機能試験用パッド12は、半導体チップCに形成された集積回路の所要箇所に導通したアルミニウム薄膜で形成されており、同機能試験用パッド12には機能試験装置のプローブを圧着して欠陥の有無を検出するために、プローブ跡孔11が形成され痕跡として残っている。
【0017】
プローブ跡孔11には、図2及び図3に示すような機能試験用パッド12の上面中央に形成された略円錐形状の凹部の他に、プローブ先端の形状によっては断面視略U字形状の凹部になる場合もある。
【0018】
図4は、上記プローブ跡孔11を埋め戻しにより補修するための補修モードにおけるキャピラリ7上下動のタイミングチャートを示している。
【0019】
同補修モードは、位置決め工程P0と、一次ワイヤボンディング工程P1と、ワイヤ切断工程P3とで構成されている。
【0020】
図5〜図7は、上記タイミングチャートの各時点における各部の作動状態を示しており、図中、13は金線よりなるワイヤ14を巻回したスプールである。
【0021】
位置決め工程P0では、X−Yテーブル4を作動させて、図5で示すように、キャピラリ7を機能試験用パッド12のプローブ跡孔11の直上方に位置させる。
【0022】
一次ワイヤボンディング工程P1では、加熱手段15により、キャピラリ7を挿通した金ワイヤ14の先端を溶融させて金ボール16を形成させ、図6で示すように、キャピラリ7を下降させてプローブ跡孔11上に溶融した金ボール16を圧着して同プローブ跡孔11を埋め戻す。なお、上記埋め戻しに際して、プローブ跡孔11を金ボール16で完全に充填するのが望ましいが、酸化や腐食の悪影響を及ぼさない程度であれば僅かな空間が残っても差支えない。
【0023】
また、上記金ボール16の圧着に際して、キャピラリ7を高周波振動(超音波)させて、金ボール16の充填効果を高めることもできる。
【0024】
次いで、ワイヤ切断工程P3に移行し、図7で示すように、クランパ8でワイヤ14を把持しながら、キャピラリ7を直上方に上昇させてワイヤ14を切断して、プローブ跡孔11の補修を終了する。
【0025】
なお、上記加熱手段15には、小さな火炎を噴出するトーチでワイヤ14の先端を溶融して金ボール16を形成したり、ワイヤ14の先端にスパークを発生させて同先端に金ボール16を形成する方法がある。図5〜図7中、18はアイランドである。
【0026】
図8は、プローブ跡孔11補修後の機能試験用パッド12を示しており、このようにプローブ跡孔11が金ボール16で充填閉塞されていることから、モールド樹脂で封止した後にもプローブ跡孔11に空気や水分が残留せず、同空気や水分による機能試験用パッド12や、その周辺のパッド及び配線の酸化や腐食を防止することができ、かかる酸化や腐食による導通不良等の不良の発生を防止することができる。
【0027】
なお、上記した本発明の実施例以外にも、半導体チップを具備した半導体装置において、機能試験用パッドに限らず、一般的なパッドの上面側に、プローブ跡孔11に限らない凹部が形成された場合にも、同凹部を低腐食性物質で覆うことにより、モールド樹脂で封止後、パッドの凹部に空気や水分が滞溜せず、従って、パッドの酸化や腐食が防止され、不良品発生や信頼性低下を防止することができる。
【0028】
なお、プローブ跡孔11に限らない凹部としては、ボンデイング時に、キャピラリ等の治具が移動する際、同治具の先端がパッドの表面に接触して形成された凹部が考えられる。
【0029】
図9は、本来のワイヤリングモードおけるキャピラリ7上下動のタイミングチャートを示しており、この場合は、目標値をワイヤリングのためのパッドの座標としたX−Yテーブル4の作動により、キャピラリ7をワイヤリングのためのパッドの直上方に位置させる位置決め工程P0を行い、次に、同パッドに一次ワイヤボンディング工程P1を施し、次いで、二次ワイヤボンディングP2、即ち、X−Yテーブル4の作動によるキンクやリバースと、リードフレーム17へのワイヤボンディングとを施し、最後に、ワイヤ切断工程P3を行うものである。なお、本来のワイヤリングモードにおける二次ワイヤボンディング工程P2では、半導体チップCとリードフレーム17との間に高低差があるため、その分だけキャピラリ7の下動量にオフセット19を設けている。
【0030】
かかる本来のワイヤリングモードのタイムチャート(図9)と、前記補修モードのタイミングチャート(図4)とを比較すると、キャピラリ7の上下動に関しては、ワイヤリングモードのタイミングチャート(図9)から、二次ワイヤボンディング工程P2の動作を省略したものと、補修モード(図4)とが等しいことがわかる。
【0031】
従って、本来のワイヤリングモードの制御プログラムの簡単な改造、即ち、前記位置決め工程P0の目標値をプローブ跡孔11の座標として一次ワイヤボンディングP1を行い、二次ワイヤボンディングP2のための制御プログラムを省略して、一次ワイヤボンディングP1から、直接、切断工程P3に移行させることにより、容易に補修モードの制御プログラムを構成することができる。
【0032】
また、これらのモードの切換えにより、一台のワイヤボンディング装置Aで、半導体チップCとリードフレーム17との間のワイヤリングと、プローブ跡孔11の埋め戻し補修とを連続して行うことができる。
【0033】
【発明の効果】
本発明によれば、半導体チップの機能試験用パッド等のパッドに形成されたプローブ跡孔等の凹部を、低腐食性物質で埋め戻しているので、モールド樹脂で半導体チップを封止した後に、プローブ跡孔等の凹部に空気や水分が残留せず、従って、機能試験用パッド等のパッドの酸化や腐食が防止され、不良品発生や信頼性低下を防止することができる。しかも、低腐食性物質での埋め戻しをワイヤボンディング装置によって行う場合に、ワイヤボンディング装置に、半導体チップへ行う一次ワイヤボンディング工程と、半導体チップを搭載したリードフレームへ行う二次ワイヤボンディング工程と、ボンディング終了後のワイヤ切断工程とよりなるワイヤリングモードと、このワイヤリングモードの二次ワイヤボンディング工程を省略して、一次ワイヤボンディング工程から、直接ワイヤ切断工程に移行する補修モードを設定して、制御プログラムによってワイヤリングモードと補修モードとを切換えることにより、一台のワイヤボンディング装置で、半導体チップとリードフレーム間のワイヤリングと、プローブ跡孔補修とを連続して行うことができる。
【図面の簡単な説明】
【図1】ワイヤボンディング装置の構成を示す斜視説明図。
【図2】プローブ跡孔がある機能試験用パッドの平面図。
【図3】図2におけるI−I線による断面図。
【図4】補修モードにおけるキャピラリ上下動のタイミングチャート。
【図5】一次ワイヤボンディング工程開始時の状態を示す説明図。
【図6】一次ワイヤボンディング工程終了時の状態を示す説明図。
【図7】ワイヤ切断工程を示す説明図。
【図8】プローブ跡孔補修後の機能試験用パッドの側面図。
【図9】本来のワイヤリングモードにおけるキャピラリ上下動のタイミングチャート。
【符号の説明】
C 半導体チップ
P1 一次ワイヤボンディング工程
P2 二次ワイヤボンディング工程
P3 ワイヤ切断工程
11 プローブ跡孔
12 機能試験用パッド
14 ワイヤ
17 リードフレーム[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device including a functionally tested semiconductor chip and a functional test trace repair method for the semiconductor chip.
[0002]
[Prior art]
Conventionally, a semiconductor chip has been provided with a functional test pad for performing a functional test of the semiconductor chip during the IC manufacturing process separately from the wiring pad. Prior to the packaging process, the functional test pad is formed. Further, the function test of the semiconductor chip is conducted by pressing the probe of the function test apparatus.
[0003]
[Problems to be solved by the invention]
However, since the probe is needle-shaped, a probe trace hole like a trace protruding with a needle remains on the upper surface of the functional test pad, and even if sealed with mold resin, the trace hole is sufficiently filled. Therefore, even after sealing with mold resin, moisture and air remain in the trace hole, and this moisture and oxygen in the air are used for functional test pads and wiring pads adjacent thereto. Corrosion and oxidation of the steel caused defective products and reduced reliability.
[0004]
Therefore, a semiconductor device having the semiconductor chip of the present invention has a wiring pad for bonding a wire made of a low corrosive substance by a wire bonding apparatus, and a pad provided separately from the wiring pad. The pad is a semiconductor device having a semiconductor chip in which a recess is formed in a pad provided separately, and the wire is pressed into the recess of the pad having the recess by the wire bonding apparatus and then the wire is cut. Thus, the recess was filled with a low corrosive substance, and a wire was bonded to the wiring pad by the wire bonding apparatus to form a semiconductor device having a semiconductor chip .
[0005]
Further, in the functional test trace repair method for a semiconductor chip of the present invention, a wiring pad to which a wire made of a low corrosive substance is bonded, and a semiconductor chip having a functional test pad provided separately from the wiring pad are provided. Wiring to the wiring pad is performed in the wiring mode of the wire bonding apparatus that continuously executes the wiring mode and the repair mode by the control program for the probe hole formed in the functional test pad , and the functional test in the repair mode. The probe trace hole was backfilled with a low corrosive substance by crimping the wire to the pad and cutting the wire. Further, the wiring mode includes a primary wire bonding process performed on the semiconductor chip, a secondary wire bonding process performed on the lead frame on which the semiconductor chip is mounted, and a wire cutting process after the bonding is completed. The present invention is also characterized in that the wire bonding step is omitted and the primary wire bonding step is shifted directly to the wire cutting step.
[0006]
DETAILED DESCRIPTION OF THE INVENTION
In the semiconductor device of the present invention, the concave portion formed on the upper surface side of the semiconductor chip is covered with a low corrosive substance, and the semiconductor chip has a probe trace hole of the functional test pad filled with the low corrosive substance. Therefore, after sealing with mold resin, air and moisture do not remain in the probe trace hole. Therefore, oxidation and corrosion of the functional test pad can be prevented, and generation of defective products and reduction in reliability can be prevented. .
[0007]
Further, in the repair method of the present invention, the same process as the wire bonding performed on the wiring pad of the semiconductor chip is applied to the probe trace hole remaining in the functional test pad, and then the probe trace is cut by cutting the wire. The hole is repaired by backfilling with a ball as a residual wire welded to the hole.
[0008]
That is, a part of the bonding control for wiring is changed, the capillary is positioned immediately above the probe trace hole of the functional test pad, and in this state, the capillary is moved down, and the tip of the wire inserted through the capillary is moved. Wire bonding is performed by crimping a gold ball to the probe trace hole of the functional test pad, and after the wire bonding, the capillary is moved up and separated from the wiring pad, and the probe trace is repaired by cutting the wire. Like to do.
[0009]
In the original bonding for wiring, the capillary is positioned directly above the wiring pad, the capillary is moved down, and the ball formed at the tip of the wire inserted through the capillary is pressed against the wiring pad. Perform primary wire bonding, and after the primary wire bonding, move the capillary up and away from the wiring pad, then move the capillary above the inner lead and move the capillary down to perform secondary wire bonding, Thereafter, a series of control operations of cutting the wire is performed.
[0010]
However, in the wire bonding control performed by the repair method of the present invention, there is a control that is not in the bonding control for the original wiring, that is, the control of positioning the capillary over the probe hole of the functional test pad, Bonding control for the original wiring, that is, control for moving the capillary onto the lead frame and performing the secondary wire bonding is omitted. After the primary wire bonding is completed, the wire is performed after the original secondary wire bonding. The process immediately shifts to the cutting control.
[0011]
Therefore, if the wiring mode consisting of the original wiring process and the repair mode for repairing the probe hole according to the present invention are set in the control program of the original wire bonding apparatus, one wire bonding apparatus Thus, the original wiring and the probe hole repair of the present invention can be performed, and these can be continuously performed.
[0012]
【Example】
Embodiments of the present invention will be described with reference to the drawings.
[0013]
FIG. 1 shows a wire bonding apparatus A used in the present invention, which includes a
[0014]
The
[0015]
With this configuration, when normal wiring work is performed, the coordinates of the pad to be wired and the lead frame are determined from the image taken by the
[0016]
2 and 3 show a
[0017]
In addition to the substantially conical recess formed in the center of the upper surface of the
[0018]
FIG. 4 shows a timing chart of the up and down movement of the
[0019]
The repair mode includes a positioning process P0, a primary wire bonding process P1, and a wire cutting process P3.
[0020]
5 to 7 show the operating state of each part at each point in the timing chart, in which 13 is a spool around which a
[0021]
In the positioning step P0, the XY table 4 is operated, and the
[0022]
In the primary wire bonding step P1, the tip of the
[0023]
Further, when the
[0024]
Next, the process proceeds to a wire cutting step P3, and as shown in FIG. 7, while holding the
[0025]
In the heating means 15, the tip of the
[0026]
FIG. 8 shows the
[0027]
In addition to the above-described embodiments of the present invention, in a semiconductor device including a semiconductor chip, not only a functional test pad but also a recess not limited to the
[0028]
Note that the recess not limited to the
[0029]
FIG. 9 shows a timing chart of the vertical movement of the
[0030]
Comparing the original wiring mode time chart (FIG. 9) and the repair mode timing chart (FIG. 4), the up and down movement of the
[0031]
Therefore, a simple modification of the original wiring mode control program, that is, the primary wire bonding P1 is performed with the target value of the positioning step P0 as the coordinates of the
[0032]
Further, by switching between these modes, the wiring between the semiconductor chip C and the
[0033]
【The invention's effect】
According to the present invention, since the concave portions such as probe trace holes formed in the pads such as the functional test pads of the semiconductor chip are backfilled with the low corrosive substance, after sealing the semiconductor chip with the mold resin, Air and moisture do not remain in the concave portions such as the probe trace holes, and therefore, oxidation and corrosion of pads such as functional test pads can be prevented, and generation of defective products and deterioration of reliability can be prevented. In addition, when backfilling with a low corrosive substance is performed by a wire bonding apparatus, the wire bonding apparatus includes a primary wire bonding process performed on a semiconductor chip, and a secondary wire bonding process performed on a lead frame on which the semiconductor chip is mounted, A control program that sets a repair mode in which a wire cutting process consisting of a wire cutting process after the completion of bonding and a secondary wire bonding process in this wiring mode are omitted, and a transition is made directly from the primary wire bonding process to the wire cutting process. By switching between the wiring mode and the repair mode, the wiring between the semiconductor chip and the lead frame and the probe trace hole repair can be continuously performed with a single wire bonding apparatus.
[Brief description of the drawings]
FIG. 1 is an explanatory perspective view showing a configuration of a wire bonding apparatus.
FIG. 2 is a plan view of a functional test pad having a probe mark hole.
3 is a cross-sectional view taken along the line II in FIG.
FIG. 4 is a timing chart of capillary vertical movement in the repair mode.
FIG. 5 is an explanatory view showing a state at the start of a primary wire bonding process.
FIG. 6 is an explanatory diagram showing a state at the end of the primary wire bonding process.
FIG. 7 is an explanatory view showing a wire cutting step.
FIG. 8 is a side view of a functional test pad after repairing a probe hole.
FIG. 9 is a timing chart of capillary up and down movement in the original wiring mode.
[Explanation of symbols]
C Semiconductor chip
P1 Primary wire bonding process
P2 Secondary wire bonding process
P3 Wire cutting process
11 Probe hole
12 Functional test pads
14 wire
17 Lead frame
Claims (3)
凹部を有するパッドの凹部には前記ワイヤボンディング装置によってワイヤを圧着してからワイヤを切断することにより凹部に低腐食性物質を充填し、ワイヤリング用パッドには前記ワイヤボンディング装置によってワイヤをボンディングしてワイヤリングを行ったことを特徴とする半導体チップを具備する半導体装置。There is a wiring pad to which a wire made of a low corrosive substance is bonded by a wire bonding apparatus, and a pad provided separately from the wiring pad, and a recess is formed in the pad provided separately from the wiring pad. A semiconductor device comprising a semiconductor chip,
The recess of the pad having a recess filled with a low-corrosive materials in the recess by cutting a wire after crimp the wire by the wire bonding apparatus, the wiring pad by bonding the wire by the wire bonding apparatus A semiconductor device comprising a semiconductor chip, wherein wiring is performed .
制御プログラムによってワイヤリングモードと補修モードとを連続して実行するワイヤボンディング装置のワイヤリングモードにおいてワイヤリング用パッドへのワイヤリングを行うとともに、補修モードにおいて機能試験用パッドにワイヤを圧着するとともにワイヤを切断することにより、プローブ跡孔を低腐食性物質で埋め戻すことを特徴とする半導体チップの機能試験痕跡補修方法。A probe mark hole formed in a functional test pad of a semiconductor chip having a wiring test pad to which a wire made of a low corrosive substance is bonded, and a functional test pad provided separately from the wiring pad,
In the wiring mode of the wire bonding apparatus that continuously executes the wiring mode and the repair mode according to the control program, the wiring to the wiring pad is performed, and the wire is crimped to the functional test pad and the wire is cut in the repair mode. The semiconductor chip functional test trace repair method characterized in that the probe trace hole is backfilled with a low corrosive substance.
Priority Applications (1)
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JP3527096A JP3756234B2 (en) | 1996-02-22 | 1996-02-22 | Semiconductor device including semiconductor chip and functional test trace repair method for the chip |
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JP3527096A JP3756234B2 (en) | 1996-02-22 | 1996-02-22 | Semiconductor device including semiconductor chip and functional test trace repair method for the chip |
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JP2009060028A (en) * | 2007-09-03 | 2009-03-19 | Fujikura Ltd | Semiconductor device and method of manufacturing the same |
CN114628268B (en) * | 2022-05-12 | 2022-07-29 | 广东气派科技有限公司 | Overtime-proof chip product corrosion ball inspection process |
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JPH058942U (en) * | 1991-07-18 | 1993-02-05 | 三菱電機株式会社 | Wire bonding system |
JP2708322B2 (en) * | 1992-05-07 | 1998-02-04 | 株式会社日立製作所 | Method of manufacturing connection pad of wiring board |
JPH0653271A (en) * | 1992-07-30 | 1994-02-25 | Matsushita Electron Corp | Wire bonding method for semiconductor device |
JP3578232B2 (en) * | 1994-04-07 | 2004-10-20 | インターナショナル・ビジネス・マシーンズ・コーポレーション | Electrical contact forming method, probe structure and device including the electrical contact |
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