JP3748410B2 - 研磨方法及び半導体装置の製造方法 - Google Patents

研磨方法及び半導体装置の製造方法 Download PDF

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Publication number
JP3748410B2
JP3748410B2 JP2001398479A JP2001398479A JP3748410B2 JP 3748410 B2 JP3748410 B2 JP 3748410B2 JP 2001398479 A JP2001398479 A JP 2001398479A JP 2001398479 A JP2001398479 A JP 2001398479A JP 3748410 B2 JP3748410 B2 JP 3748410B2
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JP
Japan
Prior art keywords
sic
polishing
acid
organic acid
based compound
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Expired - Fee Related
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JP2001398479A
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English (en)
Japanese (ja)
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JP2003197574A (ja
JP2003197574A5 (enExample
Inventor
学 南幅
延行 倉嶋
博之 矢野
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Toshiba Corp
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Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2001398479A priority Critical patent/JP3748410B2/ja
Priority to US10/326,407 priority patent/US6995090B2/en
Publication of JP2003197574A publication Critical patent/JP2003197574A/ja
Publication of JP2003197574A5 publication Critical patent/JP2003197574A5/ja
Application granted granted Critical
Publication of JP3748410B2 publication Critical patent/JP3748410B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09G—POLISHING COMPOSITIONS; SKI WAXES
    • C09G1/00—Polishing compositions
    • C09G1/02—Polishing compositions containing abrasives or grinding agents
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684—Smoothing; Planarisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
JP2001398479A 2001-12-27 2001-12-27 研磨方法及び半導体装置の製造方法 Expired - Fee Related JP3748410B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2001398479A JP3748410B2 (ja) 2001-12-27 2001-12-27 研磨方法及び半導体装置の製造方法
US10/326,407 US6995090B2 (en) 2001-12-27 2002-12-23 Polishing slurry for use in CMP of SiC series compound, polishing method, and method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001398479A JP3748410B2 (ja) 2001-12-27 2001-12-27 研磨方法及び半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2003197574A JP2003197574A (ja) 2003-07-11
JP2003197574A5 JP2003197574A5 (enExample) 2004-07-08
JP3748410B2 true JP3748410B2 (ja) 2006-02-22

Family

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Family Applications (1)

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JP2001398479A Expired - Fee Related JP3748410B2 (ja) 2001-12-27 2001-12-27 研磨方法及び半導体装置の製造方法

Country Status (2)

Country Link
US (1) US6995090B2 (enExample)
JP (1) JP3748410B2 (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2532114A1 (en) * 2003-07-11 2005-01-27 W.R. Grace & Co.-Conn. Abrasive particles for chemical mechanical polishing
US20050056810A1 (en) * 2003-09-17 2005-03-17 Jinru Bian Polishing composition for semiconductor wafers
JP2007533141A (ja) * 2004-04-08 2007-11-15 トゥー‐シックス・インコーポレイテッド コロイド状研磨材と組み合わせて過酸化水素またはオゾン化水溶液を用いたＳｉＣ表面の化学機械的研磨
US20060108325A1 (en) * 2004-11-19 2006-05-25 Everson William J Polishing process for producing damage free surfaces on semi-insulating silicon carbide wafers
WO2007029465A1 (ja) * 2005-09-09 2007-03-15 Asahi Glass Company, Limited 研磨剤、被研磨面の研磨方法および半導体集積回路装置の製造方法
US7678700B2 (en) * 2006-09-05 2010-03-16 Cabot Microelectronics Corporation Silicon carbide polishing method utilizing water-soluble oxidizers
US7998866B2 (en) * 2006-09-05 2011-08-16 Cabot Microelectronics Corporation Silicon carbide polishing method utilizing water-soluble oxidizers
US7723234B2 (en) * 2006-11-22 2010-05-25 Clarkson University Method for selective CMP of polysilicon
JP4523935B2 (ja) * 2006-12-27 2010-08-11 昭和電工株式会社 炭化珪素単結晶基板の研磨用水系研磨スラリー及び研磨法。
KR101453082B1 (ko) * 2007-06-15 2014-10-28 삼성전자주식회사 교류 구동형 양자점 전계발광소자
US9548211B2 (en) * 2008-12-04 2017-01-17 Cabot Microelectronics Corporation Method to selectively polish silicon carbide films
KR101508917B1 (ko) 2009-03-13 2015-04-07 생-고뱅 세라믹스 앤드 플라스틱스, 인코포레이티드 나노다이아몬드를 사용하는 화학기계적 평탄화 공정
KR101094161B1 (ko) 2009-10-19 2011-12-14 주식회사 케이씨텍 화학적 기계적 연마용 슬러리의 제조 방법
KR101203136B1 (ko) * 2010-03-22 2012-11-20 국립대학법인 울산과학기술대학교 산학협력단 나노 와이어 제조 방법
KR101842300B1 (ko) * 2010-06-23 2018-03-26 닛산 가가쿠 고교 가부시키 가이샤 탄화규소 기판 연마용 조성물 및 탄화규소 기판의 연마 방법
JP6068790B2 (ja) * 2011-11-25 2017-01-25 株式会社フジミインコーポレーテッド 研磨用組成物の製造方法
WO2013077368A1 (ja) * 2011-11-25 2013-05-30 株式会社 フジミインコーポレーテッド 研磨用組成物
US8999193B2 (en) 2012-05-10 2015-04-07 Air Products And Chemicals, Inc. Chemical mechanical polishing composition having chemical additives and methods for using same
EP2662427B1 (en) 2012-05-10 2018-03-14 Versum Materials US, LLC Chemical mechanical polishing composition having chemical additives and methods for using same
US9551075B2 (en) * 2014-08-04 2017-01-24 Sinmat, Inc. Chemical mechanical polishing of alumina
EP3516002B1 (en) 2016-09-23 2022-01-05 Saint-Gobain Ceramics & Plastics, Inc. Chemical mechanical planarization slurry and method for forming same
CN112029417A (zh) * 2020-09-30 2020-12-04 常州时创新材料有限公司 一种用于碳化硅cmp的抛光组合物及其制备方法
CN119458136B (zh) * 2024-10-15 2025-09-16 北京晶亦精微科技股份有限公司 晶圆的混合键合表面平坦化工艺方法及化学机械抛光设备

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3297220B2 (ja) * 1993-10-29 2002-07-02 株式会社東芝 半導体装置の製造方法および半導体装置
JP3523107B2 (ja) * 1999-03-17 2004-04-26 株式会社東芝 Ｃｍｐ用スラリおよびｃｍｐ法
US6611060B1 (en) * 1999-10-04 2003-08-26 Kabushiki Kaisha Toshiba Semiconductor device having a damascene type wiring layer
JP3736249B2 (ja) 2000-01-12 2006-01-18 Ｊｓｒ株式会社 半導体装置の製造に用いる化学機械研磨用水系分散体
KR100481651B1 (ko) * 2000-08-21 2005-04-08 가부시끼가이샤 도시바 화학 기계 연마용 슬러리 및 반도체 장치의 제조 방법
US20040018697A1 (en) * 2002-07-26 2004-01-29 Chung Henry Wei-Ming Method and structure of interconnection with anti-reflection coating

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Publication number Publication date
US6995090B2 (en) 2006-02-07
JP2003197574A (ja) 2003-07-11
US20030124850A1 (en) 2003-07-03

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