JP3727748B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
More particularly, the present invention relates to a semiconductor laser having a semi-insulating buried heterostructure (SI-BH structure) or a planarized semi-insulating buried heterostructure (SI-PBH structure), and a semiconductor laser therefor. It relates to a manufacturing method.
The market for optical fiber communication has expanded with the development of the multimedia industry, and recently there has been a demand for lower prices and higher reliability of semiconductor lasers.
[0002]
[Prior art]
8 and 9 are cross-sectional views illustrating a method for manufacturing a semiconductor laser having an SI-BH structure.
First, as shown in FIG. 8A, after a plurality of compound semiconductor layers 2 to 5 are formed on a compound semiconductor substrate 1 having a (001) plane, an etching resistant film 6 is formed in a region where a mesa stripe is formed. Form.
[0003]
Next, as shown in FIG. 8B, the compound semiconductor layers 2 to 5 and the compound semiconductor substrate 1 are etched using the etching resistant film 6 as a mask, and the mesa stripe having the <110> direction as the longitudinal direction is etched. 101 is formed. At this time, the mesa stripe 101 includes the clad layer 2a, the active layer 3a, the clad layer 4a, and the contact layer 5a from the lower layer.
[0004]
Next, as shown in FIG. 8C, the semi-insulating compound semiconductor layer 7 is selectively grown on the compound semiconductor substrate 1b on the side of the mesa stripe 101 while leaving the etching resistant film 6 as it is. At this time, if the film thickness of the compound semiconductor layer 7 at a portion far from the mesa stripe 101 is thin as shown in FIG. 11, a sufficiently high resistance cannot be obtained, so that the compound semiconductor layer 7 is made as thick as possible. Thus, the compound semiconductor layer 7 protrudes from the uppermost surface of the mesa stripe 101 at the side of the mesa stripe 101.
[0005]
Next, as shown in FIG. 8D, after the insulating film 8 is formed, patterning is performed to form the opening 9 including the mesa stripe 101 as shown in FIG. 9A.
Next, as shown in FIG. 9B, after removing the deteriorated layer on the surface of the contact layer 5a, the surface is light-etched and then contacted with the uppermost layer 5a of the mesa stripe 101 as shown in FIG. 9C. The electrode 10 to be formed is formed. At this time, a gold film is used as the main metal of the electrode 10, but a base layer made of a refractory metal film is sandwiched between the gold film and the lower compound semiconductor layer 5 a so as not to react.
[0006]
Thus, a semiconductor laser having an SI-BH structure is completed.
Next, a method for manufacturing a semiconductor laser having an SI-PBH structure will be described with reference to FIGS.
First, as shown in FIGS. 12A and 12B, the compound semiconductor layers 14 to 12 are etched using the etching resistant film 15 as a mask, and the <110> direction is formed on the compound semiconductor substrate 11b having the (001) plane. A mesa stripe 102 is formed with the length in the longitudinal direction. At this time, the mesa stripe 102 includes the cladding layer 12a, the active layer 13a, and the cladding layer 14a from the lower layer. Unlike the semiconductor laser having the SI-BH structure, the contact layer 5a is not formed.
[0007]
Next, as shown in FIG. 12C, the semi-insulating compound semiconductor layers 16 and 17 are selectively grown on the compound semiconductor substrate 11b on the side of the mesa stripe 102 while leaving the etching resistant film 15 as it is. At this time, the compound semiconductor layers 16 and 17 protrude from the uppermost surface of the mesa stripe 102 at the side of the mesa stripe 102.
[0008]
Next, as shown in FIG. 13A, after the etching resistant film 15 is removed, a cladding layer 18 and a contact layer 19 are formed.
Next, as shown in FIG. 13B, after the insulating film 20 is formed, patterning is performed to form a contact hole 21. Subsequently, when an electrode 22 that contacts the contact layer 19 through the contact hole 21 is formed, a semiconductor laser having an SI-PBH structure is completed.
[0009]
[Problems to be solved by the invention]
However, in the semiconductor laser having the SI-BH structure, the sidewall of the compound semiconductor layer 7 rises at a corner at the corner of the mesa stripe 101 at a steep angle. The formation 10a may not be formed. In particular, as shown in FIG. 9B, when the surface is etched, the compound semiconductor layer 7 protrudes (overhangs) on the mesa stripe 101 as shown in FIG. become. For this reason, when the gold film 10b is formed on the underlayer 10a, the compound semiconductor layer 5a and the gold film 10b are in direct contact with each other through the non-formation region of the underlayer 10a, and gold enters the mesa stripe 101 and enters the semiconductor laser. There is a problem of deteriorating the characteristics.
[0010]
On the other hand, in the semiconductor laser having the SI-PBH structure, since the plane orientation of the side wall of the compound semiconductor layer 16 protruding from the uppermost surface of the mesa stripe 102 is the (111) B plane, zinc (Zn) is used as the p-type impurity. When the clad layer 18 is formed, the impurity concentration decreases in the clad layer 18 (B portion in FIG. 13) grown from the side wall. For this reason, there is a problem that the high resistance layer covers the mesa stripe 102 to increase the element resistance, and a desired current does not flow into the active layer 13a in the mesa stripe 102.
[0011]
The present invention was created in view of the above-described problems of the conventional example, and can form a flat electrode region without bending over the mesa stripe and its peripheral portion. It is an object of the present invention to provide a semiconductor device capable of preventing the formation of a resistive compound semiconductor layer and a method for manufacturing the same.
[0012]
[Means for Solving the Problems]
The above-described problems are the first invention, a step of forming a plurality of compound semiconductor layers on a compound semiconductor substrate having a (001) plane or an equivalent plane, and the compound semiconductor layer using the etching resistant film as a mask. Etching to form a mesa stripe having a longitudinal direction in the <110> direction or an equivalent direction, and the mesa stripe on the side of the mesa stripe while leaving the etching resistant film on the compound semiconductor substrate. The step of selectively growing the first compound semiconductor layer that is higher than the uppermost surface of the stripe and the side wall is exposed and the difference in the etching rate depending on the plane orientation are used to etch the surface, and the side of the mesa stripe Receding the side wall of the first compound semiconductor layer A flat portion is provided around the top surface of the mesa stripe. And a method of manufacturing a semiconductor device characterized by comprising the steps of:
In the second invention, the side wall of the first compound semiconductor layer is receded. A flat portion is provided around the top surface of the mesa stripe. After the step, the semiconductor device manufacturing method of the first invention is characterized by having a step of forming electrodes on the mesa stripe and the first compound semiconductor layer,
According to a third aspect of the invention, the side wall of the first compound semiconductor layer is retreated. A flat portion is provided around the top surface of the mesa stripe. A step of depositing a second compound semiconductor layer doped with impurities on the mesa stripe and the first compound semiconductor layer, and a step of forming an electrode in contact with the second compound semiconductor layer. It is solved by the method for manufacturing a semiconductor device of the first invention, characterized by comprising:
According to a fourth invention, the material of the second compound semiconductor layer is InP, and the impurity is zinc (Zn), which is solved by the semiconductor device manufacturing method according to the third invention,
According to a fifth aspect of the present invention, there is provided a semiconductor device manufacturing method according to any one of the first to fourth aspects, wherein the compound semiconductor substrate and the first compound semiconductor layer are made of InP. ,
According to a sixth aspect of the invention, the plane orientation of the side wall of the first compound semiconductor layer is a (111) B plane, and the etchant used for etching utilizing the difference in etching rate depending on the plane orientation is sulfuric acid. It is solved by the method for manufacturing a semiconductor device of the fifth invention,
A seventh aspect of the invention is solved by a semiconductor device manufactured by the method for manufacturing a semiconductor device according to any one of the first to sixth aspects of the invention,
The semiconductor device according to an eighth aspect of the invention is solved by the semiconductor device according to the seventh aspect of the invention, which is a semiconductor laser including an active layer in the mesa stripe.
[0013]
In the present invention, the surface is etched using the difference in etching rate depending on the plane orientation, and the side wall of the first compound semiconductor layer on the side of the mesa stripe is receded.
For example, when the InP layer is formed on the side of the mesa stripe as the first compound semiconductor layer so as to protrude from the uppermost surface of the mesa stripe on the InP substrate having the (001) plane, the protruding portion of the InP layer The side wall of this becomes the (111) B surface. Therefore, when sulfuric acid is used as the etchant, the etching rate of the (111) B surface is much higher than the (001) surface, so that only the side wall can be etched back while suppressing the etching of the flat portion. .
[0014]
As a result, at least the bent portion can be moved away from the vicinity of the mesa stripe, and the mesa stripe and its peripheral portion can be flattened.
Therefore, when an electrode is formed on the surface, the electrode can be formed on a flat surface in the vicinity of the mesa stripe. For this reason, when an electrode composed of a multilayer metal film including a gold film is formed as the uppermost layer, a metal film having a uniform film thickness is formed and is always interposed between the gold film and the compound semiconductor layer. It is possible to prevent gold from entering the compound semiconductor layer in contact with the compound semiconductor layer.
[0015]
In addition, when a compound semiconductor layer containing an impurity such as Zn is formed over the mesa stripe and the side compound semiconductor layer, the doping amount of the layer deposited on the side wall of the (111) B plane is low depending on the plane orientation. Even if the concentration is reached, the layer does not reach the mesa stripe because the side wall of the (111) B surface is far from the vicinity of the mesa stripe.
[0016]
For this reason, the impurity concentration in the flat (001) plane is maintained in the compound semiconductor layer above the mesa stripe, so that the resistance becomes low. As a result, the low resistance of the current flow path is maintained, and a current of a desired magnitude flows into the active layer in the mesa stripe, so that the threshold current of the semiconductor laser can be reduced.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
(1) First embodiment
1A to 1D and 2A to 2C are cross-sectional views illustrating a method for manufacturing a semiconductor laser having an SI-BH structure according to the first embodiment of the present invention. Targeting a 1.55 μm wavelength semiconductor laser, it has a current confinement structure.
[0018]
First, as shown in FIG. 1A, an n-type InGaAsP layer 32 having a wavelength (λg) of 1.15 μm and a film thickness of 70 nm corresponding to a band gap is formed on a compound semiconductor substrate 31 made of InP having a (001) plane. To deposit. In this specification, the wavelength (λg) corresponding to the band gap represents the size of the band gap that changes corresponding to the composition ratio of the compound semiconductor layer in the unit of the corresponding wavelength.
[0019]
Further, a layer 33 including an active layer is deposited. That is, a non-doped InGaAsP film having a thickness of λg = 1.15 μm and a thickness of 30 nm is deposited, and a non-doped InGaAsP film having a thickness of λg = 1.57 μm and a thickness of 5.1 nm and an undoped InGaAsP film having a thickness of λg = 1.3 μm and a thickness of 10 nm. Are stacked alternately so that there are 10 InGaAsP films with λg = 1.57 μm and both ends are InGaAsP films with λg = 1.3 μm. Further, a non-doped InGaAsP film having a thickness of λg = 1.15 μm and a thickness of 30 nm is laminated thereon. Needless to say, various layer configurations can be adopted for the laminated structure of the layer 33 including the active layer depending on the application of the semiconductor laser.
[0020]
Further, a p-type InP layer 34 having a thickness of 2000 nm is deposited on the layer 33 including the active layer. The above compound semiconductor layer is deposited by the MOVPE method.
Subsequently, a p-type InGaAsP layer 35 having a thickness of λg = 1.3 μm and a thickness of 500 nm is deposited by a liquid layer growth method (LPE method).
Next, after a 300 nm-thickness silicon oxide film is formed on the InGaAsP layer 35 by chemical vapor deposition (CVD), CHF _Three The silicon oxide film is etched by reactive ion etching (RIE) using gas using the resist film as a mask. As a result, a strip-like etching resistant film 36 having a width of 1.5 μm and having a longitudinal direction in the <11 (−) 0> direction is formed in the region where the mesa stripe including the active layer is to be formed.
[0021]
Next, as shown in FIG. 1B, an ethane-based gas such as C ₂ H _Four + H ₂ A plurality of compound semiconductor layers 35 to 32 and the compound semiconductor substrate 31 are etched by reactive ion etching (RIE) using a mixed gas of the above, using the etching resistant film 36 as a mask, and the <110> direction is a longitudinal direction. A mesa stripe 103 having a thickness of 3 μm is formed.
[0022]
The mesa stripe 103 includes a clad layer 32a made of n-type InP and a layer 33a including an active layer, a 2000-nm clad layer 34a made of p-type InP, and λg = 1.3 μm. And a contact layer 35a having a thickness of 500 nm made of p-type InGaAsP.
Further, in the layered structure of the mesa stripe 103, the layer 33a including the active layer is a SCH layer made of non-doped InGaAsP with λg = 1.15 μm and a film thickness made of non-doped InGaAsP with λg = 1.57 μm. An active layer having a multiple quantum well structure (MQW structure) in which a 5.1 nm well layer and a 10 nm thick barrier layer made of non-doped InGaAsP with λg = 1.3 μm are alternately stacked, and a non-doped λg = 1.15 μm It has a multilayer structure with a 30 nm thick SCH layer made of InGaAsP.
[0023]
Next, as shown in FIG. 1 (c), the etching resistant film 36 is left as it is, and the compound semiconductor substrate 31b on the side of the mesa stripe 103 is embedded with a semi-insulating InP doped with iron (Fe). A layer (first compound semiconductor layer) 37 is selectively grown. At this time, the buried layer 37 is deposited on the side of the mesa stripe 103 so as to protrude from the uppermost surface of the mesa stripe 103 in order to obtain a sufficient film thickness even from a distance from the mesa stripe 103. The (111) B surface is exposed on the side wall of the protruding portion.
[0024]
Next, as shown in FIG. 1D, a 300 nm-thickness silicon oxide film 38 is formed by vapor deposition and then patterned to form a contact hole 39 having an opening width of 6 to 7 μm including the upper surface of the mesa stripe 103. .
Next, as shown in FIG. 2A, the surface is etched using an etchant having a much higher etching rate on the (111) B surface than on the (001) surface, for example, concentrated sulfuric acid. Accordingly, it is possible to etch and recede only the side wall where the (111) B surface is exposed while suppressing the etching of the flat portion where the (001) surface is exposed. Thereby, a flat surface spreads around the uppermost surface of the mesa stripe 103. In FIG. 1 (d), the C portion is a flat surface.
[0025]
Next, as shown in FIG. 2B, in order to remove the deteriorated layer on the surface of the contact layer 35a, H ₂ SO _Four + H ₂ O ₂ + H ₂ Lightly etch the surface using a mixture of O 2.
Next, as shown in FIG. 2C, a 300 nm thick Ti film and a 300 nm thick Pt film are formed by vapor deposition and then patterned. Further, an Au film having a film thickness of 2.5 μm is formed on the Pt film by plating, and an electrode 39 made of Ti film / Pt film / Au film that contacts the contact layer 35a of the mesa stripe 103 through the contact hole 39 is formed. . At this time, the main metal of the electrode 40 is an Au film. However, in order to prevent the Au film and the lower contact layer 35a from reacting with each other, a refractory metal film such as a Ti film / Pt film is formed between the two layers. The strata are sandwiched.
[0026]
In this case, the bent portion caused by the protrusion of the buried layer 37 is located far from the vicinity of the mesa stripe 103, and the mesa stripe 103 and its peripheral portion are flat. It can be formed on a flat surface. Thus, a Ti film and a Pt film having a uniform thickness are formed in the vicinity of the mesa stripe 103, and it is possible to reliably prevent the Au film and the compound semiconductor layer from being in direct contact with each other.
[0027]
Although not shown, an electrode is also formed on the back surface of the InP substrate 31b.
Thus, a semiconductor laser having an SI-BH structure is completed. FIG. 3 is a perspective view thereof.
In the semiconductor laser fabricated in this manner, when a current is passed through the front electrode 40 and the back electrode, the compound semiconductor layer 37 having a high resistance is formed on the side of the mesa stripe 103. Therefore, the current flows mainly in the mesa stripe 103 including the active layer.
[0028]
In this case, since the Au film of the electrode 40 is always formed under the mesa stripe 103 with the Ti film and the Pt film interposed therebetween, gold or the like of the electrode 40 is prevented from entering the mesa stripe 103. Thus, the reliability of the semiconductor laser is improved.
Note that when depositing the buried layer 37 of FIG. 1C, the protrusion can be made lower by adding chlorine gas to the film forming gas. This is considered to be because film formation is performed while etching with chlorine gas.
[0029]
In this case, since the side portion of the mesa stripe 103 is exposed to chlorine gas, the uppermost contact layer 35a made of InGaAsP may be side-etched by the chlorine gas. In another embodiment, in order to prevent this, a thin cap layer, for example, a p-type InP layer having a thickness of about 50 nm may be formed on the contact layer 35a. Thereby, the side etching of the contact layer 35a can be suppressed.
[0030]
Further, in the case of such a laminated structure, in order to form an enlarged flat surface around the mesa stripe 103, it is exposed to concentrated sulfuric acid as in the etching process of FIG. That is, since the cap layer is simultaneously etched together with the buried layer 37 by concentrated sulfuric acid, an enlarged flat surface can be formed while the side wall is retracted.
Furthermore, although the plane orientation of the compound semiconductor substrate 31 is the (001) plane, a plane equivalent to this, that is, a (100) plane or a (010) plane may be used. Here, the equivalent plane is a plane having the same arrangement state of atoms on the surface.
[0031]
Further, although the longitudinal direction of the mesa stripe 103 is the <110> direction, the equivalent direction, that is, the plane orientation of the compound semiconductor substrate 31 is the (100) plane, the <011> direction, and the plane orientation (010) plane. The <101> direction may be used.
(2) Second embodiment
Next, a method for manufacturing a semiconductor laser having an SI-PBH structure will be described with reference to FIGS. As in the first embodiment, the target is a semiconductor laser having a wavelength of 1.55 μm. In the following, the layers corresponding to those in the first embodiment are the same as or close to those in the first embodiment unless otherwise indicated, such as etching conditions, film forming conditions, and film thickness of the formed film. Value.
[0032]
First, as shown in FIG. 4A, an n-type InP layer 42 having a thickness of 100 nm, a layer 43 including an active layer, a film, A p-type InP layer 44 having a thickness of 2 μm and a p-type InGaAsP layer 45 having a thickness of 100 nm are sequentially stacked. Note that the layer 43 including the active layer has the same structure as the layer 33 including the active layer of the first embodiment.
[0033]
Subsequently, a silicon oxide film is formed on the InGaAs layer 45 and then patterned to form an etching resistant film 46.
Next, as shown in FIG. 4B, the compound semiconductor layers 45 to 42 are etched using the etching resistant film 46 as a mask, and the <110> direction is defined as the longitudinal direction on the compound semiconductor substrate 41b having the (001) plane. The mesa stripe 104 to be formed is formed.
[0034]
At this time, the mesa stripe 104 includes a clad layer 42a made of n-type InP, an active layer 43a, a p-type InP clad layer 44a, and a cap layer 45a made of p-type InGaAsP from the lower layer. Unlike the semiconductor laser having the SI-BH structure described in the first embodiment, the cap layer 45a is formed without forming the contact layer 35a. The cap layer 45a is provided so as not to deteriorate the surface of the underlying InP cladding layer 44a.
[0035]
Next, as shown in FIG. 4C, the etching resistant film 46 is left as it is, and the film thickness of 3 μm made of Fe-doped semi-insulating InP is formed on the compound semiconductor substrate 41b on the side of the mesa stripe 104. A buried layer (first compound semiconductor layer) 47 and a 500 nm thick block layer 48 made of n-type InP are selectively grown. At this time, since the buried layer 47 and the block layer 48 are formed so as to obtain a sufficient film thickness even at a distance from the mesa stripe 104, the buried layer 47 and the block layer 48 protrude from the uppermost surface of the mesa stripe 104 at the side of the mesa stripe 104. The block layer 48 is provided to prevent the diffusion of Zn and to prevent the inflow of holes from the p-type cladding layer deposited thereon.
[0036]
Next, as shown in FIG. 4D, after removing the etching resistant film 46, the uppermost cap layer 45a of the mesa stripe 104 is removed by an etchant in which hydrofluoric acid and nitric acid are mixed at 1: 1.
Subsequently, the surface is etched using concentrated sulfuric acid. At this time, since the etching rate by concentrated sulfuric acid is much higher on the (111) B surface than on the (001) surface, the etching of the flat portion of the (001) surface is suppressed and the side wall of the (111) B surface is suppressed. Only can be etched back. As a result, a flat (001) surface having a width Wi is formed around the top surface of the mesa stripe 104 and the periphery thereof. In FIG.4 (d), it is the flat (001) surface where the D part expanded.
[0037]
Next, as shown in FIG. 5A, a clad layer (second compound semiconductor layer) 49 made of InP and having a thickness t is formed while doping Zn as a p-type impurity.
At this time, the cladding layer 49 grows from the flat (001) plane and from the (111) B plane, but the layer grown from the (111) B plane has a low concentration, that is, a high resistance. It is necessary not to overlap the stripe 104. That is, the width (Wf) of the flat (001) surface after the formation of the cladding layer 49 is made larger than the width of the mesa stripe 104. Therefore, it is necessary to determine the initial flat surface width Wi with respect to the required film thickness t of the cladding layer 49.
[0038]
Here, the film thickness t of the cladding layer 49, the width Wi of the flat surface on the mesa stripe 104 before forming the cladding layer 49, and the width of the flat surface on the mesa stripe 104 after forming the cladding layer 49 Assuming that the growth rates of InP on the (111) B plane and the (001) plane are equal, the relationship with Wf is:
Wf = Wi−2 × t / tan θ
It is represented by Here, θ represents the angle between the flat surface and the growth direction from the (111) B surface. FIG. 7A shows the result calculated by the above formula based on the model of FIG. 7B. According to this, in order to obtain Wf = 1 μm, Wi needs to be about 3 μm when t = 1 μm and θ = 45 °.
[0039]
Next, a contact layer (second compound semiconductor layer) 50 made of p-type InGaAs having a thickness of 200 nm is formed on the cladding layer 49.
Next, as shown in FIG. 5B, an insulating film 51 made of a silicon oxide film having a thickness of 300 nm is formed and then patterned to form a contact hole 52.
Subsequently, after forming a Ti film and a Pt film, patterning is performed, and further, an Au film is formed on the Pt film, and from the Ti film / Pt film / Au film contacting the contact layer 50 through the contact hole 52 An electrode 53 is formed. An electrode is also formed on the back surface of the compound semiconductor substrate 41b. Thereby, a semiconductor laser having an SI-PBH structure is completed.
[0040]
As described above, according to the second embodiment of the present invention, as shown in FIG. 4D, the surface is etched using the difference in etching rate depending on the plane orientation, and the mesa stripe 104 side The side walls of the buried layer 47 and the block layer 48 are set back.
As a result, at least the bent portion can be moved away from the vicinity of the mesa stripe 104, and a sufficiently enlarged flat surface can be formed on the mesa stripe 104 and its peripheral portion.
[0041]
Therefore, as shown in FIG. 5A, when the clad layer 49 containing a p-type impurity such as Zn is formed on the mesa stripe 104 and on the buried layer 47 and the block layer 48 on the side, Even if the doping amount of the clad layer 49 deposited on the side wall of this layer is low depending on the plane orientation, the side wall of the (111) B plane is far from the vicinity of the mesa stripe 104, so the low concentration of the layer 49 The region does not reach the mesa stripe 104. For this reason, since the impurity concentration in the flat (001) plane is maintained in the cladding layer 49 above the mesa stripe 104, the resistance becomes low. Therefore, the low resistance of the current flow path is maintained, and a current having a desired magnitude flows into the active layer in the mesa stripe 104. Thereby, the threshold current of the semiconductor laser can be reduced.
[0042]
In the second embodiment, instead of the buried layer 47 and the block layer 48, a p-type InP layer having a thickness of 2.5 μm and an n-type InP layer having a thickness of 500 nm are formed on the compound semiconductor substrate 41b. You may deposit in order.
[0043]
【The invention's effect】
As described above, according to the present invention, the surface is etched by utilizing the difference in the etching rate depending on the plane orientation, and the side wall of the first compound semiconductor layer on the side of the mesa stripe is receded. The portion can be moved far from the vicinity of the mesa stripe, and a flat surface can be spread around the periphery of the mesa stripe.
[0044]
Therefore, when an electrode composed of a multi-layer metal film including a gold film as the uppermost layer is formed on the surface, a metal film having a uniform film thickness is formed on the flat surface, and there is always a gap between the gold film and the compound semiconductor layer. It is possible to prevent the gold film from coming into contact with the compound semiconductor layer and entering the compound semiconductor layer. Thereby, the reliability of the semiconductor laser can be improved.
[0045]
In addition, when a compound semiconductor layer including impurities is formed over the mesa stripe and the side compound semiconductor layer, the doping amount of the layer deposited on the side wall of the (111) B plane becomes a low concentration depending on the plane orientation. However, since the side wall of the (111) B plane is far from the vicinity of the mesa stripe, the layer does not reach the mesa stripe. For this reason, the impurity concentration in the flat (001) plane is maintained in the compound semiconductor layer above the mesa stripe, so that the resistance becomes low. As a result, the low resistance of the current flow path is maintained, and a current of a desired magnitude flows into the active layer in the mesa stripe, so that the threshold current of the semiconductor laser can be reduced.
[Brief description of the drawings]
FIGS. 1A to 1D are cross-sectional views (No. 1) illustrating a method for manufacturing a semiconductor laser having an SI-BH structure according to a first embodiment of the present invention. FIGS.
FIGS. 2A to 2C are sectional views (No. 2) showing the method for manufacturing the semiconductor laser having the SI-BH structure according to the first embodiment of the present invention. FIGS.
FIG. 3 is a perspective view of a semiconductor laser having an SI-BH structure manufactured by the manufacturing method according to the first embodiment of the present invention.
FIGS. 4A to 4D are sectional views (No. 1) showing a method for manufacturing a semiconductor laser having an SI-PBH structure according to a second embodiment of the present invention. FIGS.
FIGS. 5A and 5B are cross-sectional views (part 2) illustrating the method for manufacturing the semiconductor laser having the SI-PBH structure according to the second embodiment of the present invention. FIGS.
FIG. 6 is a perspective view of a semiconductor laser having an SI-PBH structure manufactured by a manufacturing method according to a second embodiment of the present invention.
FIG. 7 (a) is a graph showing the relationship between the width of a flat surface and the thickness of a cladding layer in a method of manufacturing a semiconductor laser having an SI-PBH structure according to a second embodiment of the present invention. FIG. 7B is a cross-sectional view showing a model of the structure used to derive the above relationship.
FIGS. 8A to 8D are cross-sectional views (No. 1) showing a method for manufacturing a semiconductor laser having an SI-BH structure according to a conventional example. FIGS.
FIGS. 9A to 9C are cross-sectional views (part 2) illustrating a method for manufacturing a semiconductor laser having an SI-BH structure according to a conventional example. FIGS.
FIG. 10 is a cross-sectional view showing problems in a method of manufacturing a conventional semiconductor laser having an SI-BH structure.
FIG. 11 is a cross-sectional view showing a method for manufacturing a semiconductor laser having an SI-BH structure according to a conventional example.
FIGS. 12A to 12C are cross-sectional views (No. 1) showing a method for manufacturing a semiconductor laser having an SI-PBH structure according to another conventional example. FIGS.
FIGS. 13A and 13B are sectional views (No. 2) showing a method for manufacturing a semiconductor laser having an SI-PBH structure according to another conventional example. FIGS.
[Explanation of symbols]
31, 31b, 41, 41b Compound semiconductor substrate,
32, 35 InGaAsP layer (compound semiconductor layer),
32a, 34a, 42a, 44a cladding layer,
33, 33a, 43, 43a a layer including an active layer,
34, 42, 44 InP layer (compound semiconductor layer),
35a, 50 contact layer,
36, 46 Etching resistant film,
37, 47 buried layer (first compound semiconductor layer),
38,51 Silicon oxide film (insulating film),
39,52 contact holes,
40,53 electrodes,
45 InGaAsP layer (compound semiconductor layer),
45a cap layer,
48 block layers,
49 Cladding layer (second compound semiconductor layer),
103,104 Mesa stripe.

Claims (8)

Forming a plurality of compound semiconductor layers on a compound semiconductor substrate having a (001) plane or an equivalent plane;
Etching the compound semiconductor layer using an etching resistant film as a mask, and forming a mesa stripe having a longitudinal direction in the <110> direction or an equivalent direction;
Selectively growing a first compound semiconductor layer that is higher than the uppermost surface of the mesa stripe and has exposed sidewalls on the compound semiconductor substrate on the side of the mesa stripe while leaving the etching resistant film;
By utilizing the difference in etching rate caused by the surface orientation, the surface is etched, to retract the side wall of the first compound semiconductor layer side of said mesa stripe, Ru provided a flat portion around the top surface of the mesa stripe And a method of manufacturing a semiconductor device. Retracting the side walls of the first compound semiconductor layer, after the step of Ru formed a flat portion around the top surface of said mesa stripe, a step of forming an electrode on the mesa stripe and the first compound semiconductor layer 2. The method of manufacturing a semiconductor device according to claim 1, further comprising: Retracting the side walls of the first compound semiconductor layer, after said mesa stripe step of Ru formed a flat portion around the top surface, said second compound semiconductor layer in which impurities are introduced mesa stripe and the first Depositing on the compound semiconductor layer;
The method of manufacturing a semiconductor device according to claim 1, further comprising a step of forming an electrode in contact with the second compound semiconductor layer.   4. The method of manufacturing a semiconductor device according to claim 3, wherein the material of the second compound semiconductor layer is InP, and the impurity is zinc (Zn).   5. The method of manufacturing a semiconductor device according to claim 1, wherein a material of the compound semiconductor substrate and the first compound semiconductor layer is InP. 6.   The plane orientation of the side wall of the first compound semiconductor layer is a (111) B plane, and an etchant used for etching utilizing a difference in etching rate depending on the plane orientation is sulfuric acid. A method for manufacturing a semiconductor device.   A semiconductor device manufactured by the method for manufacturing a semiconductor device according to claim 1.   8. The semiconductor device according to claim 7, wherein the semiconductor device is a semiconductor laser including an active layer in the mesa stripe.

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