JP3722772B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which an insulating film is formed without generating voids between interconnects having a fine structure.
[0002]
[Prior art]
In recent years, with the increase in the degree of integration of semiconductor devices, the dimensions of individual elements have progressed, and the dimensions of semiconductor regions constituting each element have also been reduced. Then, contact holes formed in the insulating film in order to embed wirings connected to each semiconductor region are also miniaturized, and the aspect ratio tends to increase. For example, in the case of an element structure with a wiring interval of 130 nm, the aspect ratio is 3.0 to 4.0.
[0003]
As a technique for forming the contact hole, a self-aligned contact (hereinafter referred to as SAC) forming technique has been conventionally used. For example, in the SAC formation process, the upper surface of each gate electrode is covered with a nitride film, nitride film spacers are formed on both sides of the gate electrode to preliminarily define the portions where contacts are formed, and then an interlayer insulating film made of an oxide film is formed Then, a contact hole is formed between the gate electrodes by etching the interlayer insulating film.
[0004]
An example of a conventional contact hole forming process using the SAC forming technique will be described more specifically with reference to FIG. After forming gate insulating films 17 and 17 'on the silicon substrate 8 and forming gate electrodes 9 and 9' thereon, the upper and side surfaces of the gate electrodes 9 and 9 'are formed on the silicon nitride film 10 for insulation. , 10 ′ to form the shape of FIG. Silicon nitride films 10a, 10b, 10'a, 10'b formed on the side walls of the gate electrodes 9, 9 'are sidewall spacers.
[0005]
Next, as shown in FIG. 2B, an interlayer insulating film 11 is formed thereon using, for example, a silicon oxide film. The interlayer insulating film is formed by, for example, chemical vapor deposition (hereinafter referred to as CVD), specifically, quasi-atmospheric CVD (Sub Atmospheric CVD) or high-density plasma CVD (High Density Plasma CVD). ) Conduct by law.
[0006]
Subsequently, as shown in FIG. 2C, a photoresist 12 having an opening 12a is formed on the interlayer insulating film 11 by photolithography. Thereafter, the interlayer insulating film 11 is etched and the photoresist 12 is peeled off to obtain the structure of FIG. Through the above steps, the contact hole 13 is formed in the interlayer insulating film 11.
[0007]
[Problems to be solved by the invention]
The SAC formation technique described above opens a contact hole by utilizing a step between the silicon substrate and the silicon nitride film. The interlayer insulating film is formed on the step and needs to be formed so as to completely fill the gap between the wirings.
[0008]
However, when a step with a large aspect ratio is formed as the device structure is miniaturized, the gap between wirings having a fine structure becomes deeper and narrower, so that the deposition gas does not easily enter the gap. Become. This phenomenon will be described with reference to FIG.
[0009]
FIG. 3 shows a state in which the interlayer insulating film 11 is formed in the gap 15 between the gate electrode 9 and the gate electrode 9 ′ formed on the silicon substrate 8. Since the gap 15 is deep and narrow, it is difficult for the deposition gas to reach the inside. Therefore, the deposition rate of the interlayer insulating film 11 at each of the surface 10a, the gap side surface 15a, and the gap bottom 15b of the silicon nitride film 10 is different, resulting in a difference in the film thickness of the interlayer insulating film 11. If the upper end portion 15 c of the gap is closed before the gap 15 is completely filled with the interlayer insulating film 11, there is a problem that a void 14 is generated in the interlayer insulating film 11. The presence of such voids adversely affects device characteristics by shorting the wiring.
[0010]
Conventionally, when a void is formed in the interlayer insulating film, the void is filled by performing a heat treatment at a high temperature to reflow the interlayer insulating film. However, the heat treatment at a high temperature has a problem that the device is damaged and the process time becomes long.
[0011]
The present invention has been made in view of such problems. That is, the present invention provides a method for manufacturing a semiconductor device capable of forming an insulating film without generating voids between interconnects having a fine structure.
[0012]
[Means for Solving the Problems]
The invention according to claim 1 of the present application is a method of manufacturing a semiconductor device,
Forming a plurality of electrodes on the semiconductor substrate via an insulating film;
Coating the upper and side surfaces of the plurality of electrodes with a silicon nitride film;
Performing anisotropic etching with plasma of a gas containing a fluorine-containing compound to process corners of the silicon nitride film into a tapered shape;
Forming an insulating film on the semiconductor substrate so as to fill a gap between the electrodes covered with the silicon nitride film;
Etching the insulating film to form a contact hole reaching the semiconductor substrate between the plurality of electrodes.
[0013]
According to a second aspect of the present invention, in the method of manufacturing a semiconductor device according to the first aspect, the anisotropic etching is performed by applying a high-frequency AC bias power to the semiconductor substrate.
[0014]
According to a third aspect of the present invention, in the method for manufacturing a semiconductor device according to the first or second aspect, the fluorine-containing compound is nitrogen trifluoride.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0016]
Embodiment 1
FIG. 1 shows a process for forming a contact hole according to the present invention. First, a silicon substrate is used as a semiconductor substrate, and a plurality of gate electrodes are formed at predetermined intervals. That is, the gate insulating films 16 and 16 'are formed on the silicon substrate 1, the gate electrodes 2 and 2' are formed through the gate insulating films 16 and 16 ', and then the gate electrodes 2 and 2' for insulation. The upper and side surfaces of the substrate are covered with silicon nitride films 3 and 3 'to obtain the shape of FIG. Silicon nitride films 3a, 3b, 3'a and 3'b formed on the side walls of the gate electrodes 2 and 2 'are side wall spacers. In the example of FIG. 1A, the gate electrodes 2 and 2 'are covered with the silicon nitride films 3 and 3', and the surface of the silicon substrate 1 is exposed between the gate electrodes 2 and 2 '.
[0017]
Next, anisotropic etching is performed using plasma composed of an etching gas containing nitrogen trifluoride gas (NF ₃ ) as a main component, and the corners of the silicon nitride films 3 and 3 ′ are shown in FIG. To be tapered. Here, the corners of the silicon nitride films 3 and 3 ′ refer to the vicinity of the gap upper end 3 a and 3 ′ a in the gap 4 between the gate electrode 2 and the gate electrode 2 ′, for example. In addition, the taper shape specifically refers to a taper shape in which the opening size increases from the inside of the gap toward the gap end in the vicinity of the gap upper end as shown in FIG.
[0018]
The anisotropic etching using nitrogen trifluoride plasma is performed using, for example, a CVD apparatus using high-density plasma as a plasma source. That is, the silicon substrate on which the gate electrode and the silicon nitride film shown in FIG. Next, after the inside of the film forming chamber is set to a predetermined degree of vacuum, high frequency alternating current bias power is applied to the silicon substrate, and etching is performed by introducing an etching gas into the film forming chamber. By applying an AC bias voltage to the silicon substrate, the isotropic nitrogen trifluoride gas plasma can be made an anisotropic plasma. The etching rate can be controlled by using, for example, nitrogen (N ₂ ) gas as a dilution gas and mixing an appropriate amount of nitrogen gas corresponding to the desired etching rate with nitrogen trifluoride gas.
[0019]
Subsequently, the etching gas is exhausted from the film forming chamber of the CVD apparatus, and an appropriate material gas is introduced to form a new interlayer insulating film. In FIG. 1B, the anisotropic etching is performed to process the corners of the silicon nitride films 3 and 3 ′ so that the opening size at the upper end 4a of the gap 4 is widened. Can easily enter the inside of the gap 4. Therefore, as shown in FIG. 1C, the interlayer insulating film 11 is formed on the silicon nitride film 3 and the silicon substrate 1 so as to fill the gap 4 with the interlayer insulating film 5 without generating voids. Can do.
[0020]
Next, a photoresist 6 having an opening 6a is formed on the interlayer insulating film 5 by photolithography as shown in FIG. Thereafter, the interlayer insulating film 5 in the gap 4 is etched and opened, and then the photoresist 6 is peeled off. Through the above steps, as shown in FIG. 1E, the contact hole 7 is formed between the gate electrode 2 and the gate electrode 2 ′ by self-alignment.
[0021]
Instead of performing an anisotropic etching process using nitrogen trifluoride plasma, the opening end of the silicon nitride film is processed into a taper shape even if the AC bias power applied to the silicon substrate is increased in the insulating film forming process. It is possible to do. However, such a method is not preferable because there is a possibility of damaging the silicon substrate by increasing the AC bias power applied to the silicon substrate.
[0022]
In addition, since nitrogen trifluoride is also a material generally used for cleaning the film forming chamber of a CVD apparatus, a cleaning effect on a silicon substrate in addition to etching is achieved by performing an anisotropic etching process using nitrogen trifluoride plasma. Can also be obtained. For example, the cleaning is performed by the reaction between the particles attached to the silicon substrate in the previous step and the active species generated by the discharge of nitrogen trifluoride, and the reaction product is exhausted from the film formation chamber.
[0023]
In this embodiment, anisotropic etching using nitrogen trifluoride gas plasma has been described. However, as long as the corner of the silicon nitride film can be processed into a tapered shape, the plasma is limited to nitrogen trifluoride gas plasma. However, other fluorine-containing gas may be used.
[0024]
In this embodiment, the example in which the contact hole is formed in the interlayer insulating film formed in the silicon substrate on which the gate electrode is formed is described, but the present invention is not limited to this, and other electrodes, semiconductor substrates, and the like are used. May be. In the case where a connection hole for embedding the wiring is formed in the insulating film in order to connect the wiring to the semiconductor region, the same effect can be obtained by applying the present invention.
[0025]
【The invention's effect】
According to the present invention, since an insulating film can be formed without generating voids between wirings having a fine structure, wiring short-circuit defects can be reduced and yield can be improved. In addition, since a heat treatment step for filling the void is not necessary, the process time can be shortened.
[Brief description of the drawings]
FIG. 1 shows a process for forming a contact hole according to the present invention.
FIG. 2 shows a conventional contact hole forming process.
FIG. 3 is a diagram for explaining the generation of voids;
[Explanation of symbols]
1,8 silicon substrate, 2,9 gate electrode, 3,10 silicon nitride film, 4,15 gap, 5,11 interlayer insulation film, 6,12 resist, 7,13 contact hole, 14 void, 16,17 gate insulation film.

Claims (3)

Forming a plurality of electrodes on a semiconductor substrate via a plurality of gate insulating films;
Covering the top and side surfaces of the plurality of gate insulating films and the plurality of electrodes with a silicon nitride film;
Performing anisotropic etching with plasma of a gas containing a fluorine-containing compound to process corners of the silicon nitride film into a tapered shape;
Forming an insulating film on the semiconductor substrate so as to fill a gap between the electrodes covered with the silicon nitride film;
And a step of selectively etching the insulating film with respect to the silicon nitride film to form a contact hole reaching the semiconductor substrate between the plurality of electrodes.   The method of manufacturing a semiconductor device according to claim 1, wherein the anisotropic etching is performed by applying a high-frequency AC bias power to the semiconductor substrate.   The method for manufacturing a semiconductor device according to claim 1, wherein the fluorine-containing compound is nitrogen trifluoride.

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