JP3713426B2 - Etching depth measuring method and apparatus, etching method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method and an apparatus for measuring an etching depth in a dry etching process, and in particular, when forming a wiring groove inside an insulating film layer disposed on an upper part of a wiring structure, the insulating film layer The present invention relates to a method and apparatus capable of measuring the thickness and the depth of a formed wiring groove, and an etching method using the etching depth measuring method.
[0002]
[Prior art]
In the manufacturing process of a semiconductor device, a wiring structure is conventionally formed by the following method. First, a metal film layer that is processed later and forms wiring is deposited on the entire surface of the semiconductor substrate. After the metal film layer is deposited, a resist pattern is formed on the metal film layer by lithography. Then, using the resist pattern as an etching mask, the metal film layer is subjected to reactive ion etching to form a wiring structure.
[0003]
However, with the recent high integration and high density of semiconductor devices, the formation of the above-described wiring structure by reactive ion etching is becoming technically difficult. For this reason, there is an increasing tendency to adopt damascene processing in which a wiring groove is formed in advance in the insulating film layer and a metal film layer constituting the wiring is embedded in the wiring groove. However, in this damascene processing, the depth of the wiring trench formed inside the insulating film layer is usually controlled by managing the etching time. Specifically, for example, the etching rate is calculated in advance from several preliminary experiments, and the etching depth is determined by controlling the etching time using the rate. Therefore, there is a problem in that the controllability and reproducibility are reduced due to unexpected fluctuations in the etching state during the processing of the wiring groove, and the wiring groove depth, that is, the wiring cross-sectional area varies.
[0004]
[Problems to be solved by the invention]
As described above, in the conventional damascene processing, the depth of the wiring trench is controlled by managing the etching time. For this reason, there is a problem that it is difficult to improve the controllability of the depth of the wiring groove.
[0005]
An object of the present invention is to solve such problems and to provide an etching depth measuring method and apparatus capable of measuring the depth of a wiring groove in damascene processing with high accuracy.
[0006]
Another object of the present invention is to provide an etching method capable of improving the controllability of the depth by measuring the depth of the wiring groove in the damascene process during the etching.
[0007]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention provides a light source for irradiating light to a substrate having an etching groove formed in an insulating film layer disposed on an upper part of a wiring structure, Of these, a detector that detects light having a wavelength greater than twice the wiring interval of the wiring structure, and based on the detected light intensity, out of the film thickness of the insulating film layer and the depth of the etching groove An etching depth measuring apparatus comprising: a calculating unit that calculates at least one.
[0008]
According to the present invention, since the wiring interval of the wiring structure is shorter than ½ of the wavelength of the incident light, the incident light does not reach the lower layer than the wiring layer. For this reason, the structure below the wiring layer does not affect the obtained reflected light intensity. Therefore, even if there are complicated structures below the wiring layer, they can be ignored, and when the etching depth located above the wiring layer is determined from the reflection intensity distribution, a simple structure above the wiring layer is obtained. It is only necessary to consider the reflected light with a simple film structure, and the film thickness and the etching depth can be calculated with high accuracy.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals.
[0010]
(First embodiment)
FIG. 1 is a schematic configuration diagram of an etching depth measuring apparatus according to the first embodiment of the present invention. The etching depth measuring apparatus 10 according to the first embodiment includes a tungsten lamp having a continuous spectral distribution from the visible light region to the infrared region as the light source 12. Then, as shown in FIG. 1, the light from the light source 12 is irradiated onto the semiconductor substrate 16 by the reduction optical system using the lens 14. The reflected light from the semiconductor substrate 16 is input to the spectroscope 22 through the beam splitter 18 and the optical fiber 20. The spectroscope 22 divides the input reflected light and outputs it to the detector 24. The detector 24 detects the reflection intensity for each wavelength, and outputs the detection result to the calculation unit 26. The calculator 26 calculates the etching depth at a predetermined location on the semiconductor substrate 16 based on the detection result.
[0011]
Next, the semiconductor substrate 16 which is a measurement target of the etching depth measurement apparatus according to the first embodiment of the present invention will be described. FIG. 2 is a cross-sectional view showing an example of the semiconductor substrate 16 of FIG. As shown in FIG. 2, on the main surface of the semiconductor substrate 16, a first interlayer insulating film layer 28 and a first wiring layer 30 having a wiring structure are sequentially arranged. The wiring structure of the first wiring layer 30 may be periodic or aperiodic. A second interlayer insulating film layer 32 is disposed on the first wiring layer 30. In the first embodiment, the second interlayer insulating film layer 32 is formed inside the second interlayer insulating film layer 32. Then, the depth of the wiring groove in which the second wiring layer is embedded later is measured. A resist pattern 34 is formed on the second interlayer insulating film layer 32, and this resist pattern 34 serves as an etching mask. Here, the positional relationship between the resist pattern 34 and the wiring pattern of the first wiring layer 30 is shown in FIG. FIG. 3 is a plan view showing the positional relationship between the resist pattern 34 of FIG. 2 and the wiring pattern of the first wiring layer 30. As shown in FIG. 3, in the first embodiment of the present invention, it is assumed that the resist pattern 34 and the wiring pattern of the first wiring layer 30 are orthogonal to each other. Of course, the present invention is not limited to this positional relationship.
[0012]
Next, the operation of the etching depth measuring apparatus 10 according to the first embodiment of the present invention will be described. Here, tungsten having a width of 175 nm, a thickness of 250 nm, and a line spacing of 175 nm is used as the first wiring layer 30 in FIG. The first interlayer insulating film layer 28 and the second interlayer insulating film layer 32 are both formed of a silicon oxide film, and the thickness of the first interlayer insulating film layer 28 is set to 450, 550, and 650 nm. The thickness of the two interlayer insulating film layers 30 is five types of 850, 900, 950, 1000, and 1050 nm. Further, the resist pattern 34 had a width of 175 nm, a pitch of 350 nm (interval of 175 nm), and a thickness of 450 nm.
[0013]
4 and 5 are diagrams showing the wavelength spectrum of the reflected light of the semiconductor substrate 16 obtained by using the etching depth measuring apparatus 10 of FIG. FIG. 4 shows a state in which the thickness of the first interlayer insulating film layer 28 in FIG. 2 is fixed to 550 nm and the thickness of the second interlayer insulating film layer 32 is changed to 850, 900, 950, 1000, and 1050 nm. The spectrum is overlaid. On the other hand, FIG. 5 shows the spectrum when the thickness of the second interlayer insulating film layer 32 of FIG. 2 is fixed at 950 nm and the thickness of the first interlayer insulating film layer 28 is changed to 450, 550, and 650 nm. It is shown repeatedly. 4 and 5, the wavelength region of the reflected light detected by the detector 24 in FIG. 1 is an infrared region from 900 nm to 1600 nm.
[0014]
The greatest feature of the etching depth measuring apparatus 10 according to the first embodiment of the present invention is that the wavelength region of the reflected light detected by the detector 24 is the first wiring on the semiconductor substrate 16 shown in FIG. The value is larger than twice the interval of the layers 30. Light having such a wavelength region cannot pass through the first wiring layer 30. Therefore, the layer contributing to the reflection interference waveform obtained in the etching depth measuring apparatus 10 is the first layer. Only the layer above the wiring layer 30 is provided. On the other hand, the layer below the first wiring layer 30 does not affect the reflected interference waveform.
[0015]
The above is apparent from FIG. 4 and FIG. As is clear from FIG. 4, when the thickness of the second interlayer insulating film layer 32 located above the first wiring layer 30 is changed from 850 nm to 1050 nm, the wavelength spectrum also changes with the change. I will do it. On the other hand, as apparent from FIG. 5, even when the thickness of the first interlayer insulating film layer 28 located below the first wiring layer 30 is changed from 450 nm to 650 nm, the obtained wavelength spectrum is almost changed. do not do. That is, the thickness of the first interlayer insulating film layer 28 below the first wiring layer 30 does not affect the shape of the obtained wavelength spectrum.
[0016]
Next, a method for calculating the etching depth of the etching depth measuring apparatus 10 according to the first embodiment of the present invention will be described. In the case of the semiconductor substrate 16 described above, the width and interval of the resist pattern 34 are both 175 nm, which are sufficiently shorter than the detected wavelength. Therefore, the resist pattern 34 can be regarded as a uniform mixed layer having an average refractive index of resist and vacuum. That is, this resist pattern 34 can be regarded as an equivalent refractive index region (see, for example, Hisao Kikuta, Vol 25, No. 5, p543, O Plus E.). Therefore, in the case of the semiconductor substrate 16 described above, the upper layer than the first wiring layer 30 can be regarded as a multilayer film of the second interlayer insulating film 32 and the mixed layer (resist pattern 34). For this multilayer film, the measured value using the theory of spectral interference reflectance (see, for example, GR Fowles, Introduction to Modern Optics, Dover Publications, Inc., New York (1975)) as a parameter. By fitting, the thickness of each layer can be calculated. The above calculation method is executed by the calculation unit 26 of FIG. 1, and this calculation unit 26 can be realized by, for example, software, a hardware program, or the like.
[0017]
FIG. 6 is a cross-sectional view showing another example of the semiconductor substrate 16 of FIG. As shown in FIG. 6, a gate electrode 36 is disposed on the main surface of the semiconductor substrate. On the semiconductor substrate 16 including the gate electrode 36, as in the example of FIG. 2, a first interlayer insulating film layer 38 and a first wiring layer 40 having a wiring structure are sequentially arranged. A second interlayer insulating film 42 is disposed above the first wiring layer 40, and a wiring trench in which the second wiring layer is embedded later in the second interlayer insulating film layer 42. Is formed. A resist pattern 44 is formed on the second interlayer insulating film layer 42, and this resist pattern 44 serves as an etching mask. Here again, it is assumed that the resist pattern 44 and the wiring pattern of the first wiring layer 40 are orthogonal to each other as in the example of FIG. Of course, the present invention is not limited to this positional relationship.
[0018]
In the case of FIG. 6, as in the example of FIG. 2, the layer below the first wiring layer 40 does not affect the reflection spectrum. In this case, the layer above the first wiring layer 40 can be regarded as a multilayer film composed of the first layer A and the second layer B as shown in FIG. Here, the first layer A corresponds to the second interlayer insulating film layer 42, and the second layer B corresponds to a mixed layer composed of the resist 44 and vacuum. Then, the thickness of the second interlayer insulating film layer 42 can be obtained by calculating the thickness of the first layer A based on the theory of spectral interference reflectance described above.
[0019]
Next, a case where a plurality of wiring grooves 46 are formed in the second interlayer insulating film layer 32 by reactive ion etching of the semiconductor substrate 16 shown in FIG. 2 will be described. FIG. 7 is a cross-sectional view after reactive ion etching of the semiconductor substrate 16 of FIG. In the case of FIG. 7, the layer above the first wiring layer 30 can be regarded as a multilayer film composed of the first layer C, the second layer D, and the third layer E. Here, the first layer C corresponds to the first interlayer insulating film layer 32a, the second layer D corresponds to the first mixed layer composed of the interlayer insulating film layer 32b and vacuum, and the third layer. E corresponds to a second mixed layer composed of the resist 34 and vacuum. Then, by calculating the thickness of the second layer D, the depth of the wiring groove can be obtained.
[0020]
As described above, according to the first embodiment of the present invention, it is possible to easily and accurately measure the etching depth in the dry etching process. In particular, according to the first embodiment of the present invention, when a multilayer wiring structure is realized by damascene processing, the wiring constituting the upper wiring layer is not affected by the lower layer structure than the lower wiring layer. It becomes possible to measure the depth of the groove with high accuracy. Therefore, the industrial value of the present invention is very large in realizing a multilayer wiring structure.
[0021]
(Second Embodiment)
Next, a second embodiment of the present invention will be described. FIG. 8 is a schematic configuration diagram of an etching depth measuring apparatus according to the second embodiment of the present invention. In the second embodiment, in the first embodiment shown in FIG. 1, a polarizing plate 48 is disposed between the light source 12 and the beam splitter 18 so that the incident light to the semiconductor substrate 16 is polarized. This is an example. According to the second embodiment, the etching depth can be measured with higher accuracy by the polarization of the incident light.
[0022]
The operation of the second embodiment of the present invention will be specifically described below. FIG. 9 is a diagram showing the wavelength spectrum of the reflected light of the semiconductor substrate 16 obtained by using the etching depth measuring apparatus 10a of FIG. Here, the semiconductor substrate 16 used for the measurement has the same conditions as in the first embodiment. The wavelength region of the reflected light detected by the detector 24 in FIG. 8 is a visible light region from 350 nm to 1000 nm. In FIG. 9, “polarization direction: parallel” indicates a case where the electric field direction of incident light on the semiconductor substrate 16 is parallel to the wiring direction of the first wiring layer 30, and “polarization direction: vertical”. These show the case where the electric field direction of the incident light on the semiconductor substrate 16 is perpendicular to the wiring direction of the first wiring layer 30.
[0023]
As is apparent from FIG. 9, it can be seen that if the polarization direction is changed, the reflection spectrum also changes. This change is due to the reason described below. That is, when the electric field direction of incident light is orthogonal to the wiring direction of the first wiring layer 30, the incident light is transmitted through the first wiring layer 30. For this reason, the thickness of the first interlayer insulating film layer 28 under the first wiring layer 30 affects the reflection spectrum. On the other hand, when the electric field direction of the incident light is parallel to the wiring direction of the first wiring layer 30, the incident light cannot be transmitted through the first wiring layer 30 and is reflected by the first wiring layer 30. End up. Therefore, in this case, the reflection spectrum is not affected by the thickness of the first interlayer insulating film layer 28.
[0024]
The etching depth measuring apparatus 10a according to the second embodiment of the present invention is configured by paying attention to the above points. That is, in the case of realizing a multilayer wiring structure, the polarization state of incident light is adjusted so that the electric field direction is parallel to the already formed lower layer wiring direction, and the incident light whose electric field direction is adjusted is used. The depth of the upper wiring groove is measured. For this reason, the structure of the layer below the lower layer wiring does not affect the measurement at all, thereby enabling measurement with higher accuracy.
[0025]
In the second embodiment of the present invention, the polarizing plate 48 is disposed between the light source 12 and the beam splitter 18 in order to prevent the reflected light from the semiconductor substrate 16 from passing through the polarizing plate 48. The present invention is not limited to this arrangement. For example, the reflected light may naturally pass through the polarizing plate 48. Specifically, it may be disposed between the beam splitter 18 and the lens 14 and between the lens 14 and the semiconductor substrate 16.
[0026]
(Third embodiment)
Next, a third embodiment of the present invention will be described. FIG. 10 is a schematic configuration diagram of an etching apparatus according to the third embodiment of the present invention. The third embodiment shows an example in which the etching depth measuring apparatus 10 according to the first embodiment is provided in a known dry etching apparatus. As shown in FIG. 10, the etching apparatus according to the third embodiment includes the etching depth measuring apparatus 10 according to the first embodiment, so that the etching depth in the dry etching process can be set to “in- By measuring in situ, and feeding back the measurement results, the etching depth can be controlled with high accuracy. In FIG. 10, although the example provided with the etching depth measuring apparatus 10 which concerns on 1st Embodiment is shown, it replaces with the etching apparatus 10 which concerns on 1st Embodiment, and said 2nd Embodiment is carried out. Of course, the etching depth measuring apparatus 10a according to the embodiment may be provided.
[0027]
In the etching apparatus according to the third embodiment of the present invention, the lower electrode 52 is disposed in the etching chamber 50. The semiconductor substrate 16 to be etched is placed on the upper surface of the lower electrode 52. The lower electrode 52 is connected to a high frequency power source (not shown) through a matching network (not shown).
[0028]
The etching chamber 50 is provided with a gas supply pipe (not shown) for introducing a reactive gas into the chamber 50 and an exhaust pipe (not shown) for exhausting the gas in the chamber 50. Further, a measurement window 54 made of, for example, quartz glass is disposed on the etching chamber 50. Through this measurement window 54, the light is introduced into the light chamber 50 incident on the semiconductor substrate 16, and the reflected light from the semiconductor substrate 16 is taken out from the chamber 50.
[0029]
In the etching apparatus according to the third embodiment of the present invention, after the semiconductor substrate 16 is placed on the lower electrode 52 in the etching chamber 50, a reactive gas is introduced into the chamber 50 through the gas supply pipe. The Then, when the reactive gas is turned into plasma, an etching process is performed on the semiconductor substrate 16. When light is output from the light source 12 during the etching process, the light passes through the measurement window 54 and is irradiated onto the semiconductor substrate 16. Then, the reflected light reflected on the semiconductor substrate 16 passes through the measurement window 54 and is taken out of the chamber 50. The reflected light is guided to the spectroscope 22 via the beam splitter 18 and the optical fiber 20, and after being split, the detector 24 detects light in a predetermined wavelength region. The calculation unit 26 receives the detection result, and calculates the etching depth at a predetermined position based on the detection result. The calculated result is output to an etching control unit (not shown) that controls the etching state in the etching chamber 50. The etching control unit monitors the calculated etching depth and realizes a desired etching depth by controlling the etching state.
[0030]
According to the third embodiment of the present invention, the depth of the groove formed on the semiconductor substrate 16 in the chamber 50 can be measured in real time even during the etching process. For this reason, it is possible to adjust the etching time so that a desired etching depth can be achieved. Thereby, the etching depth can be measured without being affected by the variation of the etching state or the like as in the conventional time management.
[0031]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, the etching depth measuring method and apparatus which can measure the depth of the wiring groove | channel in damascene processing with high precision are realizable.
[0032]
ADVANTAGE OF THE INVENTION According to this invention, the etching method which can improve the controllability of the depth by measuring the depth of the wiring groove in damascene processing during the etching is realizable.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram of an etching depth measuring apparatus according to a first embodiment of the present invention.
2 is a cross-sectional view showing an example of a semiconductor substrate 16 of FIG.
3 is a plan view showing the positional relationship between the resist pattern 34 of FIG. 2 and the wiring pattern of the first wiring layer 30. FIG.
4 is a diagram illustrating an example of a wavelength spectrum of reflected light of a semiconductor substrate 16 obtained by the etching depth measurement apparatus 10 of FIG.
5 is a view showing another example of the wavelength spectrum of the reflected light of the semiconductor substrate 16 obtained by the etching depth measuring apparatus 10 of FIG.
6 is a cross-sectional view showing another example of the semiconductor substrate 16 of FIG. 1;
7 is a cross-sectional view showing another example of the semiconductor substrate 16 of FIG. 1. FIG.
FIG. 8 is a schematic configuration diagram of an etching depth measuring apparatus according to a second embodiment of the present invention.
9 is a diagram showing an example of a wavelength spectrum of reflected light of a semiconductor substrate 16 obtained by the etching depth measuring apparatus 10a of FIG.
FIG. 10 is a schematic configuration diagram of an etching apparatus according to a third embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Etch depth measuring apparatus 12 Light source 14 Lens 16 Semiconductor substrate 18 Beam splitter 20 Optical fiber 22 Spectrometer 24 Detector 26 Calculation part 28,38 1st interlayer insulation film 30,40 1st wiring layer 32,42 2nd Interlayer insulating films 34 and 44 Resist pattern 36 Gate electrode 46 Wiring groove 48 Polarizing plate 50 Etching chamber 52 Lower electrode 54 Measurement window

Claims (6)

Irradiating light to a substrate having an etching groove formed inside an insulating film layer disposed on the upper part of the wiring structure;
Detecting light having a wavelength larger than twice the wiring interval of the wiring structure among the reflected light from the substrate;
And a step of calculating at least one of the thickness of the insulating film layer and the depth of the etching groove based on the detected light intensity. The step of irradiating the light includes a step of polarizing the light so that an electric field direction of incident light on the substrate is parallel to a wiring direction of the wiring structure. 2. The etching depth measuring method according to 1. A light source for irradiating light to a substrate having an etching groove formed in an insulating film layer disposed on an upper portion of the wiring structure;
A detector for detecting light having a wavelength larger than twice the wiring interval of the wiring structure among the reflected light from the substrate;
Etching depth measurement comprising: a calculating unit that calculates at least one of the film thickness of the insulating film layer and the depth of the etching groove based on the intensity of light detected by the detector apparatus. A polarizing optical system that is disposed between the light source and the substrate and polarizes the light so that an electric field direction of incident light on the substrate is parallel to a wiring direction of the wiring structure; The etching depth measuring apparatus according to claim 3, wherein: Carrying a substrate having an insulating film layer disposed on top of the wiring structure into an etching chamber;
Forming an etching groove inside the insulating film layer by etching; and
Measuring the depth of the etching groove at regular intervals during the etching,
The etching depth measurement step further includes:
Irradiating the substrate with light;
Detecting light having a wavelength larger than twice the wiring interval of the wiring structure among the reflected light from the substrate;
And a step of calculating at least one of the thickness of the insulating film layer and the depth of the etching groove based on the detected light intensity. The step of irradiating the light includes the step of polarizing the light so that an electric field direction of incident light on the substrate is parallel to a wiring direction of the wiring structure. 6. The etching method according to 5.

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