JP2004119514A - Method for forming pattern and method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pattern forming method which reduces the pattern width of a resist mask while measuring it and has excellent controllability and reproducibility. <P>SOLUTION: On a base layer, resist masks 34a to 34c having patterns at least in partial areas are formed. The resist masks 34a to 34c are etched and irradiated with light to obtain a reflection interference spectral waveform. Based upon the obtained reflection interference spectral waveform, pattern widths of the resist masks 34a to 34c etched in a wavelength range larger than cycles of the patterns of the resist masks 34a to 34c are calculated. On the basis of the calculation results, the end point of the etching is determined to reduce the resist masks 34a to 34c. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a pattern forming method. Further, the present invention relates to a method for manufacturing a semiconductor device using the pattern forming method.
[0002]
[Prior art]
Conventionally, the gate structure of a metal-oxide-semiconductor (MOS) transistor has been formed by the following method. First, for example, a thin gate oxide film is formed on a p-type silicon (Si) substrate, and a polysilicon thin film is deposited on the gate oxide film. Next, a photoresist is applied on the polysilicon thin film, and a gate resist mask is formed using a photolithography technique. Next, using the gate resist mask, the polysilicon thin film and the gate oxide film are selectively etched by reactive ion etching (RIE), and the gate structure is processed and formed. Since RIE is directional etching, the polysilicon thin film and the gate oxide film are processed perpendicularly to the etching mask, and a gate structure is formed with the pattern size of the gate resist mask.
[0003]
However, with the recent trend toward higher integration and higher speed of semiconductor devices, the gate width is required to be further narrowed. Are being driven into an impossible situation. For this reason, a pattern forming method in which a resist mask is once formed by a conventional method, and thereafter the pattern width of the resist mask is reduced by isotropic etching using a reactive gas species such as plasma is used. Have been. However, in this pattern reduction step, the control of the pattern width of the resist mask is usually controlled by managing the etching time. Specifically, the etching rate is calculated in advance from several preliminary experiments, and the reduction width of the pattern is determined by controlling the etching time using the obtained etching rate. Therefore, there is a problem that the controllability and reproducibility are reduced due to an unexpected change in the etching state in the pattern reduction step, and the pattern width of the gate structure is varied.
[0004]
In addition, a scanning electron microscope (SEM) is usually used as a method for measuring the pattern width of a fine resist mask. In the measurement by SEM, it is necessary to mount the semiconductor substrate in the SEM sample chamber which is evacuated, which is not simple. Further, since the SEM uses a high energy beam, the resist mask is damaged. From such a viewpoint, an optical method is desirable for the pattern width measurement. On the other hand, there is disclosed a method of optically measuring the depth of a groove in a step of forming a groove in an insulating film using a resist mask. For example, in a wavelength region that is twice or more the pattern interval of the lower wiring structure, the depth of the groove is obtained by parameter fitting based on the reflection interference spectral waveform intensity (for example, see Patent Document 1).
[0005]
[Patent Document 1]
JP-A-2002-93870
[0006]
[Problems to be solved by the invention]
As described above, in the conventional pattern reduction process of a resist mask having a gate structure or the like, the pattern reduction width is controlled by controlling the etching time. Therefore, it is difficult to improve the controllability and reproducibility of the pattern reduction width or the productivity of the pattern reduction process. Patent Document 1 proposes a method for optically measuring depth, but does not disclose an optical method for measuring pattern width.
[0007]
An object of the present invention is to solve such problems and to provide a pattern forming method with good controllability and reproducibility in which a pattern width is reduced while being optically measured in a pattern width reducing step.
[0008]
It is another object of the present invention to provide a method of manufacturing a semiconductor device using a pattern forming method with good controllability and reproducibility, in which the pattern width of a mask material is reduced while being optically measured.
[0009]
[Means for Solving the Problems]
In order to solve the above-described problems, a first aspect of the present invention includes (a) a step of forming a mask material on at least a part of a region of an underlayer, (b) a step of etching the mask material, (C) irradiating the etched mask material with light, detecting reflected light of light reflected after substantially transmitting through the mask material, and obtaining a reflection interference spectral waveform; A step of calculating a pattern width of a mask material using data of a reflection interference spectral waveform in a wavelength region larger than the pitch of the pattern to be provided.
[0010]
A second feature of the present invention is that (a) a step of forming a base layer on a semiconductor substrate, (b) a step of forming a mask material on at least a partial region of the base layer, and (c) a mask. Etching the material, and (d) irradiating the etched mask material with light, detecting the reflected light after substantially transmitting through the mask material, and obtaining a reflection interference spectral waveform (E) calculating the pattern width of the mask material by using the data of the reflection interference spectral waveform in the wavelength region larger than the pitch of the pattern of the mask material; and (f) etching until the desired pattern width is obtained. And a step of selectively processing an underlayer using the mask material described above.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION
In the embodiment of the present invention, the calculation of the pattern width of the mask material may be performed by quantifying the change caused by the etching of the reflection interference spectral waveform. Further, it is preferable that the etching of the mask material is performed selectively with respect to the base layer. When a resist is used as a mask material for a base film such as a silicon oxide film or a polysilicon film, selective etching of the mask material is performed using, for example, oxygen plasma. Preferably, the step of obtaining a reflection interference spectral waveform is performed by introducing light into a pattern reduction processing chamber for performing etching. Preferably, the detected reflected light is polarized light, and the direction of the polarized light applied to the mask material is substantially parallel to the longitudinal direction of the mask pattern. It is preferable that the method further includes a step of selectively processing the base layer using the reduced mask material.
[0012]
Hereinafter, first and second embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the plane dimension, the ratio of the thickness of each layer, and the like are different from actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. In addition, it is needless to say that the drawings include portions having different dimensional relationships and ratios.
[0013]
(First Embodiment)
As shown in FIG. 1, a pattern width measuring apparatus 10 according to a first embodiment of the present invention includes a light source 12 composed of a tungsten lamp having a continuous spectral distribution from a visible light region to an infrared region, A lens 14 for reducing the incident light by a reduction optical system and irradiating a semiconductor substrate 16 having a mask material formed of a film pattern on the surface of which the incident light such as a resist is substantially transmitted, and a lens 14 and a lens 14 A polarizing plate 48 that is inserted into the optical fiber and converts incident light into polarized light; a beam splitter 18 that distributes reflected light from the semiconductor substrate 16; an optical fiber 20 that introduces reflected light distributed from the beam splitter 18; A spectroscope 22 for splitting the reflected light introduced from 20 and a detection for detecting the reflection intensity of each of the split reflected light and outputting a reflection interference spectral waveform; It includes a 24, a calculation unit 26 for calculating a pattern width of the mask material on the basis of the reflection interference spectrum.
[0014]
In the first embodiment of the present invention, a resist mask having a line and space (L / S) pattern on at least a part of a region of an underlayer formed on a semiconductor substrate 16 will be described as an example. Here, the incident light is converted by the polarizing plate 48 into polarized light substantially parallel to the longitudinal direction of the L / S pattern. The L / S pattern layer of the resist mask irradiated with the polarized light corresponds to the mixing ratio of the resist film of the resist mask and the vacuum with respect to the irradiation light in a wavelength region larger than the period (pitch) of the L / S pattern. It can be regarded as a mixed layer having an average effective refractive index (for example, see Hisao Kikuta, O Plus E., Vol. 21, No. 5, page 543). Therefore, parameter fitting between the measured reflection interference spectral waveform and the theoretical waveform is performed on the multilayer film composed of the mixed layer and the underlayer, using the mixing ratio of the resist film and the vacuum and the thickness of the resist mask as parameters. Thus, the pattern width of the resist mask can be calculated. The calculation of the pattern width is performed by the calculation unit 26. The calculation unit 26 is realized by, for example, software installed on a computer, a program implemented as hardware, or the like.
[0015]
Next, a pattern forming method according to the first embodiment of the present invention will be described with reference to FIG. As shown in FIG. 2A, a silicon oxide film (SiO 2) is formed as a base layer on a main surface of a semiconductor substrate 16 made of silicon (Si) or the like used in the pattern forming method according to the first embodiment. ₂ ) And a conductive film 32 such as a polysilicon film are sequentially deposited. On the conductive film 32, resist masks 34a to 34c are arranged. In the first embodiment of the present invention, the insulating film 30 is a silicon oxide film having a thickness of 2 nm, and the conductive film 32 is a polysilicon film having a thickness of 175 nm. The resist masks 34a to 34c are L / S patterns having a pattern width of 110 nm, a period Pr of 200 nm, and a thickness of 300 nm.
[0016]
The semiconductor substrate 16 shown in FIG. 2A is installed in a plasma etching device. Then, a resist mask pattern reduction step by plasma etching is performed. Oxygen (O ₂ A) gas is used, but any gas may be used as long as it can selectively etch the resist masks 34a to 34c with respect to the underlying layer.
[0017]
The pattern width is measured during the pattern reduction process. That is, the semiconductor substrate 16 once taken out of the plasma etching apparatus is set in the pattern width measuring apparatus. The incident light from the light source 12 is reduced and polarized by the lens 14 and the polarizing plate 48 and is irradiated on the surface of the semiconductor substrate 16. The reflected light from the semiconductor substrate 16 is introduced into the spectroscope 22 through the beam splitter 18 and the optical fiber 20. The reflected light separated by the spectroscope 22 is output to the detector 24, and the reflected light intensity for each wavelength is detected. The reflected interference spectral waveform of the detection result of the detector 24 is output to the calculation unit 26, and the calculation unit 26 calculates the pattern width of the resist masks 34a to 34c on the semiconductor substrate 16.
[0018]
When the reflection interference spectral waveform is measured in the wavelength range of 400 nm to 800 nm, as shown in FIG. 3, the reflection interference spectral waveform changes according to the change (reduction) in the pattern width of the resist masks 34a to 34c. FIG. 3 shows an example in which the reflection interference spectral intensity is measured every plasma etching for a certain period of time. It can be seen that the pattern width has been reduced by 5 nm by the plasma etching for a certain period of time.
[0019]
Here, while the period Pr of the L / S pattern of the resist masks 34a to 34c is 200 nm, the measured wavelength region is 400 nm to 800 nm, which is larger than the period Pr. Therefore, the L / S pattern layers of the resist masks 34a to 34c are formed of an average effective refractive index n of the resist and vacuum. _p Can be regarded as a uniform mixed layer having.
[0020]
The mixing ratio of the L / S pattern is represented by the volume ratio t of the resist films of the resist masks 34a to 34c corresponding to the line portions. Effective refractive index n of the mixed layer _p If the refractive index of the resist film at the wavelength λ is n (λ), the vacuum refractive index is 1,
n _p = ｛T · n (λ) ² + (1-t)｝ ^1/2 ... (1)
Given by When the pattern width is W, the mixing ratio t and the period Pr of the L / S pattern are:
W = t · Pr (2)
You can ask.
[0021]
Therefore, the effective refractive index n _p The reflection interference spectral waveform is fitted to a theoretical waveform using the mixing ratio t of the mixed layer and the resist film thickness as parameters as a single layer film of the mixed layer having the following. From the mixture ratio obtained by the fitting, the pattern width W of the resist mask is calculated using Expression (2).
[0022]
Based on the result calculated by the calculation unit 26 as described above, the end point of the plasma etching in the pattern reduction process is determined. As shown in FIG. 2B, the resist masks 34a to 34c are reduced in pattern width and thickness to become reduced resist masks 35a to 35c by the pattern reduction process. Finally, the pattern width of the reduced resist masks 35a to 35c is reduced to 70 nm, and at this time, the resist film thickness is reduced to 200 nm.
[0023]
According to the pattern forming method according to the first embodiment of the present invention, it is possible to reduce the pattern width of the resist mask with good controllability and reproducibility while optically measuring the pattern width.
[0024]
In the above-described example, the plasma etching in the pattern reduction step is repeatedly performed for a fixed time. In this method, the pattern width can be reduced with good controllability and reproducibility, but requires a long time. Therefore, in the actual pattern reduction step, for example, plasma etching is performed once at about 80% of the target pattern reduction width in anticipation of fluctuations in plasma etching conditions, and thereafter, the pattern forming method according to the first embodiment is performed. To fine-tune the pattern width.
[0025]
Further, in the pattern width measuring apparatus 10 according to the first embodiment of the present invention, the polarizing plate 48 is provided between the lens 14 and the semiconductor substrate 16, but the polarizing plate 48 is provided at another position. You may. For example, a polarizing plate 48 may be provided between the beam splitter 18 and the lens 14. In addition, as in the pattern width measuring apparatus 10a shown in FIG. 4, a polarizing plate 48 is provided between the light source 12 and the beam splitter 18 so that light reflected from the semiconductor substrate 16 does not pass through the polarizing plate 48. Can be. Alternatively, instead of making the incident light on the semiconductor substrate 16 into polarized light, for example, a polarizing plate 48 is installed between the beam splitter 18 and the optical fiber 20 as in a pattern width measuring device 10b shown in FIG. Alternatively, only a desired polarization component of the reflected light may be detected. Further, as in a pattern width measuring apparatus 10c shown in FIG. 6, a polarization beam splitter 18a may be used instead of the beam splitter 18, and only a desired polarization component of the reflected light may be reflected and guided to the optical fiber 20. .
[0026]
Further, in the first embodiment of the present invention, the incident light is polarized substantially parallel to the longitudinal direction of the L / S pattern, but may be polarized substantially perpendicular to the longitudinal direction of the L / S pattern. . In this case, the effective refractive index n of the mixed layer _v Is
n _v = ｛1 / [t / n (λ) ² + (1−t)]｝ ^1/2 (3)
Given by
[0027]
Further, in the first embodiment of the present invention, the pattern widths and intervals of the resist masks 34a to 34c are equal, but the pattern widths and intervals of the resist masks 34a to 34c may be different. In that case, a wavelength region equal to or longer than the maximum period Pr of the resist masks 34a to 34c may be used.
[0028]
(Modification)
In the pattern forming method according to the modification of the first embodiment of the present invention, the measured reflection interference spectroscopy caused by the change in the pattern width and the resist film thickness of the resist masks 34a to 34c without using a complicated theoretical waveform. It is characterized in that the change in waveform is digitized and the pattern width of the resist masks 34a to 34c is determined based on the numerical value. The other parts are the same as those of the first embodiment, and duplicate descriptions are omitted.
[0029]
The measured reflection interference spectral waveform changes, for example, as shown in FIG. In order to quantify the change in the reflection interference spectral waveform, there is a method using the wavelength dependence of the minimum value of the waveform. Alternatively, a numerical value can be obtained using a difference between the intensities. In the modification of the first embodiment, an example using the difference between the reflection interference spectral intensities will be described. However, it is needless to say that the wavelength dependence of the waveform minimum value may be used.
[0030]
As shown in FIG. 3, a change in the reflection interference spectral waveform at a certain wavelength does not necessarily indicate a monotonous change. The decision may be indeterminate. In the modification of the first embodiment, the difference between the measured reflection interference spectral intensity and the initial measurement reflection interference spectral intensity at each wavelength is measured in the entire measurement wavelength range from 400 nm to 800 nm, and the sum of the differences is calculated as the cumulative intensity difference. And As shown in FIG. 7, the relationship between the accumulated intensity difference and the reduced width of the pattern of the reduced resist masks 35a to 35c shows a monotonic dependence. The data quantified in this way is stored in the calculation unit 26 of the pattern width measuring apparatus 10. Then, the cumulative intensity difference is calculated in the calculation unit 26 from the reflected interference spectral waveform measured in the pattern reduction process. By referring to the digitized data from the calculated cumulative intensity difference, the pattern width can be easily and accurately determined.
[0031]
According to the modification of the first embodiment of the present invention, the pattern width of the resist mask can be reduced easily and with good controllability and reproducibility while optically measuring the pattern width. It should be noted that it is clear that not only the pattern width of the resist mask but also the thickness of the resist can be calculated by referring to the data obtained by digitizing the change of the measured reflection interference spectral waveform in this way. It is widely applied to the measurement of optical dimensions such as thickness and depth based on the reflection interference spectral waveform, and the fitting with a complicated theoretical waveform can be omitted.
[0032]
(Second embodiment)
As shown in FIG. 8, a pattern width measuring apparatus 10d according to the second embodiment of the present invention includes a plasma etching apparatus provided with the above-described pattern width measuring apparatus 10 according to the first embodiment. is there. In the plasma etching apparatus, a lower electrode 52 is disposed in a pattern reduction processing chamber 50. On the upper surface of the lower electrode 52, the semiconductor substrate 16 to be etched is placed. Above the pattern reduction processing chamber 50, a measurement window 54 made of, for example, quartz glass is arranged. Through this measurement window 54, light incident on the semiconductor substrate 16 is introduced into the pattern reduction processing chamber 50, and reflected light from the semiconductor substrate 16 is extracted from the pattern reduction processing chamber 50.
[0033]
By installing the pattern width measuring device 10d in the plasma etching device, the reduction of the pattern width due to the plasma etching in the pattern reduction step can be measured “in-situ”. Furthermore, by feeding back the pattern width measurement result by the pattern width measurement device 10d to the plasma etching device in real time, it becomes possible to control the plasma etching in the pattern reduction process with high accuracy. In particular, it is suitable for processing and forming a fine gate structure by a pattern reduction process.
[0034]
In the pattern forming method according to the second embodiment of the present invention, the pattern width measuring apparatus 10d is installed in a plasma etching apparatus, and the pattern width is measured in place during the plasma etching in the pattern reduction step. The point that the pattern reduction step is controlled is different from the first embodiment. Others are the same as those of the first embodiment, and a duplicate description will be omitted.
[0035]
As shown in FIG. 8, an example in which the pattern width measuring apparatus 10 according to the first embodiment is used as the pattern width measuring apparatus 10 d is shown. Of course, other pattern width measuring devices 10a to 10c according to the first embodiment may be used.
[0036]
Next, a gate structure processing using a pattern forming method according to the second embodiment of the present invention will be described with reference to FIG.
[0037]
(A) First, a semiconductor substrate 16 made of Si or the like having a base layer on the surface is prepared. As shown in FIG. 9A, on the main surface of the semiconductor substrate 16, SiO ₂ An insulating film 60 such as a film and a conductive film 62 such as a polysilicon film are sequentially deposited. On the conductive film 62, a gate resist mask 74 and monitor resist masks 64a to 64c are formed by photolithography. Here, the insulating film 60 is a silicon oxide film having a thickness of 2 nm, and the conductive film 62 is a polysilicon film having a thickness of 175 nm. The gate resist mask 74 is an isolated resist pattern for forming a gate structure. The gate resist mask 74 has a pattern width of 110 nm and a thickness of 300 nm. On the other hand, the monitor resist masks 64a to 64c are periodic L / S patterns having a pattern width of 110 nm, a period Pr of 200 nm, and a thickness of 300 nm.
[0038]
(B) The semiconductor substrate 16 shown in FIG. 9A is placed on the lower electrode 52 in the pattern reduction processing chamber 50. Next, the inside of the pattern reduction processing chamber 50 is evacuated. Thereafter, an etching gas is introduced, plasma etching is performed by applying high frequency power, and a pattern reduction process is performed. Immediately before starting the plasma etching, the monitor resist masks 64a to 64c are irradiated with light by the pattern width measuring apparatus 10d, and the initial reflection interference spectral waveform is measured in the wavelength range of 400 nm to 800 nm. Thereafter, a pattern reduction process of the gate resist mask 74 is performed while measuring the reflection interference spectral waveform. By the pattern reduction process, the gate resist mask 74 and the monitor resist masks 64a to 64c are reduced in width and thickness as shown in FIG. Become. The calculation unit 26 calculates the reduced pattern width of the reduced monitor resist masks 65a to 65c based on the reflection interference spectral waveforms from the reduced monitor resist masks 65a to 65c in the wavelength region of 400 nm to 800 nm. The calculated result is fed back to an etching control unit (not shown) for controlling the plasma etching. The reduced pattern width is measured at regular intervals, and the plasma etching is performed until the pattern width of the desired reduced monitor resist mask, for example, 70 nm, is determined so as to determine the end point of the plasma etching in the pattern reduction step. As a result, the reduced gate resist mask 75 is also reduced to a desired 70 nm.
[0039]
(C) After the pattern reduction step is completed, the semiconductor substrate 16 is taken out of the pattern reduction processing chamber 50 and set in the RIE apparatus. The conductive film 62 and the insulating film 60 are selectively etched by RIE using the reduced gate resist mask 75 and the reduced monitor resist masks 65a to 65c as etching masks. As shown in FIG. 9C, a gate structure including the gate electrode 78 and the gate insulating film 76 and a monitor pattern including the monitor conductive films 68a to 68c and the monitor insulating films 66a to 66c are processed and formed.
[0040]
According to the pattern forming method according to the second embodiment, the reduced pattern width of the reduced monitor resist masks 65a to 65c is measured in real time in the pattern reduction processing chamber 50 even during the plasma etching process in the pattern reduction step. can do. Therefore, it is possible to adjust the etching conditions including the etching time on the spot, and a desired reduced pattern width can be accurately achieved. As a result, the reduced pattern width can be controlled without being affected by the fluctuation of the etching state or the like unlike the conventional time management.
[0041]
(Other embodiments)
As described above, the present invention has been described by the first and second embodiments. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples, and operation techniques will be apparent to those skilled in the art.
[0042]
In the first and second embodiments of the present invention, the resist pattern for measuring the reflection interference spectral waveform is a periodic L / S pattern for convenience of explanation. Of course, any pattern may be used as long as the mixing ratio of the mixed layer is known. Actually, since the pattern interval and the area ratio between the resist and the vacuum may be obtained in advance based on the mask pattern data for forming the resist mask pattern, there is no problem even if the pattern is complicated. Further, it is a matter of course that a dummy pattern of a resist pattern, for example, a simple L / S pattern as shown in FIG. 2 may be provided in a region where the semiconductor element is not formed on the semiconductor substrate to be a measurement region.
[0043]
Further, as an insulating film of the underlayer, SiO 2 ₂ Although the description has been made using the film, another insulating film, for example, a silicon nitride film (Si ₃ N ₄ ), Silicon oxynitride film (SiO _x N _y ), A silicon oxide film (PSG or BPSG) in which phosphorus or phosphorus and boron are diffused, a spin-on-glass film (SOG) made of a silicone resin, a polyimide resin film, a fluorine-added silicon oxide film, an organopolysiloxane compound film, It is clear that an inorganic polysiloxane compound film or the like can be used.
[0044]
Although the description has been made using the polysilicon film as the conductive film of the base layer, other conductive films, for example, a metal film such as aluminum (Al) and tungsten (W), and tungsten silicide (WSi ₂ ), Titanium silicide (TiSi ₂ ) And tungsten nitride (WN) ₂ ) And a metal compound film such as a metal nitride such as titanium nitride (TiN).
[0045]
As described above, the present invention naturally includes various embodiments and the like not described herein. Therefore, the technical scope of the present invention is determined only by the matters specifying the invention related to the claims that are appropriate from the above description.
[0046]
【The invention's effect】
According to the present invention, it is possible to provide a pattern forming method with good controllability and reproducibility, in which the pattern width of a mask material is reduced while being optically measured.
[0047]
Further, according to the present invention, it is possible to provide a method of manufacturing a semiconductor device using a pattern forming method with good controllability and reproducibility, in which the pattern width of a mask material is reduced while being optically measured.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram of a pattern width measuring apparatus according to a first embodiment of the present invention.
FIG. 2 is a cross-sectional view showing an example of a semiconductor substrate used for explaining a pattern forming method according to the first embodiment of the present invention.
FIG. 3 is a graph showing an example of a reflection interference spectral waveform of a semiconductor substrate obtained by the pattern width measuring apparatus according to the first embodiment of the present invention.
FIG. 4 is a schematic configuration diagram (part 1) illustrating an example of a pattern width measuring apparatus according to the first embodiment of the present invention.
FIG. 5 is a schematic configuration diagram (part 2) illustrating an example of a pattern width measuring apparatus according to the first embodiment of the present invention.
FIG. 6 is a schematic configuration diagram (part 3) illustrating an example of a pattern width measuring apparatus according to the first embodiment of the present invention.
FIG. 7 is a graph showing the relationship between the accumulated intensity difference of the reflected interference spectral waveform of the semiconductor substrate and the reduction width obtained by the pattern width measuring apparatus according to the first embodiment of the present invention.
FIG. 8 is a schematic configuration diagram of a pattern width measuring apparatus according to a second embodiment of the present invention.
FIG. 9 is a process cross-sectional view for explaining a gate structure processing according to the second embodiment of the present invention.
[Explanation of symbols]
10, 10a-10d Pattern width measuring device
12 light source
14 Lens
16 Semiconductor substrate
18 Beam splitter
18a Polarizing beam splitter
20 Optical fiber
22 Spectrometer
24 detector
26 Calculation unit
30, 60 insulating film
32, 62 conductive film
34a-34c resist mask
35a-35c Reduced resist mask
48 Polarizing plate
50 pattern reduction processing chamber
52 Lower electrode
54 Measurement window
64a to 64c monitor resist mask
65a-65c Reduction monitor resist mask
66a-66c Monitor insulating film
68a-68c Monitor conductive film
74 Gate resist mask
75 Reduction gate resist mask
76 Gate insulating film
78 Gate electrode

Claims (20)

Forming a mask material on at least a part of the region of the underlayer;
Etching the mask material;
Irradiating the mask material on which the etching has been performed with light, detecting reflected light of the light reflected after substantially transmitting through the mask material, and obtaining a reflection interference spectral waveform;
Calculating a pattern width of the mask material using data of the reflected interference spectral waveform in a wavelength region that is at least twice the pitch of the pattern of the mask material. The pattern forming method according to claim 1, wherein the etching reduces a pattern width of the mask material. The pattern forming method according to claim 1, wherein the step of calculating the pattern width is performed by quantifying a change caused by the etching of the reflection interference spectral waveform. The pattern forming method according to claim 1, wherein an end point of the etching is determined based on the calculated pattern width. The method according to claim 1, wherein the etching is performed selectively on the underlayer. The pattern forming method according to claim 1, wherein the etching is performed using plasma. The said light is introduce | transduced into the chamber which performs the said etching, irradiates the said mask material, and the said reflected light is taken out from the said chamber, The Claims 1-6 characterized by the above-mentioned. Pattern formation method. The pattern forming method according to any one of claims 1 to 7, wherein the detected reflected light is polarized light. 9. The pattern forming method according to claim 1, wherein the light applied to the mask material is polarized light substantially parallel to a longitudinal direction of the pattern. 10. The pattern forming method according to claim 1, wherein the mask material is made of a resist. Forming a base layer on the semiconductor substrate;
Forming a mask material on at least a part of the region of the underlayer,
Etching the mask material;
Irradiating the mask material on which the etching has been performed with light, detecting reflected light of the light reflected after substantially transmitting through the mask material, and obtaining a reflection interference spectral waveform;
A step of calculating a pattern width of the mask material using data of the reflection interference spectral waveform in a wavelength region that is at least twice the pitch of the pattern of the mask material,
Selectively processing the base layer using the mask material etched to a desired pattern width. The method according to claim 11, wherein the etching reduces a pattern width of the mask material. 13. The method of manufacturing a semiconductor device according to claim 11, wherein the step of calculating the pattern width is performed by quantifying a change caused by the etching of the reflection interference spectral waveform. 14. The method according to claim 11, wherein an end point of the etching is determined based on the calculated pattern width. The method of manufacturing a semiconductor device according to claim 11, wherein the etching is performed selectively on the base layer. The method of manufacturing a semiconductor device according to claim 11, wherein the etching is performed using plasma. The said light is introduce | transduced into the chamber which performs the said etching, irradiates the said mask material, and the said reflected light is taken out from the said chamber, The said any one of Claims 11-16 characterized by the above-mentioned. Manufacturing method of a semiconductor device. The method according to any one of claims 11 to 17, wherein the detected reflected light is polarized light. 19. The method of manufacturing a semiconductor device according to claim 11, wherein light applied to the mask material is polarized light substantially parallel to a longitudinal direction of the pattern. 20. The method according to claim 11, wherein the mask material is made of a resist.

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