JP3709437B2 - GaN-based heterojunction field effect transistor and method for controlling its characteristics - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an electronic device using a nitride semiconductor material, and more particularly to a heterojunction field effect transistor having a negative resistance using a gallium nitride based semiconductor material and a method for controlling the characteristics thereof.
[0002]
[Prior art]
A heterojunction field-effect transistor (FET) is a transistor using a channel of a two-dimensional electron gas formed at the interface between two materials having different lattice constants, and uses an AlGaAs semiconductor material or a nitride semiconductor material. Heterojunction field effect transistors have been developed.
[0003]
Heterojunction field effect transistors exhibiting negative resistance characteristics have been developed using AlGaAs-based semiconductor materials. First, there is a structure in which two channels are formed and a negative resistance is obtained by switching a current between a source and a drain between them. In order to form two channels, an AlGaAs layer having a large band gap is sandwiched between GaAs layers having a small band gap, and two interfaces between the AlGaAs layer and the GaAs layer are used as channels. In addition, a structure in which an electrode is also provided on the substrate side has been developed for efficient switching. The following references can be referred to for this element.
(1) A. Kastalsky and S. Luryi, "Novel real-space hot-electron transfer device", IEEE Electron Device Lett., Vol. 4, no. 9, pp. 334-336, 1983. (2) A. Kastalsky, S. Luryi, AC Gossard, and R. Hendel, "A field-effect transistor with a negative differential resistance", IEEE Electron Device Lett., Vol. 5, no. 2, pp. 57-60, 1984.
[0004]
Negative resistance occurs in these devices in the process of switching between two channels, and electrons in the channel formed in the GaAs layer portion with high electron mobility move to the AlGaAs layer with low electron mobility. It is to do. The movement to the AlGaAs layer is because electrons in the channel are accelerated by the voltage applied between the source and the drain and have a large kinetic energy (thermal energy). Since the electrons that have obtained this energy can get over the barrier formed between the GaAs layer and the AlGaAs layer, they move from the channel in the GaAs layer into the AlGaAs layer.
[0005]
In this case, there is a problem that the negative resistance characteristic is not observed at room temperature unless a voltage is applied to the substrate side. Further, the power characteristic of the element obtained by the drain current / drain voltage is about several milliwatts, and it is difficult to use it as a power element.
There is also a structure in which negative resistance characteristics are obtained simply by utilizing the fact that electrons in a channel in a GaAs layer with high electron mobility move to an AlGaAs layer with low electron mobility. The following references can be referred to for this.
(3) MS Shur, DK Arch, RR Daniels, and JK Abrokwah, "New negative resistance regime of heterostructure insulated gate transistor (HIGFET) operation", IEEE Electron Device Lett., Vol. 7, no. 2, pp. 78- 80,
1986.
[0006]
With respect to this device, it is confirmed by checking the gate current whether thermionic emission actually occurs at the gate portion when the source-drain voltage is high. According to this, when the voltage between the source and drain is increased, electrons in the channel gain high energy and go over the barrier of the gate electrode part and reach the gate electrode, so an increase in gate current is observed. The
In addition, heterojunction field effect transistors using nitride semiconductor materials have been developed that have negative resistance. The following references can be referred to for this element.
(4) J. Deng, R. Gasaka, MS Shur, MA Khan, and JW Yang, "Negative differential conductivity in AlGaN / GaN HEMTs: real space charge transfer from 2D to 3D GaN states", Fall Meetinng of the Materials Research Society held in Boston, Massachusette, November 28-December
3, 1999.
[0007]
The negative resistance component of this device has a low mobility due to an increase in the two-dimensional electron gas density formed at the interface between AlGaN and GaN by applying a positive positive gate voltage and a low mobility from the two-dimensional electron channel with high mobility. This is due to a phenomenon in which carrier electrons overflow and flow toward the three-dimensional GaN layer side of mobility.
The device structure is no different from the ordinary high electron mobility transistor (HEMT) structure. As a result, as shown in Reference (4), the negative resistance component appears only in the high gate voltage region in this device, and there is a problem in reproducibility.
[0008]
[Problems to be solved by the invention]
The problem to be solved by the present invention is to improve the performance and reproducibility of a heterojunction field effect transistor having a negative resistance using a nitride-based semiconductor material.
A conventional heterojunction field-effect transistor having a negative resistance using an AlGaAs-based semiconductor material utilizes thermionic emission from a GaAs layer to an AlGaAs layer. However, the physical process of thermionic emission over the barrier between AlGaAs and GaAs is also related to a tunneling phenomenon and a diffusion phenomenon, and it is difficult to obtain a negative resistance characteristic at room temperature. In addition, AlGaAs and GaAs materials cannot be used as high-temperature and high-power devices due to the deterioration of device characteristics at high temperatures and the low power characteristics of the devices.
[0009]
In addition, elements having a negative resistance in a heterojunction field effect transistor using a nitride-based semiconductor material are structurally the same as a normal element structure that does not exhibit a negative resistance, and thus reproducibility is obtained. It cannot be said that it is done.
Therefore, an object of the present invention is to provide an element structure that exhibits negative resistance characteristics with good reproducibility at room temperature using a nitride-based semiconductor material that is stable even at high temperatures and high power, and a control method thereof.
[0010]
[Means for Solving the Problems]
In the present invention, in order to solve these problems, in a GaN-based heterojunction field effect transistor, an n-type doped GaN layer is disposed at a position slightly away from the heterojunction, Controls the height of the barrier when electrons emit heat to the GaN layer side. By adjusting the doping concentration of the n-type doped GaN layer and the distance from the heterojunction, the drain voltage and gate voltage exhibiting negative resistance can be controlled.
[0011]
Moreover, unnecessary electrons can be prevented from being charged by allowing electrons that have moved to the n-type doped GaN layer by heat release to reach the drain electrode as they are. By bringing the drain electrode into contact with the n-type doped GaN layer, the voltage of the n-type doped GaN layer is also controlled by the drain voltage, so that the operation is stabilized.
[0012]
FIG. 2 shows the drain of the heterojunction field effect transistor of the present invention. A schematic diagram of the source operating area is shown.
1) When a voltage near 0 is applied to the gate electrode and a positive voltage is applied to the drain electrode, the drain current flows along the two-dimensional electron channel formed at the heterointerface as shown by the solid arrow in the figure.
2) When a negative voltage is applied to the gate electrode and a positive voltage is applied to the train electrode, the two-dimensional electron channel formed at the heterointerface is depleted. As shown by the dotted arrow in the figure, the drain current is The flow path is changed to the n-type doped GaN layer under the two-dimensional electron channel. Negative resistance characteristics occur in the process of changing the flow path from a two-dimensional electron channel with high electron mobility to a GaN layer with low electron mobility.
3) When the negative voltage is further increased at the gate electrode, the two-dimensional electron channel at the heterointerface is completely depleted, and the drain current becomes n-type below the two-dimensional electron channel, as indicated by the dashed line arrow in the figure. The drain current is reduced because it flows along the doped GaN layer.
[0013]
FIG. 3 is a schematic diagram of a band structure in a vertical section with respect to the heterojunction of the drain / gate region in FIG. When a negative voltage is applied to the gate electrode and a positive voltage is applied to the drain electrode, a voltage is also applied to the two-dimensional electron gas and the n-type doped GaN layer. As a result, the conduction band energy level on the GaN layer side of the channel in which the two-dimensional electron gas is confined decreases in the order of 1) to 3) described above with reference to FIG. 2, and the channel current is easily on the GaN layer side. The situation where it becomes possible to move to is illustrated.
[0014]
A conventional AlGaN / GaN structure showing negative resistance characteristics of a wide band gap system uses metal organic chemical vapor deposition (MOCVD). However, the MOCVD method is not uniform in crystal quality because the film thickness is not easily controlled and crystal growth cannot be observed in situ. Moreover, since organic metals are used, it is inevitable that impurities such as oxygen and carbon are mixed.
Therefore, in order to improve the reproducibility of the heterojunction field effect transistor according to the present invention, a crystal structure for device fabrication is grown using a molecular beam growth method (MBE) with excellent control of the growth film thickness.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows the structure of a heterojunction field effect transistor having a negative resistance using a nitride-based semiconductor material proposed by the present invention. The manufacturing process of this wide band gap semiconductor heterojunction field effect transistor shown in FIG. 1 is as follows.
[0016]
A sapphire (0001) C surface is used for the substrate. This is because it is difficult to obtain a substrate that is expensive, has a large diameter, and has few defects.
Since the difference in lattice constant between the sapphire substrate and GaN is as large as 16.3%, a large amount of crystal defects are introduced into the GaN layer when GaN is grown directly on the sapphire substrate. In order to avoid this, a buffer layer is inserted between the substrate and the GaN layer.
[0017]
In this manufacturing process, an MBN method is used to grow an AlN layer (thickness 90 nm) buffer layer on a sapphire substrate at 750 ° C., and then a GaN layer (thickness 1 nm) and an AlN layer (thickness 1 nm). The superlattice multi-buffer layer is tri-compositioned at a high temperature of 950.degree. Further, a buffer layer of AlN (thickness 120 nm) was grown at a high temperature of 950.degree. The introduction of this AlN / GaN superlattice multiple structure and AlN buffer layer is important for reducing threading dislocations and improving the quality of GaN crystals.
[0018]
A non-doped GaN layer was grown to a thickness of 2000 nm at a growth temperature of 860 ° C. using the MBE method. The thicker the GaN layer, the better. However, the thickness is set to 2000 nm in consideration of growth time and the like. The reason for not doping is to reduce the leakage current flowing from the channel to the underlying GaN layer.
Next, with the growth temperature fixed at 860 ° C., a 20 nm-thick GaN layer doped with silicon (Si) at 2 × 10 ¹⁶ cm ⁻³ , a non-doped 2 nm thick GaN layer, a non-doped 2 nm thick AlGaN spacer A layer was grown, and finally an AlGaN barrier layer doped with silicon (Si) at 2 × 10 ¹⁸ cm ⁻³ was grown thereon to a thickness of 20 nm.
[0019]
A GaN layer having a thickness of 20 nm doped with silicon by about 2 × 10 ¹⁶ cm ⁻³ plays an important role in stably extracting the negative resistance characteristics of the device. Since the non-doped GaN layer and the AlGaN spacer layer are portions where a two-dimensional electron gas is formed, they are non-doped for the purpose of reducing impurity scattering. The thickness is preferably 2-3 nm.
The composition ratio of aluminum in the AlGaN spacer layer and the AlGaN barrier layer is suitably 15 to 30%. When the composition ratio of aluminum is reduced, the lattice constant of AlGaN becomes close to that of GaN, and the crystal quality of the AlGaN barrier layer increases. However, the piezoelectric field polarization due to the difference in spontaneous polarization and the strain stress due to the difference in lattice constant is reduced, and the two-dimensional electron gas density is reduced. In addition, there is a problem that the band gap difference between the AlGaN barrier layer and the GaN layer becomes small, and it is difficult to form a good two-dimensional electron channel at the AlGaN / GaN interface.
[0020]
On the other hand, when the composition ratio of aluminum is increased, the density of the two-dimensional electron gas increases and the band gap difference between AlGaN and GaN increases and a deep channel is formed at the AlGaN / GaN interface. A large amount of crystal defects enter the AlGaN barrier layer. This crystal defect causes a gate leakage current. Therefore, it is important to select an optimal aluminum composition ratio. In this example, an aluminum composition ratio of 20% was used.
[0021]
Once the crystal structure for manufacturing the above heterojunction field effect transistor is formed, the patterning step for forming the transistor structure is then started.
First, an oxide film (SiO ₂ ) is deposited as a crystal surface protective film to a thickness of about 100 nm at 500 ° C., and mesa patterning is performed by photolithography. Thereafter, the oxide film is etched in accordance with the shape of the mesa using a hydrofluoric acid solution. Thereafter, the grown substrate is processed into a mesa pattern by dry etching using the oxide film in the mesa shape as a mask.
[0022]
By this mesa etching, the elements are separated from each other, so that no current flows between the elements. Dry etching is performed using chlorine plasma using an electron cyclotron resonance (ECR) method. Compared with the wet etching method, the dry etching has etching anisotropy, that is, perpendicularity, and it is easy to control the steep interface and the etching rate. Although the etching rate varies depending on the crystal quality of the epitaxial film, the pressure of chlorine plasma, the acceleration energy, etc., it is 500 to 700 nm per hour.
[0023]
Thereafter, a part of the mesa is etched according to the shape in contact with the n-type GaN layer of the drain electrode by the same method as that for forming the mesa. The depth of etching is the depth that reaches the n-type GaN layer. Therefore, it may be about 30 nm.
The oxide film remaining on the mesa after the mesa etching is removed in a hydrofluoric acid solution to form an insulating film on the entire surface. For the insulating film, AlN, SiO ₂ , SiN, or Si ₃ N ₄ is preferable. Thereafter, the source and drain electrodes are opened. That is, the insulating film is removed in accordance with the shape of the source and drain electrodes.
[0024]
As the source and drain electrode metals, a Ti / Al / Ni / Au (30/220/40/50 nm) structure was used from the substrate surface side. A high vacuum electron beam evaporation method was used to form the electrode metal. After the electron beam evaporation, the metal other than the source and drain portions is removed by a lift-off method. Acetone was used as the lift-off solution.
[0025]
Thereafter, annealing was performed for alloying the electrode metal and the AlGaN / GaN layer. Annealing was performed at 750 ° C. for 30 seconds using a high-speed lamp annealing method. Note that if the annealing temperature is too high or the time is too long, the electrodes will be connected to each other due to excessive metal diffusion. Generally, 700 to 900 ° C. and 10 to 60 seconds are preferable.
[0026]
Next, a gate electrode is formed. Photolithography is used for patterning the gate, but electron beam lithography is used when the gate length is short and a fine pattern is used. When the gate length is 2000 nm or less, the yield is better when the electron beam lithography method is used. In the present invention, the gate length is set to 850 nm using an electron beam lithography method. As the gate electrode metal, Pt / Au (50/200 nm) was used from the substrate surface side. High vacuum electron beam evaporation was also used to form the gate metal. An acetone solution was used for lift-off of the gate electrode pattern. The gate electrode is not annealed.
[0027]
【The invention's effect】
FIG. 4 shows the negative resistance characteristics obtained by providing the n-type GaN layer under the two-dimensional electron channel. The horizontal axis is the source / drain voltage, and the vertical axis is the drain current. Negative resistance can be seen with good reproducibility even when the drain voltage is as low as about 1-3V.
Since this device can control the negative resistance characteristic by controlling the gate voltage, it can be applied to a high-frequency oscillator, an amplifier, a switching element, and the like. Further, the wide band gap semiconductor of gallium nitride operates stably even under conditions such as high temperature and high power, and is therefore used as a high power element, a high temperature element for an automobile engine, and a high frequency element for a base station of a mobile phone.
[Brief description of the drawings]
FIG. 1 is a diagram showing the structure of an AlGaN / GaN wide bandgap semiconductor heterojunction field effect transistor.
FIG. 2 is a schematic diagram of a drain / source operation region of a heterojunction field effect transistor of the present invention. It shows a change in channel current flow due to a drain electrode formed in a well shape and a GaN doping layer formed under a two-dimensional electron channel.
3 is a diagram showing changes in conduction band levels and Fermi level levels with respect to changes in gate and drain voltages in a vertical cross-sectional structure with respect to the heterojunction of the drain / gate region of FIG. 2;
FIG. 4 is a diagram illustrating drain current versus drain-source voltage characteristics of a heterojunction field effect transistor exhibiting negative resistance.

Claims (5)

Heterojunction between the GaN layer and the AlGaN barrier layer is not doped is formed, and the GaN-based heterojunction field effect transistor two-dimensional electron channel at the hetero-interface is Ru is formed in the heterojunction,
GaN-based heterojunction field-effect type in which n-type doped GaN layer is placed in contact with the side opposite to the heterojunction of the two sides of the undoped GaN layer forming the heterojunction Transistor.   The GaN-based heterojunction field effect transistor according to claim 1, wherein the drain electrode is in contact with both the upper portion of the AlGaN barrier layer and the n-type doped GaN layer.   2. The GaN-based heterojunction according to claim 1, wherein a drain voltage and a gate voltage exhibiting negative resistance can be controlled by adjusting a doping concentration of the n-type doped GaN layer and a distance from the heterojunction. Field effect transistor.   The GaN-based heterojunction field effect transistor according to claim 1, wherein a crystal structure for device fabrication is grown using molecular beam growth (MBE). Heterojunction between the GaN layer and the AlGaN barrier layer is not doped is formed, and to control the properties of the GaN-based heterojunction field effect transistor two-dimensional electron channel at the hetero-interface of the heterojunction Ru is formed In the method
The n-type doped GaN layer is disposed so as to be in contact with the side surface opposite to the heterojunction among the two side surfaces of the undoped GaN layer forming the heterojunction,
Alters the doping concentration of the doped GaN layer on the n-type, or by adjusting the thickness of the GaN layer that is not the doping, the position from the heterojunction doped GaN layer on the n-type A method for controlling the characteristics of a GaN-based heterojunction field effect transistor comprising controlling a source / drain and a gate voltage generating a negative resistance by controlling.

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