JP3680724B2 - Information processing device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an information processing apparatus, and more particularly to an information processing apparatus that prevents a liquid crystal display panel from recognizing afterimages after power is turned off. In this specification, “white”, “white display”, etc. indicate the color of the normally white liquid crystal display panel itself when the power is turned off, and “black”, “black display”, etc. indicate no color when the power is turned off. This refers to the color of the Marie Black liquid crystal display panel itself.
[0002]
[Prior art]
Reflective liquid crystal display devices (LCDs) used in information processing devices reflect incident light from the outside with a reflector located inside the LCD, and use of this reflected light as a display light source eliminates the need for a backlight. Since it has the advantages of achieving low power consumption, thinning, and weight reduction over a transmissive LCD that requires a backlight, it is frequently used in display devices for portable terminals.
[0003]
The basic structure of the reflective LCD is TN (twisted nematic), single polarizer, STN (super twisted nematic), GH (guest host), PDLC (polymer dispersion), cholesteric. , A structure using a liquid crystal using a TFT method, an element for switching the liquid crystal, and a reflector provided inside or outside the liquid crystal cell.
[0004]
[Problems to be solved by the invention]
However, in general, the output from the drive circuit that drives such a panel is interrupted at the same time as the power is turned off, so that afterimages remain on the screen for a certain period of time even if the power is turned off and the display on the screen is erased May be visible during The cause of such an afterimage is due to the charge held in the load capacitor composed of the liquid crystal capacitor and the auxiliary capacitor.
[0005]
In the case of a transmissive LCD, this afterimage becomes invisible by turning off the backlight when the power is turned off. However, in the case of a reflective LCD, the charge is naturally discharged after the power is turned off, compared to the transmissive LCD. It appears on the screen as an afterimage for a long period. The degree of the afterimage that can be seen by the reflected light is increased as the aperture ratio of the TFT-type LCD is improved, which not only becomes a problem from the viewpoint of the quality of the display screen but also gives the user anxiety. End up.
[0006]
In order to solve such a problem, Japanese Patent Laid-Open No. 10-222134 discloses a power source for a liquid crystal display device by detecting that a clock signal or a horizontal synchronization signal sent from the computer main body has been stopped for a long time. A liquid crystal display device and an information processing device are disclosed in which an afterimage is detected after a short time thereafter, and an afterimage is not recognized by displaying a specific display color before the power is turned off.
[0007]
However, in the case of a method for displaying a specific display color on the LCD after the power is turned off as disclosed in JP-A-10-222134, the control signal for the LCD from the main body side of the information processing apparatus is not displayed. Since the transmission is stopped, a circuit for generating a control signal exclusively for the LCD is required while the afterimage is not recognized. Further, when the supply of the power supply voltage to the liquid crystal display device is stopped immediately after the transmission of the control signal is stopped, it is necessary to separately supply a dedicated power supply voltage to the liquid crystal display device. Such a configuration may lead to design complexity and cost increase.
[0008]
Further, for example, as shown in FIG. 12, a write signal (signal) for writing a specific display color to the LCD is output to the LCD by using an LCD control signal, which is a control signal of the liquid crystal display device, as a trigger. Although an afterimage can be eliminated when a normal power-off sequence such as turning off the LCD by an off signal is executed, as shown in FIG. 13 when the forced power is turned off or when a part of the OS is terminated. When an unusual power-off sequence is executed, such as when the LCD control signal that triggers the writing signal (signal) and the power-off signal that turns off the power of the LCD are simultaneously turned off, an afterimage may occur. Conceivable.
[0009]
Accordingly, the present invention provides an information processing apparatus having a liquid crystal display panel with improved display screen quality that does not require either or both of a circuit for generating a control signal for preventing afterimages from being recognized and an internal power supply. With the goal.
[0030]
[Means for Solving the Problems]
  An information processing apparatus according to the present invention includes a display unit including a liquid crystal display panel that displays an image based on an image signal from an image display circuit, and a panel for turning off the panel power supply included in the main body unit. A system control unit that outputs a power-off signal and a main-unit power-off signal for turning off the main-unit power of the main-unit unit, and delays the power-off by delaying the main-unit power-off signal from the system control unit A delay unit that outputs as a signal, and after the system control unit outputs the panel power-off signal, until afterimage processing for preventing the afterimage after the panel power supply of the liquid crystal display panel is turned off is executed A first power-off process for preventing the main body power supply of the main body from being turned off, and the panel power supply and the main body power supply.simultaneousWhen the system control unit outputs a panel power-off signal and the after-image processing is terminated before the after-image processing ends, the after-image processing means includes the delay unit And afterimage processing means for performing any one of the second power-off processing for performing the afterimage processing as delayed afterimage processing until the delayed power-off signal is output.
[0031]
In the information processing apparatus of the present invention configured as described above, the afterimage processing means executes a so-called normal power-off sequence in which the main body power of the main body is turned off after the power for the panel of the liquid crystal display panel is turned off. In this case, a first power-off process is performed so that the main body power supply of the main body is not turned off until afterimage processing is executed. When the power supply is turned off at the same time, such as when the power supply is turned off at the same time, the power supply for the main unit is delayed by the delay unit, and the second power supply that performs afterimage processing during the delay is turned off. Process. For this reason, in either case of normal power off or unusual power off, afterimage processing is always performed before the main unit power is turned off, so that an afterimage appears on the screen of the liquid crystal display panel after the power is turned off. Does not occur.
[0032]
The afterimage processing means holds the image signal output from the image display circuit during the afterimage processing when the first power-off processing is executed, and turns off the panel power after the afterimage processing ends. It may be.
[0033]
The information processing apparatus of the present invention may be one in which the main unit power supply is turned off after the panel power supply is turned off.
[0034]
The afterimage processing means may include an afterimage processing execution circuit that executes afterimage processing and an afterimage processing control circuit that outputs an operation signal for operating the afterimage processing execution circuit to the afterimage processing execution circuit. .
[0035]
The afterimage processing control circuit includes a logical operation circuit that is input from the system control unit and to which a main unit power-off signal for turning off the main unit power and a signal from the image display circuit are input. At least one of them may be input as an operation signal to the afterimage processing execution circuit. In this case, when the first power-off process is executed, the logical operation circuit operates the operation result when the main unit power-off signal is at the first level and the signal from the image display circuit is at the second level. The signal may be input to the afterimage processing execution circuit as a signal, and the logic operation circuit may be configured such that when the second power-off process is executed, the main body power-off signal is at one level and the image display circuit The calculation result when the signal from is at the other level may be input to the afterimage processing execution circuit as an operation signal.
[0036]
The afterimage processing means may include a switching circuit that switches between the output of the image display circuit and the output of the afterimage processing execution circuit.
[0037]
The afterimage processing control circuit includes a logical operation circuit that is input from the system control unit and to which a main unit power-off signal for turning off the main unit power and a signal from the image display circuit are input. At least one of them may be input to the switching circuit and a switching signal for switching the output from the image display circuit to the output from the afterimage processing execution circuit. In this case, when the first power-off process is executed, the logical operation circuit writes the operation result when the main unit power-off signal is at the first level and the signal from the image display circuit is at the second level. The logic operation circuit may be input to the switching circuit as a built-in signal, and when the second power-off process is executed, the logic unit power-off signal is at one level from the image display circuit. The calculation result when the signal is at the other level may be input to the switching circuit as a write signal.
[0038]
The afterimage processing execution circuit may write a display color when the power is turned off, which is the color of the liquid crystal display panel itself in a state where the power supply for the panel is turned off, to the liquid crystal display panel.
[0048]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a control block diagram when the liquid crystal display panel of the information processing apparatus of the present embodiment is turned off, and FIG. 2 is a timing chart when a normal power is turned off by the control block shown in FIG. FIG. 3 shows timing charts when the power is turned off abnormally.
[0049]
The information processing apparatus of this embodiment includes a VGA 5 that is an image display circuit such as a graphic accelerator that outputs a signal related to the LCD 6 that is a normally white reflective liquid crystal display panel, and a clock that generates a clock for a counter. A control unit 2 having a generation unit 1, a white writing circuit 9 for displaying the entire screen of the LCD 6 in white, and a counter unit 3 that outputs a delayed power-off signal output from a system controller 8 such as a banister. And a control block having an AND circuit 7 to which the LCD control signal output from the VGA 5 and the white writing signal output from the control unit 2 are input, first, the power supply off signal is delayed, After the white display on the LCD 6, the power of the LCD 6 is turned off by the delayed power off signal. That.
[0050]
The VGA 5 outputs an LCD clock (dot clock), HSYNC, VSYNC, DE (Display Enable), data, and the like to the LCD 6.
[0051]
As the counter clock generated by the clock generator 1, HSYNC (horizontal synchronization signal), LCD clock (dot clock), VSYNC (vertical synchronization signal), and 32K clock are used. When the counter clock is HSYNC, LCD clock (dot clock), or VSYNC, these are output from the VGA 5, so this VGA 5 can be used as the clock generation unit 1. When the 32K clock is used as the counter clock, the oscillator is the clock generator 1. The counter clock is not a clock that disappears when the power is turned off, but is preferably a clock that operates for a while. Therefore, a clock signal output from HSYNC or an oscillator is particularly preferable.
[0052]
Details of the control when the power is turned off by the control block of the information processing apparatus according to the present embodiment will be described below with reference to FIGS. This normal power-off corresponds to, for example, a case where a CRT is further connected to the information processing apparatus of the present embodiment, and the LCD 6 disappears after switching from the LCD 6 display to the CRT display. May apply.
[0053]
In the following description, the power-off signal (a) is a signal for turning off the power of the LCD 6 that is directly output from the BIOS in the system controller 8 to the VGA 5, and is the same as the power-off signal (A). Is a signal for turning off the power of the information processing apparatus main body, and is not a signal specially generated for the control block of the present embodiment, but is information when an unusual power-off described later is performed. A signal sent to an HDD or the like, which is another device of the processing apparatus main body, is used as a power-off signal (A).
[0054]
First, when the power of the liquid crystal display panel is turned off, a power-off signal (a) is directly sent from the system controller 8 provided in the main body 201 (see FIG. 8) of the information processing apparatus described later to the VGA 5 for a time t.₁(Time t in FIG.₁The power-off signal (a) is High → Low). From the VGA 5 to which the power supply off signal (a) is input from the system controller 8, the time t₁The LCD control signal (E) (Low) is output to the AND circuit 7 to which the white writing signal output from the control unit 2 and the LCD control signal (E) from the VGA 5 are input.
[0055]
Further, the white writing signal (High) passes through the control unit 2 and is input to the AND circuit 7.
[0056]
The AND circuit 7 to which the LCD control signal (E) (Low) and the white writing signal (High) are input, calculates the time t₁Thereafter, the white writing signal (F) (Low) is output to the white writing circuit 9 of the LCD 6. The white writing circuit 9 displays the entire screen of the LCD 6 in white when the white writing signal (F) (Low) is input.₁Thereafter, the entire screen is displayed in white.
[0057]
Thus, after the entire screen of the LCD 6 is displayed in white, the signal from the VGA 5 is time t.₂Held active until time t₂Signal from VGA5 is changed from active to Low, then VGA5 is time t_ThreeThe power supply off signal (C) (Low) is output to the transistor Tr4 provided between the LCD power supply 10 and the LCD 6. The supply of the LCD driving power from the LCD power supply 10 to the LCD 6 by the input of the power supply off signal (C) (Low) to the transistor Tr4 is time t._ThreeIs blocked.
[0058]
Thereafter, the system controller 8 outputs a power off signal (A), and thereby the power of the information processing apparatus main body is turned off.
[0059]
To summarize the above normal power-off control,
(1) The BIOS in the system controller 8 directly outputs a power-off signal (a), which is a signal for turning off the power of the LCD 6, to the VGA 5.
(2) Thereby, the sequence of the LCD control signal (E) (High → Low) → signal (active → Low) → power off signal (C) (High → Low) is executed.
(3) Thereafter, the system controller 8 outputs a power off signal (A) for turning off the power of the information processing apparatus main body.
(4) The information processing apparatus is turned off.
It becomes. As described above, when the power is normally turned off, the sequence (1) to (4) is executed, so that the entire screen of the LCD 6 is displayed in white after the system controller 8 outputs the power-off signal (a). The information processing apparatus main body is not turned off until the user does not recognize the afterimage. First, the white display on the LCD 6 is displayed. After the white display is completed, the power supply to the LCD 6 is shut off. Do off.
[0060]
Next, control when the power is off normally is described with reference to FIGS. Note that this unusual power-off does not execute the above-described sequences (1) and (2), but suddenly executes (3) and (4) and does not output the power-off signal (a) from the BIOS. When the power is turned off forcibly, the power off signal (a) is output, and the power of the information processing apparatus main body is turned off before the white display for preventing the afterimage from being recognized, Applicable when the OS is terminated.
[0061]
First, when the power of the liquid crystal display panel is turned off, a power-off signal (A) is output from the system controller 8 to the control unit 2 (time t in FIG. 3)._FourThe power off signal (A) is High → Low).
[0062]
Next, the power-off signal (A) is delayed. That is, the power-off signal (A) is delayed by the delay time t set by the counter unit 3 of the control unit 2 and the time t_FiveIs output to the VGA 5 as the power off signal (B) (time t_FiveThe power-off signal (B) is High → Low). This delay time t is shown as three counts of the clock (D) in FIG. Note that the count number of the clock (D) is not limited to this.
[0063]
Further, the control unit 2 outputs the power-off signal (A) that has passed through the control unit 2 without passing through the counter unit 3 as a white writing signal. That is, the power-off signal (A) that is a white writing signal is output from the control unit 2 without delay (time t_FourHigh → Low).
[0064]
The AND circuit 7 to which the white writing signal output from the control unit 2 without delay and the LCD control signal (E) from the VGA 5 is input is time t_FourUp to this point, since both the white writing signal and the LCD control signal (E) are High, the white writing signal (F) (High) is output to the white writing circuit 9 as the calculation result. The white writing circuit 9 receives the white writing signal (F) (Low) to display the entire screen of the LCD 6 in white, so that the time t_FourUntil then, white display is not performed.
[0065]
Time t_FourIs passed, the power supply off signal (A) (Low), which is a white writing signal, is input from the control unit 2 to the AND circuit 7. That is, since the LCD control signal (E) (High) and the white writing signal (Low) are input to the AND circuit 7, the white writing signal (F) (Low) is output from the AND circuit 7 as a white paper. Is output to the insertion circuit 9. As a result, time t_FourThereafter, white display is performed on the entire screen of the LCD 6.
[0066]
On the other hand, the power-off signal (B) output from the control unit 2 after being delayed by the delay time t is input to the VGA 5. Then, the VGA 5 outputs the power supply off signal (C) delayed by the delay time t to the transistor Tr4 provided between the LCD power supply 10 and the LCD 6. As a result, the supply of the LCD driving power from the LCD power supply 10 to the LCD 6 is delayed by the delay time t._FiveIt is interrupted by. Each signal from the VGA 5 to the LCD 6 is also delayed by a delay time t._FiveThe output is stopped at.
[0067]
Although not shown, the information processing apparatus main body and other devices such as HDDs also have a time t delayed by a delay time t ′ when the power-off signal (B) changes from High to Low._FivePower off.
[0068]
As described above, the information processing apparatus of the present embodiment first delays the power-off signal when the power is turned off unusually, and the LCD 6 uses the white writing signal (F) output without delay in the meantime. After the white display, the LCD 6 is turned off by the delayed power off signal, and then the information processing apparatus main body is turned off.
[0069]
As described above, the information processing apparatus according to the present embodiment always delays the power-off when the power is abnormally turned off, and performs white display on the LCD 6 during the delay, and then turns on the power of the LCD 6. Is turned off, and then the power supply of the information processing apparatus main body is turned off, so that an afterimage does not occur on the screen of the LCD 6 after the power is turned off, as in the normal power-off sequence. Further, the information processing apparatus according to the present embodiment requires a power supply dedicated for white display and a dedicated circuit for generating a control signal for the LCD, and is not a method for causing the LCD 6 to display white after the power is turned off. Thus, by delaying the power-off signal, the LCD 6 displays white before the power is turned off, so there is no need to provide a dedicated circuit or power source.
(Second Embodiment)
In the above-described first embodiment, the control block and the power-off sequence when the power is turned off when the white writing circuit 9 is provided in the LCD 6 have been described. In contrast, in the present embodiment, a control block and a power-off sequence when the power is turned off when no white writing circuit is provided will be described.
[0070]
The information processing apparatus according to the present embodiment includes any one of a VGA 105 that is an image display circuit, a clock generation unit 101, a pullup circuit 112 that outputs a white signal, a video signal from the VGA 105, and a white signal from the pullup circuit 112. , A control unit 102 having a counter unit 103 that outputs a delayed power supply off signal output from the system controller 108, and an AND circuit 107 that outputs a switch control signal to the switch unit 111. First, the power supply off signal is delayed, and white display is displayed on the LCD 6 in the meantime, and then the power of the LCD 106 is turned off by the delayed power supply off signal.
[0071]
Details of the control when the power is turned off by the control block of this embodiment will be described below.
[0072]
First, normal control when power is turned off will be described with reference to FIGS. 4 and 5. FIG.
[0073]
When the power supply of the liquid crystal display panel is turned off, the power supply off signal (a ′) is directly transmitted from the system controller 108 provided in the main body 201 (see FIG. 8) of the information processing apparatus described later to the VGA 105 for a time t.₆(Time t in FIG.₆The power-off signal (a ′) is High → Low). Then, from the VGA 105 to which the power supply off signal (a ′) is input from the system controller 108, the time t₆The LCD control signal (E ′) (Low) is output to the AND circuit 107. Further, the power-off signal (A ′) (High) passes through the control unit 102 and is input to the AND circuit 107.
[0074]
The AND circuit 107 calculates the logical product of the power-off signal (A ′) (High) that has passed through the control unit 102 and the LCD control signal (E ′) (Low), and calculates the time t₆Thereafter, the switch control signal (F ′) (Low) is output to the switch unit 111. The switch unit 111 receives the switch control signal (F ′) (Low) and receives the time t₆Thereafter, the video signal (G ′) from the VGA 105 is changed to the video signal (white) (I ′) for displaying the LCD 106 in white from the pull-up circuit 112 and is input to the LCD 106, so that the entire screen of the LCD 106 is displayed. White display will be made.
[0075]
Thus, after the entire screen of the LCD 106 is displayed in white, the time t₇At this time, the signal from the VGA 105 is changed from active to Low, and then the VGA 105₈Then, the power supply off signal (C ′) (Low) is output to the transistor Tr104 provided between the LCD power supply 110 and the LCD. The supply of the LCD driving power from the LCD power supply 110 to the LCD 106 is performed at time t because the power supply off signal (C ′) (Low) is input to the transistor Tr104.₈Is blocked.
[0076]
As described above, when the normal power is turned off, the entire screen of the LCD 106 is displayed in white, and then the power supply to the LCD 106 is cut off.
[0077]
Thereafter, the system controller 108 outputs a power-off signal (A), thereby turning off the power of the information processing apparatus main body.
[0078]
Next, regarding the control when the power is off normally, the control block shown in FIGS. 4 and 4 is a control block diagram when the power of the liquid crystal display panel in the information processing apparatus of this embodiment is turned off. This will be described with reference to FIG.
[0079]
First, when the power of the liquid crystal display panel is turned off, a power off signal (A ′) is output from the system controller 108 to the control unit 102 (time t in FIG. 6).₉The power-off signal (A ') is High → Low).
[0080]
Next, the power-off signal (A ′) is delayed. That is, the power supply off signal (A ′) is delayed by the delay time t ′ set by the counter unit 103 of the control unit 102 to obtain the time t._TenIs output to the VGA 105 as a power-off signal (B ') (time t_TenThe power-off signal (B ′) is High → Low).
[0081]
Further, the control unit 102 also outputs a power-off signal (A ′) that is passed through the AND circuit 107 without passing through the counter unit 103. The delay time t is shown as three counts of the clock (D ′) in FIG. 6, but is not limited to this.
[0082]
Next, the LCD control signal (E ′) (High) output from the VGA 105 and the time t without delay.₉From the AND circuit 107 to which the power-off signal (A ′) (Low) input in step S1 is input, the input to the LCD 106 and the video signal (G ′) from the VGA 105 to the switch unit 111 are pulled up. The switch control signal (F ′) which is a signal for switching to the white signal (H ′) from 112 is the time t₉Is output.
[0083]
The switch control signal (F ′) is time t₉Is input (High → Low) to the switch unit 111 at time t.₉Thereafter, the video signal (G ′) is changed to a video signal (white) (I ′) for displaying white on the LCD 106 and input to the LCD 106, so that white display is performed on the entire screen of the LCD 106.
[0084]
On the other hand, the power-off signal (B ′) output from the control unit 102 after being delayed by the delay time t ′ is input to the VGA 105. Then, the VGA 105 outputs the power-off signal (C ′) delayed by the delay time t ′ to the transistor Tr104 provided between the LCD power source 110 and the LCD 106. As a result, the supply of LCD driving power from the LCD power source 110 to the LCD 106 is delayed by the delay time t '._TenIt is interrupted by.
[0085]
Although not shown, the information processing apparatus main body and other devices such as HDDs also have a time t delayed by a delay time t ′ when the power-off signal (B ′) changes from High to Low._TenPower off.
[0086]
As described above, the information processing apparatus of the present embodiment that does not have a white writing circuit first delays the power-off signal when the power of the liquid crystal display panel is turned off, and the video signal (white ) (I ′) is input to the LCD 106 to display the LCD 106 in white, and then the LCD 106 is turned off by the delayed power-off signal, and then the information processing apparatus main body is turned off.
[0087]
Therefore, as in the first embodiment, the information processing apparatus of the present embodiment always delays the power off when the power is abnormally turned off, and performs white display on the LCD 106 during the delay. Thereafter, the power of the LCD 106 is turned off, and then the power of the information processing apparatus main body is turned off, so that no afterimage is generated on the screen of the LCD 106 after the power is turned off, as in the normal power off sequence. . The information processing apparatus according to the present embodiment also requires a power supply dedicated to white display and a dedicated circuit for generating an LCD control signal, and is not a method of causing the LCD 106 to display white after the power is turned off, but is the same as in the first embodiment. In addition, since the counter unit 103 of the control unit 102 delays the power-off signal to display white on the LCD 106 before the power is turned off, there is no need to provide a dedicated circuit or power source.
[0088]
In each of the above-described embodiments, a normally white type reflective LCD has been described as an example. However, the present invention is not limited to this. For example, in the case of a normally black type, all of the LCD 6 is turned off before the power is turned off. In other words, in the second embodiment, a pulldown circuit is used instead of the Pullup circuit 112. That is, the display color of the entire screen of the LCD 6 before the power is turned off may be changed to the display color of the entire screen of the LCD 6 after the power is turned off, and the afterimage may be prevented from being recognized by turning off the power. Any single color may be displayed on substantially the entire screen of the LCD 6.
[0089]
For example, in FIG. 1 of the first embodiment, the white writing circuit 9 is provided on the LCD 6 side, and the control unit 2 including the counter unit 3, the AND circuit 7, and the VGA 5 are provided on the main body side. However, the present invention is not limited to this. That is, in each of the above-described embodiments, the circuit for writing white on the LCD and the control circuit for controlling the writing circuit are both provided in one of the LCD and the main body. Also good.
[0090]
Next, FIG. 7 shows an example of a perspective view showing the appearance of the information processing apparatus described in the first and second embodiments. FIG. 8 is a block diagram showing a configuration of the information processing apparatus shown in FIG. In the following description, the symbols used in the first embodiment are used.
[0091]
As shown in FIG. 7, in the information processing apparatus, the display unit 204 including the LCD 6 serving as an output device can be opened and closed by a hinge unit 203 at the rear side end of the main body 201 including the keyboard 202 serving as an input device. It is a portable personal computer that is supported.
[0092]
A schematic configuration of the information processing apparatus of the present invention will be described with reference to FIG. As shown in FIG. 8, the main body 201 includes an HDD unit 208 as a storage device in addition to the keyboard 202 described above. In addition to the LCD 6 described above, the display unit 204 incorporates a polymer secondary battery unit 207 which is a built-in power source of the information processing apparatus. The main body 201 is provided with a system controller 8 that controls the LCD 6, the HDD unit 208, the charging / discharging control of the polymer secondary battery unit 207, and the operation control of the entire information processing apparatus. A program executed by the information processing apparatus is recorded in at least one of the HDD unit 208 and a memory provided in the system controller 8. Control of each device by the system controller 8 is performed based on a program recorded in the HDD unit 208 or memory.
[0093]
The information processing apparatus can also be operated by supplying power from the AC adapter 210. That is, the information processing apparatus of the present invention can use two types of power supplies, that is, the AC adapter 210 and the polymer secondary battery unit 207. The power supply to each device is performed via the system controller 8 as shown by a thick line in FIG.
[0094]
In the system controller 8, when the AC adapter 210 is connected, the power supply from the polymer secondary battery unit 207 is cut off to use the power from the AC adapter 210, and only when the AC adapter 210 is not connected. The power supply line is controlled so that the power from the polymer secondary battery unit 207 is used. In addition, the system controller 8 uses the power from the AC adapter 210 to charge the polymer secondary battery unit 207.
[0095]
Hereinafter, the polymer secondary battery unit 207 will be described in detail.
[0096]
As described above, the information processing apparatus of the present invention incorporates the polymer secondary battery unit 207, and can operate with the polymer secondary battery. The polymer secondary battery unit 207 is installed on the back surface of the LCD 6 inside the display unit 204.
[0097]
Here, the internal structure of the display unit 204 will be described with reference to FIG. FIG. 9 is a diagram showing the display unit of the information processing apparatus shown in FIG. 7 with the cover cut so that the internal structure can be seen. The LCD 6 is provided inside a housing constituted by the front cover 242 and the rear cover 241. The front cover 242 has an opening for the LCD 6, and the LCD 6 is installed with its display surface facing the front cover 242. A metal panel pressing frame 243 is fixed to the back surface (the surface opposite to the display surface) of the LCD 6 with a double-sided tape. The LCD 6 is fixed in the display unit 204 by screwing to the display unit 204. The polymer secondary battery unit 207 is disposed in a space between the rear cover 241 and the panel pressing frame 243.
[0098]
In this way, by fixing the LCD 6 to the rear cover 241 via the panel holding frame 243, the space necessary for arranging the polymer secondary battery unit 207 is secured, and the polymer secondary battery unit 207 is covered by the rear cover. 241 can be securely fixed. Further, since the panel pressing frame 243 is interposed between the rear cover 241 and the LCD 6, even when an impact is applied to the rear cover 241 when the display unit 204 is closed, the panel pressing frame 243 is a kind. It is possible to prevent a shock from acting directly on the LCD 6. The damper effect by the panel pressing frame 243 is more effectively exhibited by fixing the panel pressing frame 243 and the LCD 6 and fixing the panel pressing frame 243 to the rear cover 242 at different positions.
[0099]
Next, the configuration of the polymer secondary battery unit 207 will be described with reference to FIG. FIG. 10 is a plan view showing the configuration of the polymer secondary battery unit shown in FIG. As shown in FIG. 10, the polymer secondary battery unit 207 includes 12 battery cells 245 and a polymer secondary battery control circuit board 246 connected to these battery cells 245 by wiring 247. The state of the battery cell 245 is monitored on the polymer secondary battery control circuit board 246, and the charging of the battery cell 245 is performed according to a command from the system controller 8 (see FIG. 8) based on the monitoring result or the state of the battery cell 245 itself. A secondary battery control circuit for controlling discharge and the like is provided. As the battery cell 245, a thin battery, for example, a battery cell of a type generally used as a battery for mobile phones at present is used. This type of battery cell generally has a thickness of 5 mm or less.
[0100]
The twelve battery cells 245 are arranged in a matrix of 4 rows × 3 columns, and four arranged in the same column are connected in parallel by a wiring 247, and further four are connected in parallel 3 Two sets are connected in series by wiring (not shown) formed on the polymer secondary battery control circuit board 246. Thus, by arranging a plurality of battery cells 245 in a matrix, the area on the back side of the LCD 6 can be effectively utilized. Further, by connecting the battery cells 245 arranged in matrix in a combination of parallel connection and series connection, the voltage required for the operation of each device of the information processing apparatus is minimized while minimizing the thickness of the battery cell 245. And a capacity capable of operating for a long time can be secured. Further, in order to simplify the wiring structure between each battery cell 245 and the polymer secondary battery control circuit board 246, each battery cell 245 is arranged so that all the external terminals face the same direction.
[0101]
Each battery cell 245 and polymer secondary battery control circuit board 246 are installed on the base plate 248 with at least one battery cell 245 exposed. Therefore, as shown in FIG. 9, in order to prevent a short circuit between the polymer secondary battery unit 207 and the LCD 6 or the panel pressing frame 243, the gap between the polymer secondary battery unit 207 and the panel pressing frame 243 can be prevented. Insulating sheet 244 is interposed. Thus, by installing each battery cell 245 in an exposed state, various elements for packaging the battery cell 245 become unnecessary, and accordingly, the display unit 204 and the information processing apparatus are made thinner and lighter accordingly. Can be achieved. Even if the insulating sheet 244 is interposed, the thickness is almost negligible. As described above, the LCD 6 is a reflective display panel and does not require a backlight. This is also advantageous for making the display unit 204 thinner and lighter.
[0102]
Incidentally, as described above, the polymer secondary battery unit 207 has the polymer secondary battery control circuit board 246. This board is a printed circuit board, and the polymer secondary battery control circuit is provided on this board. Various electric parts and electronic parts to be configured are mounted. Therefore, the polymer secondary battery control circuit board 246 has a certain thickness depending on the thickness of the printed circuit board itself and the height of the mounted components.
[0103]
The LCD 6 is also provided with a display panel driving circuit for driving each pixel in accordance with a signal from the system controller 8 (see FIG. 8). Like the polymer secondary battery control circuit, this drive circuit is also configured by mounting various electrical and electronic components on a printed circuit board, and the display panel drive circuit board on which this drive circuit is formed is also configured. Including the thickness of the printed circuit board itself and the height of the mounted component, it has a certain thickness.
[0104]
Therefore, as shown in FIG. 11, the polymer secondary battery control circuit board 246 and the display panel drive circuit board 205a are arranged at positions that do not overlap each other in the thickness direction of the display unit 204, so that the By increasing the secondary battery unit 207, an increase in the thickness of the display unit 204 can be minimized. In FIG. 11, in order to facilitate understanding of the positional relationship between the display panel drive circuit board 205a and the polymer secondary battery control circuit board 246, the two are indicated by diagonal lines having different directions.
[0105]
The charge / discharge control by the secondary battery control circuit will be briefly described. In the secondary battery control circuit, the voltage of the entire battery cell is checked at regular time intervals, and the voltage is substantially equal to each device of the information processing apparatus except for the operation during the hibernation process of the information processing apparatus. If it is not less than the end voltage, which is a voltage that cannot be operated, no particular processing is performed. If the voltage of the entire battery cell is equal to or lower than the end voltage, a signal indicating that there is no remaining battery is communicated to the system controller 8 of the main body 201. The system controller 8 executes hibernation processing based on this signal.
[0106]
Here, in order to use the power of the polymer secondary battery more efficiently, a capacitor may be provided in the secondary battery control circuit, and the power for hibernation processing may be stored in the capacitor in advance.
[0107]
【The invention's effect】
As described above, in the present invention, when the afterimage processing means performs a normal power-off sequence, the main body power supply of the main body is not turned off until afterimage processing is performed. On the other hand, when the power is turned off abnormally, such as when the power is turned off, the delay unit delays the power supply for the main unit from being turned off, and afterimage processing is performed during the delay. For this reason, in either case of normal power off or unusual power off, afterimage processing is always performed before the main unit power is turned off, so that an afterimage appears on the screen of the liquid crystal display panel after the power is turned off. Therefore, the quality of the display screen can be improved without giving the user anxiety.
[0108]
In addition, the information processing apparatus according to the present invention does not require a circuit for generating a control signal for preventing the afterimage of the liquid crystal display panel from being recognized and / or an internal power supply, so that the design is not complicated and the structure is simple. Therefore, the cost can be reduced.
[Brief description of the drawings]
FIG. 1 is a control block diagram of a liquid crystal display panel of an information processing apparatus according to a first embodiment of the present invention when the power is turned off.
FIG. 2 is a timing chart at the time of normal power-off by the control block shown in FIG. 1;
FIG. 3 is a timing chart when the power is abnormally turned off by the control block shown in FIG. 1;
FIG. 4 is a control block diagram when the power of the liquid crystal display panel of the information processing apparatus according to the second embodiment of the present invention is turned off.
FIG. 5 is a timing chart at the time of normal power-off by the control block shown in FIG. 4;
FIG. 6 is a timing chart when the power is abnormally turned off by the control block shown in FIG. 4;
FIG. 7 is a perspective view showing an appearance of an example of an information processing apparatus of the present invention.
8 is a block diagram showing a configuration of the information processing apparatus shown in FIG.
9 is a diagram showing the display unit of the information processing apparatus shown in FIG. 7 with a cover cut so that an internal structure can be seen.
10 is a plan view showing the configuration of the polymer secondary battery unit shown in FIG. 9. FIG.
11 is a diagram showing a positional relationship between a polymer secondary battery control circuit board and a display panel control circuit board in a display unit of the information processing apparatus shown in FIG. 7;
FIG. 12 is a timing chart when the power is turned off when the normal power is turned off in the conventional information processing apparatus.
FIG. 13 is a timing chart when the power is turned off in a case where the power is turned off abnormally in the conventional information processing apparatus.
[Explanation of symbols]
1, 101 Clock generator
2,102 Control unit
3, 103 Counter section
4, 104 Tr (transistor)
5, 105 VGA
6, 106 LCD
7, 107 AND circuit
8, 108 System controller
9 White writing circuit
10, 110 LCD power supply
111 Switch part
112 Pullup circuit
201 body
202 keyboard
203 Hinge
204 display
205a Display panel drive circuit board
206 battery pack
207 Polymer secondary battery unit
208 HDD unit
210 AC adapter
241 Rear cover
242 Front cover
243 Panel holding plate
244 Insulation sheet
245 battery cell
246 Polymer secondary battery control circuit board
247 Wiring

Claims (12)

A display unit including a liquid crystal display panel for displaying an image based on an image signal from an image display circuit;
A system control unit that outputs a panel power-off signal for turning off the power supply for the panel of the liquid crystal display panel, and a main-unit power-off signal for turning off the power supply for the main-body unit of the main-body unit, included in the main-body unit; ,
A delay unit that delays the main unit power-off signal from the system control unit and outputs it as a delayed power-off signal;
After the system control unit outputs the panel power-off signal, the after-image processing for preventing the after-image after the panel power source of the liquid crystal display panel is turned off is executed. the first power-off processing section for power supply is prevented from being turned off, and, with the panel power supply, the case where the power supply main unit is turned off at the same time, or the system control unit to the panel power off signal output Then, when the main unit power is turned off before the afterimage processing is completed, the afterimage processing means performs the delay afterimage processing until the delay unit outputs the delayed power off signal. An afterimage processing unit having afterimage processing means for performing any of the second power-off processing for performing afterimage processing. The afterimage processing means holds the image signal output from the image display circuit while the afterimage processing is being performed when the first power-off processing is executed, and after the afterimage processing ends, The information processing apparatus according to claim 1 , wherein the panel power supply is turned off. After off of the panel power supply apparatus according to claim 1 or 2, power supply wherein the main body is turned off. The afterimage processing means includes an afterimage processing execution circuit that executes the afterimage processing, and an afterimage processing control circuit that outputs an operation signal for operating the afterimage processing execution circuit to the afterimage processing execution circuit. 3. The information processing apparatus according to 3 . The afterimage processing control circuit has a logic operation circuit to which a main body power-off signal output from the system control unit for turning off the main body power supply and a signal from the image display circuit are input. The information processing apparatus according to claim 4 , wherein at least one of the calculation results is input to the afterimage processing execution circuit as the operation signal. When the first power-off process is executed, the logical operation circuit performs the operation result when the main body power-off signal is at the first level and the signal from the image display circuit is at the second level. The information processing apparatus according to claim 5 , wherein the afterimage processing execution circuit is input as the operation signal. When the second power-off process is executed, the logical operation circuit outputs the operation result when the main body power-off signal is at one level and the signal from the image display circuit is at the other level. The information processing apparatus according to claim 5 , wherein the information processing apparatus inputs the afterimage processing execution circuit as an operation signal. The information processing apparatus according to claim 4 , wherein the afterimage processing means includes a switching circuit that switches between an output of the image display circuit and an output of the afterimage processing execution circuit. The afterimage processing control circuit has a logic operation circuit to which a main body power-off signal output from the system control unit for turning off the main body power supply and a signal from the image display circuit are input. The information processing apparatus according to claim 8 , wherein at least one of the calculation results is input to the switching circuit, and an output from the image display circuit is input as a switching signal for switching to an output from the afterimage processing execution circuit. When the first power-off process is executed, the logical operation circuit performs the operation result when the main body power-off signal is at the first level and the signal from the image display circuit is at the second level. the information processing apparatus according to claim 9 to be input to the switching circuit as the switching signal. When the second power-off process is executed, the logical operation circuit outputs the operation result when the main body power-off signal is at one level and the signal from the image display circuit is at the other level. The information processing apparatus according to claim 9 , wherein the information processing apparatus inputs the switching signal to the switching circuit. The afterimage processing execution circuit to any one of claims 4 to 11 write the power-off display color as the color of the liquid crystal display panel itself in a state in which power supply the panel is turned off in the liquid crystal display panel The information processing apparatus described.

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