JP3678156B2 - ESD protection circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an electrostatic protection circuit configured to allow invading static electricity to escape through a transistor.
[0002]
[Prior art]
As this type of electrostatic protection circuit, for example, the following (1) to (3) are known.
(1) Using transistor breakdown
This electrostatic protection circuit is disclosed as a prior art in, for example, Japanese Patent Laid-Open No. 9-167802. That is, as shown in FIG. 8, the drain and the source of the MOS transistor 4 are connected between the signal line 2 connected to the protected circuit 1 and the power supply line 3, and the gate and the source are short-circuited. It has become. When positive static electricity is applied to the signal line 2, the voltage causes breakdown between the drain and source of the MOS transistor 4, and a surge current due to static electricity flows from the signal line 2 to the power supply line 3. When negative static electricity is applied to the signal line 2, the parasitic diode 4 a is turned on by the voltage, and a surge current flows from the power supply line 3 to the signal line 2.
[0003]
(2) Using a diode
This electrostatic protection circuit is disclosed as a prior art in, for example, Japanese Patent Application Laid-Open No. 10-22461 and Japanese Patent Application Laid-Open No. 11-17121, and is similar thereto. For example, as shown in FIG. 9, the drains and sources of the MOS transistors 4 and 6 are connected between the signal line 2 and the power supply line 3 and between the power supply line 5 and the signal line 2, respectively. 6 is configured such that each gate and source are short-circuited. Parasitic diodes 4a and 6a are formed between the drain and source of MOS transistors 4 and 6, respectively. When positive static electricity exceeding the power supply voltage is applied to the signal line 2, the parasitic diode 6 a is turned on by the voltage, and a surge current flows from the signal line 2 to the power supply line 5. Further, when negative static electricity is applied to the signal line 2, the parasitic diode 4 a is turned on by the voltage, and a surge current flows from the power supply line 3 to the signal line 2.
[0004]
(3) Using thyristor configuration
This electrostatic protection circuit is disclosed in, for example, Japanese Patent Application Laid-Open No. 10-134888 and Japanese Patent Application Laid-Open No. 11-251574, and a similar one. For example, as shown in FIG. 10, transistors 7 and 8 are connected between the signal line 2 and the power supply line 3 so as to have a thyristor configuration, and Zener diodes 9a to 9d are connected as trigger means. When positive static electricity exceeding the Zener voltage is applied to the signal line 2, the transistors 7 and 8 are triggered, and a surge current due to static electricity flows from the signal line 2 to the power supply line 3. When negative static electricity is applied to the signal line 2, the signal line 2 is connected from the power supply line 3 to the signal line 2 via the resistor 10, the collector-base of the transistor 7 (or the base-collector of the transistor 8), and the resistor 11. Surge current flows through
[0005]
[Problems to be solved by the invention]
In the electrostatic protection circuit of (1) to (3) described above, when negative static electricity is applied to the signal line 2, the voltage reaches -VF (VF is the forward voltage of the pn junction: about 0.7 V). When the voltage drops, an energization path from the power supply line 3 to the signal line 2 is formed via the diode 4a or the transistors 7 and 8. As a result, the voltage of the signal line 2 is prevented from being lower than the protection voltage −VF against the invasion of negative static electricity, and the function is fulfilled only from the viewpoint of protection against static electricity.
[0006]
Here, when the negative withstand voltage of the protected circuit 1 itself is only about -VF, it goes without saying that the electrostatic protection circuit is necessary. However, when the withstand voltage of the protected circuit 1 itself is higher (in the negative direction) than -VF, an energization path from the power supply line 3 to the signal line 2 is formed with a low voltage of -VF (-0.7 V). In some cases, it is not preferable.
[0007]
For example, in the configuration shown in FIG. 11 in which communication is performed between a driver circuit and a receiver circuit that are installed apart from each other in an automobile, the receiver circuit 13 may receive erroneous data. That is, in the normal operation, when the transistor 14 of the driver circuit 12 is turned on / off, the base current is supplied / cut off to the transistor 15 of the receiver circuit 13 via the signal line 2 and the power supply line 3, and the receiver circuit 13 Data is received according to the ON / OFF state of the transistor 15.
[0008]
However, if the potential difference between the driver circuit 12 and the receiver circuit 13 exceeds −VF due to common mode noise or the like, the energization path from the power supply line 3 to the signal line 2 in any of the electrostatic protection circuits 16 shown in FIGS. Is formed, and a current flows through a closed circuit including the power supply line 3, the electrostatic protection circuit 16, the signal line 2, and the transistor 15. Since the current due to the sneak current becomes the base current of the transistor 15, the transistor 15 that is supposed to be turned off may be turned on by mistake.
Although the negative protection voltage has been described here, in the case of the electrostatic protection circuit shown in the above (2), there is a possibility that the same problem may occur with respect to the positive protection voltage.
[0009]
Accordingly, an object of the present invention is to provide an electrostatic protection circuit capable of arbitrarily setting a protection voltage in both positive and negative directions while coordinating with the withstand voltage of the circuit to be protected.
[0010]
[Means for Solving the Problems]
According to the means described in claim 1, between the signal lines, the energization path (hereinafter referred to as the first energization path) through the second one-way energization circuit and the first transistor, the first An energization path (hereinafter referred to as a second energization path) through the one-way energization circuit and the second transistor is formed. These two energization paths are opposite to each other, and the circuit operation related to each energization path is symmetric.
[0011]
Accordingly, the first energization path will be described. When a voltage in the energizable direction of the second one-way energization circuit is applied between the signal lines, the applied voltage is the second main terminal of the first transistor. Applied between (corresponding to drain or collector) and first main terminal (corresponding to source or emitter) and connected between its second main terminal and control terminal (corresponding to gate or base) Applied to the first control voltage supply circuit. At this time, the second energization path is cut off by the first one-way energization circuit.
[0012]
  Voltage applied to the first control voltage supply circuitThe rate of change is less than the first reference valueCase, that is, between signal linesNormal signal voltage is applied toIn this case, the first control voltage supply circuit is in a non-energized state, and the potential of the control terminal of the first transistor becomes equal to the potential of the first main terminal by the first control voltage discharging circuit. Accordingly, the first transistor is turned off, and the first energization path is cut off.
[0013]
  On the other hand, the voltage applied to the first control voltage supply circuitChange rate is the first reference valueHigher than that, ie between signal linesStatic electricity with a steep voltage change that is not included in the normal signal voltageIn this case, the first control voltage supply circuit is energized, and a voltage is applied to the control terminal of the first transistor via the first control voltage supply circuit. As a result, the first transistor is turned on, a surge current due to static electricity flows through the first energization path, and between the signal lines.SteepVoltage rise is suppressed.
[0014]
  More specifically, when the voltage applied to the first control voltage supply circuit suddenly rises, a capacitance component that exists parasitically between the second main terminal and the control terminal of the third transistor is interposed. Thus, a current flows through an impedance circuit connected between the control terminal and the first main terminal. As a result, the third transistor is turned on, and a voltage is applied to the control terminal of the first transistor. As a result, the first transistor is turned on, a surge current due to static electricity flows through the first energization path, and a steep voltage rise between the signal lines is suppressed. The operation of the fourth transistor is similar to this. Since this means is a circuit using the third and fourth transistors and a parasitic capacitance component formed therein, it is suitable for IC integration, and the chip occupation area when IC integration is small is also small. That's it.
[0015]
  This electrostatic protection circuit has a symmetrical structure when viewed from the two signal lines, and the first and second reference values are larger than the maximum voltage change rate of the signal applied between the signal lines, and If the voltage change rate is set to be smaller than the voltage change rate due to static electricity, and the voltage change rate is differentiated from the normal signal voltage and static voltage, malfunctions may occur in the protected circuit. A preferable electrostatic protection operation that does not occur is possible. In addition, since the electrostatic protection circuit operates in response to a voltage change between the signal lines, a reliable protection operation without any operation delay is possible.
[0016]
  Claim2According to the means described inIn addition to the above-described operation, when the voltage applied to the first control voltage supply circuit is higher than the first reference voltage, that is, when the voltage between the signal lines exceeds the protection voltage, the first control voltage supply The circuit is energized, and a voltage is applied to the control terminal of the first transistor via the first control voltage supply circuit. As a result, the first transistor is turned on, a surge current due to static electricity flows through the first energization path, and the voltage rise between the signal lines is suppressed. Therefore, according to the present means, reliable protection without delay in operation can be achieved depending on both conditions of the magnitude of electrostatic voltage and the rate of change.
[0022]
  Claim3According to the means described in (4), impedance changes via a capacitive component that exists parasitically between the second main terminal and the control terminal of the third transistor due to a change in the normal signal voltage applied between the signal lines. Even when a current flows through the circuit, the third transistor maintains the off state. The same operation is performed for the fourth transistor. Therefore, the static electricity protection circuit shifts to the protection operation only when static electricity (generally having a steep voltage change) enters between the signal lines, and the protection operation can be performed reliably and without malfunction.
[0023]
  Claim4According to the means described in the above, due to a change in the normal signal voltage applied between the signal lines, the first component is passed through the capacitive component that exists parasitically between the second main terminal and the control terminal of the first transistor. Even when a current flows through the impedance circuit of the first control voltage discharge circuit, the first transistor maintains the off state. The same operation is performed for the second transistor. Therefore, the static electricity protection circuit shifts to the protection operation only when static electricity enters between the signal lines, and the protection operation can be performed reliably and without malfunction.
[0024]
  Claim5According to the means described in claim 1, the impedance circuit is constituted by a resistor,6According to the means described in the above, the first and second one-way energization circuits are constituted by a diode formed parasitic to the first and second transistors or a diode formed as a separate element. Is simplified as much as possible.
[0025]
  Claim7In the first and second control voltage discharge circuits, since the clamp circuit is connected in parallel with the impedance circuit, when the first or second control voltage supply circuit is turned on, It is possible to prevent an excessive voltage from being applied between the control terminal of the first or second transistor and the first main terminal.
[0026]
  Claim8As described above, in the electrostatic protection circuit of the present invention, the first and second transistors can be either MOS transistors or bipolar transistors (including IGBTs).
[0027]
DETAILED DESCRIPTION OF THE INVENTION
  (First embodiment)
  Part of the configuration of the third embodiment according to the present invention to be described later is extracted.A first embodiment will be described with reference to FIG. 1 showing an electrical configuration of an electrostatic protection circuit.
  In FIG. 1, an electrostatic protection circuit 22 and a protected circuit 23 are formed in an IC 21 used for a control device of an in-vehicle device. The terminals 24 and 25 of the IC 21 are connected to the protected circuit 23 via signal lines 26 and 27, respectively, and a control signal having a predetermined voltage level is input to the terminals 24 and 25 from the outside of the IC 21. It is like that. The signal line 27 is a ground line, and is connected to the negative terminal of the in-vehicle battery via a power supply terminal (not shown).
[0028]
An electrostatic protection circuit 22 having the following configuration is connected between the signal lines 26 and 27. That is, between the signal lines 26 and 27, MOS transistors 28 and 29 of the same conductivity type (here, N-channel type) are connected in series so that their energization directions are opposite to each other. That is, the drains of the MOS transistors 28 and 29 are connected to each other at the node n1, and the sources of the MOS transistors 28 and 29 are connected to the signal lines 26 and 27, respectively. Between the drains and sources of the MOS transistors 28 and 29, parasitic diodes 28a and 29a each having a drain side as a cathode are formed.
[0029]
Here, the MOS transistors 28 and 29 correspond to the second and first transistors in the present invention, and the diodes 28a and 29a correspond to the second and first one-way energization circuits. The source, drain, and gate terminals of the MOS transistors 28 and 29 correspond to a first main terminal, a second main terminal, and a control terminal, respectively.
[0030]
A resistor 30 (second control voltage discharge circuit, corresponding to an impedance circuit) is connected between the gate and source of the MOS transistor 28, and a resistor 31 (first control voltage discharge circuit) is connected between the gate and source of the MOS transistor 29. , Equivalent to an impedance circuit). Further, a constant voltage circuit 36 (corresponding to a second control voltage supply circuit) comprising a diode 32, zener diodes 33, 34 and a resistor 35 of the illustrated polarity is connected between the drain and gate of the MOS transistor 28, and the MOS transistor 29 A constant voltage circuit 41 (corresponding to a first control voltage supply circuit) including a diode 37, zener diodes 38 and 39 and a resistor 40 having the polarities shown in the figure is connected between the drain and gate. Thus, the electrostatic protection circuit 22 has a symmetrical configuration with respect to the signal lines 26 and 27.
[0031]
Next, the operation of the electrostatic protection circuit 22 will be described.
The electrostatic protection circuit 22 is connected to the first signal line 26 from the signal line 26 to the signal line 27 via the diode 28a and the MOS transistor 29 in accordance with the voltage between the signal lines 26 and 27 (hereinafter referred to as the input voltage Vin). And a second energization path from the signal line 27 to the signal line 26 through the diode 29a and the MOS transistor 28 are formed. Since the MOS transistors 28 and 29 are connected in series so that the energization directions are opposite to each other, an energization path through the MOS transistors 28 and 29 and an energization path through the diodes 28a and 29a are not formed.
[0032]
When there is no entry of static electricity into the IC 21 and only a control signal is input between the terminals 24 and 25, the first and second energization paths are both cut off, and the electrostatic protection circuit 22 The signal lines 26 and 27 are electrically disconnected from each other. Therefore, the input voltage Vin, which is a control signal, is input to the protected circuit 23 as it is without being affected by the connection of the electrostatic protection circuit 22.
[0033]
On the other hand, when static electricity enters the IC 21, one of the first and second energization paths is energized. Therefore, the operation of the electrostatic protection circuit 22 when positive static electricity enters and the input voltage Vin rises above a predetermined voltage level of the control signal will be specifically described. In the following description, VF means the forward voltage of the diode.
[0034]
When the input voltage Vin is positive, the diode 28a is forward biased and turned on, and the voltage of (Vin−VF) is applied between the drain and source of the MOS transistor 29 and the constant voltage circuit 41. The constant voltage circuit 41 is energized when a voltage exceeding the reference voltage Vr1 (corresponding to the first reference voltage) determined by (2.Vz1 + VF) is applied, assuming that the zener voltages of the zener diodes 38 and 39 are both Vz1. It becomes a state and performs constant voltage operation.
[0035]
When the input voltage Vin exceeds the reference voltage Vr1 due to the entry of static electricity, the constant voltage circuit 41 is energized and a voltage drop occurs in the resistor 31. When the voltage across the resistor 31 exceeds the threshold voltage VTH of the MOS transistor 29, the MOS transistor 29 is turned on, and a surge current due to static electricity flows through the first energization path. If the resistance values of the resistors R31 and R40 are R31 and R40, respectively, the threshold voltage Vc1 (protection voltage) of the input voltage Vin at which the MOS transistor 29 is turned on is expressed by the following equation (1).
Vc1 = (R31 + R40) / R31 · VTH + 2 · Vz1 + 2 · VF (1)
[0036]
The threshold voltage Vc1 is set higher than the voltage level of the control signal and set lower than the withstand voltage of the protected circuit 23. Further, when the IC 21 is connected to another IC (not shown) used for the control device of the in-vehicle device, a potential difference may be generated between the two ICs due to common mode noise or the like. Therefore, in such a case, the threshold voltage Vc1 is set higher than the potential difference above the voltage level of the control signal so that the electrostatic protection circuit 22 does not shift to the protection operation due to the potential difference.
[0037]
According to such setting of the threshold voltage Vc1 (reference voltage Vr1), when only the control signal is inputted as the input voltage Vin, the constant voltage circuit 41 is cut off and the voltage across the resistor 31 (that is, the MOS transistor). Since the voltage between the gate and the source of the transistor 29 becomes 0, the MOS transistor 29 is kept off. Further, when the input voltage Vin exceeds the threshold voltage Vc1 due to the entry of static electricity, the MOS transistor 29 is turned on, and a surge current due to static electricity flows through the first energization path. Thereby, an increase in the input voltage Vin due to static electricity is suppressed. In this case, since the diode 29a and the diode 32 of the constant voltage circuit 36 are both reverse-biased, the second energization path composed of the diode 29a and the MOS transistor 28 is cut off.
[0038]
By the way, since the capacitance Cdg exists between the drain and gate of the MOS transistor 29, if the voltage change rate of the input voltage is large, a current flows through the resistor 31 via the capacitance Cdg, and the MOS transistor 29 is turned on. There is a fear. The current ic is Cdg · dVdg / dt when (Vin−VF) is replaced with Vdg, and the MOS transistor 29 is turned on under the condition of ic · R31 ≧ VTH. Therefore, the resistance value R31 of the resistor 31 is determined so as to satisfy the condition of the following equation (2), where ΔVin / Δt is the maximum positive voltage change rate of the control signal.
Cdg · ΔVin / Δt · R31 <VTH (2)
[0039]
On the other hand, when negative static electricity enters the IC 21 and the input voltage Vin becomes a negative voltage, the second energization path is energized in the same manner as described above, and the signal line 27 to 26 is surged. A current flows, and an increase in the input voltage Vin in the negative direction is suppressed. In this case, the reference voltage Vr2 (corresponding to the second reference voltage) of the constant voltage circuit 36 is determined by-(2 · Vz2 + VF) if the Zener voltages of the Zener diodes 33 and 34 are both Vz2. If the resistance values of the resistors R30 and R35 are R30 and R35, respectively, the threshold voltage Vc2 (protection voltage) of the input voltage Vin at which the MOS transistor 28 is turned on is expressed by the following equation (3). Become.
Vc2 =-((R30 + R35) /R30.VTH+2.Vz2+2.VF) (3)
[0040]
This threshold voltage Vc2 is set lower than the withstand voltage of the protected circuit 23 in absolute value. Further, when the IC 21 is connected to the other ICs described above, it is set higher (in absolute value) than the potential difference generated between the two ICs due to common mode noise or the like.
[0041]
The resistance value R30 of the resistor 30 is determined so as to satisfy the condition of the following equation (4), where ΔVin / Δt is the absolute value of the maximum voltage change rate in the negative direction of the control signal.
Cdg · ΔVin / Δt · R30 <VTH (4)
[0042]
As described above, the electrostatic protection circuit 22 of the present embodiment has a symmetric configuration when viewed from the two signal lines 26 and 27, and the reference voltages Vr1 and Vr2 of the constant voltage circuits 41 and 36 are set. It is possible to set arbitrary protection voltages (threshold voltages Vc1 and Vc2) against positive and negative static electricity entering between the signal lines 26 and 27 by setting them to arbitrary voltage values, respectively. Become. Therefore, according to the electrostatic protection circuit 22, it is possible to set a preferable protection voltage that does not cause a malfunction in the protected circuit 23 while coordinating with the withstand voltage of the protected circuit 23 for both positive and negative voltages. . Thereby, for example, even when a potential difference due to common mode noise or the like occurs between the signal lines 26 and 27, the occurrence of the potential difference can prevent the first or second energization path from being energized. .
[0043]
  (Second Embodiment)
  Next, the present inventionIsThe second embodiment will be described with reference to FIG. 2 showing the electrical configuration of the electrostatic protection circuit.
  In FIG. 2, an electrostatic protection circuit 43 is formed between signal lines 26 and 27 in the IC 42. Here, the MOS transistors 28 and 29 and the resistors 30 and 31 have the same configuration as the electrostatic protection circuit 22 described above.
[0044]
Between the drain and gate of the MOS transistor 28, a diode 44 of the polarity shown and the collector-emitter of an NPN transistor 45 (corresponding to the fourth transistor) are connected in series. A resistor 46 (corresponding to an impedance circuit) is connected between them. A parasitic capacitor 45 a (shown by a broken line) is formed between the collector and base of the transistor 45. The high-speed pulse passing circuit 47 composed of the diode 44, the transistor 45, and the resistor 46 corresponds to the second control voltage supply circuit referred to in the present invention.
[0045]
Similarly, between the drain and gate of the MOS transistor 29, a diode 48 of the illustrated polarity and the collector and emitter of an NPN transistor 49 (corresponding to a third transistor) are connected in series. A resistor 50 (corresponding to an impedance circuit) is connected between the base and the emitter. A parasitic capacitor 49 a is formed between the collector and base of the transistor 49. The high-speed pulse passing circuit 51 including the diode 48, the transistor 49, and the resistor 50 corresponds to the first control voltage supply circuit referred to in the present invention.
[0046]
Next, the operation of the electrostatic protection circuit 43 will be described.
When positive static electricity enters the IC 42 and the input voltage Vin suddenly increases in the positive direction, a current id flows from the power supply line 26 through the diode 28a, the diode 48, the parasitic capacitor 49a, and the resistor 50. The current id increases as the rate of change of the input voltage Vin increases. When the product of the current id and the resistance value R50 of the resistor 50 reaches VF, the transistor 49 is turned on. As a result, a voltage is applied to the gate of the MOS transistor 29 via the high-speed pulse passing circuit 51. When the gate voltage exceeds the threshold voltage VTH, the MOS transistor 29 is turned on. When the MOS transistor 29 is turned on, a surge current due to static electricity flows through the first energization path, and an increase in the input voltage Vin due to static electricity is suppressed.
[0047]
Generally, a voltage due to static electricity has a steep change characteristic as compared with a voltage of a normal control signal. Therefore, the resistance value R50 is determined so that the transistor 49 is turned on at a reference value (corresponding to the first reference value) that is larger than the maximum voltage change rate of the control signal and smaller than the voltage change rate due to static electricity. Has been.
[0048]
On the other hand, when negative static electricity enters the IC 42 and the input voltage Vin suddenly decreases in the negative direction, the same operation is performed. When the MOS transistor 28 is turned on, a surge current due to static electricity flows through the second energization path. And the fall of the input voltage Vin by static electricity is suppressed. Further, the resistance is set so that the transistor 45 is turned on at a reference value (corresponding to the second reference value) that is larger in absolute value than the maximum voltage change rate of the control signal and smaller than the voltage change rate due to static electricity. A resistance value R46 of 46 is determined.
[0049]
As described above, the electrostatic protection circuit 43 according to the present embodiment has a symmetric configuration when viewed from the two signal lines 26 and 27, and the reference values of the high-speed pulse passing circuits 51 and 47 are arbitrarily set. By setting the value, any protection level can be set for the voltage change rate of the positive or negative static electricity entering between the signal lines 26 and 27. Therefore, according to the electrostatic protection circuit 43, the normal signal voltage and the electrostatic voltage can be differentiated with respect to the voltage change rate while coordinating with the breakdown voltage of the protected circuit 23. Thus, it is possible to perform a preferable electrostatic protection operation that does not cause malfunction. Further, since the electrostatic protection circuit 43 operates in response to a voltage change between the signal lines 26 and 27, a reliable protection operation without any operation delay is possible.
[0050]
  (Third embodiment)
  Next, the present inventionIsThe third embodiment will be described with reference to FIG. 3 showing the electrical configuration of the electrostatic protection circuit.
  In FIG. 3, between the signal lines 26 and 27 in the IC 52, electrostatic protection having a circuit configuration in which the above-described electrostatic protection circuit 22 (see FIG. 1) and the electrostatic protection circuit 43 (see FIG. 2) are combined. A circuit 53 is formed. Also, Zener diodes 54 and 55 (corresponding to a clamp circuit) are connected in parallel to the resistors 30 and 31, respectively.
[0051]
Here, the discharge circuit 56 composed of the resistor 30 and the Zener diode 54 and the discharge circuit 57 composed of the resistor 31 and the Zener diode 55 correspond to the second and first control voltage discharge circuits, respectively. A supply circuit 58 composed of a parallel circuit of the constant voltage circuit 36 and the high-speed pulse passage circuit 47 and a supply circuit 59 composed of a parallel circuit of the constant voltage circuit 41 and the high-speed pulse passage circuit 51 are respectively provided in the second and first circuits. This corresponds to a control voltage supply circuit.
[0052]
According to the electrostatic protection circuit 53, when the absolute value of the input voltage Vin is higher than the threshold voltage Vc1 or Vc2, or when the absolute value of the voltage change rate of the input voltage Vin is larger than a predetermined reference value, The MOS transistor 29 or 28 is turned on, and a surge current due to static electricity flows through the first or second energization path. Therefore, according to the present embodiment, the effects described in the first and second embodiments can be obtained. In addition, since the Zener diodes 54 and 55 are added, it is possible to prevent an excessive voltage from being applied between the gate and source of the MOS transistors 28 and 29, and to reliably protect the MOS transistors 28 and 29 from intrusion of static electricity. can do.
[0053]
  (Fourth embodiment)
  Next, the present inventionIsThe fourth embodiment will be described with reference to FIG. 4 showing the electrical configuration of the electrostatic protection circuit. 4, the same components as those in FIG. 3 showing the electrostatic protection circuit 53 are denoted by the same reference numerals.
[0054]
Between the signal lines 26 and 27 in the IC 60, MOS transistors 29 and 28 are connected in series so that their energization directions are opposite to each other. However, unlike the electrostatic protection circuit 53, the sources of the MOS transistors 29 and 28 are connected to each other at the node n1, and the drains of the MOS transistors 29 and 28 are connected to the signal lines 26 and 27, respectively. A discharge circuit 57 is connected between the gate and source of the MOS transistor 29, and a supply circuit 59 is connected between the drain and gate of the MOS transistor 29. A discharge circuit 56 is connected between the gate and source of the MOS transistor 28, and a supply circuit 58 is connected between the drain and gate of the MOS transistor 28.
[0055]
The electrostatic protection circuit 61 has a first energization path from the signal line 26 to the signal line 27 via the MOS transistor 29 and the diode 28a in accordance with the voltage (input voltage Vin) between the signal lines 26 and 27. And a second energization path from the signal line 27 to the signal line 26 through the MOS transistor 28 and the diode 29a. When positive static electricity enters the IC 60 and the input voltage Vin increases, the input voltage Vin is higher than the threshold voltage Vc1 or the voltage change rate of the input voltage Vin is larger than a predetermined reference value. , The MOS transistor 29 is turned on, and a surge current due to static electricity flows through the first energization path. On the other hand, when negative static electricity enters the IC 60 and the input voltage Vin decreases, a surge current flows through the second energization path under the same voltage condition. Thus, since the electrostatic protection circuit 61 performs the same operation as that of the electrostatic protection circuit 53, the present embodiment can provide the same effects as those of the third embodiment.
[0056]
(Fifth embodiment)
Next, a fifth embodiment in which the electrostatic protection circuit 61 described in the fourth embodiment is applied to an IC including a communication driver circuit will be described with reference to FIG. The IC 62 shown in FIG. 5 is used in, for example, an in-vehicle LAN, and its output terminals 63 and 64 are connected to input terminals of other ICs (not shown) having a communication receiver circuit via communication lines. Yes. Further, the power terminals 65 and 66 of the IC 62 are connected to a positive terminal and a negative terminal of an in-vehicle battery (not shown), respectively.
[0057]
A communication driver circuit 67 serving as a protected circuit is formed in the IC 62, and its output nodes n2 and n3 are connected to the output terminals 63 and 64 via signal lines 68 and 69, respectively. The communication driver circuit 67 is supplied with power from power lines 70 and 71 connected to power terminals 65 and 66. An electrostatic protection circuit 61 is connected between the signal line 68 and the power supply line 71, and between the signal line 69 and the power supply line 71, respectively.
[0058]
In the communication driver circuit 67, a P-channel MOS transistor 72, a diode 73, resistors 74, 75, 76, 77, a diode 78 and an N-channel MOS transistor 79 are connected in series between the power supply lines 70 and 71. It is connected. Parasitic diodes 72a and 79a are formed between the drain and source of the MOS transistors 72 and 79, respectively. The gate control circuit 80 is a drive control circuit for simultaneously turning on or off the MOS transistors 72 and 79 in accordance with communication data. The reference power supply circuit 81 and the operational amplifier 82 constituting the voltage follower are resistors 75 and 76. The common connection point n4 is held at a constant voltage Va.
[0059]
The communication driver circuit 67 outputs a predetermined voltage between the signal lines 68 and 69 (between the output terminals 63 and 64) when the MOS transistors 72 and 79 are turned on. In this case, the voltages of the signal lines 68 and 69 themselves change symmetrically with respect to the voltage Va. Further, the communication driver circuit 67 sets the voltage between the signal lines 68 and 69 (between the output terminals 63 and 64) to 0 by turning off the MOS transistors 72 and 79. In this case, the voltage of the signal lines 68 and 69 itself is the voltage Va.
[0060]
Since the communication line constituting the in-vehicle LAN is disposed in the vehicle, static electricity easily enters the communication line, and the static electricity may enter the IC 62 from the terminals 63 and 64 and may be applied to the communication driver circuit 67. There is. However, since the electrostatic protection circuit 61 is connected between the signal line 68 and the power supply line 71 and between the signal line 69 and the power supply line 71 in the IC 62 of this embodiment, even if static electricity enters the IC 62. However, the static electricity escapes from the signal lines 68 and 69 to the power supply line 71 via the electrostatic protection circuit 61. Further, since the electrostatic protection circuit 61 can shift to the protection operation at a high speed in response to a voltage change, it is possible to reliably protect against the invasion of static electricity having a steep voltage change.
[0061]
Furthermore, since the protection voltage of the electrostatic protection circuit 61 can be arbitrarily set, even if a potential difference is generated between the IC 62 and another IC having a communication receiver circuit, the electrostatic protection circuit may depend on the potential difference. It can be set so that 61 does not shift to the protection operation. Thereby, it is possible to prevent the occurrence of a communication error when there is no intrusion of static electricity as much as possible.
[0062]
  (Sixth embodiment)
  next,A part of the configuration of the third embodiment according to the present invention described above is extracted and modified.The sixth embodiment will be described with reference to FIG. 6 showing the electrical configuration of the electrostatic protection circuit.
  In FIG. 6, the electrostatic protection circuit 84 formed in the IC 83 is configured by using P-channel type MOS transistors 85 and 86 (corresponding to first and second transistors) in the first embodiment. This is different from the electrostatic protection circuit 22 described in the above. Parasitic diodes 85a and 86a (corresponding to first and second unidirectional energization circuits) are formed in the MOS transistors 85 and 86, respectively.
[0063]
A resistor 87 (first control voltage discharge circuit, corresponding to an impedance circuit) is connected between the gate and source of the MOS transistor 85, and a resistor 88 (second control voltage discharge circuit) is connected between the gate and source of the MOS transistor 86. , Equivalent to an impedance circuit). A constant voltage circuit 93 (corresponding to a first control voltage supply circuit) comprising a diode 89, zener diodes 90 and 91, and a resistor 92 of the illustrated polarity is connected between the drain and gate of the MOS transistor 85, and the MOS transistor 86 is connected. A constant voltage circuit 98 (corresponding to a second control voltage supply circuit) comprising a diode 94, zener diodes 95, 96 and a resistor 97 having the polarities shown in the figure is connected between the drain and the gate. Here, the threshold voltages Vc1 and Vc2 are determined based on the configuration of the constant voltage circuits 93 and 98, respectively.
[0064]
When positive static electricity enters the IC 83 and the input voltage Vin rises above the threshold voltage Vc1, the MOS transistor 85 is turned on, and a surge current flows through the MOS transistor 85 and the diode 86a. When negative static electricity enters IC 83 and the input voltage Vin drops below the threshold voltage Vc2, the MOS transistor 86 is turned on, and a surge current is generated via the MOS transistor 86 and the diode 85a. Flowing. Therefore, the present embodiment can provide the same effects as those of the first embodiment.
[0065]
  (Seventh embodiment)
  Next, the present inventionIsThe seventh embodiment will be described with reference to FIG. 7 showing the electrical configuration of the electrostatic protection circuit.
  In FIG. 7, the electrostatic protection circuit 100 formed in the IC 99 is different from the electrostatic protection circuit 43 described in the second embodiment in that it is configured using P-channel MOS transistors 85 and 86. .
[0066]
That is, between the drain and gate of the MOS transistor 85, a diode 101 having the polarity shown and the collector and emitter of a PNP transistor 102 (corresponding to the third transistor) are connected in series. A resistor 103 (corresponding to an impedance circuit) is connected between the emitters. A parasitic capacitor 102 a (shown by a broken line) is formed between the collector and base of the transistor 102. The high-speed pulse passing circuit 104 composed of the diode 101, the transistor 102, and the resistor 103 corresponds to the first control voltage supply circuit referred to in the present invention.
[0067]
Similarly, between the drain and gate of the MOS transistor 86, a diode 105 having the illustrated polarity and the collector and emitter of a PNP transistor 106 (corresponding to a fourth transistor) are connected in series. A resistor 107 (corresponding to an impedance circuit) is connected between the base and the emitter. A parasitic capacitor 106 a is formed between the collector and base of the transistor 106. The high-speed pulse passing circuit 108 composed of the diode 105, the transistor 106, and the resistor 107 corresponds to the second control voltage supply circuit referred to in the present invention.
[0068]
When positive static electricity enters IC99 and the input voltage Vin suddenly increases in the positive direction, the MOS transistor 85 is turned on when the rate of change exceeds a predetermined reference value, and the MOS transistor 85 and the diode 86a are connected. Surge current flows through. Further, when negative static electricity enters IC99 and the input voltage Vin rapidly decreases in the negative direction, the MOS transistor 86 is turned on when the rate of change exceeds a predetermined reference value, and the MOS transistor 86 and the diode 85a are turned on. And surge current flows through Therefore, the present embodiment can provide the same effects as those of the second embodiment.
[0069]
(Other embodiments)
The present invention is not limited to the embodiments described above and shown in the drawings, and can be modified or expanded as follows, for example.
In the electrostatic protection circuit using the P-channel type MOS transistors 85 and 86, the parallel circuit of the constant voltage circuit 93 and the high-speed pulse passing circuit 104 is used in the same manner as the electrostatic protection circuit 53 shown in the third embodiment. The first control voltage supply circuit may be configured, and the second control voltage supply circuit may be configured by a parallel circuit of the constant voltage circuit 98 and the high-speed pulse passing circuit 108. Similarly to the electrostatic protection circuit 61 shown in the fourth embodiment, the sources of the MOS transistors 85 and 86 are connected to each other at the node n1, and the drains of the MOS transistors 85 and 86 are connected to the signal lines 26 and 27, respectively. It is good also as a structure connected to.
[0070]
  In the fourth embodiment in which the sources of the MOS transistors 29 and 28 are connected at the node n1, the supply circuit 58 is provided.The highYou may comprise only the fast pulse passage circuit 47. FIG. In accordance with this, the supply circuit 59The highYou may comprise only the fast pulse passage circuit 51. FIG. This also applies to the configuration in which the sources of the P-channel MOS transistors 85 and 86 are connected at the node n1.
[0071]
The first and second transistors are not limited to MOS transistors but may be bipolar transistors or IGBTs. In this case, the first and second unidirectional energization circuits may use diodes formed as separate elements with respect to the transistors. With this configuration, the same operation and effect as those using the MOS transistor can be obtained. In the bipolar transistor, the emitter, collector, and base terminals correspond to a first main terminal, a second main terminal, and a control terminal, respectively.
[0072]
In the second embodiment, an N-channel MOS transistor may be used in place of the transistors 45 and 49. The same applies to other embodiments.
In the first embodiment, in order to achieve a protection operation with less operation delay, a capacitance component may be added between each drain and gate of the MOS transistors 28 and 29 (in addition to the parasitic capacitance Cdg). However, even in this case, it is necessary to satisfy the expressions (2) and (4) so that the MOS transistors 28 and 29 are not turned on with respect to a voltage change of a normal control signal. The same applies to the sixth embodiment.
[0073]
The first and second unidirectional energization circuits are not limited to diodes, and any circuit that can energize only in one direction can be used. The first and second control voltage discharge circuits are not limited to resistors, and may be other impedance circuits. Further, the clamp circuit is not limited to a Zener diode, and may be added in each of the first, second, sixth, and seventh embodiments.
[Brief description of the drawings]
[Figure 1]Part of the configuration of the third embodiment according to the present invention is extracted.Electrical configuration diagram of electrostatic protection circuit showing first embodiment
FIG. 2IsFIG. 1 equivalent diagram showing the second embodiment
FIG. 3IsFIG. 1 equivalent view showing the third embodiment
FIG. 4 The present inventionIsFIG. 1 equivalent view showing the fourth embodiment
FIG. 5 shows the present invention.IsFIG. 9 shows the fifth embodiment and is an electrical configuration diagram of an IC including a communication driver circuit.
[Fig. 6]A part of the configuration of the third embodiment according to the present invention is extracted and further modified.Shows a sixth embodimentElectrical configuration diagram of electrostatic protection circuit
FIG. 7IsFIG. 1 equivalent diagram showing a seventh embodiment
FIG. 8 is a view corresponding to FIG.
FIG. 9 is a view corresponding to FIG.
FIG. 10 is a view corresponding to FIG.
FIG. 11 is a diagram showing an electrical configuration of a driver circuit and a receiver circuit.
[Explanation of symbols]
  22, 43, 53, 61, 84, 100 are electrostatic protection circuits, 26, 27 are signal lines, 28, 86 are MOS transistors (second transistors), and 28a, 86a are diodes (second one-way energization circuit). , 29, 85 are MOS transistors (first transistors), 29a, 85a are diodes (first one-way energization circuit), 30, 88 are resistors (second control voltage discharge circuit, impedance circuit), 31, 87 Is a resistor (first control voltage discharge circuit, impedance circuit), 36 and 98 are constant voltage circuits (second control voltage supply circuit), 41 and 93 are constant voltage circuits (first control voltage supply circuit), 45 , 106 are transistors (fourth transistor), 46, 50, 103, 107 are resistors (impedance circuit), 47, 108 are high-speed pulse passing circuits (second control power) Supply circuit), 49 and 102 are transistors (third transistors), 51 and 104 are high-speed pulse passing circuits (first control voltage supply circuits), 54 and 55 are zener diodes (clamp circuits), and 56 is a discharge circuit ( (Second control voltage discharge circuit), 57 is a discharge circuit (first control voltage discharge circuit), 58 is a supply circuit (second control voltage supply circuit), and 59 is a supply circuit (first control voltage supply circuit). It is.

Claims (8)

The second main terminals are connected to each other so that the energization directions are opposite to each other, and the first main terminals are connected to different signal lines, or the first main terminals have the same conductivity type or junction type A first transistor and a second transistor connected in series between the signal lines by connecting the second main terminals to different signal lines ; and
A first one-way energization circuit that can be energized only in a direction opposite to the energizable direction of the first transistor, and is connected in parallel to the first transistor;
A second one-way energization circuit that can be energized only in a direction opposite to the energizable direction of the second transistor, and is connected in parallel to the second transistor;
A first control voltage discharging circuit comprising an impedance circuit connected between a control terminal which is a control input terminal pair of the first transistor and a first main terminal;
A third transistor connected between the second main terminal and the control terminal of the first transistor, and a control input terminal pair of the third transistor between the control terminal and the first main terminal The voltage change rate between the second main terminal of the first transistor and the control terminal is given between the signal lines in the energization possible direction of the second one-way energization circuit. A first control voltage supply circuit that is energized when exceeding a first reference value that is set to be greater than a maximum voltage change rate of a signal to be generated and smaller than a voltage change rate due to static electricity ;
A second control voltage discharge circuit comprising an impedance circuit connected between a control terminal which is a control input terminal pair of the second transistor and a first main terminal;
A fourth transistor connected between the second main terminal and the control terminal of the second transistor and a control input terminal pair of the fourth transistor between the control terminal and the first main terminal A voltage change rate between the second main terminal of the second transistor and the control terminal is provided between the signal lines in the energization possible direction of the first one-way energization circuit. And a second control voltage supply circuit that is energized when exceeding a second reference value that is set to be larger than the maximum voltage change rate of the generated signal and smaller than the voltage change rate due to static electricity. An electrostatic protection circuit characterized by having The first control voltage supply circuit is connected between a second main terminal of the first transistor and a control terminal, and a voltage between the first control voltage supply circuit and the second unidirectional energization circuit in the energization possible direction. A control voltage supply circuit that is energized when exceeding a first reference voltage set corresponding to the maximum level of the signal voltage applied between the signal lines;
The second control voltage supply circuit is connected between a second main terminal of the second transistor and a control terminal, and the voltage between the second control voltage supply circuit and the control terminal in the energizable direction of the first one-way energization circuit. 2. The control voltage supply circuit according to claim 1 , further comprising a control voltage supply circuit that is energized when a second reference voltage set corresponding to the maximum level of the signal voltage applied between the signal lines is exceeded. ESD protection circuit. The impedances of the impedance circuits connected to the third and fourth transistors are low enough to keep the third and fourth transistors off by normal signal voltages applied between the signal lines, respectively. The electrostatic protection circuit according to claim 1, wherein the electrostatic protection circuit is set as follows . The impedances of the first and second control voltage discharge circuits are set to low values sufficient to maintain the first and second transistors in the off state by normal signal voltages applied between the signal lines, respectively. The electrostatic protection circuit according to claim 1, wherein the electrostatic protection circuit is provided. The electrostatic protection circuit according to claim 1, wherein the impedance circuit is a resistor . 6. The first and second one-way energization circuits are diodes formed parasitically on the first and second transistors or diodes formed as separate elements, respectively. An electrostatic protection circuit according to any one of the above . Wherein the first and second control voltage discharge circuit, the electrostatic discharge protection circuit according to any one of claims 1 to 6, characterized in that the clamping circuit is connected in parallel with the impedance circuit. 8. The electrostatic protection circuit according to claim 1, wherein the first and second transistors are MOS transistors or bipolar transistors .

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