JP3671243B2

JP3671243B2 - Resonant power converter

Info

Publication number: JP3671243B2
Application number: JP25249996A
Authority: JP
Inventors: 英樹宮崎; 浩幸庄司; 雄一南村
Original assignee: Hitachi Ltd
Current assignee: Hitachi Ltd
Priority date: 1996-09-03
Filing date: 1996-09-03
Publication date: 2005-07-13
Anticipated expiration: 2016-09-03
Also published as: JPH1080145A

Description

【０００１】
【発明の属する技術分野】
本発明は、共振型電力変換装置に係わり、特に、共振周波数が高い照明用点灯装置或いは高調波抑制用の共振型アクティブフィルタに採用する共振型電力変換装置に関する。
【０００２】
【従来の技術】
一般に、蛍光ランプは負性抵抗を有するため、ランプに流れる交流電流を安定化するためには安定器が必要である。近年、ランプのちらつきを防止すると共に発光効率を向上させるため、ランプ電流を高周波化する電子式安定装置として共振型インバータが用いられている。この共振型インバータは、逆電流を阻止しない機能を備えた２個のパワー半導体スイッチング素子を直列に接続し、その接続箇所にあたる出力端子に共振用のリアクトル（チョークコイルと呼ばれる。）とコンデンサ及びランプを直列に接続した構成が一般的である。共振用のリアクトルを流れる電流はインバータの動作周波数を変えることによって制御する。
２個のパワー半導体素子を交互にオン、オフさせるスイッチング周波数をｆ、上記リアクトルとコンデンサで決まる共振周波数をｆｏとするとき、ｆｏに対してｆが一定でなければ、ランプ電流も変化する。そこで、スイッチング素子の駆動周波数を安定化させるために、特開平８−９６５５号公報に開示されるような制御回路がある。この制御回路は、パワー半導体スイッチング素子が具備する還流ダイオード（逆電流を阻止しない機能を果たす。）の両端電圧を検知してパワー半導体スイッチング素子をオンさせ、パワー半導体スイッチング素子の電流を積分器によって積分し、この値が基準値よりも高い場合に素子をオフさせるという制御法によって、ランプを流れる共振電流に同期したスイッチングを行うことに特徴がある。
【０００３】
【発明が解決しようとする課題】
一般的な蛍光ランプ点灯用インバータのスイッチング周波数は、約５０ｋＨｚであり、ランプの両端に設けられた電極間に高周波交流電圧を印加し、ランプ管内に発生する高電界によってプラズマを維持している。近年、周波数を数ＭＨｚまで高くして高周波交流電流により高周波磁界を発生させ、この磁界でランプ管内のプラズマを維持させる無電極ランプが報告されている。或いは、一般的な共振型電源においても共振用のリアクトル、コンデンサは、周波数に応じて体積が小型化できることから、スイッチング周波数をＭＨｚまで高くすることが検討されている。
こうした数ＭＨｚの共振型インバータになると、前述の公知例のように電流の積分値を基準値と比較して素子をオフさせる方法では動作遅延が懸念される。公知例では、パワー半導体スイッチング素子を流れる電流の一部を積分器内のコンデンサに充電し、充電電圧を基準値と比較する。充電された電圧は次のスイッチング時までに積分器自体によって放電される。ここで、積分器が充電電圧を放電する時間は積分器内部の素子の抵抗値で決まるが、素子特性のばらつき或いは温度上昇による抵抗値変化で放電時間が変わる。この放電時間のばらつきが例えば０．１μｓとすると、素子のオン期間に対する動作遅延は５０ｋＨｚの周波数に対しては１波長の０．５％にすぎないが、２ＭＨｚに対しては１波長の２０％にも達する。
このように、数ＭＨｚの高周波共振型インバータを従来の方法で制御すると、動作遅延によるスイッチング周波数のばらつきが相当大きくなる、という問題がある。
【０００４】
ランプ点灯装置の場合、インバータのスイッチング周波数ｆとリアクトルとコンデンサで決まる共振周波数ｆｏの間には図８（ａ）に示すような関係があり、共振点の動作（ｆ＝ｆｏ）を境にしてｆ＞ｆｏを遅れ位相、ｆ＜ｆｏを進み位相と呼ぶ。遅れ位相であっても、進み位相であっても共振回路の電流ＩＬは共振点の値に比べて減少する。そこで、インバータは共振点付近で動作させたいが、進み位相の場合は、インバータを貫通する電流が流れる問題が起きる。以下に、進み位相の場合の問題点を具体的に述べる。
図８（ｂ）に示すように、パワー半導体スイッチング素子をＱ１、Ｑ２、それぞれが内蔵する環流ダイオードをＱＤ１、ＱＤ２とし、Ｑ１とＱ２の接続位置から取り出す出力電圧をＶｏとすれば、進み位相の場合の動作は図８（ｃ）のようになる。この図８（ｃ）において、インバータの出力電圧Ｖｏの波形に対して共振電流ＩＬの波形は位相ψだけ進んでいる。この進み位相の場合、１サイクルの動作として、Ｑ１のオン期間に共振電流ＩＬが正から負に切り替わり、電流はＱＤ１を流れる。次に、制御回路がＱ１をオフさせ、逆にＱ２をオンさせると、その以前に順方向電流を流していたＱＤ１には急に逆電圧が印加される。この結果、ＱＤ１内部に蓄積された電子と正孔（以後、残留キャリアと呼ぶ。）が排出され、ＱＤ１にはカソードからアノードの向きに逆電流（以後、逆回復電流と呼ぶ。）が流れる。この電流はＱ２を通って流れ、インバータにとっては貫通電流となる。残留キャリアが排出される時間はダイオードの逆回復時間として素子の仕様に記載されており、高速ダイオードと呼ばれる逆回復時間の短い素子でも０．０５〜０．１μｓである。
数ＭＨｚの共振型インバータを共振点付近で動作させる場合、スイッチング周波数のばらつきによって進み位相が生じる可能性が高く、周波数も高いため、貫通電流による損失がインバータ装置の熱的な動作限界を決める要因となる。
【０００５】
本発明の課題は、数ＭＨｚの動作周波数を考慮した共振型電力変換装置において、共振電流に同期した安定な動作を保証し、スイッチング損失の原因となる進み位相を防止することにある。
【０００６】
【課題を解決するための手段】
上記課題を解決するために、電源と、該電源に接続し、逆電流を阻止しない機能を有する複数の電圧駆動型半導体素子を備えたインバータと、インバータの出力側にリアクトルとコンデンサを含む共振手段を有し、交流電流を供給する共振型電力変換装置において、電源の正極に接続した第１の電圧駆動型半導体素子とインバータの出力端子の間および前記インバータの出力端子に接続した第２の電圧駆動型半導体素子と電源の負極の間に電圧駆動型半導体素子を流れる電流に応じて電圧を充電する電圧充電手段をそれぞれ設け、
電圧駆動型半導体素子の各々の制御電圧印加用端子にそれぞれ任意のタイミングで制御電圧を印加する駆動手段と、電圧充電手段の電圧と基準電圧を比較する比較手段を具備し、電圧充電手段の電圧に応じて電圧駆動型半導体素子をオン、オフする。
また、電圧駆動型半導体素子の各々の制御電圧印加用端子にそれぞれ任意のタイミングで制御電圧を印加する駆動手段を具備し、電圧充電手段の電圧を制御電圧に重畳すると共に、電圧充電手段の電圧の大きさに基づいて電圧駆動型半導体素子をオン、オフする。
また、交流電圧を整流するコンバータと、逆電流を阻止しない機能を有する複数の電圧駆動型半導体素子を備えたインバータと、インバータの出力とコンバータの高圧或いは低圧側の一方の端子間に設けた少なくともリアクトルとコンデンサを含む共振手段と、該共振手段の電流を平滑する平滑コンデンサを備える共振型電力変換装置において、コンバータの高圧側に接続した第１の電圧駆動型半導体素子とインバータの出力端子の間および前記インバータの出力端子に接続した第２の電圧駆動型半導体素子とコンバータの低圧側の端子の間に電圧駆動型半導体素子を流れる電流に応じて電圧を充電する電圧充電手段をそれぞれ設け、
電圧駆動型半導体素子の各々の制御電圧印加用端子にそれぞれ任意のタイミングで制御電圧を印加する駆動手段と、電圧充電手段の電圧と基準電圧を比較する比較手段を具備し、電圧充電手段の電圧に応じて電圧駆動型半導体素子をオン、オフする。
また、電圧駆動型半導体素子の各々の制御電圧印加用端子にそれぞれ任意のタイミングで制御電圧を印加する駆動手段を具備し、電圧充電手段の電圧を制御電圧に重畳すると共に、電圧充電手段の電圧の大きさに基づいて電圧駆動型半導体素子をオン、オフする。
【０００７】
本発明は、電圧充電手段によってインバータの電圧駆動型半導体素子が共振電流に同期してオン、オフする。また、高電位側及び低電位側素子のいずれの素子も、具備される還流ダイオードに電流が流れることによって、オンし、逆に、素子に電流が流れることによって、オフする。これは、低電位側の素子がオンする直前に高電位側の還流ダイオードに電流が流れているという状態はないことを保証しており、進み位相で動作することはなく、必ず遅れ位相で動作することになる。この結果、ダイオードの逆回復電流は流れず、スイッチング損失を低減できると共に、共振電流に同期したインバータの安定な動作を保証することができる。
また、無電極ランプおよび蛍光ランプの点灯装置に本発明を適用することによって、新たに調光機能を付加することができると共に、アーム短絡時の短絡電流を自動的に絞り込み、また、ランプ寿命末期の異常を避けるための保護機能として、共振型電力変換装置の動作を停止するので、装置保護を図ることができる。
また、高調波抑制用高効率コンバータに本発明を適用することによって、交流電源から入力する電流の高調波を抑制することができ、さらに、アーム短絡時の保護を図ることができる。
【０００８】
【発明の実施の形態】
以下、本発明の実施形態を図面を用いて説明する。
図１は、本発明による共振型電力変換装置の一実施形態を示す構成図である。図１において、ブリッジ接続されたＱ１、Ｑ２は、パワーＭＯＳＦＥＴであり、電流を入力するドレイン端子、電流を出力するソース端子及び制御電圧が印加或いは除去されるゲート端子を備え、ゲート端子に制御電圧を印加或いは除去することにより、ドレイン、ソース間に流れる電流を通流或いは遮断する。ＭＯＳＦＥＴは、ソース端子からドレイン端子に向かう方向にダイオードを内蔵しており、以後、Ｑ１が内蔵するダイオードをＱＤ１、Ｑ２が内蔵するダイオードをＱＤ２とする。Ｑ１のドレイン端子は電源１５の正極と接続し、Ｑ１のソース端子とＱ２のドレイン端子間にはコンデンサＣ１（電圧充電手段）を接続し、Ｃ１とＱ２の接続箇所をインバータの出力端子Ｏとする。Ｑ２のソース端子と電源１５の負極の間にはコンデンサＣ２（電圧充電手段）を接続し、コンデンサＣ２と電源１５の負極の接続箇所をコモン電位とし、Ｎと呼ぶ。出力端子Ｏとコモン電位Ｎの間には共振用リアクトルＬｒ、共振用コンデンサＣｒを直列に接続し、Ｃｒには並列に負荷抵抗Ｒを備える。
【０００９】
次に、インバータの制御回路１６を説明する。まず、Ｑ１の駆動回路は、出力点Ｏを基準電位として駆動用電源１３を供え、この駆動用電源１３の正極と負極間には各々の制御端子が共通接続された素子１と２からなる相補型スイッチ手段を供え、素子１と２の接続箇所から出力を取り出し、Ｑ１のゲートに接続する。相補型スイッチ手段は、ＣＭＯＳインバータ或いはその類似した手段であり、素子１がオンすると（この時２はオフ）、Ｑ１のゲート端子に制御電圧を印加させる電流を流し、素子２がオンすると（この時１はオフ）、Ｑ１のゲート端子に充電された電荷を放電させる電流を流す。素子１と２からなる相補型スイッチ手段の制御端子にはＮＡＮＤ回路７から信号を与える。
ＮＡＮＤ回路７は、比較器９によってＣ１の電圧と基準電圧１１を比較した信号と、レベルシフト手段５の信号を入力する。
比較器９は、ヒステリシスを持つ特性が望ましく、比較器９の出力がＬｏｗからＨｉｇｈに変化するための基準電圧をＶ_LH、逆にＨｉｇｈからＬｏｗに変化するための基準電圧をＶ_HLとする。ここでは、Ｃ１の電圧が基準電圧１１（Ｖ_LH）より低い場合に、比較器９の出力はＨｉｇｈとなることにし、Ｖ_HL＞Ｖ_LHの関係を設定する。
レベルシフト手段５は、下アームのコモン電位Ｎを基準とする信号を上アームの出力Ｏを基準とする信号に変換する手段であり、起動時には、所定の周波数でインバータの電圧駆動型半導体素子をオン、オフさせる信号を発生する。
次に、Ｑ２の駆動回路は、コモンＮを基準電位として駆動用電源１４を供え、駆動用電源１４の正極と負極間には、制御端子が共通接続された素子３と４からなる相補型スイッチ手段を供え、素子３と４の接続箇所から出力を取り出し、Ｑ２のゲートに接続する。素子３と４で構成される相補型スイッチ手段の制御端子にはＮＡＮＤ回路８から信号を与える。
ＮＡＮＤ回路８は、比較器１０によってＣ２の電圧と基準電圧１２を比較した信号と、起動停止手段６の信号を入力する。
比較器１０は、前述の比較器９と同様にヒステリシスを持ち、Ｃ２の電圧が基準電圧１２（Ｖ_LH）より低い場合に、比較器１０の出力がＨｉｇｈになることは比較器９と同じであり、Ｖ_HL＞Ｖ_LHの関係も同様である。
起動停止手段６は、起動停止時にトリガ信号を発する機能を有する。
【００１０】
図２及び図３を用いて、起動停止手段６の動作及び共振回路全体の動作を説明する。
（１）起動時の動作
起動停止手段６は、信号Ｓが入力されると、図２に示すように、所定の周波数ｆｓの信号を出力する。ここで、周波数ｆｓは、図１のＬｒとＣｒで決まる共振周波数ｆｏに比べて高く選ぶ。また、Ｖｏは出力端子Ｏ点の電圧、ＩＬは共振電流を表わす。起動停止手段６は、同時に周波数ｆｓの信号のＨｉｇｈとＬｏｗを反転した信号Ｌ、Ｈをレベルシフト手段５に供給する。これらの信号によって、Ｑ１とＱ２からなるインバータは、共振周波数ｆｏに対して遅れ位相ψで起動を開始する。
即ち、Ｃ１とＣ２のコンデンサに充電される電圧をそれぞれＶＣ１、ＶＣ２とすると、まず、レベルシフト手段５のＨ信号によって、Ｑ１ゲートに信号が印加され、Ｑ１がオンし、Ｑ１を流れる電流によってＣ１が充電され、ＶＣ１は増加する。起動時の周波数ｆｓを定常動作時の周波数ｆに比べて高く設定しておけば、Ｑ１のオン期間中にＣ１に充電した電圧は比較器９の基準電圧Ｖ_HLに達せず、Ｑ１のオン期間は、レベルシフト手段５によって伝えられた駆動信号で決まる。次に、レベルシフト手段５のＬ信号によってＱ１をオフすると共に、起動停止手段６のＨ信号によって、Ｑ２ゲートに制御電圧を印加すると、共振電流ＩＬはＱ２に内蔵される還流ダイオードＱＤ２を流れ、前のサイクルにおいてＣ２に充電した電圧ＶＣ２を減少させる。共振電流ＩＬの極性が変わると、電流はＱ２を流れ、Ｃ２はこの電流を充電して、ＶＣ２は増加するが、前述のように周波数ｆｓを定常動作時の周波数ｆに比べて高く設定しているため、Ｑ２のオン期間中にＶＣ２は比較器１０の基準電圧Ｖ_HLに達しない。Ｑ２のオン期間は起動停止手段６によって伝えられた駆動信号で決まり、その後、Ｑ２はオフされ、レベルシフト手段５を介してＱ１に制御電圧が印加される。共振電流ＩＬはＱ１に内蔵される還流ダイオードＱＤ１を流れ、前のサイクルにおいてＣ１に充電した電圧ＶＣ１を減少させる。共振電流ＩＬの極性が変わると、電流はＱ１を流れる。以上が１サイクルの動作であり、Ｑ１とＱ２は起動停止手段６が供給する周波数ｆｓに応じてスイッチングする。
（２）起動から定常動作への移行
定常動作への移行は、周波数ｆｓを徐々に低下させて行う。起動停止手段６が出力する信号の周波数ｆｓが定常動作時の周波数ｆに比べてわずかに低い場合を仮定した動作を次に述べる。下記の動作モード（ａ）〜（ｄ）を図示した説明図が図３である。
モード（ａ）：Ｑ１のオン時に、Ｑ１を流れる電流によりＣ１に充電される電圧ＶＣ１が比較器９の基準電圧Ｖ_HLに達すると、比較器９の出力はＬｏｗに変化し、レベルシフト手段５の出力に関わらず、ＮＡＮＤ回路７の出力はＨｉｇｈになり、素子１、２からなる相補型スイッチの出力はＬｏｗとなって、Ｑ１のゲート電圧は素子２によって放電され、Ｑ１はオフする。
モード（ｂ）：Ｑ１のオフによって、共振電流ＩＬはＱ２の還流ダイオードＱＤ２を流れ、前のサイクルにおいてＣ２に充電した電圧ＶＣ２を減少させる。ＱＤ２に電流が流れる期間は起動時に比べて長く、ＶＣ２は減少を続け、Ｖ_LH以下になると、比較器１０の出力はＨｉｇｈに変化し、起動停止手段６の信号がＨであれば、ＮＡＮＤ回路８の出力はＨｉｇｈになり、Ｑ２はオンする。なお、電流がＱＤ２を流れ続ける限り、ＶＣ２は減少し、逆極性に充電されるが、比較器１０の出力はＨｉｇｈであることに変わりない。
モード（ｃ）：共振電流ＩＬの極性が変わると、電流はＱ２を流れ、Ｃ２の電圧ＶＣ２が比較器１０の基準電圧Ｖ_HLに達すると、比較器１０の出力はＬｏｗに変わり、起動停止手段６の出力に関わらず、ＮＡＮＤ回路８の出力はＨｉｇｈになり、Ｑ２はオフする。
モード（ｄ）：Ｑ２のオフによって、共振電流ＩＬはＱ１の還流ダイオードＱＤ１を流れ、前のサイクルにおいてＣ１に充電した電圧ＶＣ１を減少させる。ＱＤ１に電流が流れる期間は長く、ＶＣ１は減少を続け、Ｖ_LH以下になると、比較器９の出力はＨｉｇｈに変化し、レベルシフト手段５の信号がＨであれば、ＮＡＮＤ回路７の出力はＨｉｇｈになり、Ｑ１はオンする。電流がＱＤ１を流れ続ける限り、Ｖｃ１は減少し、逆極性に充電される。
ここで、コンデンサＣ１及びＣ２の容量は、共振用コンデンサＣｒに比べて数十倍以上に大きければ、Ｃ１、Ｃ２を合成した値はほぼＣｒに等しくなるため、共振電流に与える影響はほとんどない。また、Ｃ１及びＣ２の容量がＱ１、Ｑ２のゲート・ソース間容量Ｃｇｓに対して８倍以上大きければ、駆動用電源１３及び１４の電圧をＣ１とＣｇｓ或いはＣ２とＣｇｓで分圧してもＣｇｓには十分な制御電圧が印加されるため、問題はない。
【００１１】
このように、本実施形態では、Ｃ１、Ｃ２を設け、Ｑ１、Ｑ２のいずれの素子も具備する還流ダイオードに流れる電流によってＣ１、Ｃ２の充電電圧を減少させ、この充電電圧が基準値より低くなると、Ｑ１、Ｑ２をオンし、逆に、素子に電流が流れ、Ｃ１、Ｃ２の充電電圧が増加し、この充電電圧が基準値より高くなると、Ｑ１、Ｑ２をオフする。この結果、インバータの電圧駆動型半導体素子Ｑ１、Ｑ２は共振電流ＩＬに同期してオン、オフすることになり、また、これは、Ｑ２（または、Ｑ１）がオンする直前にＱ１（または、Ｑ２）の還流ダイオードに電流が流れているという状態はないことを保証しており、進み位相で動作することはなく、必ず遅れ位相ψになることを意味する。これにより、本実施形態においては、ダイオードの逆回復電流は流れず、スイッチング損失を低減することができる。
【００１２】
図４は、本発明の他の実施形態を示す。（ａ）は本実施形態による共振型電力変換装置の構成図、（ｂ）はその動作図である。本実施形態は、図１の実施形態に示すＣ１及びＣ２の電圧を基準値Ｖ_LH或いはＶ_HLと比較する比較器を削除する点、図１の実施形態の起動停止手段６を制御手段６とした点において相違する。制御手段６は、図２で述べた起動時のシーケンスに限定されることなく、信号Ｓに応じてランダムな制御指令をＱ１とＱ２に伝える機能を有する。他の構成は図１の実施形態と同じである。
ＭＯＳＦＥＴのような電圧駆動型素子は、年々、微細化が進み、素子のオン抵抗が低くなっているため、ゲート・ソース間電圧がしきい値電圧を少し上回る値になると、素子が飽和することなく、十分な電流を流すことが可能になった。図４（ａ）の実施形態において、駆動用電源１３及び１４の電圧値をＶｃｃとすると、Ｑ１のゲート・ソース間電圧には（Ｖｃｃ−ＶＣ１）のゲート電圧（制御電圧）が印加される。ＶＣ１はＱ１に流れる電流に応じて増加することは先に述べた通りであり、（Ｖｃｃ−ＶＣ１）がＱ１のゲートしきい値電圧Ｖｔｈに比べて大きいか小さいかによって、Ｑ１はオン、オフする。図４（ａ）の実施形態は、（Ｖｃｃ−ＶＣ１）が共振電流ＩＬに応じて増減することを利用して、特別な比較器を用いずに共振周波数に同期したインバータ動作を継続させることが特徴である。Ｑ２のオン、オフについても同様である。
【００１３】
図４（ｂ）を用いて動作を説明する。ＶＣ１、ＶＣ２は、共振電流ＩＬに応じて正負に変化し、Ｑ１、Ｑ２のゲート・ソース間に逆極性で印加される。この結果、（Ｖｃｃ−ＶＣ１）がＱ１のしきい値電圧Ｖｔｈ以下になると、Ｑ１はオフし、電流はＱＤ２を流れる。ＱＤ２の電流によってＶＣ２が減少することは図１の実施形態と同じであり、（Ｖｃｃ−ＶＣ２）がＱ２のしきい値電圧Ｖｔｈ以上になると、Ｑ２はオン可能となる。１サイクルでは上述の動作を繰り返す。
即ち、インバータの高電位側の電圧駆動型半導体素子Ｑ１がオンし、共振回路Ｌｒ、Ｃｒに流れ込む電流を正の方向として、正方向の電流が素子Ｑ１を流れると、Ｃ１にはこの電流が充電され、Ｑ１のゲート・ソース間電圧には（Ｖｃｃ−ＶＣ１）のゲート（制御）電圧が印加される。この結果、電流が流れると、Ｑ１のゲート電圧は減少してＱ１のオン抵抗が増加し、さらに電流が流れると、Ｑ１をオフさせるように働く。次に、Ｑ１がオフすると、共振電流ＩＬは低電位側の電圧駆動型半導体素子Ｑ２の還流ダイオードＱＤ２を流れる。この電流はＱ２対しては逆方向電流であり、Ｃ２が一つ前のサイクルにおいて充電していた充電電圧をこの逆方向電流によって放電し、さらには逆極性の電圧を充電する。この電圧はＱ２のゲート（制御）電圧に対して正の電圧を重畳させることになり、この電圧がＱ２のゲートしきい値を越えると、Ｑ２はオン状態へと向かう。但し、還流ダイオードＱＤ２に電流が流れる限りにおいてはＱ２に順方向の電流は流れない。次に、共振電流の極性が変わると、電流はＱ２を流れ、Ｃ２にはこの電流が充電され、Ｑ２のゲート（制御）電圧に負の電圧を重畳することになり、Ｑ２のゲート（制御）電圧を減少させる。さらに電流が流れ、Ｑ２のゲート（制御）電圧がＱ２のゲートしきい値以下になると、Ｑ２はオフする。この結果、共振電流ＩＬはＱ１の還流ダイオードＱＤ１を流れる。逆方向電流によってＣ１の前のサイクルに充電した電圧を減少させる。その後、充電電圧は逆極性に変わり、Ｑ１のゲート（制御）電圧に対して正の電圧を重畳させ、この電圧がＱ１のゲートしきい値を越えると、Ｑ１はオン状態へと向かう。
以上が１サイクルの動作であり、Ｃ１、Ｃ２によってインバータの電圧駆動型半導体素子Ｑ１、Ｑ２は共振電流ＩＬに同期してオン、オフする。また、Ｑ１、Ｑ２のいずれの素子も、具備される還流ダイオードＱＤ１、ＱＤ２に電流が流れることによって、オンし、逆に、Ｑ１、Ｑ２に電流が流れることによって、オフする。これは、低電位側の素子Ｑ２がオンする直前に高電位側の還流ダイオードＱＤ１に電流が流れているという状態はないことを保証しており、進み位相で動作することはなく、必ず遅れ位相になる。
図１の実施形態との大きな違いとして、本実施形態は、上下アームの相補型スイッチ手段の素子１及び３をそれぞれオンに維持して、ＶＣ１とＶＣ２の電圧だけによってＱ１とＱ２をオン、オフさせることが特徴である。この動作によれば、比較器、ＮＡＮＤ回路を経由することなく、Ｑ１とＱ２をスイッチングするため、時間遅延が少なく、数ＭＨｚ以上の高周波共振型インバータに適する。
【００１４】
このように、本実施形態では、Ｃ１、Ｃ２を設け、Ｑ１、Ｑ２のいずれの素子も具備する還流ダイオードに流れる電流によってＣ１、Ｃ２の充電電圧を減少させ、この充電電圧に基づくＱ１、Ｑ２のゲート・ソース間電圧（ゲート（制御）電圧）がそれぞれのゲートしきい値電圧より低くなると、Ｑ１、Ｑ２をオンし、逆に、素子に電流が流れ、Ｃ１、Ｃ２の充電電圧が増加し、この充電電圧に基づくＱ１、Ｑ２のゲート電圧がそれぞれのゲートしきい値電圧より高くなると、Ｑ１、Ｑ２をオフする。この結果、本実施形態においても、図１の実施形態と同様に、インバータの電圧駆動型半導体素子Ｑ１、Ｑ２は共振電流ＩＬに同期してオン、オフすることになり、また、必ず遅れ位相ψで動作することになる。このため、ダイオードの逆回復電流は流れず、スイッチング損失を低減することができる。
【００１５】
図５は、本発明を無電極ランプの点灯装置に適用した実施形態を示す。図５において、Ｒが無電極ランプであり、無電極ランプは、水銀もしくはアマルガムと不活性ガスを封入した放電バルブに近接してコイルを巻き、高周波電流を流すことによって、バルブ内に高周波磁界を発生させ、ランプを点灯させる。通常の蛍光ランプに比べてフィラメントがないことが特徴である。この無電極ランプを駆動するインバータは図１に示した構成と同様に、それぞれソース側にコンデンサＣ１、Ｃ２を備えたＱ１、Ｑ２であり、Ｑ１とＱ２を駆動する制御手段１６は図１と同じ構成である。なお、Ｑ１とＱ２を駆動する制御手段１６は図４（ａ）と同じ構成であってもよい。
インバータの出力ＯとコモンＮの間には共振用のリアクトルＬｒとコンデンサＣｒを直列に接続し、Ｃｒの両端に無電極ランプＲと補助コンデンサＣ４を直列に接続する。また、インバータは、交流電源１７から受電する交流電流をローパスフィルタ１８とダイオードＤ１〜Ｄ４からなる整流回路を通して整流し、この電流を平滑コンデンサＣＥに充電すると共に、ＣＥからインバータへ電流を供給する。
【００１６】
無電極ランプＲを効率よく点灯させるには、インバータから共振回路Ｌｒ、Ｃｒに数ＭＨｚ以上の交番電圧を印加することが重要である。図５の構成によれば、図２の動作説明で述べたように、共振電流ＩＬに同期してインバータを駆動し、かつ、数ＭＨｚ以上の高周波の交番電圧であっても遅れ位相を保証することができるので、本実施形態は、スイッチング損失を低減し、効率よく無電極ランプＲを点灯させることができる。
【００１７】
また、現状の無電極ランプ点灯装置において、ランプの調光機能を持つ例はないが、通常のフィラメント付き蛍光ランプと同様に、図５の構成によれば、インバータのスイッチング周波数を変えることにより、調光させることが可能である。即ち、図８（ａ）に示したように、インバータのスイッチング周波数ｆを共振周波数ｆｏに対して高くするほど、遅れ位相のまま共振電流は小さくなる。しかしながら、無電極ランプの場合、共振点の周波数が数ＭＨｚであることから、その何倍ものスイッチング周波数でインバータを駆動させることは容易でない。特に、高周波インバータではＱ１とＱ２が同時にオン状態となるアーム短絡が予想され、その防止策が課題であった。
ここでは、図５に示す図１の制御回路１６を図４（ａ）に示す制御回路１６に変え、制御手段６とレベルシフト手段５によって通常点灯時の数倍高い周波数でインバータを駆動したとして、アーム短絡が発生した場合の保護処理について説明する。
Ｑ１とＱ２が同時にオン状態となると、平滑コンデンサＣＥからＱ１とＱ２を通る電流が流れ、この電流はＱ１或いはＱ２の飽和電流で決まる値まで達する。一方、この短絡電流も必ずＣ１とＣ２を通り、Ｃ１とＣ２は点灯時に比べて大きな電流により充電され、それぞれの電圧増加が速くなる。電圧駆動型素子の飽和電流はゲート電圧が小さいほど低いが、Ｑ１とＱ２のゲート電圧は、前述のようにそれぞれ（Ｖｃｃ−ＶＣ１）と（Ｖｃｃ−ＶＣ２）で表わされ、短絡電流に応じてＶＣ１、ＶＣ２が大きくなろうとするほど、逆にゲート電圧が減少して、飽和電流（即ち、短絡電流）を減少させる。この現象は負帰還作用であり、この負帰還作用により、短絡電流は自動的に絞り込まれることになる。
このように、本発明の共振型インバータでは、アーム短絡による装置の破壊等は発生しないことが保証され、この結果、アーム短絡時の装置保護の点からも好適であると言える。
【００１８】
図６は、本発明を蛍光ランプの点灯装置に適用した実施形態を示す。図６において、Ｒはフィラメント付き蛍光ランプであり、フィラメント付き蛍光ランプの場合、インバータの出力ＯとコモンＮの間に接続されるランプを含む共振回路の構成が図５の構成と若干異なるが、その他の構成は図５と同じであり、図５の高周波用の無電極ランプ点灯装置と同じ効果を有する。なお、Ｑ１とＱ２を駆動する制御手段１６は図４（ａ）と同じ構成であってもよい。
フィラメント付き蛍光ランプの場合、寿命末期においては片方或いは両方のフィラメントからのエミッションがなくなる状態が発生する。例えば図６において、両フィラメントのエミッションが無くなると、ランプＲは高抵抗に等しくなり、出力ＯとコモンＮの間にはＬｒとＣｒ及び補助コンデンサＣ４が直列に接続された構成となる。ＣｒとＣ４の合成容量によって、共振周波数ｆｏが高くなるため、従来の点灯装置ではｆ＜ｆｏの進み位相の状態に到る。
こうしたランプ寿命末期の状態においても、本実施形態によれば、進み位相による損失の発生或いは共振点が変わることによる過電流を抑制することができる。即ち、ＣｒとＣ４の合成容量によって、共振周波数ｆｏが高くなり、共振電流も増加した場合には、Ｑ１或いはＱ２を流れる電流によってＣ１とＣ２を充電する時間も短くなり、これらの素子に電流が流れている期間内にＣ１とＣ２の電圧を検知して、Ｑ１或いはＱ２をオフする動作が保たれる。即ち、これは、共振周波数の変化に追従して遅れ位相状態を維持することになる。
ところで、仮に、進み位相に到ったと仮定すると、片側の還流ダイオードを流れる逆回復電流はＣ１とＣ２を貫通して流れるため、ＶＣ１、ＶＣ２はいずれも増加する。図１の実施形態の場合、逆回復電流が大きい程ＶＣ１とＶＣ２の電圧が基準値Ｖ_HLを越え、比較器９、１０によってＱ１、Ｑ２をオフさせる動作が働く。また、図４の実施形態の場合、（Ｖｃｃ−ＶＣ１）と（Ｖｃｃ−ＶＣ２）がゲートしきい値電圧以下となり、Ｑ１とＱ２はオフする。このように、本実施形態のインバータは、共振のサイクルに同期せず、動作を停止するが、ランプ寿命末期の異常を避けるための保護機能として、この動作停止は効果がある。
【００１９】
図７は、本発明を高調波抑制用高効率コンバータに適用した実施形態を示す。図７（ａ）にその構成を示す。
近年、電源高調波に関する規制が実施されるにあたり、高調波抑制用高効率コンバータが数多く報告されている。その一つは電流断続型と呼ばれるコンバータであり、交流電源１７から受電する交流電流をローパスフィルタ１８とダイオードＤ１〜Ｄ４を用いた整流回路を通して整流し、チョークコイルＬｒに流す。通常の電流断続型コンバータでは、Ｌｒに流れる電流をパワー半導体スイッチ素子で高周波にチョッピングし、Ｌｒに蓄えたエネルギーを電源コンデンサＣＥに供給する。Ｌｒを流れる電流はその振幅が交流電圧に応じて変化するため、この高周波電流をローパスフィルタ１８に通した波形は正弦波に近い形となる。
本実施形態では、整流回路の高電位側とインバータの出力Ｏの間にダイオードＤ５、チョークコイルＬｒ、共振用コンデンサＣｒを直列に接続すると共に、Ｄ５とＬｒの接続箇所をアノード側、電源コンデンサＣＥの高電位側をカソード側とする向きにダイオードＤ６を設け、共振型の高効率コンバータとする。インバータの構成及びＱ１とＱ２を駆動する制御手段１６は図１と同じであり、説明は省略する。また、ＣＥの両端に設けたＲは負荷である。なお、Ｑ１とＱ２を駆動する制御手段１６は図４（ａ）と同じ構成であってもよい。
【００２０】
図７（ｂ）と（ｃ）に、本実施形態の動作モードを示す。図７（ｂ）において、Ｑ２がオンすると、電流は整流回路からＤ５、Ｌｒ、Ｃｒ、Ｑ２、Ｃ２を通り、交流側に帰る経路で流れる。この電流はＬｒとＣｒで共振周波数が決まる共振電流であり、波形は正弦波状であり、振幅は交流電源１７の振幅に比例する。この電流によってＣ２の電圧ＶＣ２は増加し、その値がＶ_ＨＬを越えると、Ｑ２はオフする。Ｌｒを流れていた電流は、（ｂ）の破線で示すように、Ｑ１の還流ダイオードＱＤ１、ＣＥを通って交流側に戻り、ＣＥを充電する。この電流によって前のサイクルで充電していたＣ１の電圧ＶＣ１は減少し、その値がＶ_ＬＨ以下になると、Ｑ１はオン可能となる。次に、図７（ｃ）において、共振電流の極性が変わり、図７（ｂ）でＣｒに充電された電圧を放電するため、Ｃｒ、Ｌｒ、Ｄ６、Ｑ１、Ｃ１の経路で電流が流れ、この電流によってＣ１の電圧は増加し、その値がＶ_ＨＬを越えると、Ｑ１はオフする。そして、（ｃ）の破線で示すように、電流はＣｒ、Ｌｒ、Ｄ６、ＣＥ、Ｃ２、ＱＤ２を通る経路に変わり、Ｃ２の電圧ＶＣ２を減少させてＱ２をオン可能とする。
この動作は、図１の実施形態と同様であり、違いは共振電流の振幅が交流電源１７の振幅に比例することである。この影響はＱ１とＱ２のオン期間に現れる。即ち、交流電源１７の振幅が低い場合には電流も小さいため、ＶＣ１とＶＣ２がＶ_ＨＬに達する時間が長くなり、Ｑ１とＱ２のオン期間が増加する。逆に、交流電源１７の振幅が高い場合には電流も大きく、ＶＣ１とＶＣ２がＶ_ＨＬに達する時間が短くなり、Ｑ１とＱ２のオン期間は減少する。この場合、Ｑ１とＱ２は、交流電源１７の正弦波に応じて自動的にパルス幅変調された動作となり、交流電源１７から入力する電流は、通常の電流断続型コンバータによるチョッピングされた電流に比べて正弦波に近づき、高調波を低減する。
このように、本実施形態は、Ｃ１、Ｃ２を設けた共振型インバータを用いることにより、交流電源１７から入力する電流の高調波を抑制することができ、また、図１の実施形態で述べたように、還流ダイオードＱＤ１、ＱＤ２の逆回復が起きないため、スイッチング損失は低減し、また、図５の実施形態で述べたように、アーム短絡時の保護も合わせ持つことになる。
【００２１】
なお、本実施形態では、ダイオードＤ５、チョークコイルＬｒ、共振用コンデンサＣｒを整流回路の高電位側とインバータの出力Ｏの間に直列に接続することとしたが、整流回路の低電位側とインバータの出力Ｏの間に直列に接続してもよい。
【００２２】
【発明の効果】
以上説明したように、本発明によれば、高周波共振型電力変換装置において、進み位相を防止して必ず遅れ位相で動作することになるため、ダイオードの逆回復電流は流れず、スイッチング損失を低減すると共に、共振電流に同期したインバータの安定な動作を保証することができる。
また、数ＭＨｚ以上で動作する無電極ランプの点灯装置において、新たに調光機能を付加することができると共に、スイッチング損失を低減し、効率よく無電極ランプＲを点灯させることができ、さらに、アーム短絡時の短絡電流を自動的に絞り込み、装置保護を図ることができる。
また、通常の蛍光ランプ点灯装置において、ランプ寿命末期に共振周波数が変化しても、その共振周波数に追従して遅れ位相状態を維持することができると共に、ランプ寿命末期の異常を避けるための保護機能として、共振型電力変換装置の動作を停止し、保護を実現することができる。
また、高調波抑制用高効率コンバータにおいて、交流電源から入力する電流の高調波を抑制することができ、また、スイッチング損失を低減し、さらに、アーム短絡時の保護を図ることができる。
【図面の簡単な説明】
【図１】本発明の一実施形態による共振型電力変換装置の構成図
【図２】図１の実施形態の動作シーケンス
【図３】図１の実施形態の動作モード
【図４】本発明の他の実施形態による共振型電力変換装置の構成図
【図５】本発明を用いた無電極ランプ点灯装置の構成図
【図６】本発明を用いた蛍光ランプ点灯装置の構成図
【図７】本発明を用いた高調波抑制用高効率コンバータの構成図
【図８】共振型電力変換装置の説明図
【符号の説明】
Ｑ１、Ｑ２……パワーＭＯＳＦＥＴ
Ｄ１〜Ｄ６……ダイオード
Ｃ１〜Ｃ４、Ｃｒ、ＣＥ……コンデンサ
Ｌｒ……共振用リアクトル
Ｒ……負荷、無電極ランプ或いは蛍光ランプ
１〜４……半導体スイッチ素子
５……レベルシフト手段、６……起動停止手段（制御手段）
７、８……ＮＡＮＤ回路
９、１０……電圧比較器、１１、１２……基準電源
１３〜１５……駆動用電源
１６……インバータの制御手段
１７……交流電源、１８……ローパスフィルタ[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a resonant power converter, and more particularly, to a resonant power converter that is employed in an illumination lighting device having a high resonant frequency or a resonant active filter for suppressing harmonics.
[0002]
[Prior art]
Generally, since a fluorescent lamp has a negative resistance, a ballast is required to stabilize an alternating current flowing through the lamp. In recent years, a resonant inverter has been used as an electronic stabilizer that increases the lamp current in order to prevent the lamp from flickering and improve the luminous efficiency. In this resonance type inverter, two power semiconductor switching elements having a function not to block reverse current are connected in series, and a resonance reactor (called a choke coil), a capacitor, and a lamp are connected to an output terminal corresponding to the connection point. Generally, a configuration in which is connected in series. The current flowing through the resonance reactor is controlled by changing the operating frequency of the inverter.
When the switching frequency for alternately turning on and off the two power semiconductor elements is f and the resonance frequency determined by the reactor and the capacitor is fo, if f is not constant with respect to fo, the lamp current also changes. Therefore, in order to stabilize the driving frequency of the switching element, there is a control circuit as disclosed in JP-A-8-9655. This control circuit detects the voltage across the freewheeling diode included in the power semiconductor switching element (which functions to prevent reverse current), turns on the power semiconductor switching element, and the current of the power semiconductor switching element is integrated by an integrator. It is characterized in that switching is performed in synchronization with the resonance current flowing through the lamp by a control method of integrating and turning off the element when this value is higher than the reference value.
[0003]
[Problems to be solved by the invention]
A switching frequency of a general fluorescent lamp lighting inverter is about 50 kHz, and a high frequency AC voltage is applied between electrodes provided at both ends of the lamp, and plasma is maintained by a high electric field generated in the lamp tube. In recent years, an electrodeless lamp has been reported in which a frequency is increased to several MHz and a high-frequency magnetic field is generated by a high-frequency alternating current, and the plasma in the lamp tube is maintained by this magnetic field. Alternatively, since the volume of the resonance reactor and capacitor can be reduced according to the frequency even in a general resonance type power supply, it has been studied to increase the switching frequency to MHz.
In the case of such a resonant inverter of several MHz, there is a concern about an operation delay in the method of turning off the element by comparing the integrated value of the current with the reference value as in the above-described known example. In the known example, a part of the current flowing through the power semiconductor switching element is charged in a capacitor in the integrator, and the charging voltage is compared with a reference value. The charged voltage is discharged by the integrator itself until the next switching. Here, the time for which the integrator discharges the charging voltage is determined by the resistance value of the element inside the integrator, but the discharge time varies depending on the variation of the element characteristic or the resistance value change due to temperature rise. If the variation in the discharge time is 0.1 μs, for example, the operation delay with respect to the ON period of the element is only 0.5% of one wavelength for a frequency of 50 kHz, but 20% of one wavelength for 2 MHz. Also reach.
As described above, when a high frequency resonant inverter of several MHz is controlled by the conventional method, there is a problem that the variation of the switching frequency due to the operation delay becomes considerably large.
[0004]
In the case of a lamp lighting device, there is a relationship as shown in FIG. 8A between the switching frequency f of the inverter and the resonance frequency fo determined by the reactor and the capacitor, and the operation at the resonance point (f = fo) is the boundary. f> fo is called a lag phase, and f <fo is called a lead phase. The current IL of the resonance circuit decreases compared to the value at the resonance point regardless of the delay phase or the advance phase. Therefore, the inverter is desired to operate near the resonance point, but in the case of the lead phase, there arises a problem that a current passing through the inverter flows. Below, the problem in the case of a lead phase is described concretely.
As shown in FIG. 8 (b), if the power semiconductor switching elements are Q1 and Q2, the freewheeling diodes incorporated in each are QD1 and QD2, and the output voltage taken out from the connection position between Q1 and Q2 is Vo, the leading phase The operation in this case is as shown in FIG. In FIG. 8C, the waveform of the resonance current IL is advanced by the phase ψ with respect to the waveform of the output voltage Vo of the inverter. In this lead phase, as one cycle of operation, the resonance current IL switches from positive to negative during the ON period of Q1, and the current flows through QD1. Next, when the control circuit turns off Q1 and turns on Q2, conversely, a reverse voltage is suddenly applied to QD1, which has previously flowed forward current. As a result, electrons and holes accumulated in QD1 (hereinafter referred to as residual carriers) are discharged, and reverse current (hereinafter referred to as reverse recovery current) flows from QD1 toward the anode. This current flows through Q2 and becomes a through current for the inverter. The time for discharging the residual carriers is described in the element specifications as the reverse recovery time of the diode, and it is 0.05 to 0.1 μs even for an element with a short reverse recovery time called a high-speed diode.
When operating a resonant inverter of several MHz near the resonance point, there is a high possibility that a leading phase will occur due to variations in switching frequency, and the frequency is also high, so the loss due to through current determines the thermal operating limit of the inverter device It becomes.
[0005]
An object of the present invention is to ensure a stable operation synchronized with a resonance current and prevent a leading phase that causes a switching loss in a resonance type power conversion device considering an operating frequency of several MHz.
[0006]
[Means for Solving the Problems]
  In order to solve the above-described problems, a power source, an inverter including a plurality of voltage-driven semiconductor elements connected to the power source and having a function of preventing reverse current, and a resonance unit including a reactor and a capacitor on the output side of the inverter In a resonant power converter that supplies alternating current,Voltage-driven semiconductor element between the first voltage-driven semiconductor element connected to the positive electrode of the power supply and the output terminal of the inverter and between the second voltage-driven semiconductor element connected to the output terminal of the inverter and the negative electrode of the power supply Provided with voltage charging means for charging the voltage according to the current flowing through
  A drive means for applying a control voltage to each control voltage application terminal of each of the voltage-driven semiconductor elements at an arbitrary timing; and a comparison means for comparing the voltage of the voltage charging means with a reference voltage. In response to this, the voltage-driven semiconductor element is turned on / off.
  In addition, driving means for applying a control voltage to each control voltage application terminal of each voltage-driven semiconductor element at an arbitrary timing is provided, and the voltage of the voltage charging means is superimposed on the control voltage, and the voltage of the voltage charging means The voltage-driven semiconductor element is turned on / off based on the magnitude of.
  Further, a converter for rectifying an AC voltage, an inverter having a plurality of voltage-driven semiconductor elements having a function not to block reverse current, and at least provided between the output of the inverter and one terminal on the high voltage or low voltage side of the converter In a resonance type power converter comprising a resonance means including a reactor and a capacitor, and a smoothing capacitor for smoothing the current of the resonance means,Voltage between the first voltage-driven semiconductor element connected to the high-voltage side of the converter and the output terminal of the inverter, and between the second voltage-driven semiconductor element connected to the output terminal of the inverter and the low-voltage side terminal of the converter Voltage charging means for charging the voltage according to the current flowing through the driving semiconductor element is provided,
  A drive means for applying a control voltage to each control voltage application terminal of each of the voltage-driven semiconductor elements at an arbitrary timing; and a comparison means for comparing the voltage of the voltage charging means with a reference voltage. In response to this, the voltage-driven semiconductor element is turned on / off.
  In addition, driving means for applying a control voltage to each control voltage application terminal of each voltage-driven semiconductor element at an arbitrary timing is provided, and the voltage of the voltage charging means is superimposed on the control voltage, and the voltage of the voltage charging means The voltage-driven semiconductor element is turned on / off based on the magnitude of.
[0007]
  The present inventionVoltage charging meansAs a result, the voltage-driven semiconductor element of the inverter is turned on and off in synchronization with the resonance current. In addition, both the high-potential side element and the low-potential side element are turned on when a current flows through the freewheeling diode, and are turned off when a current flows through the element. This guarantees that there is no current flowing through the high-potential-side free-wheeling diode immediately before the low-potential-side element is turned on. Will do. As a result, the reverse recovery current of the diode does not flow, switching loss can be reduced, and stable operation of the inverter synchronized with the resonance current can be ensured.
  In addition, by applying the present invention to an electrodeless lamp and a fluorescent lamp lighting device, a new dimming function can be added, and the short-circuit current when the arm is short-circuited is automatically narrowed down. Since the operation of the resonance type power converter is stopped as a protection function for avoiding the abnormality, it is possible to protect the device.
  In addition, by applying the present invention to the high-efficiency converter for suppressing harmonics, it is possible to suppress harmonics of the current input from the AC power supply, and to protect against arm short circuit.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
  Hereinafter, embodiments of the present invention will be described with reference to the drawings.
  FIG. 1 is a configuration diagram showing an embodiment of a resonant power converter according to the present invention. In FIG. 1, Q1 and Q2 that are bridge-connected are power MOSFETs, each having a drain terminal for inputting current, a source terminal for outputting current, and a gate terminal to which control voltage is applied or removed, and the control voltage is applied to the gate terminal. The current flowing between the drain and the source is passed or cut off by applying or removing. The MOSFET incorporates a diode in the direction from the source terminal to the drain terminal. Hereinafter, the diode built in Q1 is QD1, and the diode built in Q2 is QD2. The drain terminal of Q1 is connected to the positive electrode of the power supply 15, and a capacitor C1 is connected between the source terminal of Q1 and the drain terminal of Q2.(Voltage charging means)And the connection point between C1 and Q2 is the output terminal O of the inverter. A capacitor C2 is provided between the source terminal of Q2 and the negative electrode of the power supply 15.(Voltage charging means)And the connection point between the capacitor C2 and the negative electrode of the power source 15 is a common potential and is called N. A resonance reactor Lr and a resonance capacitor Cr are connected in series between the output terminal O and the common potential N, and a load resistance R is provided in parallel with Cr.
[0009]
Next, the inverter control circuit 16 will be described. First, the drive circuit of Q1 is provided with a drive power supply 13 with the output point O as a reference potential, and between the positive electrode and the negative electrode of the drive power supply 13, a complementary circuit composed of elements 1 and 2 each having a common control terminal. A type switch means is provided, and an output is taken out from the connection point between the elements 1 and 2 and connected to the gate of Q1. The complementary switch means is a CMOS inverter or similar means. When the element 1 is turned on (2 is off at this time), a current for applying a control voltage is supplied to the gate terminal of Q1, and when the element 2 is turned on (this When the time 1 is off), a current for discharging the charged electric charge is supplied to the gate terminal of Q1. A signal is applied from the NAND circuit 7 to the control terminal of the complementary switch means composed of the elements 1 and 2.
The NAND circuit 7 receives a signal obtained by comparing the voltage C1 with the reference voltage 11 by the comparator 9 and a signal from the level shift means 5.
The comparator 9 preferably has a characteristic having hysteresis, and the reference voltage for changing the output of the comparator 9 from Low to High is V V._LHConversely, the reference voltage for changing from High to Low is V_HLAnd Here, the voltage of C1 is the reference voltage 11 (V_LH), The output of the comparator 9 will be High and V_HL> V_LHSet the relationship.
The level shift means 5 is a means for converting a signal based on the common potential N of the lower arm into a signal based on the output O of the upper arm, and at startup, the voltage-driven semiconductor element of the inverter is converted at a predetermined frequency. Generates a signal that turns on and off.
Next, the drive circuit of Q2 provides a drive power supply 14 with common N as a reference potential, and a complementary switch comprising elements 3 and 4 having a control terminal commonly connected between the positive electrode and the negative electrode of the drive power supply 14. Means are provided, and the output is taken out from the connection point between the elements 3 and 4 and connected to the gate of Q2. A signal is applied from the NAND circuit 8 to the control terminal of the complementary switch means composed of the elements 3 and 4.
The NAND circuit 8 receives a signal obtained by comparing the voltage C2 with the reference voltage 12 by the comparator 10 and a signal from the start / stop means 6.
The comparator 10 has hysteresis similar to the comparator 9 described above, and the voltage of C2 is the reference voltage 12 (V_LH), The output of the comparator 10 becomes High in the same way as the comparator 9 and V_HL> V_LHThe relationship is the same.
The start / stop means 6 has a function of generating a trigger signal when starting and stopping.
[0010]
The operation of the start / stop means 6 and the operation of the entire resonance circuit will be described with reference to FIGS.
(1) Operation at startup
When the signal S is input, the start / stop means 6 outputs a signal having a predetermined frequency fs as shown in FIG. Here, the frequency fs is selected to be higher than the resonance frequency fo determined by Lr and Cr in FIG. Vo represents the voltage at the output terminal O, and IL represents the resonance current. The start / stop means 6 simultaneously supplies the level shift means 5 with signals L and H obtained by inverting High and Low of the signal of the frequency fs. With these signals, the inverter composed of Q1 and Q2 starts to start with a delay phase ψ with respect to the resonance frequency fo.
That is, assuming that the voltages charged to the capacitors C1 and C2 are VC1 and VC2, respectively, first, a signal is applied to the Q1 gate by the H signal of the level shift means 5, the Q1 is turned on, and the current flowing through Q1 is C1. Is charged and VC1 increases. If the frequency fs at the time of start-up is set higher than the frequency f at the time of steady operation, the voltage charged in C1 during the ON period of Q1 will be the reference voltage V of the comparator 9._HLThe ON period of Q1 is determined by the drive signal transmitted by the level shift means 5. Next, when Q1 is turned off by the L signal of the level shift means 5 and a control voltage is applied to the Q2 gate by the H signal of the start / stop means 6, the resonance current IL flows through the freewheeling diode QD2 incorporated in Q2, The voltage VC2 charged to C2 in the previous cycle is decreased. When the polarity of the resonance current IL changes, the current flows through Q2, C2 charges this current, and VC2 increases. As described above, the frequency fs is set higher than the frequency f in the steady operation. Therefore, VC2 is the reference voltage V of the comparator 10 during the ON period of Q2._HLNot reach. The on period of Q2 is determined by the drive signal transmitted by the start / stop means 6, and then Q2 is turned off and a control voltage is applied to Q1 via the level shift means 5. The resonance current IL flows through the freewheeling diode QD1 incorporated in Q1, and decreases the voltage VC1 charged in C1 in the previous cycle. When the polarity of the resonance current IL changes, the current flows through Q1. The above is the operation of one cycle, and Q1 and Q2 are switched according to the frequency fs supplied by the start / stop means 6.
(2) Transition from startup to steady operation
The transition to the steady operation is performed by gradually decreasing the frequency fs. The operation assuming that the frequency fs of the signal output from the start / stop means 6 is slightly lower than the frequency f during steady operation will be described below. FIG. 3 is an explanatory diagram illustrating the following operation modes (a) to (d).
Mode (a): The voltage VC1 charged to C1 by the current flowing through Q1 when Q1 is on is the reference voltage V of the comparator 9_HL, The output of the comparator 9 changes to Low, the output of the NAND circuit 7 becomes High regardless of the output of the level shift means 5, and the output of the complementary switch comprising the elements 1 and 2 becomes Low. Thus, the gate voltage of Q1 is discharged by the element 2, and Q1 is turned off.
Mode (b)When Q1 is turned off, the resonance current IL flows through the free-wheeling diode QD2 of Q2, and the voltage VC2 charged in C2 in the previous cycle is decreased. The period during which current flows in QD2 is longer than that at the time of startup, and VC2 continues to decrease._LHWhen it becomes below, the output of the comparator 10 changes to High. If the signal of the start / stop means 6 is H, the output of the NAND circuit 8 becomes High and Q2 is turned on. As long as the current continues to flow through QD2, VC2 decreases and is charged with a reverse polarity, but the output of the comparator 10 remains high.
Mode (c): When the polarity of the resonance current IL changes, the current flows through Q2, and the voltage VC2 of C2 becomes the reference voltage V of the comparator 10._HL, The output of the comparator 10 changes to Low, the output of the NAND circuit 8 becomes High regardless of the output of the start / stop means 6, and Q2 is turned off.
Mode (d): By turning off Q2, the resonant current IL flows through the freewheeling diode QD1 of Q1, and decreases the voltage VC1 charged to C1 in the previous cycle. The period during which current flows through QD1 is long, VC1 continues to decrease,_LHWhen it becomes below, the output of the comparator 9 changes to High, and if the signal of the level shift means 5 is H, the output of the NAND circuit 7 becomes High and Q1 is turned on. As long as current continues to flow through QD1, Vc1 decreases and is charged to the opposite polarity.
Here, if the capacitances of the capacitors C1 and C2 are several tens or more times larger than the resonance capacitor Cr, the combined value of C1 and C2 is almost equal to Cr, so that there is almost no influence on the resonance current. Further, if the capacitances of C1 and C2 are 8 times or more larger than the gate-source capacitance Cgs of Q1 and Q2, the voltage of the driving power supplies 13 and 14 is divided into Cgs even if the voltages of C1 and Cgs or C2 and Cgs are divided. Since a sufficient control voltage is applied, there is no problem.
[0011]
As described above, in this embodiment, C1 and C2 are provided, and the charging voltage of C1 and C2 is decreased by the current flowing through the freewheeling diode including both the elements of Q1 and Q2, and when the charging voltage becomes lower than the reference value. , Q1 and Q2 are turned on, and conversely, a current flows through the element, and charging voltages of C1 and C2 increase. When this charging voltage becomes higher than a reference value, Q1 and Q2 are turned off. As a result, the voltage-driven semiconductor elements Q1 and Q2 of the inverter are turned on and off in synchronization with the resonance current IL. This is because Q1 (or Q2) immediately before Q2 (or Q1) is turned on. It is guaranteed that there is no current flowing through the free-wheeling diode, and it does not operate in the leading phase, and always means the lagging phase ψ. Thereby, in this embodiment, the reverse recovery current of the diode does not flow, and the switching loss can be reduced.
[0012]
FIG. 4 shows another embodiment of the present invention. (A) is a block diagram of the resonance type | mold power converter device by this embodiment, (b) is the operation | movement figure. In this embodiment, the voltages of C1 and C2 shown in the embodiment of FIG._LHOr V_HLThe point of difference is that the comparator to be compared is deleted, and the start / stop means 6 of the embodiment of FIG. The control means 6 is not limited to the start-up sequence described in FIG. 2, and has a function of transmitting random control commands to Q1 and Q2 according to the signal S. Other configurations are the same as those of the embodiment of FIG.
Since voltage-driven elements such as MOSFETs are becoming more and more miniaturized year by year and the on-resistance of the elements is lower, the elements are saturated when the gate-source voltage slightly exceeds the threshold voltage. It was possible to pass a sufficient current. In the embodiment of FIG. 4A, if the voltage value of the drive power supplies 13 and 14 is Vcc, the gate voltage (control voltage) of (Vcc−VC1) is applied to the gate-source voltage of Q1. As described above, VC1 increases according to the current flowing through Q1, and Q1 is turned on / off depending on whether (Vcc-VC1) is larger or smaller than the gate threshold voltage Vth of Q1. . The embodiment of FIG. 4A uses the fact that (Vcc−VC1) increases or decreases according to the resonance current IL, so that the inverter operation synchronized with the resonance frequency can be continued without using a special comparator. It is a feature. The same applies to ON / OFF of Q2.
[0013]
The operation will be described with reference to FIG. VC1 and VC2 change to positive and negative according to the resonance current IL, and are applied with opposite polarities between the gate and source of Q1 and Q2. As a result, when (Vcc-VC1) becomes equal to or lower than the threshold voltage Vth of Q1, Q1 is turned off and current flows through QD2. VC2 is reduced by the current of QD2 as in the embodiment of FIG. 1, and when (Vcc-VC2) becomes equal to or higher than the threshold voltage Vth of Q2, Q2 can be turned on. The above operation is repeated in one cycle.
That is, when the voltage-driven semiconductor element Q1 on the high potential side of the inverter is turned on and the current flowing into the resonance circuits Lr and Cr is defined as a positive direction, and a positive current flows through the element Q1, this current is charged to C1. Then, the gate (control) voltage of (Vcc-VC1) is applied to the gate-source voltage of Q1. As a result, when current flows, the gate voltage of Q1 decreases and the on-resistance of Q1 increases, and when current further flows, it works to turn off Q1. Next, when Q1 is turned off, the resonance current IL flows through the free-wheeling diode QD2 of the voltage drive semiconductor element Q2 on the low potential side. This current is a reverse current for Q2, and the charge voltage that C2 was charged in the previous cycle is discharged by this reverse current, and further, a voltage of reverse polarity is charged. This voltage superimposes a positive voltage on the gate (control) voltage of Q2, and when this voltage exceeds the gate threshold value of Q2, Q2 goes to the on state. However, as long as current flows through the freewheeling diode QD2, no forward current flows through Q2. Next, when the polarity of the resonance current changes, the current flows through Q2, and this current is charged in C2, and a negative voltage is superimposed on the gate (control) voltage of Q2, and the gate (control) of Q2 Reduce voltage. When further current flows and the gate (control) voltage of Q2 becomes equal to or lower than the gate threshold value of Q2, Q2 is turned off. As a result, the resonance current IL flows through the free-wheeling diode QD1 of Q1. The reverse current reduces the voltage charged in the previous cycle of C1. Thereafter, the charging voltage changes to a reverse polarity, and a positive voltage is superimposed on the gate (control) voltage of Q1, and when this voltage exceeds the gate threshold value of Q1, Q1 goes to the on state.
The above is the operation of one cycle, and the voltage-driven semiconductor elements Q1 and Q2 of the inverter are turned on and off in synchronization with the resonance current IL by C1 and C2. Both elements Q1 and Q2 are turned on when a current flows through the freewheeling diodes QD1 and QD2, and are turned off when a current flows through Q1 and Q2. This guarantees that there is no current flowing in the high-potential side free-wheeling diode QD1 immediately before the low-potential side element Q2 is turned on. become.
As a major difference from the embodiment of FIG. 1, this embodiment maintains the elements 1 and 3 of the complementary switch means of the upper and lower arms respectively, and turns on and off Q1 and Q2 only by the voltages of VC1 and VC2. It is the feature to make it. According to this operation, since Q1 and Q2 are switched without going through a comparator and a NAND circuit, the time delay is small and it is suitable for a high-frequency resonant inverter of several MHz or more.
[0014]
As described above, in this embodiment, C1 and C2 are provided, and the charging voltage of C1 and C2 is decreased by the current flowing through the freewheeling diode including both the elements of Q1 and Q2, and Q1 and Q2 based on the charging voltage are reduced. When the gate-source voltage (gate (control) voltage) becomes lower than the respective gate threshold voltages, Q1 and Q2 are turned on. On the contrary, current flows through the element, and the charging voltages of C1 and C2 increase. When the gate voltages of Q1 and Q2 based on this charging voltage become higher than the respective gate threshold voltages, Q1 and Q2 are turned off. As a result, also in this embodiment, as in the embodiment of FIG. 1, the voltage-driven semiconductor elements Q1 and Q2 of the inverter are turned on and off in synchronization with the resonance current IL, and the delayed phase ψ Will work with. For this reason, the reverse recovery current of the diode does not flow, and the switching loss can be reduced.
[0015]
FIG. 5 shows an embodiment in which the present invention is applied to an electrodeless lamp lighting device. In FIG. 5, R is an electrodeless lamp, and the electrodeless lamp winds a high frequency magnetic field in the bulb by winding a coil in the vicinity of a discharge bulb filled with mercury or amalgam and an inert gas and flowing a high frequency current. Generate and turn on the lamp. It is characterized by the absence of filaments compared to ordinary fluorescent lamps. As in the configuration shown in FIG. 1, the inverters for driving the electrodeless lamps are Q1 and Q2 provided with capacitors C1 and C2 on the source side, respectively, and the control means 16 for driving Q1 and Q2 is the same as in FIG. It is a configuration. The control means 16 for driving Q1 and Q2 may have the same configuration as that shown in FIG.
A resonance reactor Lr and a capacitor Cr are connected in series between the output O and the common N of the inverter, and an electrodeless lamp R and an auxiliary capacitor C4 are connected in series to both ends of Cr. The inverter rectifies an AC current received from the AC power supply 17 through a rectifier circuit including a low-pass filter 18 and diodes D1 to D4, charges the current to the smoothing capacitor CE, and supplies current from the CE to the inverter.
[0016]
In order to light the electrodeless lamp R efficiently, it is important to apply an alternating voltage of several MHz or more from the inverter to the resonance circuits Lr and Cr. According to the configuration of FIG. 5, as described in the explanation of the operation of FIG. 2, the inverter is driven in synchronization with the resonance current IL, and a delayed phase is ensured even with a high-frequency alternating voltage of several MHz or more. Therefore, the present embodiment can reduce the switching loss and efficiently turn on the electrodeless lamp R.
[0017]
Moreover, in the current electrodeless lamp lighting device, there is no example having a dimming function of the lamp, but, like a normal fluorescent lamp with a filament, according to the configuration of FIG. 5, by changing the switching frequency of the inverter, Dimming is possible. That is, as shown in FIG. 8A, as the switching frequency f of the inverter is increased with respect to the resonance frequency fo, the resonance current is reduced with a delayed phase. However, in the case of an electrodeless lamp, since the frequency of the resonance point is several MHz, it is not easy to drive the inverter at a switching frequency that is many times that frequency. In particular, in the high-frequency inverter, an arm short circuit in which Q1 and Q2 are simultaneously turned on is expected, and a countermeasure for preventing it is a problem.
Here, the control circuit 16 of FIG. 1 shown in FIG. 5 is changed to the control circuit 16 shown in FIG. 4A, and the inverter is driven by the control means 6 and the level shift means 5 at a frequency several times higher than that during normal lighting. A protection process when an arm short circuit occurs will be described.
When Q1 and Q2 are turned on at the same time, a current passing through Q1 and Q2 flows from the smoothing capacitor CE, and this current reaches a value determined by the saturation current of Q1 or Q2. On the other hand, this short-circuit current always passes through C1 and C2, and C1 and C2 are charged with a larger current than that during lighting, and the respective voltage increases faster. The saturation current of the voltage-driven element is lower as the gate voltage is smaller, but the gate voltages of Q1 and Q2 are represented by (Vcc-VC1) and (Vcc-VC2), respectively, as described above, and depending on the short circuit current As VC1 and VC2 increase, the gate voltage decreases and the saturation current (ie, short circuit current) decreases. This phenomenon is a negative feedback action, and the short-circuit current is automatically narrowed down by this negative feedback action.
As described above, the resonant inverter of the present invention is guaranteed not to break down the device due to the arm short circuit, and as a result, it can be said that it is preferable from the viewpoint of device protection when the arm is shorted.
[0018]
FIG. 6 shows an embodiment in which the present invention is applied to a fluorescent lamp lighting device. In FIG. 6, R is a fluorescent lamp with a filament. In the case of a fluorescent lamp with a filament, the configuration of the resonance circuit including the lamp connected between the output O of the inverter and the common N is slightly different from the configuration of FIG. The other structure is the same as that of FIG. 5, and has the same effect as the high-frequency electrodeless lamp lighting device of FIG. The control means 16 for driving Q1 and Q2 may have the same configuration as that shown in FIG.
In the case of a fluorescent lamp with a filament, a state in which emission from one or both filaments disappears at the end of the lifetime. For example, in FIG. 6, when the emission of both filaments is eliminated, the lamp R becomes equal to a high resistance, and Lr and Cr and an auxiliary capacitor C4 are connected in series between the output O and the common N. Since the resonance frequency fo becomes high due to the combined capacity of Cr and C4, the conventional lighting device reaches a state of a leading phase of f <fo.
Even in such a state at the end of the lamp life, according to the present embodiment, it is possible to suppress an overcurrent caused by a loss due to a lead phase or a change in the resonance point. That is, when the resonance frequency fo increases due to the combined capacitance of Cr and C4 and the resonance current also increases, the time for charging C1 and C2 by the current flowing through Q1 or Q2 is shortened, and current flows through these elements. The operation of turning off Q1 or Q2 by detecting the voltages of C1 and C2 within the flowing period is maintained. That is, this follows the change of the resonance frequency and maintains the delayed phase state.
By the way, if it is assumed that the lead phase has been reached, the reverse recovery current flowing through the freewheeling diode on one side flows through C1 and C2, and thus both VC1 and VC2 increase. In the case of the embodiment of FIG. 1, as the reverse recovery current is larger, the voltages of VC1 and VC2 are the reference value V._HLAnd the comparators 9 and 10 operate to turn off Q1 and Q2. In the embodiment of FIG. 4, (Vcc-VC1) and (Vcc-VC2) are equal to or lower than the gate threshold voltage, and Q1 and Q2 are turned off. As described above, the inverter according to the present embodiment stops the operation without synchronizing with the resonance cycle. However, the operation stop is effective as a protection function for avoiding an abnormality at the end of the lamp life.
[0019]
FIG. 7 shows an embodiment in which the present invention is applied to a high efficiency converter for suppressing harmonics. FIG. 7A shows the configuration.
In recent years, a number of high-efficiency converters for suppressing harmonics have been reported as regulations regarding power supply harmonics are implemented. One of them is a converter called a current interruption type, which rectifies an alternating current received from the alternating current power supply 17 through a rectifier circuit using a low-pass filter 18 and diodes D1 to D4, and flows it to the choke coil Lr. In a normal current intermittent converter, the current flowing through Lr is chopped to a high frequency by a power semiconductor switching element, and the energy stored in Lr is supplied to the power supply capacitor CE. Since the amplitude of the current flowing through Lr changes according to the AC voltage, the waveform obtained by passing this high-frequency current through the low-pass filter 18 has a shape close to a sine wave.
In this embodiment, a diode D5, a choke coil Lr, and a resonance capacitor Cr are connected in series between the high potential side of the rectifier circuit and the output O of the inverter, and the connection point between D5 and Lr is the anode side, and the power supply capacitor CE. A diode D6 is provided in the direction in which the high potential side is the cathode side, so that a resonance type high efficiency converter is obtained. The configuration of the inverter and the control means 16 for driving Q1 and Q2 are the same as those in FIG. R provided at both ends of the CE is a load. The control means 16 for driving Q1 and Q2 may have the same configuration as that shown in FIG.
[0020]
FIGS. 7B and 7C show the operation modes of this embodiment. In FIG. 7B, when Q2 is turned on, current flows from the rectifier circuit through D5, Lr, Cr, Q2, and C2 along a path that returns to the AC side. This current is a resonance current whose resonance frequency is determined by Lr and Cr, the waveform is sinusoidal, and the amplitude is proportional to the amplitude of the AC power supply 17. With this current, the voltage VC2 of C2 increases, and its value is V_HLWhen Q2 is exceeded, Q2 is turned off. The current flowing through Lr returns to the AC side through the free-wheeling diodes QD1 and CE of Q1, as shown by the broken line in (b), and charges CE. This current decreases the voltage VC1 of C1 that was charged in the previous cycle, and the value is V_LHQ1 can be turned on in the following cases. Next, in FIG. 7 (c), the polarity of the resonance current changes, and in order to discharge the voltage charged in Cr in FIG. 7 (b), current flows through the path of Cr, Lr, D6, Q1, and C1, This current increases the voltage of C1, and its value is V_HLWhen Q1 is exceeded, Q1 is turned off. Then, as indicated by the broken line in (c), the current changes to a path passing through Cr, Lr, D6, CE, C2, and QD2, and the voltage VC2 of C2 is decreased to enable Q2.
This operation is the same as that of the embodiment of FIG. 1, and the difference is that the amplitude of the resonance current is proportional to the amplitude of the AC power supply 17. This effect appears in the on periods of Q1 and Q2. That is, when the amplitude of the AC power supply 17 is low, the current is small, so that VC1 and VC2 are V_HLThe time required to reach Q becomes longer, and the ON period of Q1 and Q2 increases. Conversely, when the amplitude of the AC power supply 17 is high, the current is large, and VC1 and VC2 are V_HLThe time to reach is shortened, and the on period of Q1 and Q2 decreases. In this case, Q1 and Q2 are automatically pulse width modulated in accordance with the sine wave of the AC power supply 17, and the current input from the AC power supply 17 is compared with the current chopped by the normal current interrupted converter. Approach the sine wave to reduce harmonics.
Thus, this embodiment can suppress the harmonics of the current input from the AC power supply 17 by using the resonance type inverter provided with C1 and C2, and has been described in the embodiment of FIG. As described above, since the reverse recovery of the freewheeling diodes QD1 and QD2 does not occur, the switching loss is reduced and, as described in the embodiment of FIG.
[0021]
In this embodiment, the diode D5, the choke coil Lr, and the resonance capacitor Cr are connected in series between the high potential side of the rectifier circuit and the output O of the inverter. However, the low potential side of the rectifier circuit and the inverter May be connected in series between the outputs O.
[0022]
【The invention's effect】
As described above, according to the present invention, in the high-frequency resonant power converter, since the leading phase is prevented and the operation is always performed in the lagging phase, the reverse recovery current of the diode does not flow and the switching loss is reduced. In addition, stable operation of the inverter synchronized with the resonance current can be ensured.
In addition, in the electrodeless lamp lighting device operating at several MHz or more, a dimming function can be newly added, switching loss can be reduced, and the electrodeless lamp R can be efficiently lit, The device can be protected by automatically narrowing down the short-circuit current when the arm is short-circuited.
In addition, in a normal fluorescent lamp lighting device, even if the resonance frequency changes at the end of the lamp life, the delayed phase state can be maintained following the resonance frequency, and protection to avoid abnormalities at the end of the lamp life As a function, the operation of the resonant power converter can be stopped and protection can be realized.
Further, in the high-efficiency converter for suppressing harmonics, the harmonics of the current input from the AC power supply can be suppressed, switching loss can be reduced, and protection when the arm is short-circuited can be achieved.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of a resonant power converter according to an embodiment of the present invention.
2 is an operation sequence of the embodiment of FIG.
3 is an operation mode of the embodiment of FIG.
FIG. 4 is a configuration diagram of a resonant power converter according to another embodiment of the present invention.
FIG. 5 is a configuration diagram of an electrodeless lamp lighting device using the present invention.
FIG. 6 is a block diagram of a fluorescent lamp lighting device using the present invention.
FIG. 7 is a block diagram of a high efficiency converter for suppressing harmonics using the present invention.
FIG. 8 is an explanatory diagram of a resonant power converter.
[Explanation of symbols]
Q1, Q2 ... Power MOSFET
D1-D6 …… Diodes
C1-C4, Cr, CE …… Capacitor
Lr: Resonant reactor
R: Load, electrodeless lamp or fluorescent lamp
1-4 …… Semiconductor switch element
5 …… Level shift means, 6 …… Start / stop means (control means)
7, 8 ... NAND circuit
9, 10 ... Voltage comparator, 11, 12 ... Reference power supply
13-15 …… Power supply for driving
16 …… Control means for inverter
17 …… AC power supply, 18 …… Low-pass filter

Claims

An inverter including a power source, a plurality of voltage-driven semiconductor elements connected to the power source and having a function of preventing reverse current, and a resonance means including a reactor and a capacitor on the output side of the inverter, In the resonant power converter to be supplied,
Between the first voltage-driven semiconductor element connected to the positive electrode of the power supply and the output terminal of the inverter, and between the second voltage-driven semiconductor element connected to the output terminal of the inverter and the negative electrode of the power supply. A voltage charging means for charging a voltage according to a current flowing through the voltage-driven semiconductor element;
A drive means for applying a control voltage to each control voltage application terminal of each of the voltage-driven semiconductor elements at an arbitrary timing; and a comparison means for comparing the voltage of the voltage charging means with a reference voltage. A resonance-type power conversion apparatus, wherein the voltage-driven semiconductor element is turned on / off according to the voltage of the means.

2. The voltage-driven semiconductor element according to claim 1, wherein when the voltage of the voltage charging unit corresponding to a current flowing in the reverse direction through the voltage-driven semiconductor element becomes equal to or lower than a first reference value, the voltage-driven semiconductor element is turned on, and the voltage A resonance type power conversion device, wherein the voltage driving type semiconductor element is turned off when the voltage of the voltage charging means corresponding to the current flowing in the forward direction through the driving type semiconductor element becomes equal to or higher than a second reference value. .

An inverter including a power source, a plurality of voltage-driven semiconductor elements connected to the power source and having a function of preventing reverse current, and a resonance means including a reactor and a capacitor on the output side of the inverter, In the resonant power converter to be supplied,
Between the first voltage-driven semiconductor element connected to the positive electrode of the power supply and the output terminal of the inverter, and between the second voltage-driven semiconductor element connected to the output terminal of the inverter and the negative electrode of the power supply. A voltage charging means for charging a voltage according to a current flowing through the voltage-driven semiconductor element;
Drive means for applying a control voltage to each control voltage application terminal of each of the voltage-driven semiconductor elements at an arbitrary timing, superimposing the voltage of the voltage charging means on the control voltage, and the voltage charging means; A resonance type power converter according to claim 1, wherein the voltage driven semiconductor element is turned on and off based on the magnitude of the voltage.

4. The voltage-driven semiconductor element according to claim 3, wherein when the voltage of the voltage charging means corresponding to a current flowing in the reverse direction through the voltage-driven semiconductor element is equal to or lower than a predetermined value, the voltage-driven semiconductor element is turned on. A resonant power conversion device, wherein the voltage-driven semiconductor element is turned off when a voltage of the voltage charging means corresponding to a forward current flows is a predetermined value or more.

5. The drive means according to claim 1, wherein the drive means applies a control voltage for turning on and off the inverter at a preset frequency at startup to each of the voltage-driven semiconductor elements, and the voltage charging means. A resonant power conversion device, wherein a constant control voltage is applied to each of the voltage-driven semiconductor elements at a steady time when the voltage reaches a predetermined voltage.

6. The method according to claim 1, wherein when a current passing through the inverter is generated, at least one of the voltage-driven semiconductor elements is set based on a voltage of the voltage charging unit that increases according to the current. A resonance type power converter characterized by being turned off.

6. The resonance type power converter according to claim 1, wherein an electrodeless lamp or a fluorescent lamp is connected in series to the resonance means or in parallel to one of the resonance means.

A converter that rectifies an alternating voltage; an inverter that includes a plurality of voltage-driven semiconductor elements having a function that does not block reverse current; and at least provided between the output of the inverter and one terminal on the high-voltage or low-voltage side of the converter In a resonance type power converter comprising a resonance means including a reactor and a capacitor, and a smoothing capacitor for smoothing the current of the resonance means,
Between the first voltage-driven semiconductor element connected to the high-voltage side of the converter and the output terminal of the inverter and between the second voltage-driven semiconductor element connected to the output terminal of the inverter and the low-voltage side of the converter Voltage charging means for charging the voltage according to the current flowing through the voltage-driven semiconductor element is provided between the terminals,
A drive means for applying a control voltage to each control voltage application terminal of each of the voltage-driven semiconductor elements at an arbitrary timing; and a comparison means for comparing the voltage of the voltage charging means with a reference voltage. A resonance-type power conversion apparatus, wherein the voltage-driven semiconductor element is turned on / off according to the voltage of the means.

A converter that rectifies an alternating voltage; an inverter that includes a plurality of voltage-driven semiconductor elements having a function that does not block reverse current; and at least provided between the output of the inverter and one terminal on the high-voltage or low-voltage side of the converter In a resonance type power converter comprising a resonance means including a reactor and a capacitor, and a smoothing capacitor for smoothing the current of the resonance means,
Between the first voltage-driven semiconductor element connected to the high-voltage side of the converter and the output terminal of the inverter and between the second voltage-driven semiconductor element connected to the output terminal of the inverter and the low-voltage side of the converter Voltage charging means for charging the voltage according to the current flowing through the voltage-driven semiconductor element is provided between the terminals,
Drive means for applying a control voltage to each control voltage application terminal of each of the voltage-driven semiconductor elements at an arbitrary timing, superimposing the voltage of the voltage charging means on the control voltage, and the voltage charging means; A resonance type power converter according to claim 1, wherein the voltage driven semiconductor element is turned on and off based on the magnitude of the voltage.