JP3665766B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a manufacturing method thereof.
[0002]
[Prior art]
In a field effect transistor, various problems such as a short channel effect are caused by a reduction in gate length as the size is reduced. For example, when silicon oxide is used for the gate insulating film, it is necessary to reduce the thickness in order to improve driving force. However, when the physical film thickness of the gate insulating film is reduced, a tunnel current flows, which becomes a problem particularly as a leakage current at the time of OFF.
[0003]
Therefore, a method for increasing the driving force even when the physical film thickness is increased is expected by using a high dielectric constant material having a dielectric constant higher than that of silicon oxide as the gate insulating film.
[0004]
As one of them, there is a technique for increasing the dielectric constant by mixing various elements in the SiO ₂ film. In this method, there is a problem that an element is hardly mixed in an interface portion between the semiconductor substrate and the gate insulating film, and a layer having a low element concentration exists in the gate insulating film. This layer having a low element concentration has a lower dielectric constant than other regions, and is equivalent to a series junction of capacitors. This causes a problem that the effective dielectric constant of the gate insulating film rapidly decreases as the interface low dielectric constant layer increases.
[0005]
By Therefore sputtering, but is possible to increase the concentration of the element to be混有in the SiO ₂ film have been made, this time contaminating elements occur a problem that fine crystallized precipitates with SiO ₂ film .
[0006]
[Problems to be solved by the invention]
The present invention has been made in order to solve the above-described problems, and does not cause the mixed elements to precipitate and microcrystallize, and a layer having a low element concentration is formed at the interface between the semiconductor substrate and the gate insulating film. An object of the present invention is to provide a semiconductor device including a non-gate insulating film and a method for manufacturing the same.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a semiconductor substrate,
A first gate insulating film made of amorphous Si _1-y Zr _y O ₂ (0.1 ≦ y ≦ 1) formed on the semiconductor substrate;
A second gate insulating film made of amorphous Si _1-x Zr _x O ₂ (0 <x ≦ 0.5 and x <y) formed on the first gate insulating film;
There is provided a semiconductor device comprising a gate electrode formed on the second gate insulating film.
[0008]
At this time, in the first gate insulating film, the value of the composition y of Zr may continuously decrease in the film thickness direction from the substrate side.
[0010]
The present invention also includes a step of forming a thin film made of Zr on a silicon substrate,
By forming a second gate insulating film made of amorphous Si _1-x Zr _x O ₂ (0 <x ≦ 0.5) on the thin film made of Zr , the silicon substrate and the second gate insulating film are formed. Forming a first gate insulating film made of amorphous Si _1-y Zr _y O ₂ (0.1 ≦ y ≦ 1 and x <y) between the films ;
And a step of forming a gate electrode on the second insulating film. A method of manufacturing a semiconductor device is provided.
[0011]
At this time, the thin film is formed using a sputtering gas of Ng having a purity of 97% or more (Ng is a rare gas selected from Ar, Kr, Xe, Ne, and He).
The second insulating film is formed by using a sputtering gas of Ng (Ng is a rare gas selected from at least one of Ar, Kr, Xe, Ne, and He) gas and a mixing ratio p of the Ng gas of 0% <p. It is preferably formed by using a mixed gas with an oxidizing gas of <0.13%.
[0012]
Further, the thin film is made of ZrHa _z (z is an integer satisfying 1 ≦ z ≦ 8, Ha is F, Cl, Br, I A halogen selected from one or more of the above) and SiH _u (u is an integer satisfying 1 ≦ u ≦ 8, Ha is a halogen selected from one or more of F, Cl, Br, or I). Forming,
ZrHm _w (w is an integer satisfying 1 ≦ w ≦ 8) Hm is OtBu, OiPr, dipivaloylmethanato ligand (C ₁₁ H ₁₉ O ₂ ), Ot-Am, 2,2,6,6-tetramethyl-3,5-octanedionato ligand _{(C 12 H 32 O 2)} , diisobutyryl isocyanatomethyl ligand _{(C 9 H 15 O 2)} , TEOS, the METHD Any one or more) and SiHm _v (v is an integer satisfying 1 ≦ v ≦ 8) Hm is OtBu, OiPr, dipivaloylmethanato ligand (C ₁₁ H ₁₉ O ₂ ), Ot-Am , 2,2,6,6-tetramethyl-3,5-octanedionato ligand _{(C 12 H 21 O 2)} , diisobutyryl isocyanatomethyl ligand _{(C 9 H 15 O 2)} , any TEOS It is preferable to use one or more types.
[0013]
The thin film made of Zr is preferably in the range of 0.33 monolayer to 2.0 monolayer.
[0014]
A step of forming a first gate insulating film made of amorphous Si _1-y Zr _y O ₂ (0.1 ≦ y ≦ 1) on a silicon substrate;
Forming a second gate insulating film made of amorphous Si _1-x Zr _x O ₂ (0 <x ≦ 0.5 and x <y) on the first gate insulating film;
And a step of forming a gate electrode on the second gate insulating film.
[0015]
At this time, the first gate insulating film and the second insulating film are made of ZrHm _w (w is an integer satisfying 1 ≦ w ≦ 8, Hm is OtBu, OiPr, dipivaloylmethanato ligand (C ₁₁ H ₁₉ O ₂ ), Ot-Am, 2,2,6,6-tetramethyl-3,5-octanedionate ligand (C ₁₂ H ₃₂ O ₂ ), diisobutyrylmethanato ligand (C ₉ H ₁₅ O ₂ ), TEOS, or METHD) and SiHm _v (v is an integer satisfying 1 ≦ v ≦ 8) Hm is OtBu, OiPr, dipivaloylmethanato ligand (C ₁₁ H ₁₉ O ₂ ), Ot-Am, 2,2,6,6-tetramethyl-3,5-octanedionate ligand (C ₁₂ H ₂₁ O ₂ ), diisobutyrylmethanato ligand (C ₉ H ₁₅ O _2), the TEOS Is preferably formed using a chosen) from displacement or one or more.
[0016]
The first gate insulating film and the second gate insulating film are preferably formed using a sputtering apparatus in which an angle formed between the target surface and the substrate surface is in a range of 60 degrees to 120 degrees. .
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the invention will be described with reference to the drawings.
[0018]
(Embodiment 1)
FIG. 1 is a cross-sectional view of a semiconductor device according to Embodiment 1 of the present invention.
[0019]
This semiconductor device includes a semiconductor substrate 14 made of silicon or the like and a first gate insulating film 13 formed on the semiconductor substrate 14. The gate insulating film 13 is made of amorphous Si _1-y Zr _y O ₂ (0.1 ≦ y ≦ 1) .
[0020]
A second gate insulating film 12 is formed on the first gate insulating film 13. The second gate insulating film 12 is made of amorphous Si _1-x Zr _x O ₂ (0 <x ≦ 0.5 and x <y) .
[0021]
A gate electrode 11 is formed on the second gate insulating film 12. As the gate electrode 11, a refractory metal such as tungsten can be used.
[0022]
In this semiconductor device, a metal silicate having a high metal composition ratio is formed as a gate insulating film in the lower layer, and a metal silicate having a lower metal composition ratio is formed in the upper layer. By forming the gate insulating film in this way, it is possible to prevent the metal contained in the gate insulating film from being deposited and to increase the dielectric constant of the gate insulating film.
[0023]
Such effects are obtained by forming amorphous Si _1-y Zr _y O ₂ (0.1 ≦ y ≦ 1) as a lower layer and amorphous Si _1-x Zr _x O ₂ (0 <x ≦ 0.5 ) as an upper layer. And it becomes remarkable by selecting x <y) .
[0024]
FIG. 6 is a phase diagram showing the relationship between the zirconium content and the temperature for zirconium silicate.
[0025]
As shown in FIG. 6, in the case of zirconium silicate, the instability of the mixed state increases as the zirconium concentration increases from 0% to 70%. This is because a mixture of ZrO ₂ and SiO ₂ has spinodal instability. _{Further, Zr x Si 1-x O} 2 silicate indicating an amorphous state is only metastable state.
[0026]
Further, as shown in FIG. 6, when the zirconium concentration is further increased from 70% to 100%, ZrSiO ₄ peritectic crystals are generated following the nucleation of ZrO ₂ , and thus an amorphous state at this zirconium concentration is shown. Zr _x Si _1-x O ₂ silicate is in a more unstable state than when the zirconium concentration is lower.
[0027]
Therefore, in order to maintain a metastable amorphous state during a practical heat treatment time, it is desirable that the amount of zirconium mixed is 40% by weight or less, that is, the composition of zirconium is 0.4 or less.
[0028]
Therefore, in the semiconductor device shown in FIG. 1, the metal composition x is 0 <x ≦ 0.4 so that no metal is deposited in the second metal silicate film 12 occupying most of the gate insulating film. It turns out that is desirable.
[0029]
Next, FIG. 7 shows the relationship between the dielectric constant of zirconium silicate and the zirconium composition.
[0030]
As shown in FIG. 7, it can be seen that the dielectric constant of zirconium silicate rapidly increases until the metal composition of zirconium reaches 0.4.
[0031]
As in the first metal silicate film 13 in the semiconductor device shown in FIG. 1, the bulk phase diagram of FIG. 6 is not applied at a film thickness of about 2 monolayers, and the metal composition exceeds 0.4. Will also stabilize. Further, even if the film thickness portion of about 2 monolayers is not amorphous, there is almost no influence on the dielectric constant of the entire silicate film, and the influence on the electrical characteristics of the gate channel region is slight.
[0032]
Considering the above, the upper limit for the metal composition ratio y of the extremely thin first metal silicate film 13 located in the lower layer is 1 which is a mathematical upper limit. On the other hand, as shown in FIG. 7, if the metal composition ratio y of the first metal silicate film 13 is less than 0.1, a sufficient dielectric constant cannot be obtained. Therefore, the metal composition y of the first metal silicate film 13 is desirably 0.1 ≦ y ≦ 1.
[0033]
Next, a method for manufacturing this semiconductor device will be described.
[0034]
First, a Zr (zirconium) film of about 1 monolayer is formed on a Si (silicon) substrate 14 by a sputtering method in an off-axis arrangement and at a substrate temperature of 500 ° C. and only in an Ar atmosphere. The off-axis apparatus supplies the sputtering raw material from an oblique direction with respect to the growth substrate. Note that the sputtering raw material may be supplied in parallel to the growth substrate surface. In the thin film forming process, the surface of the Si substrate 14 is reduced.
[0035]
Next, a SiZrO ₂ film 12 is formed to a thickness of about 10 nm on the Zr film only in an Ar atmosphere. At this time, the surface of the Zr film is oxidized. By this step, a SiZrO ₂ film 13 having a higher Zr concentration than the SiZrO ₂ film 12 is formed at the interface of the Si substrate 14.
[0036]
Next, a metal electrode 11 such as tungsten is formed on the SiZrO ₂ film 13 having a low Zr concentration by vapor deposition or the like.
[0037]
In the manufacturing method of the present embodiment, the thin film is formed by using Ng gas (Ng is a rare gas selected from one or more of Ar, Kr, Xe, Ne, and He) having a purity of 97% or more as a sputtering gas. The mixing ratio p of the second insulating film with respect to Ng (Ng is a rare gas selected from at least one of Ar, Kr, Xe, Ne, and He) gas and the Ng gas as a sputtering gas is 0%. <P <0.13% can be formed by using a mixed gas with an oxidizing gas.
[0038]
Next, a cross-sectional TEM photograph of this semiconductor device is shown in FIG.
[0039]
In the result of FIG. 2, it can be seen that the gate insulating film 13 is formed between the gate insulating film 12 and the silicon substrate 14 although it is extremely thin.
[0040]
FIG. 3 shows a TEM-EDX result of the substrate cross section shown in FIG.
[0041]
As shown in FIG. 3, the Zr concentration is relatively high at a depth of 10 nm to 12 nm, that is, the ZrSiO ₂ film 12 (FIG. 2), and the ZrSiO ₂ film 13 (FIG. 2) has a Zr concentration of 4 nm to 10 nm. It can be seen that the concentration is low. However, in the measurement result of the concentration distribution shown in FIG. 3, since the resolution in the film thickness direction is about 3 nm, a layer of about 1 monolayer is less than the resolution, and a clear step in the concentration distribution is not observed.
[0042]
However, since the spatial resolution is low, a region where the Si concentration from the Si substrate 23 is high should be observed on the Si substrate 23 interface side of the ZrSiO ₂ film 12. Nevertheless, the actual results shown in FIG. 3 show that the Si concentration is low. Therefore, it is considered that a ZrSiO ₂ thin film having a high Zr concentration is formed on the interface side of the Si substrate 23.
[0043]
By adopting such a manufacturing method, a low dielectric constant layer such as SiO ₂ is not formed at the interface between the Si substrate and the gate insulating film, and a high dielectric constant ZrSiO ₂ layer is formed. A gate insulating film having a high effective dielectric constant can be formed even with a film thickness.
[0044]
As a comparative example, FIG. 4 shows a cross-sectional view of a semiconductor device in which a ZrSiO ₂ film is directly deposited on a Si substrate 34 and a gate electrode 31 is formed thereon.
[0045]
As shown in FIG. 4, in the method of the comparative example, it can be seen that a thin layer of the SiO ₂ layer 33 is formed at the interface between the Si substrate 34 and the ZrSiO ₂ film 32.
[0046]
The thin SiO ₂ layer 33 has a low dielectric constant, and there is a problem that the dielectric constant of the entire gate insulating film is lowered.
[0047]
In the present invention, such a thin film having a low dielectric constant is not formed, and a high dielectric constant of the gate insulating film can be realized.
[0048]
(Embodiment 2)
In this embodiment, the first gate insulating film having a high Zr concentration employs a structure in which the Zr concentration continuously decreases in the film thickness direction from the Si substrate side.
[0049]
As shown in FIG. 5, in this semiconductor device, a first ZrSiO ₂ gate insulating film 54 is formed on a Si substrate 53. A second ZrSiO ₂ gate insulating film 52 is formed thereon. A gate electrode 51 such as tungsten is formed thereon.
[0050]
The Zr concentration of the first gate insulating film 54 is higher than that of the second gate insulating film 52 and continuously decreases in the film thickness direction from the interface of the Si substrate 53. Other Zr concentrations are the same as in the first embodiment. Such a structure also has the effect of the present invention.
[0051]
(Embodiment 3)
Next, another method for manufacturing a semiconductor device in the present invention will be described.
[0052]
First, the Si substrate is pretreated with hydrofluoric acid, and the natural SiO ₂ film on the surface is peeled off. Thereafter, the Si substrate is immersed in a mixed solution of sulfuric acid and hydrogen peroxide to remove carbon-based contaminants. Next, this Si substrate is placed in water and hydrogen termination is performed.
[0053]
The Si substrate that has been subjected to such treatment is quickly introduced into the CVD apparatus, and the inside of the apparatus is evacuated.
[0054]
Next, in the CVD apparatus, one monolayer of Zr thin film is formed on the Si substrate at a film forming temperature of 800 ° C. _{ZrC l4} gas as a material gas, a mixed gas of Ar and _{H 2} as a carrier gas. After the Zr film on the Si substrate grows one monolayer, the source gas is shut off. By this step, the surface of the Si substrate is reduced.
[0055]
Thereafter, a carrier gas that is a mixed gas of Ar and H ₂ is sufficiently flowed to sufficiently exhaust the residual raw material gas in the CVD apparatus. Next, the carrier gas is shut off and the inside of the apparatus is kept at a sufficient degree of vacuum.
[0056]
Next, Zr (t-OBu) ₄ -TEOS-O ₂ gas is introduced into the CDV apparatus, and a zirconium silicate film having a ratio of Zr: Si = 20: 80 is formed at a growth temperature of 550 ° C. By this step, the Zr film formed with a thickness of one monolayer is oxidized and mixed with silicon of the Si substrate, and the first gate made of Si _0.7 Si _0.3 SiO _{2 is formed at} the interface of the silicon substrate. An insulating film is formed. A second gate insulating film made of Si _0.8 Zr _0.2 Si ₂ is formed on the first gate insulating layer.
[0057]
Next, a gate insulating film made of a refractory metal such as tungsten is formed on the second gate insulating film.
[0058]
In the subsequent processes, the semiconductor device of this embodiment can be formed by forming the source region and the drain region by a normal MOS process.
[0059]
In the present embodiment, the thin film is made of ZrHa _z (z is an integer satisfying 1 ≦ z ≦ 8, Ha is F, Cl, Br, I A halogen selected from one or more of the above) and SiH _u (u is an integer satisfying 1 ≦ u ≦ 8, Ha is a halogen selected from one or more of F, Cl, Br, or I). Can be formed.
[0060]
In this embodiment, the second gate insulating film is made of ZrHm _w (w is an integer satisfying 1 ≦ w ≦ 8, Hm is OtBu, OiPr, dipivaloylmethanato ligand (C ₁₁ H ₁₉ O ₂ ), Ot-Am, 2,2,6,6- tetramethyl-3,5-octanedionato ligand _{(C 12 H 32 O 2)} , diisobutyryl isocyanatomethyl ligand _{(C 9 H} 15 _{O 2} ), TEOS, or METHD) and SiHm _v (v is an integer satisfying 1 ≦ v ≦ 8) Hm is OtBu, OiPr, a dipivaloylmethanato ligand (C ₁₁ H ₁₉ O _2), Ot-Am, 2,2,6,6- tetramethyl-3,5-octanedionato ligand _{(C 12 H 21 O 2)} , diisobutyryl isocyanatomethyl ligand _{(C 9 H 15} O _2), one of the TEOS kind It can be formed using the chosen) from above.
[0061]
The Zr thin film is preferably from 0.33 monolayer to 2.0 monolayer in order to reliably form a silicate with a high Zr concentration.
[0062]
【The invention's effect】
The present invention increases the effective dielectric constant of the gate insulating film by reducing the physical film thickness necessary for the gate insulating film by producing a layer with an increased concentration of mixed elements at the interface between the semiconductor substrate and the gate insulating film. be able to.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a semiconductor device according to Embodiment 1 of the present invention.
FIG. 2 is a cross-sectional view of the semiconductor device according to the first embodiment of the present invention.
FIG. 3 is a diagram showing changes in the concentration of each element of Zr, Si, and O in the thickness direction of the semiconductor device according to the first embodiment of the present invention.
FIG. 4 is a cross-sectional view of a semiconductor device of a comparative example.
FIG. 5 is a cross-sectional view of a semiconductor device according to Embodiment 2 of the present invention.
FIG. 6 is a phase diagram showing the relationship between the zirconium content and temperature for zirconium silicate.
FIG. 7 is a graph showing the relationship between the dielectric constant of zirconium silicate and the zirconium composition.
[Explanation of symbols]
11 ... gate electrode _{12 ··· Si 1-x Zr x} O 2 film _{13 ··· Si 1-y Zr y} O 2 film 14 ... semiconductor substrate 31 ... gate electrode 32 ... Si _{0 .8} Zr _0.2 film 33 ... SiO ₂ film 34 ... silicon substrate 51 ... gate electrode 52 ... Si _1-x Zr _x O ₂ film 53 ... semiconductor substrate 54 ... first 1 gate insulating film 52... Second gate insulating film

Claims (9)

  A semiconductor substrate;
  Amorphous Si formed on the semiconductor substrate _1-y Zr _y O ₂ A first gate insulating film made of (0.1 ≦ y ≦ 1);
  Amorphous Si formed on the first gate insulating film _1-x Zr _x O ₂ A second gate insulating film made of (0 <x ≦ 0.5 and x <y);
  A semiconductor device comprising: a gate electrode formed on the second gate insulating film.   2. The semiconductor device according to claim 1, wherein in the first gate insulating film, the value of the composition y of Zr continuously decreases in the film thickness direction from the substrate side.   Forming a thin film of Zr on a silicon substrate;
  On the thin film made of Zr, amorphous Si _1-x Zr _x O ₂ By forming a second gate insulating film made of (0 <x ≦ 0.5), amorphous Si is formed between the silicon substrate and the second gate insulating film. _1-y Zr _y O ₂ Forming a first gate insulating film made of (0.1 ≦ y ≦ 1 and x <y);
  And a step of forming a gate electrode on the second insulating film. The thin film is formed using Ng (Ng is a rare gas selected from one or more of Ar, Kr, Xe, Ne, and He) gas having a purity of 97% or more as a sputtering gas,
The mixing ratio p of the second insulating film with respect to Ng (Ng is a rare gas selected from one or more of Ar, Kr, Xe, Ne, and He) gas and the Ng gas is 0% <p. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the semiconductor device is formed by using a gas mixture with an oxidizing gas of <0.13%.   The thin film is made of ZrHa _z (Z is an integer satisfying 1 ≦ z ≦ 8, Ha is F, Cl, Br, I Halogen gas selected from any one or more) and SiHa _u (U is an integer satisfying 1 ≦ u ≦ 8, Ha is a halogen selected from one or more of F, Cl, Br, and I),
  The second gate insulating film is made of ZrHm _w (W is an integer satisfying 1 ≦ w ≦ 8. Hm is OtBu, OiPr, dipivaloylmethanato ligand (C ₁₁ H ₁₉ O ₂ ), Ot-Am, 2,2,6,6-tetramethyl-3,5-octanedionate ligand (C ₁₂ H ₃₂ O ₂ ), Diisobutyrylmethanato ligand (C ₉ H ₁₅ O ₂ ), TEOS, or METHD) or SiHm _v (V is an integer satisfying 1 ≦ v ≦ 8. Hm is OtBu, OiPr, dipivaloylmethanato ligand (C ₁₁ H ₁₉ O ₂ ), Ot-Am, 2,2,6,6-tetramethyl-3,5-octanedionate ligand (C ₁₂ H ₂₁ O ₂ ), Diisobutyrylmethanato ligand (C ₉ H ₁₅ O ₂ 4. The method for manufacturing a semiconductor device according to claim 3, wherein the semiconductor device is formed using at least one of TEOS).   4. The method of manufacturing a semiconductor device according to claim 3, wherein the thin film made of Zr is in the range of 0.33 monolayer to 2.0 monolayer.   Amorphous Si on silicon substrate _1-y Zr _y O ₂ Forming a first gate insulating film made of (0.1 ≦ y ≦ 1);
  Amorphous Si is formed on the first gate insulating film. _1-x Zr _x O ₂ Forming a second gate insulating film (0 <x ≦ 0.5 and x <y);
  And a step of forming a gate electrode on the second gate insulating film. A method for manufacturing a semiconductor device.   The first gate insulating film and the second insulating film are made of ZrHm. _w (W is an integer satisfying 1 ≦ w ≦ 8. Hm is OtBu, OiPr, dipivaloylmethanato ligand (C ₁₁ H ₁₉ O ₂ ), Ot-Am, 2,2,6,6-tetramethyl-3,5-octanedionate ligand (C ₁₂ H ₃₂ O ₂ ), Diisobutyrylmethanato ligand (C ₉ H ₁₅ O ₂ ), TEOS, or METHD) or SiHm _v (V is an integer satisfying 1 ≦ v ≦ 8. Hm is OtBu, OiPr, dipivaloylmethanato ligand (C ₁₁ H ₁₉ O ₂ ), Ot-Am, 2,2,6,6-tetramethyl-3,5-octanedionate ligand (C ₁₂ H ₂₁ O ₂ ), Diisobutyrylmethanato ligand (C ₉ H ₁₅ O ₂ The method of manufacturing a semiconductor device according to claim 7, wherein the semiconductor device is formed using at least one of TEOS).   The first gate insulating film and the second gate insulating film are formed using a sputtering apparatus in which an angle between a target surface and a substrate surface is in a range of 60 degrees to 120 degrees. A method for manufacturing a semiconductor device according to claim 7.

Images