JP3654755B2 - Optical disk playback device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an optical disc reproducing apparatus such as a CD (compact disc) and an MD (mini disc).
[0002]
[Prior art]
In a conventional optical disk reproducing device, an analog reproduction signal read from an optical disk by an optical pickup is subjected to waveform equalization and auto level slicing processing using an analog element such as an operational amplifier (operational amplifier), a resistor, and a capacitor. The signal was input to the demodulator circuit. The optical disk reproducing apparatus outputs an analog audio signal by performing clock extraction, error correction, and the like in the demodulation circuit, and performing DA conversion on the digital signal output from the demodulation circuit by the DA converter.
[0003]
[Problems to be solved by the invention]
However, in the conventional optical disk reproducing apparatus, since the number of analog elements used is large, the substrate area on which these elements are arranged is increased, which increases the cost. In addition, the analog reproduction signal from the optical pickup is weak, so the system configuration may be changed. However, at this time, it is necessary to redesign the substrate pattern and reselect the analog element. There was a problem that the amount increased.
[0004]
Also, there are different types of optical discs such as re-recordable recording / playback discs and playback-only discs. In the case of the playback-only discs, the playback signal is generated due to wobbling of the pit surface at the time of manufacture. In rare cases, there are discs that are asymmetric with respect to the slice level, and adding the offset to the slice level of the auto level slice in order to deal with such a wobbling makes the path of the analog playback signal longer. Considering the point, it was not preferable for practical use.
[0005]
SUMMARY OF THE INVENTION The present invention solves the above-described problems, and an object of the present invention is to provide an optical disk reproducing apparatus that performs processing such as waveform equalization and auto level slicing, which has been performed by conventional analog elements, using a digital circuit.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, according to the present invention, an optical pickup for reading data recorded on a disc, conversion means for converting an analog reproduction signal output from the optical pickup into a binary signal, and the binary signal In an optical disk reproducing apparatus including a demodulation circuit that performs demodulation, the optical disk reproducing apparatus includes a determining unit that determines the type of the disk, and the converting unit includes an AD converter that converts the analog reproduced signal into a digital signal, and an optical pickup Waveform equalizing means for correcting frequency characteristics caused by passing through an optical system, an oversampling circuit for interpolating data based on an operation clock in the demodulation circuit, and the oversampling circuit That outputs the binary signal by determining the output of the signal at a predetermined slice level A first comparison circuit that compares the output of the oversampling circuit at the slice level, and a means for outputting the slice level based on a determination result of the first comparison circuit And a second comparison circuit that compares the output of the oversampling circuit with the slice level or a level obtained by adding a certain offset to the slice level in accordance with a signal from the discrimination means .
[0007]
According to such a configuration, the optical disk reproducing apparatus converts the analog reproduction signal read by the optical pickup into a digital signal by the AD converter, and corrects the frequency characteristic by the digital filter or the like. Then, the optical disk reproducing apparatus, the over sampling circuit, an over-sampling by linear interpolation between the sample data, for example, signals output from the waveform equalization means. This is determined at a slice level set near the zero cross point using, for example, the first and second comparison circuits. The slice level is, for example, an up / down counter that performs an up or down operation according to a determination result from the first comparison circuit. The state of the up / down counter changes based on the determination result of the first counter, and auto level slicing can be performed. In addition, the optical disk playback device detects the type of disk, such as a recording / playback disk or a playback-only disk, using a mechanical switch, for example, and adds a certain offset to the slice level using a microcomputer or the like. You can also do it.
[0008]
In the above structure in the present invention, furthermore, the waveform equalization means, so that a digital filter for performing frequency correction, and gain switching means for providing a constant gain to the result in the digital filter.
[0009]
With this configuration, the optical disk reproducing apparatus performs the correction of the frequency characteristic in the digital filter or the like in the waveform equalizing means, for switching the shift of bits to be output by the setting signal from the microcomputer or the like. When the signal is substantially enlarged by bit shift, the calculation result may overflow. However, in auto level slices, judgment near the zero cross point is important. Even if you go. Thereby, there is no problem in the comparison of slice levels.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the entire optical disc reproducing apparatus of the present embodiment. The optical disk reproducing apparatus of this embodiment reads audio data from the disk 1 and outputs an analog audio signal. During reproduction, the optical pickup 2 reads the data recorded on the disk 1 by irradiating the disk 1 with laser light and capturing the reflected light. Modulated audio data is recorded on the disc 1, and the optical pickup 2 reads the modulated audio data as an analog reproduction signal. The AD converter 5 converts the analog reproduction signal into 8-bit parallel data using an 8.5 MHz sampling clock.
[0011]
Next, the waveform equalization means 6 corrects the frequency characteristics generated by passing through the optical system in the optical pickup 2. As shown in the waveform equalizing means 6 Figure 2, FIR (Finite Impulse Response) type digital filter 20 is used and thereby corrects the frequency characteristic. In this embodiment, the FIR type digital filter 20 is used because the filter coefficients A and B can be easily set by a system control microcomputer (hereinafter abbreviated as “system microcomputer”) 4. This is because the group delay characteristic becomes flat depending on the coefficient value, as will be described later.
[0012]
Referring again to FIG. 1, the oversampling circuit 7 converts the output from the waveform equalizing means 6 extracted with the 8.5 MHz sampling clock into four times the clock, that is, 34 MHz sampling data. The oversampling circuit 7 performs oversampling because the demodulating circuit 12 provided in the subsequent stage operates at 34 MHz, so that the data rate is equal to this.
[0013]
Next, the comparison unit 15 determines the output of the oversampling circuit 7 at the slice level, and outputs a 1-bit signal indicating a binary value of “1” or “0”. The comparison means 15 uses two comparison circuits 8 and 10 and an up / down counter (hereinafter referred to as “U / D counter”) 9 to change the slice level in the vicinity of the zero cross point by following the rotational shake of the disk 1 or the like. Yes. Details of the operation of the comparison means 15 will be described later.
[0014]
Next, the demodulation circuit 12 performs clock extraction, sync detection, error correction, and the like on the binary signal input from the comparison unit 15. Then, the DA converter 13 converts the signal from the demodulation circuit 12 into an analog audio signal and outputs it from the optical disk reproducing apparatus.
[0015]
The oscillation circuit 14 outputs a 34 MHz clock to the oversampling circuit 7 and the demodulation circuit 12. The oversampling circuit 7 outputs an 8.5 MHz clock by dividing the 34 MHz clock, and the AD converter 5 and waveform. send an equal means 6.
[0016]
Moreover, centrally manages each circuit described above in the system microcomputer 4, an output of the offset by the output OUT1, switching the output gain of the waveform equalization means 6 by the output OUT2, the output OUT3 of the output gain of the U / D counter 9 Switching is in progress. With these settings, the system microcomputer 4 performs appropriate data reading.
[0017]
Further, the system microcomputer 4 determines whether the disk 1 is a reproduction-only disk or a recording / playback disk by a mechanical switch 3 connected to the input IN. In the case of the reproduction-only disk, a fixed offset value is output to the output OUT1. g is output, otherwise the output OUT1 is set to “0”.
[0018]
Figure 2 is a block diagram showing the internal configuration of the waveform equalization means 6 as described above (see FIG. 1). 8-bit data from the AD converter 5 (see FIG. 1) is first waveform equalization FIR type digital filter 20, the system microcomputer 4 shift circuit 31 based on the signal a input from (see Fig. 1) constant Perform the operation. The operation in the shift circuit 31 will be described later.
[0019]
The FIR digital filter 20 is a 5-tap filter, and includes five registers 21 to 25, four multipliers 26 to 29, and an adder 30. In addition, an 8.5 MHz clock is input to the registers 21 to 25 and operates at 8.5 kHz.
[0020]
If the multiplication coefficients in the multipliers 26 to 29 are symmetric with respect to the third register 23, the addition output b having the flat group delay characteristic is obtained from the adder 30. In the FIR type digital filter 20, the multipliers 26 and 29 are set to the multiplication coefficient A, the multipliers 27 and 28 are set to the multiplication coefficient B, and the register 23 is not provided with a multiplier. The output b is 9 bits.
[0021]
The shift circuit 31 is a means for performing level clipping when there is an overflow in the gain switching means and the calculation result. The shift circuit 31 performs the following processing. The output b of the filter 20 is represented by “b8 to b0” from MSB (Most Significant Bit) to LSB (Least Significant Bit) as shown in FIG. When the gain selection signal a from the system microcomputer 4 (see FIG. 1) is “0”, the shift circuit 31 selects the upper 8 bits of 9-bit “b8 to b0” to obtain an 8-bit output c. .
[0022]
On the other hand, when the gain selection signal a is “1”, the upper b8 and b7 bits are used as sign bits, and when b7 = b8, the lower 8 bits are output c. When b7 ≠ b8, the operation result has overflowed, and the shift circuit 31 outputs c = “01111111” when b8 = “0”, and outputs c = “10000000” when b8 = “1”. In FIG. 3, a b8 bit is used for illustration.
[0023]
As shown in the waveform example by the shift operation in FIG. 4, when the upper 8 bits “b8 to b1” of the output b of the FIR digital filter 20 draw a waveform as shown in FIG. 4A, a = “1” If so, the shift circuit 31 basically outputs a signal that is twice as large as when a = “1”.
[0024]
In the waveform example shown in FIG. 4B, first, the output c starts from the zero cross point A and rises to “01111111”. Since a value larger than this overflows, the output c becomes “01111111” in the period B. On the negative side, the output c is “10000000” in the period D. As described above, the shift circuit 31 doubles the output when a = “1” and performs level clipping when the output overflows.
[0025]
In the latter comparison means 15 (see FIG. 1), the values in the vicinity of the zero cross points A, C, E in FIG. 4B are important, and the output c in the vicinity of the periods B, D is not a problem. Therefore, setting a = “1” when the data input level is small is effective because the accuracy of comparing the slice levels is improved.
[0026]
Next, the oversampling circuit 7 (see FIG. 1) performs oversampling of the input data from 8.5 MHz to the operation clock 34 MHz of the demodulation circuit 12, and this is performed by linear interpolation as described below.
[0027]
In the waveform example shown in FIG. 5, in general oversampling in which 8.5 MHz data is sequentially input to the oversampling circuit 7 in 40 to 48, pre-interpolation as indicated by a dotted line 55 is performed. The pre-interpolation is an interpolation in which the same data as the data 40 is repeatedly output in the period 50 and the same data as the data 41 is repeated in the period 51 after the next data 41 is input. However, in this pre-interpolation, when the data is in the vicinity of the zero crossing point K as in the period 52, since the flat data continuously exists, the comparison means 15 in the next stage gives the result of the auto level slice. Prone to instability.
[0028]
On the other hand, in this embodiment, linear interpolation is performed. For example, in the period 50, the oversampling circuit 7 (see FIG. 5) changes linearly between the data 40 and the data 41 at both ends at a constant rate. 1) outputs data 60, 61, 62. In the next period 51, data 63, 64, 65 are output so as to change linearly from the data 41, 42 at both ends. This shortens the period during which the data is flat even near the zero cross point K. Therefore, the result of auto level slicing is not likely to be unstable in the comparison means 15.
[0029]
A specific example of the oversampling circuit 7 for realizing such linear interpolation is shown in FIG. 6, and a timing chart of the circuit is shown in FIG. In FIG. 6, a divider circuit 76 inputs a 34 MHz clock from the oscillation circuit 14 (see FIG. 1), and performs a 1/2 frequency division and a 1/4 frequency division to generate 17 MHz and 8.5 MHz clocks. Output. The 8.5 MHz clock is also output to the AD converter 5 and the waveform equalization means 6.
[0030]
The knot circuit 77 inverts the 17 MHz signal divided by 1/2. Further, the NOR circuit 78 takes a negative OR (NOR) of the signal divided by ¼ by the frequency dividing circuit 76 and the output of the knot circuit 77. In the D flip-flop 79, the output of the NOR circuit 78 is input to the D terminal, and a 34 MHz clock is input to the clock terminal. As a result, an 8.5 MHz signal as shown in FIG.
[0031]
The register 70 stores the 8.5 MHz data that is input, and the subtraction circuit 71 subtracts the data one sample before from the currently input data. Next, the output of the subtracting circuit 71 is shifted by 2 bits in the register 72 to make the data value 1/4.
[0032]
Next, the adder 73 adds the output of the register 75 and the output of the register 72. The selector 74 switches the output of the register 70 and the output of the adder 73 by a signal from the D flip-flop 79. The selector 74 outputs a signal from the adder 73 when the input at the input terminal S is “0”, and conversely outputs a signal from the register 70 when the input at the input terminal S is “1”. . The register 75 stores the data from the selector 74 with a 34 MHz clock. As a result, the register 75 outputs data subjected to oversampling by linear interpolation.
[0033]
Referring to FIG. 7 with reference to FIG. 6, (a) is a 34 MHz clock supplied from the oscillation circuit 14 (see FIG. 1). (B) is an 8.5 MHz clock output from the frequency dividing circuit 76 and divided by ¼. (C) is 8-bit data inputted to the oversampling circuit 7 from the waveform equalization means 6 (see FIG. 1), and the data is updated at 8.5 MHz like D1, D2,.
[0034]
(D) is a signal for the selector 74 output from the D flip-flop 79. (E) is 8-bit data output from the register 70, and as can be seen from comparison with (c), is the data D0, D1,. (F) is an output of the register 72, L = (D2-D1) / 4 in the period T1, M = (D2-D1) / 4 in the next period T2, and N = (D4-D3 in the period T3. ) / 4.
[0035]
(G) is the output of the register 75. In the period T1, the data D1 is first set, and then the above-mentioned L is added at 34 MHz. Similarly, in the period T2, the data D2 is first set, and then the above M is added at 34 MHz. In the period T3, the data D3 is first set, and then the above N is added at 34 MHz. In this way, oversampling by linear interpolation is performed.
[0036]
Next, as shown in FIG. 1, the comparison circuit 8 compares the output of the oversampling circuit 7 with the output of the U / D counter 9. The comparison circuit 10 compares the output of the oversampling circuit 7 and the output of the U / D counter 9 with the output of the OUT1 from the system microcomputer 4 added by the adder 11. Thus, the output of the U / D counter 9 is set to the slice level.
[0037]
Both the comparison circuit 8 and the comparison circuit 10 output a 1-bit signal indicating a binary value of “0” if the output of the oversampling circuit 7 is larger, or “1” if the output is the same or smaller.
[0038]
Since the data is recorded so that the DSV (Digital Sum Value) is 0 in the disc 1, the difference between the temporal lengths of the binary values “1” and “0” of the output of the comparison circuit 8 is an average. Therefore, the slice level changes following the rotational fluctuation of the disk 1 or the like. The output of the U / D counter 9 is 12 bits, and appropriate 8 bits are selected by the output OUT3 of the system microcomputer 4 and input to the comparison circuit 8 and the adder 11. In this way, the gain of the U / D counter 9 is switched.
[0039]
As described above, the comparing means 15 performs auto level slicing and outputs a 1-bit binary signal of “0” or “1”. In the ideal disk 1, the difference in the pulse width of the binary output is 0 on average. Therefore, the output OUT1 of the system microcomputer 4 may be “0”.
[0040]
In this case, since the comparison circuit 8 and the comparison circuit 10 operate in exactly the same manner, it can be considered that the comparison circuit 10 does not substantially exist and the output of the comparison circuit 8 is input to the demodulation circuit 12. Therefore, when the disc 1 is ideal, the optical disc reproducing apparatus can perform accurate auto level slicing.
[0041]
By the way, some of the read-only discs have a wobbling uniform pit surface at the stage of the disc manufacturing process, and a signal having a large period is most affected by this. In an actual reproduction signal, since the appearance probability of a signal with a small period is much higher, the slice level is almost the same as that of a normal disk without wobbling, and there are few problems.
[0042]
FIG. 8A shows an example of a waveform input to the comparison unit 15 (see FIG. 1), and FIG. 8B shows a binary value “1” or “0” output from the comparison unit 15 by auto level slicing. The signal is shown.
[0043]
In CD and MD, the signal period is in the range of 3T to 11T (where T is the period of 1-bit code), and the signal periods of 3T, 11T, 11T, and 3T are continuous as shown in FIG. In a normal disk, the comparison means 15 has an input such as a solid line 92, and at the slice level indicated by the arrow 90, the signal indicated by the solid line 94 is input from the comparison means 15 to the demodulation circuit 12 (see FIG. 1). The
[0044]
However, in the case of a disk with wobbling on the pit surface, the pit surface side is shorter than the mirror surface side, and the waveform is asymmetric with respect to the slice level indicated by the arrow 90 as indicated by the dotted line 93. Inconsistency with the normal disk occurs. As a result, the demodulation circuit 12 may make a false detection, so that the reproduction rate is deteriorated.
[0045]
In order to cope with such a problem, the reproduction-only disk generally has a smaller jitter (signal fluctuation) than the recording / playback disk, so that the offset from the output OUT1 of the system microcomputer 4 in FIG. The value g is output, and the output f of the counter 9 is added to the adder 11 so that m = f + g, whereby the slice level is changed to an arrow 91 in FIG.
[0046]
By adding such an offset, the lengths of both 11Ts coincide with the slice level on the mirror surface side and the pit surface side. Thereby, a favorable reproduction error rate can be obtained. The disc is discriminated by detecting a disc structure difference by the system microcomputer 4 with a mechanical switch 3 (see FIG. 1).
[0047]
As described above, according to the present embodiment, the waveform equalization and the processing for converting the analog reproduction signal of the auto level slice into the binary digital signal are performed by the digital circuit. Large scale integrated circuit). Therefore, a simple circuit configuration can be obtained as compared with the case where an analog element is used. Further, it is possible to easily deal with change of the set value of the waveform equalization means 6 even if design changes.
[0048]
【The invention's effect】
As described on the following, the present invention, since the performing waveform equalization and level slice digitally, it is possible to simplify the circuit and the like is incorporated in the LSI. Therefore, the optical disk reproducing apparatus can be made inexpensive and downsized. In addition, since the comparison means is provided with two comparison circuits, it is possible to give a fixed offset to the slice level according to the type of the disk and the like in the other comparison circuit while performing auto level slicing in one comparison circuit. . Thereby, a favorable reproduction error rate can be obtained. In addition, for example, in the case of a read-only disc, the disc type is discriminated from the disc structure difference such as a mechanical switch. The optical disk reproducing apparatus can prevent erroneous detection of a signal. In addition, since it is a digital system, it is possible to easily set the offset without complicating the circuit configuration.
[0050]
Et al is, in the optical disk reproducing device provided with two comparison circuits, in the up-down counter the output of one of the comparator circuit, and as the slice level changes according to the rotation shake and the like, the up-down counter Therefore, appropriate gain setting can be performed.
[0052]
Further, since the signal read from the disk is important in the vicinity of the zero cross point, it is only necessary to enlarge this portion and take measures against overflow. Thereby, even if the read reproduction signal is small, the signal can be read with high accuracy.
[0053]
In addition, since oversampling is performed by linear interpolation in accordance with the operation clock of the demodulation circuit, the period during which the data value near the zero cross point becomes flat is shortened, and the comparison result by the comparison means is unstable. I am trying not to become.
[Brief description of the drawings]
FIG. 1 is a block diagram of an optical disc playback apparatus according to an embodiment of the present invention.
FIG. 2 is a block diagram of waveform equalization means of the optical disc playback apparatus.
Figure 3 illustrates the operation of the shift circuit of the waveform equalization means.
FIG. 4 is a waveform diagram showing the operation of the shift circuit.
FIG. 5 is a waveform diagram showing linear interpolation of an oversampling circuit of the optical disc reproducing apparatus.
FIG. 6 is a block diagram illustrating an example of the oversampling circuit.
FIG. 7 is a timing chart of the oversampling circuit.
FIG. 8 is a diagram showing an auto level slice of the comparison means.
[Explanation of symbols]
1 disc
2 Optical pickup
3 Mechanical switch
4 System microcomputer
5 AD converter
6 Waveform equalization means
7 Oversampling circuit
8 Comparison circuit
9 Up / down counter
10 Comparison circuit
11 Adder
12 Demodulation circuit
13 DA converter
14 Oscillator circuit
15 comparison means
20 FIR type digital filter
31 Shift circuit

Claims (4)

An optical disk reproducing apparatus comprising: an optical pickup for reading data recorded on a disk; conversion means for converting an analog reproduction signal output from the optical pickup into a binary signal; and a demodulation circuit for demodulating from the binary signal In
A discriminating means for discriminating the type of the disc;
The converting means includes an AD converter that converts the analog reproduction signal into a digital signal, a waveform equalizing means that corrects a frequency characteristic caused by passing through an optical system in the optical pickup, and an output of the waveform equalizing means An oversampling circuit that interpolates data based on an operation clock in the demodulation circuit, and a comparison unit that outputs the binary signal by determining an output of the oversampling circuit at a predetermined slice level,
The comparison means includes a first comparison circuit for comparing the output of the oversampling circuit at the slice level, a means for outputting the slice level based on a determination result of the first comparison circuit, and the oversampling circuit And a second comparison circuit that compares the output of the signal with the slice level or a level obtained by adding a certain offset to the slice level in accordance with a signal from the discrimination means .   2. The optical disk reproducing apparatus according to claim 1, wherein the means for outputting the slice level is an up / down counter, and the gain is switched to the slice level by selecting a bit of the output of the up / down counter. . It said waveform equalization means is an optical disk according to claim 1 or claim 2 characterized in that it has a digital filter for performing frequency correction, and gain switching means for providing a constant gain to the result in the digital filter Playback device. The oversampling circuit includes an optical disk reproducing apparatus according to any one of claims 1 to 3, characterized in that an over-sampling to vary between data for each sample are input at a constant rate.

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