JP3627649B2 - Drive device for current control element - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a drive device for a current control type element for supplying a drive current to an inductive load.
[0002]
[Prior art]
A drive device for a current control type element that drives an inductive load is used in, for example, a chopper circuit and an H-bridge circuit that control an induction motor. In these circuits, a protection circuit is provided to protect the current control type element from the back electromotive force generated by the inductive load. FIG. 3 is a diagram showing a part of an H-bridge circuit provided with a protection circuit, which is described in, for example, Japanese Patent Laid-Open No. 8-84060. In FIG. 3, T101 and T102 are current control type switching transistors (hereinafter simply referred to as driving transistors) for supplying a driving current to an inductive load L1 composed of a motor or the like, and driving circuits connected to the base terminals respectively. 103, 133. The power supply voltage Vcc is connected to the collector terminal of the driving transistor T101, and the emitter terminal of the driving transistor T102 is grounded. An inductive load L1 is connected between the emitter terminal of the driving transistor T101 and the collector terminal of the driving transistor T102.
[0003]
Diodes 102 and 122 are connected between the emitter terminal and the base terminal of the driving transistors T101 and T102, respectively. By causing a current due to the counter electromotive force generated from the inductive load L1 to flow through the diodes 102 and 122, the driving transistors T101 and T102 are prevented from being destroyed. For example, when the driving transistor T102 is turned on by the driving current output from the driving circuit 133, the current flows in the direction indicated by A in the figure. Thereafter, when the drive current from the drive circuit 133 is stopped and the drive transistor T102 is turned off, a back electromotive force is generated from the inductive load L1, and the potential at the point P in the figure rises due to this back electromotive force. When the potential at the point P becomes higher than the potential at the base terminal of the driving transistor T101, the diode 102 is forward biased and a current flows in the direction indicated by C in the figure. As a result of carriers being injected from the base terminal of the driving transistor T101, the driving transistor T101 is turned on in the reverse direction, and the circulating current due to the back electromotive force flows in the direction indicated by B in the figure.
[0004]
[Problems to be solved by the invention]
Therefore, conventionally, in order to suppress wasteful power consumption, the direction of the current flowing through the inductive load L1, the driving transistor T101, or the freewheeling diode is detected, and the driving transistor T101 is turned on based on the detected current direction. A technique is known in which the driving transistor T101 is not turned on when it is delayed, that is, when the circulating current B is flowing, and can be combined with the circuit disclosed in the prior art. However, the current flowing through the inductive load, the driving transistor, or the freewheeling diode is high, and a circuit with a high withstand voltage is required to detect the current. Generally, a high breakdown voltage circuit is expensive, and when combined with the circuit disclosed in the above prior art, the driving device becomes expensive.
[0005]
SUMMARY OF THE INVENTION An object of the present invention is to provide a current control type element drive device that does not generate a drive signal for turning on a current control type element that is passing a current in the opposite direction at low cost.
[0006]
[Means for Solving the Problems]
The present invention will be described with reference to FIG. 1 showing an embodiment.
(1) The current control type element driving device according to the first aspect of the present invention supplies a current for driving the inductive load L1 connected to the driving terminal and also uses a back electromotive force generated from the inductive load L1. A current control type transistor T1 that flows in a direction opposite to the direction in which current is supplied, drive control means M1 and M2 that generate a drive signal for turning on / off the current control type transistor T1, and an inductive load L1 of the current control type transistor T1 Current detection means RH 2 for detecting a reverse current flowing in the current control transistor T1, and at least current detection means RH, which are provided between the drive terminal connected to the current control transistor T1 and the control terminal of the current control transistor T1. Drive control means so that a drive signal for turning on the current control type transistor T1 is not generated when a reverse current is detected by 2 1, by providing a drive signal stop means 1 for controlling the M2, to achieve the above object.
(2) The invention described in claim 2 is the current control type element drive device according to claim 1, wherein the current detection means is arranged in series between the drive terminal and the control terminal of the current control transistor T1. And a voltage detecting means 2 for detecting a voltage between terminals at both ends of the resistance element RH, and detecting a current in the reverse direction based on a detection result by the voltage detecting means 2.
(3) The current control type element driving device according to the third aspect of the present invention is located on the upper arm side with respect to the inductive load L1 and supplies the driving current in the first direction, and the inductive load L1. The first current control type transistor T1 that flows in the direction opposite to the direction in which the current due to the counter electromotive force generated from the current is supplied, and the first current control type transistor T1 are connected in series, and the lower arm side with respect to the inductive load L1 The second current-controlled transistor T2 that supplies a drive current in a second direction that is different from the first direction and that flows in a direction opposite to the direction in which the current due to the counter electromotive force generated from the inductive load L1 is supplied. And first drive control means M1, M2 for generating a drive signal for turning on / off the first current control type transistor T1, and a drive signal for turning on / off the second current control type transistor T2. The second drive control means M3 and M4, and the drive terminal to which the inductive load L1 of the first current control transistor T1 is connected and the control terminal of the first current control transistor T1, The first current detection means RH 2 for detecting the reverse current flowing in the first current control type transistor T1, the reference terminal of the second current control type transistor T2 and the second current control type transistor T2. The second current detection means RL, 4 that are provided between the control terminals and detect the reverse current flowing in the second current control type transistor T2, and at least the first current detection means RH, 2 in the reverse direction When the current is detected, the first drive signal stop for controlling the first drive control means M1 and M2 so that the drive signal for turning on the first current control transistor T1 is not generated. The second drive control means prevents the drive signal for turning on the second current control type transistor T2 from being generated when the current in the reverse direction is detected by the stage 1 and at least the second current detection means RL, 4. By providing the second drive signal stop means 3 for controlling M3 and M4, the above-described object is achieved.
(4) The invention according to claim 4 is the current control element drive device according to claim 3, wherein the first current detection means is a drive terminal and a control terminal of the first current control transistor T1. A first resistance element RH arranged in series between the first resistance element RH and a first voltage detection means 2 for detecting a voltage across the terminals of the first resistance element RH. 2 detects a current in the reverse direction, and the second current detecting means is a second resistance element disposed in series between the reference terminal and the control terminal of the second current control type transistor T2. RL and second voltage detecting means 4 for detecting a voltage between terminals of both ends of the second resistance element RL, and detecting a reverse current based on a detection result by the second voltage detecting means 4. And
[0007]
In the section of means for solving the above problems, the present invention is associated with the drawings of the embodiments for easy understanding. However, the present invention is not limited to the embodiments.
[0008]
【The invention's effect】
As described above in detail, the present invention has the following effects.
(1) In the current control type element driving device according to any one of the first to fourth aspects of the present invention, between the drive terminal and the control terminal of the current control type transistor (when the lower arm is configured, the reference terminal and the control terminal) Current detection means is provided between the current control means and the current detection means so as not to generate a drive signal for turning on the current control transistor when detecting the current flowing in the opposite direction of the current control transistor. Since the current detection means is provided between the drive terminal and the control terminal of the current control type transistor (when the lower arm is configured , between the reference terminal and the control terminal) , it is applied to the current detection means. The voltage can be made smaller than the voltage applied to the power supply terminal of the current control type transistor. As a result, since it is not necessary to use a high-voltage component for the current detection means, a small and low-cost device can be obtained.
(2) Particularly, in the inventions according to claims 2 and 4, the current control type transistor is connected in series between the drive terminal and the control terminal ( between the reference terminal and the control terminal when the lower arm is configured) . Since the terminal voltage at both ends of the resistance element disposed in the circuit is detected to detect the current in the reverse direction, a small and low-cost device can be obtained.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a circuit diagram of a current control type semiconductor device according to an embodiment of the present invention, which is a part of an H-bridge circuit that controls an induction motor. In FIG. 1, current-controlled switching transistors (hereinafter simply referred to as driving transistors) T1 and T2 are switching devices that supply a driving current to an inductive load L1 such as a motor. The power supply voltage Vcc is connected to the collector terminal of the driving transistor T1, and the emitter terminal of the driving transistor T2 is grounded. An inductive load L1 is connected between the emitter terminal of the driving transistor T1 and the collector terminal of the driving transistor T2.
[0010]
In addition to the driving transistor T1, the upper arm in FIG. 1 is provided with a control circuit 1, a comparator 2, a PMOS transistor M1, an NMOS transistor M2, and a current direction detecting resistor RH. An L-level control signal is applied to a control input terminal IN-H of the upper arm from an unillustrated command circuit to turn on the driving transistor T1, and an H-level control signal is applied to turn off the driving transistor T1. Is applied. The control signal applied to the control input terminal IN-H is input to the control circuit 1 and the gate terminal of the NMOS transistor M2.
[0011]
The control circuit 1 has an inverter 11 and a NAND gate 12. The control signal inverted by the inverter 11 and the detection signal output from the comparator 2 are input to the NAND gate 12. The output signal of the NAND gate 12 is input to the gate terminal of the PMOS transistor M1.
[0012]
When the driving transistor T1 is turned on in the upper arm circuit, the PMOS transistor M1 is turned on and the NMOS transistor M2 is turned off, and a current is supplied from the base power supply VB-H to the base terminal of the driving transistor T1 via the PMOS transistor M1. And carriers are injected into the driving transistor T1. The PMOS transistor M1 is turned on, and the current flowing through the base terminal of the driving transistor T1 becomes a driving signal for the driving transistor T1. On the other hand, when the driving transistor T1 is turned off, the PMOS transistor M1 is turned off and the NMOS transistor M2 is turned on. At this time, a current flows from the base terminal of the driving transistor T1 to the emitter terminal of the driving transistor T1 through the current direction detection resistor RH and the NMOS transistor M2, and carriers are extracted from the driving transistor T1.
[0013]
The comparator 2 outputs an L level detection signal when a current flows through the current direction detection resistor RH upward from the bottom of FIG. 1, and outputs an H level detection signal in other cases. Note that diodes D1 and D2 are formed in parallel in the PMOS transistor M1 and the NMOS transistor M2, respectively. The polarities of the diodes D1 and D2 in FIG. 1 are the anode on the lower side and the cathode on the upper side.
[0014]
In addition to the driving transistor T2, the lower arm in FIG. 1 is provided with a control circuit 3, a comparator 4, a PMOS transistor M3, an NMOS transistor M4, and a current direction detecting resistor RL. An L-level control signal is applied to the control input terminal IN-L of the lower arm from an unillustrated command circuit to turn on the driving transistor T2, and an H-level control signal is applied to turn off the driving transistor T2. A signal is applied. The control signal applied to the control input terminal IN-L is input to the control circuit 3 and the gate terminal of the NMOS transistor M4.
[0015]
The control circuit 3 has an inverter 31 and a NAND gate 32. The control signal inverted by the inverter 31 and the detection signal output from the comparator 4 are input to the NAND gate 32. The output signal of the NAND gate 32 is input to the gate terminal of the PMOS transistor M3.
[0016]
When the driving transistor T2 is turned on in the lower arm circuit, the PMOS transistor M3 is turned on and the NMOS transistor M4 is turned off. A current flows from the base power supply VB-L to the base terminal of the driving transistor T2 via the PMOS transistor M3, and carriers are injected into the driving transistor T2. The PMOS transistor M3 is turned on, and the current flowing through the base terminal of the driving transistor T2 becomes a driving signal for the driving transistor T2. On the other hand, when the driving transistor T2 is turned off, the PMOS transistor M3 is turned off and the NMOS transistor M4 is turned on. At this time, a current flows from the base terminal of the driving transistor T2 to the emitter terminal of the driving transistor T2 via the current direction detecting resistor RL and the NMOS transistor M4, and carriers are extracted from the driving transistor T2.
[0017]
The comparator 4 outputs an L level detection signal when a current flows through the current direction detection resistor RL upward from the lower side of FIG. 1, and outputs an H level detection signal in other cases. Note that diodes D3 and D4 are formed in parallel in the PMOS transistor M3 and the NMOS transistor M4, respectively. The polarities of the diodes D3 and D4 are the anode on the lower side and the cathode on the upper side in FIG.
[0018]
The operation of the above current control type semiconductor device will be described in detail using the upper arm as an example. 2 shows a control signal Sig (IN-H) applied to the control input terminal IN-H of the upper arm portion of the circuit diagram of FIG. 1, a detection signal Sig (VS-H) output from the comparator 2, and a PMOS transistor. It is a time chart of signal Sig (V1-H) applied to the gate terminal of M1, and control signal Sig (IN-L) applied to control input terminal IN-L of a lower arm part. At time t0 in FIG. 2, the control signal Sig (IN-L) applied to the control input terminal IN-L for the driving transistor T2 of the lower arm becomes L level, and an ON command is input. At this time, since the output of the comparator 4 is at the H level, the output of the control circuit 3 becomes the L level, the PMOS transistor M3 is turned on, and the NMOS transistor M4 is turned off. As a result, the driving transistor T2 is turned on and a current flows in the direction A in FIG.
[0019]
At this time, an off command is input to the driving transistor T1 of the upper arm. That is, the control signal Sig (IN-H) applied to the control input terminal IN-H is at the H level (off command), and the detection signal Sig (VS-H) output from the comparator 2 is at the H level. At timing t1, the control signal Sig (IN-L) for the driving transistor T2 becomes H level, and an off command is input. As a result, the PMOS transistor M3 is turned off, the NMOS transistor M4 is turned on, and the driving transistor T2 is turned off. When the driving transistor T2 is turned off, the above-described circulating current flows in order to release the energy stored in the inductive load L1.
[0020]
A back electromotive force is generated from the inductive load L1, and the potential at the point P in FIG. 1 rises due to this back electromotive force, and therefore, the B in FIG. 1 passes through the diode 2 of the upper arm and the current direction detecting resistor RH. Current flows in the direction indicated by '. At this time, the driving transistor T1 is turned on in the reverse direction, and a current flows in the reverse direction from the emitter terminal toward the collector terminal in the direction indicated by B in FIG. The detection signal Sig (VS-H) output from the comparator 2 changes to the L level at the timing t1.
[0021]
At time t2 when the current flowing in the direction indicated by B ′ and B, that is, the circulating current flows, an ON command is input to the driving transistor T1 of the upper arm, and the control signal Sig (IN−H ) Becomes L level. At this time, since the output of the comparator 2 is at the L level, the signal Sig (V1-H) output from the control circuit 1 and applied to the gate terminal of the PMOS transistor M1 is held at the H level. Therefore, although the ON command is input to the driving transistor T1, the PMOS transistor M1 maintains the OFF state, so that no driving current flows to the driving transistor T1.
[0022]
An off command is input to the driving transistor T1 of the upper arm, and an on command is input to the driving transistor T2 again at timing t3 after the control signal Sig (IN-H) is set to the H level. Is done. That is, the control signal Sig (IN-L) applied to the control input terminal IN-L of the lower arm again becomes the L level. The output of the control circuit 3 becomes L level, the PMOS transistor M3 is turned on, and the NMOS transistor M4 is turned off. As a result, the driving transistor T2 is turned on again, and a current flows in the direction A in FIG.
[0023]
Note that if the driving transistor T1 is not turned on in the reverse direction after the timing t2, the detection signal Sig (VS-H) of the comparator 2 is set to the H level. Accordingly, an ON command is input to the driving transistor T1 of the upper arm, and the control signal Sig (IN-H) becomes L level, whereby the PMOS transistor M1 is turned on and a driving current is supplied to the driving transistor T1. . As a result, the driving transistor T1 is turned on.
[0024]
When the driving transistor T2 is turned on again at the timing t3, the driving transistor T1 shifts to the reverse recovery operation. At this time, since the NMOS transistor M2 is turned on, the electric charge accumulated in the collector region of the driving transistor T1 is not retained. That is, the charge in the collector region of the driving transistor T1 is drawn from the base terminal of the driving transistor T1 to the emitter terminal side of the driving transistor T1 through the current direction detection resistor RH and the NMOS transistor M2. As a result, the driving transistor T1 is turned off, and a large through current that passes from the collector terminal to the emitter terminal of the driving transistor T1 does not flow.
[0025]
The voltage between the base terminal and the emitter terminal of the driving transistor T1 is about 1V when the driving transistor T1 is turned on in the forward direction, and 0V when the driving transistor T1 is turned off. Further, the resistance value of the current direction detecting resistor RH is reduced so that the voltage when the driving transistor T1 is turned on in the reverse direction does not increase. Therefore, it is not necessary to use high voltage components for the current direction detecting resistor RH and the comparator 2 provided between the base terminal and the emitter terminal of the driving transistor T1.
[0026]
In the above description, the upper arm has been described as an example, but the same applies to the lower arm. That is, in the state where the circulating current flows through the driving transistor T2, even if an ON command is input to the driving transistor T2 of the lower arm, the output of the comparator 4 becomes L level. The H level of the signal Sig (V1-L) that is output and applied to the gate terminal of the PMOS transistor M3 is held. Therefore, the PMOS transistor M3 is kept in the OFF state despite the ON command being input to the driving transistor T2, so that the driving current does not flow to the driving transistor T2.
[0027]
The voltage between the base terminal and the emitter terminal of the driving transistor T2 is about 1V when the driving transistor T2 is turned on in the forward direction, and 0V when the driving transistor T1 is turned off. Further, the resistance value of the current direction detecting resistor RL is reduced so that the voltage when the driving transistor T2 is turned on in the reverse direction does not increase. Therefore, it is not necessary to use high voltage components for the current direction detecting resistor RL and the comparator 4 provided between the base terminal and the emitter terminal of the driving transistor T2.
[0028]
According to the embodiment described above, the following effects can be obtained.
(1) A PMOS transistor M1 and a PMOS transistor M3 are provided between the base terminal of the driving transistor T1 and the base power supply VB-H, and between the base terminal of the driving transistor T2 and the base power supply VB-L, respectively. Between the base terminal and the emitter terminal of T1, the current direction detecting resistor RH and the NMOS transistor M2, and between the base terminal and the emitter terminal of the driving transistor T2, the current direction detecting resistor RL and the NMOS transistor. M4 is provided. As a result of making the upper arm and the lower arm symmetrical in this way, the circuits of both arms can be configured using equivalent circuit components, so that an effect of cost reduction can be obtained.
(2) Current direction detection resistors RH and RL for detecting a reverse current in the reverse direction, and comparators 2 and 4 for comparing voltages at both ends of these resistors are connected to base terminals and emitter terminals of the driving transistors T1 and T2. Each was provided between. Therefore, it is not necessary to use a high breakdown voltage component in order to detect the circulating current, so that an inexpensive and small device can be obtained. Also, it becomes easy to make the entire drive circuit an IC.
[0029]
In the configuration of FIG. 1 described above, the current direction detection resistor RH and the NMOS transistor M2 provided between the base terminal and the emitter terminal of the driving transistor T1, and the current provided between the base terminal and the emitter terminal of the driving transistor T2. The direction detecting resistor RL and the NMOS transistor M4 may be connected with their positions switched. That is, in the case where the NMOS transistors M2 and M4 are connected to the upper side in FIG. 1 and the current direction detecting resistors RH and RL are connected to the lower side, the effects (1) and (2) can be obtained.
[0030]
In the above description, since it is necessary to flow a large circulating current in the reverse direction from the emitter terminal to the collector terminal of the driving transistors T1 and T2, the reverse current amplification factor h′FE of the driving transistors T1 and T2 is sufficient. It is desirable to be large. In this regard, for example, general power bipolar transistors can be considered as the drive transistors T1 and T2 described above. In particular, the semiconductor device disclosed in Japanese Patent Application Laid-Open No. 6-252408 is particularly effective as a driving transistor of the present invention because the reverse current amplification factor h′FE is comparable to the forward current amplification factor hFE. It is.
[0031]
The correspondence between each component in the claims and each component in the embodiment of the invention will be described. The emitter terminal is a drive terminal (a reference terminal in the case of constituting the lower arm) , and the drive transistor T1. Are the current control type transistor and the first current control type transistor, the PMOS transistor M1 and the NMOS transistor M2 are the drive control means and the first drive control means, the base terminal is the control terminal, the current direction detecting resistor RH and The comparator 2 is the current detection means and the first current detection means, the control circuit 1 is the drive signal stop means and the first drive signal stop means, and the current direction detection resistor RH is the resistance element and the first resistance element. The comparator 2 serves as the voltage detection means and the first voltage detection means, and the driving transistor T2 serves as the second current control. The transistor includes a PMOS transistor M3 and an NMOS transistor M4 as second drive control means, a current direction detection resistor RL and a comparator 4 as second current detection means, and a control circuit 3 as second drive signal stop means. The current direction detection resistor RL corresponds to the second resistance element, and the comparator 4 corresponds to the second voltage detection means.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of a current control type semiconductor device according to an embodiment.
2 is a time chart of a control signal applied to an upper arm portion of the circuit diagram of FIG.
FIG. 3 is a circuit diagram showing a part of an H-bridge circuit provided with a protection circuit according to the prior art.
[Explanation of symbols]
1, 3 ... control circuit, 2, 4 ... comparator,
11, 31 ... inverter, 12, 32 ... NAND gate,
D1-D4 ... diode, L1 ... inductive load,
M1, M3 ... PMOS transistors, M2, M4 ... NMOS transistors,
RH, RL: current direction detecting resistors, T1, T2: driving transistors

Claims (4)

A current-controlled transistor that supplies a current for driving an inductive load connected to the drive terminal and flows a current due to a counter electromotive force generated from the inductive load in a direction opposite to the supply direction;
Drive control means for generating a drive signal for turning on / off the current control transistor;
Current detection means provided between a drive terminal to which the inductive load of the current control type transistor is connected and a control terminal of the current control type transistor, and detects the reverse current flowing through the current control type transistor. When,
Drive signal stop means for controlling the drive control means so that a drive signal for turning on the current control transistor is not generated when the current in the reverse direction is detected by at least the current detection means. A drive device for a current control type element. The current control element driving device according to claim 1,
The current detection means includes a resistance element arranged in series between the drive terminal and the control terminal of the current control type transistor, and a voltage detection means for detecting a voltage between terminals at both ends of the resistance element. And a current control type element driving device, wherein the current in the reverse direction is detected based on a detection result of the voltage detection means. A first current that is located on the upper arm side with respect to the inductive load and supplies a drive current in a first direction and causes a current caused by a counter electromotive force generated from the inductive load to flow in a direction opposite to the supply direction. A control transistor;
The inductive load is connected in series with the first current control type transistor, is located on the lower arm side with respect to the inductive load, supplies a drive current in a second direction different from the first direction, and the inductive A second current-controlled transistor that causes a current caused by a counter electromotive force generated from a load to flow in a direction opposite to the supply direction;
First drive control means for generating a drive signal for turning on / off the first current control type transistor;
Second drive control means for generating a drive signal for turning on / off the second current control type transistor;
The reverse current that flows between the driving terminal of the first current control type transistor to which the inductive load is connected and the control terminal of the first current control type transistor and flows through the first current control type transistor. First current detecting means for detecting a current in the direction;
A second current detection transistor configured to detect a reverse current that flows between the reference terminal of the second current control transistor and the control terminal of the second current control transistor and detects the reverse current flowing through the second current control transistor; Current detection means,
When the reverse current is detected by at least the first current detection means, the first drive control means controls the first drive control means so as not to generate a drive signal for turning on the first current control transistor. 1 drive signal stop means;
The second drive control means controls the second drive control means so that a drive signal for turning on the second current control type transistor is not generated at least when the current in the reverse direction is detected by the second current detection means. A drive device for current control element, comprising: 2 drive signal stop means; The current control type element driving device according to claim 3,
The first current detection means includes a first resistance element arranged in series between the driving terminal and the control terminal of the first current control type transistor, and both ends of the first resistance element. First voltage detecting means for detecting a voltage between the terminals of the first voltage detecting means, detecting the current in the reverse direction based on a detection result by the first voltage detecting means,
The second current detecting means includes a second resistance element arranged in series between the reference terminal and the control terminal of the second current control type transistor, and both ends of the second resistance element. And a second voltage detecting means for detecting a voltage between the terminals of the first and second current detecting means, wherein the current in the reverse direction is detected based on a detection result by the second voltage detecting means.

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