JP3623626B2 - Three-phase voltage type current control inverter - Google Patents

Three-phase voltage type current control inverter Download PDF

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JP3623626B2
JP3623626B2 JP00800397A JP800397A JP3623626B2 JP 3623626 B2 JP3623626 B2 JP 3623626B2 JP 00800397 A JP00800397 A JP 00800397A JP 800397 A JP800397 A JP 800397A JP 3623626 B2 JP3623626 B2 JP 3623626B2
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output
inverter
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弥寿雄 横井
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日本インバータ株式会社
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Description

【０００１】
【発明が属する技術分野】
本発明は、直流電圧を三相交流電力に変換するインバータに関し、特に、三相交流出力電流が正弦波に制御される電流制御インバータに関する。
【０００２】
【発明が解決しようとする課題】
三相電圧型電流制御インバータは、三相誘導電動機のベクトル制御や、電力を交流と直流の双方向に自在に送受電できる双方向コンバータなどの用途に需要が広まりつつある。この電流制御インバータは、出力電流が負荷の状態と無関係に目標値と一致するよう制御する必要があり、この場合、電流の目標値は正弦波が一般的であり、電流は正弦波形の目標値に忠実に追従するよう瞬時値制御されなければならない。
【０００３】
三相インバータの基本構成、すなわち最も少ない数の変換素子を用いたインバータの構成は、図１に示すように６アーム・ブリッジ回路である。この回路により各相をそれぞれ正弦波形に、パルス幅変調するとき、三相交流出力電圧の最大値が、入力となる直流電圧の１／√２まで達しないという問題がある。このことは、三相の場合、往路と復路の最大点と最小点の間に６０°の位相差が存在することに起因する（図３）。
【０００４】
そこで本発明は、三相交流出力電圧が低下せず、変換効率の高い三相電圧型電流制御インバータの提供を解決課題とする。
【０００５】
【課題を解決するための手段】
本発明の三相電圧型電流制御インバータは、パルス幅変調回路を用いたパルス幅変調により所定周波数（ｆ）の三相交流電流を出力するインバータにおいて、上記所定周波数の正弦波信号の目標値とインバータの出力線から検出された電流フィードバック値との差を誤差として求める第１の演算器と、該第１の演算器の出力を増幅する誤差増幅器と、上記所定周波数（ｆ）の３倍の周波数（３ｆ）の３次高調波信号を得る３次高調波出力手段と、上記誤差増幅器の出力と上記３次高調波出力手段からの３次高調波信号とを同期して加算する第２の演算器とを備え、該第２の演算器の出力を制御出力として上記パルス幅変調回路へ入力することを特徴としている。
【０００６】
ここで、上記３次高調波信号の電圧値は、上記誤差増幅器の出力である所定周波数（ｆ）の電圧値の１／６であることが好ましい。
【０００７】
【発明の実施の形態】
図１に本発明実施例の全体のブロック図を示す。インバータ１は少くとも６個のスイッチング素子により６アーム・ブリッジ回路が構成され、各スイッチング素子はパルス幅変調回路４により開閉制御される。その結果、直流電源２の電力が三相交流電源３に変換される。三相交流出力線は３本（またはコモンを含めて４本）あるが１本のみ図示している。また、インバータの制御信号線はスイッチング素子数だけ存在する。
【０００８】
本発明の特徴部分は、パルス幅変調回路４を制御する制御手段５である。この制御手段５は各相ごとに３個存在するがその１個のみを図示している。ただし、３次高調波信号（３ｆ）は各相共通に用いることができる。
【０００９】
図２に、制御手段５の一実施例を示す。第１の演算器６は、所定周波数（ｆ）の正弦波信号、目標値Ｉｓと、インバータ１の出力線から電流検出器７により検出された電流フィードバック値ＩＦ との差を誤差として演算し、誤差増幅器８に入力する。第２の演算器９は、誤差増幅器８の出力信号と、３次高調波信号（３ｆ）とを加算してパルス幅変調回路４に入力する。３次高調波出力回路１０は、目標値Ｉｓと同期して、すなわち、各相の目標値となる正弦波信号の位相Ｏ点と３次高調波信号（３ｆ）の位相Ｏ点が一致するように、周波数３ｆの正弦波信号を出力する。この３次高調波信号の振幅は誤差増幅器８の出力の１／６である。
【００１０】
図３ないし図５に、図２に例示した制御手段５の各部の信号波形図を示す。図３は三相の目標値ＩＳ１、ＩＳ２、ＩＳ３を重ね合わせて示す。例えば第２相の目標値ＩＳ１が最大値Ｐに達した時刻から６０°の位相遅れののちに第１相の目標値ＩＳ２が最小値Ｑに達している。図４は三相の目標値ＩＳ１、ＩＳ２、ＩＳ３に同期して出力する３次高調波信号（３ｆ）を示してしる。図５は、パルス幅変調回路４に入力される直前の三相の電圧波形のうち一相のみを、３次高調波信号（３ｆ）と重ねて示している。この波形は位相角６０°と１２０°に二つのピークを有していることが特徴である。
【００１１】
図６（Ａ）〜（Ｄ）に第１の演算器６と第２の演算器９の入出力信号を例示する。図（Ａ）は目標値となる所定周波数信号ｆの正弦波信号Ｉｓと、電流検出器７によるフィードバック信号ＩＦ を重畳して示している。このフィードバック信号ＩＦ が正弦波であることが確認される。図（Ｂ）は、第１の演算器６の演算出力、すなわち、信号Ｉｓと信号ＩＦ の差であって、正弦波である。図（Ｃ）は誤差増幅器８の出力信号Ｅｆ、すなわち、上記差（Ｉｓ−ＩＦ ）が増幅されたものであって、この出力信号も所定周波数ｆの正弦波である。
【００１２】
第２の演算器９は誤差増幅器８の出力信号Ｅｆと３次高周波出力回路１０の出力信号Ｅ３ｆの和を演算するもので、図４、図５において説明した通り、第２の演算器９の出力信号（Ｅｆ＋Ｅ３ｆ）は図（Ｄ）に示すように、半サイクルに二つのピークをもち、ゼロクロス点における電圧勾配が、正弦波よりも急峻な波形である。なお、第１の演算器６の入力信号Ｉｓ，ＩＦ は電流信号でなく、電流波形と同形の電圧信号である。
【００１３】
図７は本発明の制御手段５の制御系をモデル化して示した演算回路図である。目標値Ｉｓ、インバータに対する制御出力をＩｏ、フィードバック回路のゲインをＨ、誤差増幅器８のゲインをＫ１ 、パルス幅変調回路４及びスイッチング素子の駆動回路のゲインをＫ２ 、３次高調波をＤとすれば、次式が成立する。
【００１４】
【数１】

Figure 0003623626
【００１５】
これを整理すれば
【００１６】
【数２】
Figure 0003623626
【００１７】
両辺をＫ１ で除して
【００１８】
【数３】
Figure 0003623626
【００１９】
Ｋ１ が十分に大きいときは Ｋ１ ≫Ｋ２ 、Ｋ１ ≫１であるから、
【００２０】
【数４】
Figure 0003623626
【００２１】
となり、外乱として導入される第３高調波Ｄの影響が実質的に消去され、制御出力Ｉｏは（Ｋ１ ／Ｈ）が定数であるから、目標値Ｉｓに完全に正比例したものとなる。
【００２２】
本発明の３次高調波出力手段は、種々な公知技術を利用して実施することができる。
図８はデジタル回路技術による実施例の一例を示す。共通のクロック発振回路１１と、そのクロックパルス列のパルス数を計数する計数回路１２を設ける。第１のＲＯＭ（読出し専用メモリ）１３には基本となる正弦波を発生させるテーブルを書き込んでおき、第２のＲＯＭ１４には基本波の第３の高調波となる正弦波を発生させるテーブルを書き込んでおく。第１のＲＯＭの出力データをＤ／Ａ変換することにより目標値Ｉｓとなる正弦波信号が得られ、第２のＲＯＭの出力データをＤ／Ａ変換することにより第３高調波信号が得られる。また、第１のＲＯＭ１３の出力データの値が「零」になったとき計数回路１２の内容をリセットすれば常に両正弦波信号が同期して出力される。
【００２３】
【発明の効果】
本発明によれば、三相交流電力の電流のピーク値が、直流電源電圧より大幅に低下せず、ほぼ比肩する値が得られ、その結果インバータの変換効率が約３０％向上した。
【００２４】
また、ブリッジ型インバータにおいては、上アームのスイッチング素子と下アームのスイッチング素子を一瞬なりとも同時にオンすれば直流電源の短絡事故が起きるので、クロスオーバ時に上下両アームのスイッチング素子を必ずオフにしなければならず、そのためのクロスオーバ歪が不可避であるが、本発明においては、クロスオーバ時の電圧勾配が急峻なため、このクロスオーバ歪が小さくなった。
【００２５】
さらに、本発明の制御手段５は非常に小型、軽量かつ、安価に製作することができ、既設の電流制御インバータに容易に付加して実施することができる。
【図面の簡単な説明】
【図１】は、本発明の一実施例を示す回路ブロック構成図である。
【図２】は、本発明の制御手段５の一実施例を示す回路図である。
【図３】は、本発明の作用説明図である。
【図４】は、本発明の作用説明図である。
【図５】は、本発明の作用説明図である。
【図６】は、本発明の作用説明図である。
【図７】は、本発明の制御手段５の演算回路図である。
【図８】は、本発明の３次高調波出力手段の一実施例を示す回路ブロック図である。
【符号の説明】
１・・・・インバータ
２・・・・直流電流
３・・・・三相交流
４・・・・パルス幅変調回路
５・・・・制御手段
１０・・・・３次高調波出力回路[0001]
[Technical field to which the invention belongs]
The present invention relates to an inverter that converts a DC voltage into three-phase AC power, and more particularly to a current control inverter in which a three-phase AC output current is controlled to a sine wave.
[0002]
[Problems to be solved by the invention]
The demand for three-phase voltage type current control inverters is increasing for applications such as vector control of three-phase induction motors and bidirectional converters that can transmit and receive power freely in both AC and DC directions. This current control inverter must be controlled so that the output current matches the target value regardless of the load state. In this case, the current target value is generally a sine wave, and the current is a sine waveform target value. The instantaneous value must be controlled so as to faithfully follow.
[0003]
The basic configuration of the three-phase inverter, that is, the configuration of the inverter using the smallest number of conversion elements is a 6-arm bridge circuit as shown in FIG. When this circuit modulates each phase into a sine waveform and performs pulse width modulation, there is a problem that the maximum value of the three-phase AC output voltage does not reach 1 / √2 of the input DC voltage. This is because, in the case of three phases, there is a phase difference of 60 ° between the maximum point and the minimum point of the forward path and the return path (FIG. 3).
[0004]
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a three-phase voltage-type current control inverter having a high conversion efficiency without reducing the three-phase AC output voltage.
[0005]
[Means for Solving the Problems]
The three-phase voltage type current control inverter of the present invention is an inverter that outputs a three-phase alternating current of a predetermined frequency (f) by pulse width modulation using a pulse width modulation circuit, and a target value of the sine wave signal of the predetermined frequency A first arithmetic unit that calculates a difference from the current feedback value detected from the output line of the inverter as an error; an error amplifier that amplifies the output of the first arithmetic unit; and three times the predetermined frequency (f) and the third-order harmonic output means for obtaining the third harmonic signal having a frequency (3f), a second for adding the third harmonic signal from the output and the third harmonic wave output unit of the error amplifier synchronously An arithmetic unit, and the output of the second arithmetic unit is input to the pulse width modulation circuit as a control output .
[0006]
Here, the voltage value of the third harmonic signal is preferably 1/6 of the voltage value of a predetermined frequency (f) which is the output of the error amplifier.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows an overall block diagram of an embodiment of the present invention. The inverter 1 includes a 6-arm bridge circuit composed of at least 6 switching elements, and each switching element is controlled to be opened and closed by a pulse width modulation circuit 4. As a result, the power of the DC power supply 2 is converted into the three-phase AC power supply 3. There are three three-phase AC output lines (or four including the common), but only one is shown. Further, there are as many inverter control signal lines as the number of switching elements.
[0008]
The characteristic part of the present invention is a control means 5 for controlling the pulse width modulation circuit 4. There are three control means 5 for each phase, but only one of them is shown. However, the third harmonic signal (3f) can be used in common for each phase.
[0009]
FIG. 2 shows an embodiment of the control means 5. The first computing unit 6 calculates a sine wave signal having a predetermined frequency (f), the target value Is, the difference between the detected actual current value I F by the current detector 7 from the output line of the inverter 1 as the error To the error amplifier 8. The second arithmetic unit 9 adds the output signal of the error amplifier 8 and the third harmonic signal (3f) and inputs them to the pulse width modulation circuit 4. The third harmonic output circuit 10 synchronizes with the target value Is, that is, the phase O point of the sine wave signal that is the target value of each phase matches the phase O point of the third harmonic signal (3f). In addition, a sine wave signal having a frequency of 3f is output. The amplitude of the third harmonic signal is 1/6 of the output of the error amplifier 8.
[0010]
3 to 5 show signal waveform diagrams of respective parts of the control means 5 illustrated in FIG. FIG. 3 shows three-phase target values I S1 , I S2 , and I S3 superimposed. For example, the target value I S2 of the first phase reaches the minimum value Q after a phase delay of 60 ° from the time when the target value I S1 of the second phase reaches the maximum value P. FIG. 4 shows the third harmonic signal (3f) output in synchronization with the three-phase target values I S1 , I S2 , and I S3 . FIG. 5 shows only one phase of the three-phase voltage waveforms immediately before being input to the pulse width modulation circuit 4 in an overlapping manner with the third harmonic signal (3f). This waveform is characterized by having two peaks at phase angles of 60 ° and 120 °.
[0011]
6A to 6D illustrate input / output signals of the first arithmetic unit 6 and the second arithmetic unit 9. Figure (A) shows superimposed the sine wave signal Is of the predetermined frequency signal f as a target value, a feedback signal I F by the current detector 7. It is confirmed that the feedback signal IF is a sine wave. Figure (B), the operation output of the first arithmetic unit 6, i.e., a difference between the signals Is and the signal I F, is a sine wave. FIG. 6C shows an output signal Ef of the error amplifier 8, that is, the difference (Is−I F ) amplified, and this output signal is also a sine wave having a predetermined frequency f.
[0012]
Those second operator 9 for calculating the sum of the output signals E 3f of the output signals Ef and the third-order frequency output circuit 10 of the error amplifier 8, Fig. 4, as described in FIG. 5, second operator 9 The output signal (Ef + E 3f ) has two peaks in a half cycle, and the voltage gradient at the zero cross point is steeper than the sine wave, as shown in FIG. The input signal Is the first arithmetic unit 6, I F is not a current signal, a voltage signal of the current waveform having the same shape.
[0013]
FIG. 7 is an arithmetic circuit diagram modeling the control system of the control means 5 of the present invention. Target value Is, control output for inverter Io, feedback circuit gain H, error amplifier 8 gain K 1 , pulse width modulation circuit 4 and switching element drive circuit gain K 2 , third harmonic D Then, the following equation is established.
[0014]
[Expression 1]
Figure 0003623626
[0015]
If you organize this [0016]
[Expression 2]
Figure 0003623626
[0017]
Divide both sides by K 1
[Equation 3]
Figure 0003623626
[0019]
Since when K 1 is sufficiently large is K 1 »K 2, K 1 »1 ,
[0020]
[Expression 4]
Figure 0003623626
[0021]
Thus, the influence of the third harmonic D introduced as a disturbance is substantially eliminated, and (K 1 / H) is a constant, so that the control output Io is completely directly proportional to the target value Is.
[0022]
The third harmonic output means of the present invention can be implemented using various known techniques.
FIG. 8 shows an example of an embodiment using digital circuit technology. A common clock oscillation circuit 11 and a counting circuit 12 that counts the number of pulses of the clock pulse train are provided. A table for generating a basic sine wave is written in the first ROM (read-only memory) 13, and a table for generating a sine wave that is the third harmonic of the basic wave is written in the second ROM 14. Leave in. A sine wave signal having the target value Is is obtained by D / A converting the output data of the first ROM, and a third harmonic signal is obtained by D / A converting the output data of the second ROM. . Further, if the content of the counting circuit 12 is reset when the value of the output data of the first ROM 13 becomes “zero”, both sine wave signals are always output in synchronization.
[0023]
【The invention's effect】
According to the present invention, the peak value of the current of the three-phase AC power is not significantly lower than the DC power supply voltage, and an almost comparable value is obtained. As a result, the conversion efficiency of the inverter is improved by about 30%.
[0024]
In addition, in a bridge type inverter, if the switching element of the upper arm and the switching element of the lower arm are turned on at the same time for a moment, a DC power supply short circuit accident will occur. Therefore, the crossover distortion is inevitable. However, in the present invention, the voltage gradient at the time of crossover is steep, so this crossover distortion is reduced.
[0025]
Furthermore, the control means 5 of the present invention can be manufactured in a very small size, light weight and at low cost, and can be easily added to an existing current control inverter.
[Brief description of the drawings]
FIG. 1 is a circuit block diagram showing an embodiment of the present invention.
FIG. 2 is a circuit diagram showing an embodiment of the control means 5 of the present invention.
FIG. 3 is an explanatory diagram of the operation of the present invention.
FIG. 4 is an operation explanatory view of the present invention.
FIG. 5 is an explanatory diagram of the operation of the present invention.
FIG. 6 is an operation explanatory view of the present invention.
FIG. 7 is an arithmetic circuit diagram of the control means 5 of the present invention.
FIG. 8 is a circuit block diagram showing an embodiment of the third harmonic output means of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... inverter 2 ... DC current 3 ... three-phase AC 4 ... pulse width modulation circuit 5 ... control means 10 ... third harmonic output circuit

Claims (2)

パルス幅変調回路を用いたパルス幅変調により所定周波数（ｆ）の三相交流電流を出力するインバータにおいて、
上記所定周波数の正弦波信号の目標値とインバータの出力線から検出された電流フィードバック値との差を誤差として求める第１の演算器と、
該第１の演算器の出力を増幅する誤差増幅器と、
上記所定周波数（ｆ）の３倍の周波数（３ｆ）の３次高調波信号を得る３次高調波出力手段と、
上記誤差増幅器の出力と上記３次高調波出力手段からの３次高調波信号とを同期して加算する第２の演算器とを備え、
該第２の演算器の出力を制御出力として上記パルス幅変調回路へ入力することを特徴とする三相電圧型電流制御インバータ。 In an inverter that outputs a three-phase alternating current of a predetermined frequency (f) by pulse width modulation using a pulse width modulation circuit ,
A first computing unit for obtaining, as an error, a difference between a target value of the sine wave signal having the predetermined frequency and a current feedback value detected from an output line of the inverter;
An error amplifier for amplifying the output of the first computing unit;
And the third-order harmonic output means for obtaining the third harmonic signal of 3 times the frequency (3f) of the predetermined frequency (f),
And third harmonic signals from the output and the third harmonic output means of said error amplifier and a second operator for adding synchronously,
A three-phase voltage-type current control inverter, wherein the output of the second arithmetic unit is input as a control output to the pulse width modulation circuit . 上記３次高調波信号の電圧値は、上記誤差増幅器の出力である上記所定周波数（ｆ）の電圧値の１／６であることを特徴とする請求項１に記載の三相電圧型電流制御インバータ。2. The three-phase voltage type current control according to claim 1, wherein a voltage value of the third harmonic signal is 1/6 of a voltage value of the predetermined frequency (f) which is an output of the error amplifier. Inverter.
JP00800397A 1997-01-20 1997-01-20 Three-phase voltage type current control inverter Expired - Fee Related JP3623626B2 (en)

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JP5621977B2 (en) * 2010-11-29 2014-11-12 ミネベア株式会社 3-phase motor drive controller
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CN102780410B (en) * 2012-07-26 2014-11-19 华为技术有限公司 Method and apparatus for modulating space vector pulse width
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