JP3616020B2 - Gallium nitride semiconductor device and manufacturing method thereof - Google Patents

Gallium nitride semiconductor device and manufacturing method thereof Download PDF

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JP3616020B2
JP3616020B2 JP2001062503A JP2001062503A JP3616020B2 JP 3616020 B2 JP3616020 B2 JP 3616020B2 JP 2001062503 A JP2001062503 A JP 2001062503A JP 2001062503 A JP2001062503 A JP 2001062503A JP 3616020 B2 JP3616020 B2 JP 3616020B2
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gallium nitride
ingan
based semiconductor
nitride based
layer
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JP2002270514A (en
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士郎 酒井
ワン タオ
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士郎 酒井
ナイトライド・セミコンダクター株式会社
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【0001】
【発明の属する技術分野】
本発明は、半導体層の表面に転位の終端が生じない窒化ガリウム系半導体層の形成方法に関する。
【0002】
【従来の技術】
近年、窒化ガリウム(GaN)等の窒化物結晶を用いた半導体装置が開発されており、青色LED等の発光素子に適用されている。このような窒化物結晶を用いた半導体装置に使用される窒化ガリウム系半導体層は、通常サファイア基板の上にMOCVDを用いてGaN等を成長させることにより形成される。図4には、上述したサファイア等の基板10上にGaN層12を形成した従来の窒化ガリウム系半導体層の例が示される。
【0003】
【発明が解決しようとする課題】
しかし、上記従来の窒化ガリウム系半導体層の形成方法において、図4に示されるように、サファイア等の基板10の上に上述したMOCVDによりGaN層12を成長させると、基板10に使用されるサファイアとGaNとの格子不整合のため、10〜10cm−2台の転位14が発生する。この転位14は、結晶構造中のある線に沿っておこる欠陥であり、図4に示されるように、半導体層の平坦な表面16に終端15が生じる。このような転位14の終端15が表面16に生じると、この上に各種のデバイスを形成しても転位14が素子中に伝搬し、素子の性能を低下させるという問題があった。すなわち、例えば窒化ガリウム系半導体層を使用した発光素子の発光効率が低下し、窒化物系レーザの寿命が短くなり、pn接合の逆方向漏れ電流が増加してしまうというような問題があった。
【0004】
本発明は上記従来の課題に鑑みなされたものであり、その目的は、表面に転位の終端が生じない窒化ガリウム系半導体装置及びその製造方法を提供することにある。
【0005】
【課題を解決するための手段】
上記目的を達成するために、本発明は、表面に転位の終端が生じない窒化ガリウム系半導体層を有する窒化ガリウム系半導体装置の製造方法であって、成長温度T1でInGaN/GaN MQWを成長させ、窒素雰囲気中で温度をT1から窒化ガリウム系半導体層の成長温度T2に昇温し、InGaN/GaN MQWの上に前記温度T2で窒化ガリウム系半導体層を成長させ、前記InGaN/GaN MQW及び窒化ガリウム系半導体層を下地層としてデバイス構造を成長させることを特徴とする。
【0006】
上記構成によれば、InGaN/GaN MQWの表面にV溝欠陥が生じ、このV溝欠陥で転位の方向が半導体層の上下方向から横方向に変更され、隣同士の転位でループが形成され、InGaN/GaN MQWの上に形成されるGaN層には転位が伝搬しない。このため、表面に転位の終端が生じない窒化ガリウム系半導体層を形成することができる。
【0007】
また、上記窒化ガリウム系半導体装置の製造方法において、InGaN/GaN MQWの成長工程と窒化ガリウム系半導体層の成長工程とを2回以上繰り返すことを特徴とする。
【0008】
上記構成によれば、GaN層への転位の伝搬をさらによく防止することができる。
【0009】
また、表面に転位の終端が生じない窒化ガリウム系半導体層を有する窒化ガリウム系半導体装置の製造方法であって、成長温度T1でInGaN/GaN MQWを形成し、アンモニアを含む雰囲気中で温度をT1から窒化ガリウム系半導体層の成長温度T2に昇温し、その後、デバイス構造を成長させることにより前記デバイス構造の下地層として前記InGaN/GaN MQWを形成することを特徴とする。
【0010】
上記構成によれば、アンモニアを含む雰囲気中でInGaN/GaN MQWを窒化ガリウム系半導体層の成長温度でアニールすることにより、InGaN/GaN MQW表面に生じるV溝欠陥中に窒化ガリウム系半導体層が形成され、この上に形成される半導体層表面への転位の終端の発生を防止できる。
【0011】
また、上記窒化ガリウム系半導体装置の製造方法において、窒化ガリウム系半導体はGaNであることを特徴とする。
【0012】
また、上記窒化ガリウム系半導体装置の製造方法において、窒化ガリウム系半導体はAlGaNであることを特徴とする。
【0013】
また、上記窒化ガリウム系半導体装置の製造方法において、温度T1は650〜800℃であることを特徴とする。
【0014】
また、上記窒化ガリウム系半導体装置の製造方法において、温度T2は800〜1100℃であることを特徴とする。また、本発明は、窒化ガリウム系半導体装置であって、基板と、前記基板上に形成され、その表面にV溝欠陥を有するInGaN/GaN MQW層と、前記InGaN/GaN MQW層上に形成された窒化ガリウム系半導体層と、前記窒化ガリウム系半導体層上に形成されたデバイス構造とを有し、前記InGaN/GaN MQW層及び窒化ガリウム系半導体層を前記デバイス構造の下地層とすることを特徴とする。
【0015】
【発明の実施の形態】
以下、本発明の実施の形態(以下実施形態という)を、図面にしたがって説明する。
【0016】
図1(a),(b)には、本発明に係る窒化ガリウム系半導体層の形成方法の説明図が示される。図1(a)において、基板10の上にMOCVDによりGaN層12を形成すると、前述したように転位14が発生する。このGaN層12の上にさらに連続してInGaN/GaN MQW18を成長させると、その表面にV溝欠陥20が発生する場合がある。このV溝欠陥20が発生しない場合には、InGaN/GaN MQW18の表面16に転位14の終端15が発生する。一方、V溝欠陥20が発生した場合には、表面16にV字型のピットが発生する。このV溝欠陥20は必ず転位14の表面16での終端部だけに選択的に発生する。V溝欠陥20の発生確率はInGaN/GaN MQW18の層の数が多く、InGaN/GaN MQW18中のInGaNのインジウム組成が高く、InGaNの膜厚が厚いほど高くなる。
【0017】
このように、InGaN/GaN MQW18の成長条件を最適化すると、ほぼ全ての転位14の表面16における終端部にV溝欠陥20を発生させることができる。このようなInGaN/GaN MQW18の成長条件としては、その成長温度を650〜800℃の範囲とするのが好適である。このInGaN/GaN MQW18の成長温度650〜800℃が本発明に係る成長温度T1に相当する。
【0018】
本発明において特徴的な点は、上記のようにしてInGaN/GaN MQW18の成長をV溝欠陥20の発生しやすい条件で行った上、窒素雰囲気の下、温度をGaN等の窒化ガリウム系半導体層の成長温度である800℃以上1100℃以下の温度に上昇させて、図1(b)に示されるように、窒化ガリウム系半導体層22の成長を行う点にある。この場合の窒化ガリウム系半導体層22の成長温度が本発明に係る成長温度T2に相当する。このようにすると、V溝欠陥20の部分で転位14は横方向に曲げられ、窒化ガリウム系半導体層22の表面に転位の終端が生じることを防止できる。これは、基板10の上に形成されたGaN層12から伝搬してきた転位14が、V溝欠陥20のV溝表面24に沿って進むので、同じように隣のV溝表面24から進んできた転位14と、InGaN/GaN MQW18と窒化ガリウム系半導体層22との界面において会合してループを作るためであると考えられる。このようにして形成されたループが図1(b)の26で示される。
【0019】
図2(a),(b)には、V溝欠陥20により転位14が横方向に曲げられる原理の説明図が示される。図2(a)は、V溝欠陥20の近傍を拡大した図である。この場合、図示されていないGaN層12から伝搬してきた転位14は、V溝欠陥20の底28で終端している。このような転位14の両側では、InGaN/GaN MQW18の結晶位相はずれている。したがって、V溝欠陥20の両方の側面30,32(図1(b)におけるV溝表面24)から窒化ガリウム系半導体層22の結晶成長が始まると、各側面30,32からそれぞれ成長してきた結晶の界面には、図2(a)に示されるように新たな転位14aが発生するはずである。
【0020】
しかし、V溝欠陥20を有する表面には凹凸が存在するので、この上にGaN等の窒化ガリウム系半導体層22を成長させると、凹部で成長が開始される。V溝欠陥20の底28の頂点は点であるので、V溝欠陥20の底28における両方の側面30,32から同時に結晶成長が開始することはなく、どちらかの面例えば側面32の凹部に発生した核が成長していく。この場合、V溝欠陥20の内部に成長した結晶の位相は成長が開始された面すなわち図2(b)の側面32の位相を引き継いで成長する。この結果、転位14は結晶成長が開始された側面32の反対側の側面30に沿って伝搬してゆく。この様子が図2(b)の・で示される。このような原理により、図の下方から伝搬してきた転位14は、V溝欠陥20の一方の側面30に沿ってInGaN/GaN MQW18と窒化ガリウム系半導体層22との界面34に到達し、その後界面34に沿って図の横方向に進行する。このため、図2(b)には示されていない隣のV溝欠陥20から同様にしてInGaN/GaN MQW18と窒化ガリウム系半導体層22との界面34を進行してきた転位14と界面34上で会合する。このように、界面34上で2つの転位14が会合すると、転位のループが完成し、転位14は以後動けない状態となる。したがって、InGaN/GaN MQW18の上に形成された窒化ガリウム系半導体層22への転位14の伝搬が回避され、窒化ガリウム系半導体層22の表面に転位14の終端15が生じることを防止できる。
【0021】
以上述べたように、本実施形態では、InGaN/GaN MQW18を650〜800℃程度の温度で成長させ、その表面にV溝欠陥20を形成した後、GaN等の窒化ガリウム系半導体層の成長温度まで窒素雰囲気中で昇温し、その後その成長温度で窒化ガリウム系半導体層22の成長を続けることにより、上述した原理により窒化ガリウム系半導体層22中への転位14の伝搬を防止できる。これにより、窒化ガリウム系半導体層20の表面に転位14の終端15が生じなくなる。
【0022】
なお、上述したInGaN/GaN MQW18の成長工程と窒化ガリウム系半導体層の成長工程とはそれぞれ1回ずつ行われているが、これらの工程は複数回(2回以上)繰り返してもよい。これらの工程を2回繰り返した場合の例が図3に示される。図3において、まず図1(b)と同様の条件で、基板10の上にGaN層12、InGaN/GaN MQW18、窒化ガリウム系半導体層22を形成する。次に、温度をInGaN/GaN MQWの成長温度(T1)として、InGaN/GaN MQW36を形成し、再度窒素雰囲気の下でT2まで温度を上昇させて窒化ガリウム系半導体層38を形成する。
【0023】
このように、InGaN/GaN MQWを2層以上形成することにより、最上層に形成される窒化ガリウム系半導体層38への転位の伝搬をさらによく防止することができる。
【0024】
また、InGaN/GaN MQW18の成長後、窒化ガリウム系半導体層22の成長温度まで昇温するプロセスを、アンモニアを含む雰囲気中で行うと、窒化ガリウム系半導体層の成長温度での窒化ガリウム系半導体層22の成長プロセスを行わなくてもV溝欠陥20の底28からの転位14の伝搬を防止できる。これは、窒化ガリウム系半導体層22の成長温度まで昇温することによりInGaN/GaN MQW18の窒化物半導体が蒸発し、これとアンモニアとが反応してV溝欠陥20中に窒化ガリウム系半導体層が形成され、上述した原理と同様に転位14の方向がInGaN/GaN MQW18と窒化ガリウム系半導体層22の界面34の方向に曲げられるためである。
【0025】
以上のようにして、本実施形態においては、InGaN/GaN MQW18を比較的低温、例えば650〜800℃で成長してV溝欠陥20を故意に発生させ、V溝欠陥20が発生したInGaN/GaN MQW18、36の上に比較的高温で窒化ガリウム系半導体層22、38を成長させ、これにより高温で成長した窒化ガリウム系半導体層22、38中の転位14を低減させるものである。このようにして、図1(b)及び図3に示されるように、転位14の存在しない窒化ガリウム系半導体層22、38を形成すれば、以後この窒化ガリウム系半導体層22、38の上に半導体の結晶を成長させても転位14が伝搬することはない。したがって、このような転位14の存在しない窒化ガリウム系半導体層22、38の上にデバイス構造を成長させれば効率のよい発光素子等のデバイスを形成することができる。
【0026】
本発明者らは種々実験を行った結果、InGaN/GaN MQW18、36の表面の転位14の位置にV溝欠陥20を効率的に発生させる条件として以下のものを見いだした。
【0027】
InGaN/GaN MQWの積層数:3〜20周期、好ましくは5〜15周期。1周期の厚さ10nm。
【0028】
InGaN/GaN MQWの合計の厚さ:50〜200nm、好ましくは10〜500nm。
【0029】
InGaN/GaN MQW中のIn組成:5〜15%、好ましくは7〜13%。
【0030】
InGaN/GaN MQWの成長温度:650〜800℃、好ましくは700〜750℃。
【0031】
InGaN/GaN MQW上に成長させる窒化ガリウム系半導体層の成長温度:800〜1100℃、好ましくは1000〜1080℃。
【0032】
以上のような条件によれば、InGaN/GaN MQW上に形成する窒化ガリウム系半導体層22、38中に発生する転位14を大幅に低減することができる。なお、上述した窒化ガリウム系半導体層22、38の材料としては、前述した通りGaNがあるが、このほかにAlGaNも同じ条件で使用することができる。
【0033】
以上のようにして形成した窒化ガリウム系半導体層22の上に波長350nm帯で発光するAlGaN/GaN系LEDを作製したところ、本発明を使用しない場合と比べて発光効率を約2倍とすることができた。
【0034】
【発明の効果】
以上説明したように、本発明によれば、表面に転位の終端が生じない窒化ガリウム系半導体層を形成することができる。
【図面の簡単な説明】
【図1】本発明に係る窒化ガリウム系半導体層の形成方法の説明図である。
【図2】図1に示された窒化ガリウム系半導体層の形成方法により窒化ガリウム系半導体層中の転位が減少する原理の説明図である。
【図3】InGaN/GaN MQWの成長工程と窒化ガリウム系半導体層の成長工程とを2回繰り返した場合の例を示す図である。
【図4】従来における窒化ガリウム系半導体層の例を示す図である。
【符号の説明】
10 基板、12 GaN層、14 転位、16 表面、18,36 InGaN/GaN MQW、20 V溝欠陥、22,38 窒化ガリウム系半導体層、24 V溝表面、26 ループ、28 底、30,32 側面、34 界面。
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for forming a gallium nitride-based semiconductor layer in which dislocation termination does not occur on the surface of a semiconductor layer.
[0002]
[Prior art]
In recent years, semiconductor devices using nitride crystals such as gallium nitride (GaN) have been developed and applied to light-emitting elements such as blue LEDs. A gallium nitride based semiconductor layer used in such a semiconductor device using a nitride crystal is usually formed by growing GaN or the like on a sapphire substrate using MOCVD. FIG. 4 shows an example of a conventional gallium nitride based semiconductor layer in which a GaN layer 12 is formed on a substrate 10 such as sapphire described above.
[0003]
[Problems to be solved by the invention]
However, in the conventional method for forming a gallium nitride based semiconductor layer, as shown in FIG. 4, when the GaN layer 12 is grown on the substrate 10 such as sapphire by the above-described MOCVD, the sapphire used for the substrate 10. 10 8 to 10 9 cm −2 dislocations 14 are generated due to lattice mismatch between GaN and GaN. This dislocation 14 is a defect that occurs along a certain line in the crystal structure, and as shown in FIG. 4, a termination 15 is generated on the flat surface 16 of the semiconductor layer. When the end 15 of the dislocation 14 is generated on the surface 16, there is a problem that the dislocation 14 propagates into the element even if various devices are formed on the surface 16, thereby reducing the performance of the element. That is, for example, the light emitting efficiency of a light emitting device using a gallium nitride based semiconductor layer is lowered, the lifetime of the nitride based laser is shortened, and the reverse leakage current of the pn junction is increased.
[0004]
The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to provide a gallium nitride based semiconductor device in which dislocation termination does not occur on the surface and a method for manufacturing the same.
[0005]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides a method for manufacturing a gallium nitride semiconductor device having a gallium nitride semiconductor layer in which dislocation termination does not occur on the surface, and grows InGaN / GaN MQW at a growth temperature T1. The temperature is increased from T1 to the growth temperature T2 of the gallium nitride based semiconductor layer in a nitrogen atmosphere, and the gallium nitride based semiconductor layer is grown on the InGaN / GaN MQW at the temperature T2, and the InGaN / GaN MQW and nitridation are performed. A device structure is grown using a gallium semiconductor layer as a base layer .
[0006]
According to the above configuration, a V-groove defect is generated on the surface of the InGaN / GaN MQW, the dislocation direction is changed from the vertical direction of the semiconductor layer to the lateral direction by this V-groove defect, and a loop is formed by the adjacent dislocations. Dislocations do not propagate in the GaN layer formed on the InGaN / GaN MQW. Therefore, it is possible to form a gallium nitride based semiconductor layer in which dislocation termination does not occur on the surface.
[0007]
In the method of manufacturing a gallium nitride based semiconductor device, the growth step of InGaN / GaN MQW and the growth step of the gallium nitride based semiconductor layer are repeated twice or more.
[0008]
According to the above configuration, dislocation propagation to the GaN layer can be further prevented.
[0009]
Also, a method of manufacturing a gallium nitride based semiconductor device having a gallium nitride based semiconductor layer in which dislocation termination does not occur on the surface, wherein InGaN / GaN MQW is formed at a growth temperature T1, and the temperature is set to T1 in an atmosphere containing ammonia. from the temperature was raised to the growth temperature T2 of the gallium nitride-based semiconductor layer, then, and forming the InGaN / GaN MQW as the base layer of the device structure by growing a device structure.
[0010]
According to the above configuration, by annealing InGaN / GaN MQW at the growth temperature of the gallium nitride based semiconductor layer in an atmosphere containing ammonia, a gallium nitride based semiconductor layer is formed in the V-groove defect generated on the surface of the InGaN / GaN MQW. Thus, it is possible to prevent the occurrence of termination of dislocations on the surface of the semiconductor layer formed thereon.
[0011]
In the method for manufacturing a gallium nitride semiconductor device, the gallium nitride semiconductor is GaN.
[0012]
In the method for manufacturing a gallium nitride based semiconductor device, the gallium nitride based semiconductor is AlGaN.
[0013]
In the method for manufacturing a gallium nitride based semiconductor device , the temperature T1 is 650 to 800 ° C.
[0014]
In the method for manufacturing a gallium nitride based semiconductor device , the temperature T2 is 800 to 1100 ° C. The present invention also relates to a gallium nitride based semiconductor device formed on a substrate, an InGaN / GaN MQW layer formed on the substrate and having a V-groove defect on the surface, and the InGaN / GaN MQW layer. A gallium nitride based semiconductor layer and a device structure formed on the gallium nitride based semiconductor layer, wherein the InGaN / GaN MQW layer and the gallium nitride based semiconductor layer serve as a base layer of the device structure. And
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention (hereinafter referred to as embodiments) will be described with reference to the drawings.
[0016]
FIGS. 1A and 1B are explanatory views of a method for forming a gallium nitride based semiconductor layer according to the present invention. In FIG. 1A, when the GaN layer 12 is formed on the substrate 10 by MOCVD, dislocations 14 are generated as described above. When InGaN / GaN MQW 18 is further grown continuously on the GaN layer 12, a V-groove defect 20 may be generated on the surface thereof. When the V-groove defect 20 does not occur, the end 15 of the dislocation 14 is generated on the surface 16 of the InGaN / GaN MQW 18. On the other hand, when the V-groove defect 20 is generated, V-shaped pits are generated on the surface 16. The V-groove defect 20 is selectively generated only at the terminal portion of the surface 16 of the dislocation 14. The probability of occurrence of the V-groove defect 20 increases as the number of InGaN / GaN MQW18 layers increases, the indium composition of InGaN in the InGaN / GaN MQW18 increases, and the thickness of the InGaN increases.
[0017]
As described above, when the growth conditions of the InGaN / GaN MQW 18 are optimized, the V-groove defect 20 can be generated at the terminal portion of the surface 16 of almost all the dislocations 14. As a growth condition of such InGaN / GaN MQW18, it is preferable to set the growth temperature in the range of 650 to 800 ° C. The growth temperature 650 to 800 ° C. of the InGaN / GaN MQW 18 corresponds to the growth temperature T1 according to the present invention.
[0018]
A characteristic point in the present invention is that the growth of InGaN / GaN MQW 18 is performed under the condition that the V-groove defect 20 is likely to be generated as described above, and the temperature is set to gallium nitride based semiconductor layer such as GaN in a nitrogen atmosphere. The growth temperature is 800 ° C. or higher and 1100 ° C. or lower, and the gallium nitride based semiconductor layer 22 is grown as shown in FIG. The growth temperature of the gallium nitride based semiconductor layer 22 in this case corresponds to the growth temperature T2 according to the present invention. In this way, the dislocations 14 are bent in the lateral direction at the V-groove defect 20 portion, and the termination of the dislocations on the surface of the gallium nitride based semiconductor layer 22 can be prevented. This is because dislocations 14 propagating from the GaN layer 12 formed on the substrate 10 proceed along the V-groove surface 24 of the V-groove defect 20 and thus proceed from the adjacent V-groove surface 24 in the same manner. This is probably because the dislocations 14 are associated with each other at the interface between the InGaN / GaN MQW 18 and the gallium nitride based semiconductor layer 22 to form a loop. The loop formed in this way is indicated by 26 in FIG.
[0019]
FIGS. 2A and 2B are explanatory views of the principle that the dislocations 14 are bent in the lateral direction by the V-groove defect 20. FIG. 2A is an enlarged view of the vicinity of the V-groove defect 20. In this case, the dislocation 14 that has propagated from the GaN layer 12 (not shown) terminates at the bottom 28 of the V-groove defect 20. On both sides of such a dislocation 14, the crystal phase of InGaN / GaN MQW18 is shifted. Therefore, when crystal growth of the gallium nitride based semiconductor layer 22 starts from both side surfaces 30 and 32 of the V-groove defect 20 (V-groove surface 24 in FIG. 1B), crystals grown from the side surfaces 30 and 32, respectively. As shown in FIG. 2A, a new dislocation 14a should be generated at the interface.
[0020]
However, since there are irregularities on the surface having the V-groove defect 20, when a gallium nitride based semiconductor layer 22 such as GaN is grown thereon, the growth starts at the recess. Since the apex of the bottom 28 of the V-groove defect 20 is a point, crystal growth does not start from both side surfaces 30 and 32 at the bottom 28 of the V-groove defect 20 at the same time. The generated nucleus grows. In this case, the phase of the crystal grown inside the V-groove defect 20 grows by taking over the phase of the surface on which the growth has started, that is, the side surface 32 of FIG. As a result, the dislocations 14 propagate along the side surface 30 opposite to the side surface 32 where crystal growth has started. This state is indicated by a mark (2) in FIG. Based on such a principle, the dislocation 14 propagating from the lower side of the figure reaches the interface 34 between the InGaN / GaN MQW 18 and the gallium nitride based semiconductor layer 22 along one side surface 30 of the V-groove defect 20, and then the interface. It progresses in the horizontal direction of the figure along 34. For this reason, the dislocations 14 and the interface 34 that have traveled the interface 34 between the InGaN / GaN MQW 18 and the gallium nitride based semiconductor layer 22 in the same manner from the adjacent V-groove defect 20 not shown in FIG. To meet. Thus, when the two dislocations 14 meet on the interface 34, the dislocation loop is completed, and the dislocations 14 cannot move thereafter. Therefore, propagation of the dislocation 14 to the gallium nitride based semiconductor layer 22 formed on the InGaN / GaN MQW 18 can be avoided, and the termination 15 of the dislocation 14 on the surface of the gallium nitride based semiconductor layer 22 can be prevented.
[0021]
As described above, in this embodiment, after growing InGaN / GaN MQW18 at a temperature of about 650 to 800 ° C. and forming the V-groove defect 20 on the surface thereof, the growth temperature of the gallium nitride based semiconductor layer such as GaN Then, the growth of the gallium nitride based semiconductor layer 22 is continued at the growth temperature until the dislocation 14 can be prevented from propagating into the gallium nitride based semiconductor layer 22 according to the above-described principle. As a result, the end 15 of the dislocation 14 does not occur on the surface of the gallium nitride based semiconductor layer 20.
[0022]
The above-described growth step of InGaN / GaN MQW 18 and the growth step of the gallium nitride based semiconductor layer are each performed once, but these steps may be repeated a plurality of times (two or more times). An example in which these steps are repeated twice is shown in FIG. 3, first, a GaN layer 12, an InGaN / GaN MQW 18, and a gallium nitride based semiconductor layer 22 are formed on the substrate 10 under the same conditions as in FIG. Next, the InGaN / GaN MQW 36 is formed with the temperature set to the growth temperature (T1) of InGaN / GaN MQW, and the temperature is increased again to T2 under a nitrogen atmosphere to form the gallium nitride based semiconductor layer 38.
[0023]
Thus, by forming two or more layers of InGaN / GaN MQW, it is possible to better prevent dislocation propagation to the gallium nitride based semiconductor layer 38 formed as the uppermost layer.
[0024]
Further, when the process of raising the temperature to the growth temperature of the gallium nitride based semiconductor layer 22 after the growth of the InGaN / GaN MQW 18 is performed in an atmosphere containing ammonia, the gallium nitride based semiconductor layer at the growth temperature of the gallium nitride based semiconductor layer Even if the growth process 22 is not performed, the propagation of the dislocation 14 from the bottom 28 of the V-groove defect 20 can be prevented. This is because the nitride semiconductor of InGaN / GaN MQW 18 evaporates by raising the temperature to the growth temperature of the gallium nitride based semiconductor layer 22, and this reacts with ammonia to form a gallium nitride based semiconductor layer in the V-groove defect 20. This is because the direction of the dislocations 14 is bent in the direction of the interface 34 between the InGaN / GaN MQW 18 and the gallium nitride based semiconductor layer 22 in the same manner as described above.
[0025]
As described above, in this embodiment, the InGaN / GaN MQW 18 is grown at a relatively low temperature, for example, 650 to 800 ° C. to intentionally generate the V-groove defect 20, and the InGaN / GaN in which the V-groove defect 20 is generated. The gallium nitride semiconductor layers 22 and 38 are grown on the MQWs 18 and 36 at a relatively high temperature, thereby reducing the dislocations 14 in the gallium nitride semiconductor layers 22 and 38 grown at a high temperature. In this way, as shown in FIGS. 1B and 3, if the gallium nitride semiconductor layers 22 and 38 without the dislocations 14 are formed, the gallium nitride semiconductor layers 22 and 38 are formed on the gallium nitride semiconductor layers 22 and 38 thereafter. Even when a semiconductor crystal is grown, the dislocation 14 does not propagate. Therefore, an efficient device such as a light-emitting element can be formed by growing a device structure on the gallium nitride based semiconductor layers 22 and 38 where such dislocations 14 are not present.
[0026]
As a result of various experiments, the present inventors have found the following conditions for efficiently generating the V-groove defect 20 at the position of the dislocation 14 on the surface of the InGaN / GaN MQW 18, 36.
[0027]
Number of InGaN / GaN MQW stacks: 3 to 20 cycles, preferably 5 to 15 cycles. One cycle thickness is 10 nm.
[0028]
Total thickness of InGaN / GaN MQW: 50 to 200 nm, preferably 10 to 500 nm.
[0029]
In composition in InGaN / GaN MQW: 5 to 15%, preferably 7 to 13%.
[0030]
Growth temperature of InGaN / GaN MQW: 650 to 800 ° C., preferably 700 to 750 ° C.
[0031]
Growth temperature of gallium nitride based semiconductor layer grown on InGaN / GaN MQW: 800 to 1100 ° C., preferably 1000 to 1080 ° C.
[0032]
According to the above conditions, the dislocations 14 generated in the gallium nitride based semiconductor layers 22 and 38 formed on the InGaN / GaN MQW can be greatly reduced. In addition, as a material of the gallium nitride based semiconductor layers 22 and 38 described above, there is GaN as described above, but AlGaN can also be used under the same conditions.
[0033]
When an AlGaN / GaN-based LED that emits light at a wavelength of 350 nm is fabricated on the gallium nitride-based semiconductor layer 22 formed as described above, the luminous efficiency is approximately doubled compared to the case where the present invention is not used. I was able to.
[0034]
【The invention's effect】
As described above, according to the present invention, it is possible to form a gallium nitride based semiconductor layer in which dislocation termination does not occur on the surface.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of a method for forming a gallium nitride based semiconductor layer according to the present invention.
FIG. 2 is an explanatory diagram of the principle that dislocations in a gallium nitride based semiconductor layer are reduced by the method for forming a gallium nitride based semiconductor layer shown in FIG.
FIG. 3 is a diagram showing an example in which an InGaN / GaN MQW growth step and a gallium nitride based semiconductor layer growth step are repeated twice.
FIG. 4 is a diagram showing an example of a conventional gallium nitride based semiconductor layer.
[Explanation of symbols]
10 substrate, 12 GaN layer, 14 dislocation, 16 surface, 18, 36 InGaN / GaN MQW, 20 V groove defect, 22, 38 gallium nitride semiconductor layer, 24 V groove surface, 26 loop, 28 bottom, 30, 32 side , 34 interface.

Claims (9)

表面に転位の終端が生じない窒化ガリウム系半導体層を下地のバッファ層として有する窒化ガリウム系半導体装置の製造方法であって、
基板上に成長温度T1でInGaN/GaN MQWを成長させてその表面にV溝欠陥を生じさせ
窒素雰囲気中で温度をT1から窒化ガリウム系半導体層の成長温度T2に昇温し、
InGaN/GaN MQWの上に前記温度T2で窒化ガリウム系半導体層を成長させて前記InGaN/GaN MQW内の転位を前記V溝欠陥の側面及び前記InGaN/GaN MQWと前記窒化ガリウム系半導体層との界面に沿って進行させ
前記InGaN/GaN MQW及び窒化ガリウム系半導体層を下地のバッファ層として前記基板及びバッファ層上に発光素子デバイス構造を成長させることで窒化ガリウム系半導体装置を作製することを特徴とする窒化ガリウム系半導体装置の製造方法。
A method for manufacturing a gallium nitride based semiconductor device having a gallium nitride based semiconductor layer in which dislocation termination does not occur on the surface as an underlying buffer layer ,
InGaN / GaN MQW is grown on the substrate at a growth temperature T1 to generate V-groove defects on the surface ,
Raising the temperature from T1 to the growth temperature T2 of the gallium nitride based semiconductor layer in a nitrogen atmosphere,
A gallium nitride based semiconductor layer is grown on the InGaN / GaN MQW at the temperature T2, and dislocations in the InGaN / GaN MQW are formed on the side surface of the V-groove defect and between the InGaN / GaN MQW and the gallium nitride based semiconductor layer. Proceed along the interface ,
A gallium nitride based semiconductor device is produced by growing a light emitting device device structure on the substrate and the buffer layer using the InGaN / GaN MQW and the gallium nitride based semiconductor layer as a base buffer layer. Device manufacturing method.
請求項1記載の方法において、
前記InGaN/GaN MQWの成長工程と前記窒化ガリウム系半導体層の成長工程とを2回以上繰り返すことを特徴とする窒化ガリウム系半導体装置の製造方法。
The method of claim 1, wherein
A method of manufacturing a gallium nitride semiconductor device, wherein the growth step of the InGaN / GaN MQW and the growth step of the gallium nitride semiconductor layer are repeated twice or more.
表面に転位の終端が生じない窒化ガリウム系半導体層を下地のバッファ層として有する窒化ガリウム系半導体装置の製造方法であって、
基板上に成長温度T1でInGaN/GaN MQWを形成してその表面にV溝欠陥を生じさせ
アンモニアを含む雰囲気中で温度をT1から窒化ガリウム系半導体層の成長温度T2に昇温して前記InGaN/GaN MQW内の転位を前記V溝欠陥の側面及び前記InGaN/GaN MQWと窒化ガリウム系半導体層との界面に沿って進行させ、
その後、前記InGaN/GaN MQW及び窒化ガリウム系半導体層を下地のバッファ層として前記基板及びバッファ層上に発光素子デバイス構造を成長させる
ことにより前記デバイス構造の下地のバッファ層として前記InGaN/MQW及び窒化ガリウム系半導体層を形成して窒化ガリウム系半導体装置を作製することを特徴とする窒化ガリウム系半導体装置の製造方法。
A method of manufacturing a gallium nitride semiconductor device having a gallium nitride semiconductor layer having no dislocation termination on the surface as an underlying buffer layer ,
An InGaN / GaN MQW is formed on the substrate at a growth temperature T1, and a V-groove defect is generated on the surface .
In an atmosphere containing ammonia, the temperature is increased from T1 to the growth temperature T2 of the gallium nitride semiconductor layer , and the dislocations in the InGaN / GaN MQW are changed to the side surfaces of the V-groove defects and the InGaN / GaN MQW and gallium nitride semiconductor. Proceed along the interface with the layer,
Thereafter, a light emitting device device structure is grown on the substrate and the buffer layer using the InGaN / GaN MQW and the gallium nitride based semiconductor layer as a base buffer layer, thereby forming the InGaN / MQW and nitride as the base buffer layer of the device structure. A method of manufacturing a gallium nitride based semiconductor device, comprising forming a gallium based semiconductor layer to manufacture a gallium nitride based semiconductor device.
請求項1から請求項3のいずれか一項記載の方法において、
前記窒化ガリウム系半導体はGaNであることを特徴とする窒化ガリウム系半導体装置の製造方法。
The method according to any one of claims 1 to 3, wherein
The method of manufacturing a gallium nitride semiconductor device, wherein the gallium nitride semiconductor is GaN.
請求項1から請求項3のいずれか一項記載の方法において、
前記窒化ガリウム系半導体はAlGaNであることを特徴とする窒化ガリウム系半導体装置の製造方法。
The method according to any one of claims 1 to 3, wherein
The method of manufacturing a gallium nitride semiconductor device, wherein the gallium nitride semiconductor is AlGaN.
請求項1から請求項5のいずれか一項記載の方法において、
前記温度T1は650〜800℃であることを特徴とする窒化ガリウム系半導体装置の製造方法。
The method according to any one of claims 1 to 5, wherein
The method of manufacturing a gallium nitride based semiconductor device, wherein the temperature T1 is 650 to 800 ° C.
請求項1から請求項6のいずれか一項記載の方法において、
前記温度T2は800〜1100℃であることを特徴とする窒化ガリウム系半導体装置の製造方法。
The method according to any one of claims 1 to 6, wherein
The method of manufacturing a gallium nitride based semiconductor device, wherein the temperature T2 is 800 to 1100 ° C.
窒化ガリウム系半導体層を下地のバッファ層として有する窒化ガリウム系半導体装置であって、
基板と、
前記基板上に形成され、その表面にV溝欠陥を有するInGaN/GaN MQW層と、
前記InGaN/GaN MQW層上に形成された窒化ガリウム系半導体層により前記InGaN/GaN MQW層内の転位を前記V溝欠陥の側面及び前記InGaN/GaN MQWと前記窒化ガリウム系半導体層との界面に沿って進行させ、
前記窒化ガリウム系半導体層上に形成された発光素子デバイス構造と、
を有し、前記InGaN/GaN MQW層及び窒化ガリウム系半導体層を前記デバイス構造の下地のバッファ層とすることを特徴とする窒化ガリウム系半導体装置。
A gallium nitride based semiconductor device having a gallium nitride based semiconductor layer as an underlying buffer layer ,
A substrate,
An InGaN / GaN MQW layer formed on the substrate and having V-groove defects on its surface;
The gallium nitride based semiconductor layer formed on the InGaN / GaN MQW layer causes dislocations in the InGaN / GaN MQW layer to be formed on the side surface of the V-groove defect and at the interface between the InGaN / GaN MQW and the gallium nitride based semiconductor layer. Proceed along,
A light emitting device structure formed on the gallium nitride based semiconductor layer;
A gallium nitride based semiconductor device, wherein the InGaN / GaN MQW layer and the gallium nitride based semiconductor layer are used as a buffer layer as a base of the device structure.
請求項8記載の装置において、
前記InGaN/GaN MQW層は、
その積層周期は3乃至20周期であり、
その層厚は50乃至200nmであり、
In組成は5乃至15%である
ことを特徴とする窒化ガリウム系半導体装置。
The apparatus of claim 8.
The InGaN / GaN MQW layer is
The stacking cycle is 3 to 20 cycles,
The layer thickness is 50 to 200 nm,
A gallium nitride semiconductor device characterized in that the In composition is 5 to 15%.
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