JP3612912B2 - Display device and gamma correction method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a display device and a gamma correction method, and more particularly, to a display device in which a pixel is constituted by a common electrode and a pixel electrode facing the common electrode, and the brightness is corrected by controlling the potential of the common electrode. It relates to gamma correction.
[0002]
[Prior art]
In a TFT liquid crystal display device, brightness adjustment and gamma (γ) correction are necessary techniques for compensating the electro-optical characteristic curve and viewing angle dependency of the liquid crystal panel.
Bright adjustment in a conventional TFT liquid crystal display device is limited because the dynamic range of a signal applied to the TFT is limited to a predetermined value (for example, 5 V) or less, and the adjustment range cannot be satisfied by the amplitude adjustment of the image signal written to the pixel electrode. This is done by controlling the potential of the common electrode in conjunction with the signal.
[0003]
When the brightness adjustment is performed in this way, as shown in FIG. 7, the γ characteristic of the image signal also shifts in accordance with the fluctuation range of the brightness adjustment. Therefore, the potential point of γ correction is linked to the potential of the common electrode. Need to be moved. This γ correction circuit requires a reference potential linked to the bright signal.
[0004]
However, the reference potential generating circuit for generating the reference potential has a very complicated configuration. In addition, a considerable space is required to mount this reference potential generation circuit. Furthermore, since a line for supplying this potential to the source driver is required, there is a problem that a considerable space is required to mount this line.
[0005]
On the other hand, in order to solve this space problem, a method of fixing the reference potential for γ correction irrespective of the bright signal is also used.
However, this method has a problem that it cannot cope with the deviation of the γ characteristic and cannot perform appropriate γ correction.
[0006]
[Problems to be solved by the invention]
The present invention has been made to solve the above-mentioned problems of the prior art, and a display device capable of performing appropriate gamma correction with a simple circuit.PlaceThe purpose is to provide.
[0007]
[Means for Solving the Problems]
In order to achieve the above object, a display device according to a first aspect of the present invention includes a common electrode, a plurality of pixel electrodes arranged in a matrix and facing the common electrode, and the plurality of pixel electrodes. A plurality of active elements respectively connected to the pixel electrode, display means for displaying an image according to a signal level difference between the common electrode and the pixel electrode, and a bright signal supplied from the outside Based on the brightness adjustment means for controlling the signal to be written to the common electrode based on the brightness of the display means, the digital signal corresponding to the image signal supplied from the outside, and the digital signal corresponding to the brightness signal Gamma correction is performed to generate a corrected image signal, and the plurality of active elements connected to any line of the matrix are selected. The correction image signal generated by the gamma correction unit is written to the pixel electrode connected to the active element selected and turned on by the selection driving unit via the active element. Signal driving means;The gamma correction means includes a storage means in which gamma correction data for performing gamma correction is written at an address corresponding to the bright signal and the image signal, and a bright signal to the digital signal corresponding to the image signal. Adding means for adding a digital signal corresponding to the signal; reading means for reading gamma correction data written at an address corresponding to the value of the digital signal added by the adding means of the storage means; and Subtracting means for subtracting a digital signal corresponding to the bright signal from the read gamma correction data to generate a corrected image signal;It is characterized by providing.
[0008]
According to the display device, gamma correction linked to the brightness adjustment can be obtained as a digital amount. For this reason, a complicated circuit such as a reference potential generation circuit required for performing gamma correction with an analog amount is not required. For this reason, it is possible to perform appropriate gamma correction linked to the brightness adjustment with a simple circuit.Note that addition and subtraction herein include addition and subtraction of not only positive numbers but also 0 and negative numbers. That is, in the case of normal brightness adjustment, 0 is added and subtracted. In the case of deviation from the normal brightness adjustment, which of the positive number and the negative number is added or subtracted depends on which side the bright adjustment is performed. The address of the storage means may be an absolute address that completely matches the value of the digital signal added by the adding means or a relative address obtained by adding or subtracting a predetermined value.
[0009]
In the above display device,
The gamma correction means includes
Storage means in which gamma correction data for performing gamma correction is written corresponding to the bright signal and the image signal;
Reading means for reading gamma correction data written in the storage means based on the bright signal and the image signal;
Means for generating the corrected image signal from the gamma correction data read by the reading means;
Can be provided.
[0012]
In the display device, the level of the corrected image signal subjected to gamma correction may exceed the dynamic range of the active element.
For this reason, the gamma correction means further includes
An output adjusting unit that limits the output level of the generated corrected image signal to a certain level according to the bright signal may be provided.
[0013]
The display device of the present invention is preferably applied to an active matrix liquid crystal display device such as a TFT liquid crystal display device. in this case,
The display means is constituted by a liquid crystal panel in which liquid crystal is sealed between a pair of substrates facing each other.
The common electrode is formed on one opposing surface of the pair of substrates,
The pixel electrode and the active element are formed on the other facing surface of the pair of substrates,
Furthermore, a first polarity inversion means for inverting the polarity of the corrected image signal corrected by the gamma correction means at every predetermined timing;
A second polarity inversion means for inverting the polarity of the signal that has been subjected to the brightness adjustment by the brightness adjustment means at a predetermined timing;
The signal driving means is supplied with the corrected image signal whose polarity is inverted at predetermined timings by the first polarity inverting means,
The common electrode is written with the signal whose polarity is inverted at predetermined timings by the second polarity inverting means.
It will be a thing.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the accompanying drawings.
[0017]
[First Embodiment]
FIG. 1 is a block diagram showing a configuration of a TFT liquid crystal display device according to the first embodiment of the present invention.
As shown in the figure, this TFT liquid crystal display device comprises a digital RGB generator 1, a controller 2, a gate driver 3, a digital source driver 4, a D / A converter 5, an inverting amplifier 6, and a TFT liquid crystal panel 7. Is done.
[0018]
The digital RGB generator 1 generates a horizontal synchronizing signal (H) and a vertical synchronizing signal (V) from a video signal supplied from the outside, and a clock signal (in synchronization with the horizontal synchronizing signal (H) and the vertical synchronizing signal (V) ( CK). Further, the digital RGB generator 1 synchronizes the clock signal (CK) with the red (R), green (G), and blue (B) color signals (RGB signals) from the video signal at the same timing. To sample. Each of these signals is sent to the control unit 2.
The R, G, and B color signals are output from the digital RGB generator 1 in parallel.
[0019]
The control unit 2 receives an inverted RGB signal, a gate control signal, an RGB signal, a clock signal (CK), a horizontal synchronization signal (H), a vertical synchronization signal (V), and a bright signal supplied from the digital RGB generation unit 1. A source control signal, a Vcom level signal, and an inverted signal (FRP) are generated. These signals are supplied to each part of the circuit of the TFT liquid crystal display device, as will be described later.
The configuration of the control unit 2 will be further described later.
[0020]
The gate driver 3 selectively drives any gate line of the TFT liquid crystal panel 7 in response to the gate control signal supplied from the control unit 2.
In response to the source control signal supplied from the control unit 2, the digital source driver 4 sequentially latches inverted RGB signals (described later) supplied from the control unit 2. The reference potential V supplied to the digital source driver 4_DDIs constant and does not require a reference potential generating circuit.
[0021]
The D / A converter 5 performs D / A conversion (digital-analog conversion) on the digital Vcom level signal to which the brightness adjustment is given by the control unit 2.
The inverting amplifier 6 inverts / non-inverts the polarity of the analog Vcom level signal output from the D / A converter 5 in accordance with the inverted signal (FRP) supplied from the control unit 2 and amplifies it to a predetermined level. The Vcom signal is output to the common electrode of the TFT liquid crystal panel 7.
[0022]
As shown in FIG. 2A, the TFT liquid crystal panel 7 has a liquid crystal 72 sealed between a pair of transparent substrates 70 and 71 by a sealing material 73. A backlight (not shown) is disposed on the back side of the transparent substrate 71.
On one transparent substrate 70, a common electrode 74 into which the common potential Vcom output from the inverting amplifier 6 is written is formed.
[0023]
Pixel electrodes 75 are formed in a matrix on the other transparent substrate 71. The drain of the TFT 76 is connected to each pixel electrode 75. The gate of the TFT 76 is connected to the gate line 30, and the source of the TFT 76 is connected to the data line 40.
The transparent substrate 70 is provided with color filters (not shown) corresponding to RGB colors.
[0024]
The image data for one line latched by the digital source driver 4 is written to the pixel electrode 75 of the line selected by the gate driver 3. That is, in this TFT liquid crystal panel 7, the orientation state of the liquid crystal 72 is changed by controlling the voltage held in the capacitance 7 C formed by the common electrode 74 and the pixel electrode 75 shown in FIG. Control the amount of transmitted light.
[0025]
In the TFT liquid crystal panel 7, an alignment film 77 is formed on the common electrode 74, and an alignment film 78 is formed on the pixel electrode 75 and the TFT 76. In addition, a spacer 79 is inserted in the liquid crystal 72 between the transparent substrates 70 and 71 to keep the distance between the transparent substrates 70 and 71 constant.
The TFT liquid crystal panel 7 may include a polarizing plate outside one or both of the transparent substrates 70 and 71.
[0026]
Next, the configuration of the control unit 2 will be described in detail.
As shown in FIG. 3, the control unit 2 includes a controller 21, a level conversion circuit 22, an RGB extraction circuit 2A, a contrast processing circuit 2B, an addition circuit 2C, a γ correction data reading circuit 2D, a subtraction circuit 2E, a limiter 2F, and an inverting circuit. 2G, a timing processing circuit 2H, and a ROM (Read Only Memory) 2M.
[0027]
The controller 21 generates an internal clock signal based on the horizontal synchronization signal (H) and the vertical synchronization signal (V) supplied from the digital RGB generator 1 and the clock signal (CK). The operation of each unit of the control unit 2 is performed in synchronization with the internal clock signal.
[0028]
The controller 21 also switches between inversion and non-inversion for each frame based on the horizontal synchronization signal (H) and vertical synchronization signal (V) supplied from the digital RGB generator 1 and the clock signal (CK). An inversion signal (FRP) is generated. This inverted signal (FRP) is supplied to the inverting circuit 2G and the inverting amplifier 6.
[0029]
The controller 21 further generates a gate control signal and a source control signal based on the horizontal synchronization signal (H) and the vertical synchronization signal (V) supplied from the digital RGB generator 1 and the clock signal (CK).
The gate control signal is supplied to the gate driver 3. On the other hand, the source control signal is supplied to the digital source driver 4.
[0030]
The level conversion circuit 22 generates a shift signal to be supplied to the addition circuit 2C and the subtraction circuit 2E based on the bright signal supplied from the outside. Further, a limiter level signal to be supplied to the limiter 2F is generated.
The shift signal generated here has a value of 0 during normal brightness adjustment, and is set to a predetermined positive or negative value depending on how much brightness adjustment is performed on which side. As the limiter level signal, a predetermined value for controlling the output signal of the limiter 2F so as not to exceed the potential of the pixel electrode 74 and to be included in the dynamic range of the signal that can be applied to the TFT is selected.
Further, the level conversion circuit 22 generates a Vcom level signal that has been subjected to the brightness adjustment, based on the brightness signal supplied from the outside. This Vcom level signal is input to the D / A converter 5.
[0031]
The RGB extraction circuit 2A latches the RGB signals supplied in parallel from the digital RGB generator 1, and outputs the R, G, and B color signals in series in a predetermined order. The contrast processing circuit 2B adjusts the contrast of the R, G, and B color signals based on a contrast signal set by a contrast adjustment switch (not shown) or the like.
[0032]
The addition circuit 2C adds the shift signal supplied from the level conversion circuit 22 to the R, G, and B color signals whose contrast has been adjusted by the contrast processing circuit 2B.
The γ correction data reading circuit 2D reads γ (gamma) correction data stored at the address of the ROM 2M indicated by the output signal of the addition circuit 2C, and outputs it to the subtraction circuit 2E.
[0033]
The subtraction circuit 2E subtracts the shift signal supplied from the level conversion circuit 22 from the γ correction data supplied from the γ correction data reading circuit 2D.
Based on the limiter level signal supplied from the level conversion circuit 22, the limiter 2F suppresses and outputs the maximum level of the signal input from the subtraction circuit 2E to a predetermined value or less. This is because the dynamic range of the signal applied to the TFT 76 cannot exceed a predetermined value (for example, 5 V), and the level of the signal written to the pixel electrode 75 must not exceed the level of the Vcom signal.
[0034]
The inversion circuit 2G inverts / non-inverts the output signal of the limiter 2F in response to the inversion signal (FRP) output from the controller 21 in order to invert the polarity of the signal written to the pixel electrode 75 for each frame. Output.
The timing processing circuit 2H delays each of the R, G, and B color signals output from the inversion circuit 2G by a predetermined timing to match the timing with the gate control signal and the source control signal, and outputs the inverted RGB signals.
[0035]
The ROM 2M is previously written with γ correction data for performing γ correction by the γ correction data reading circuit 2D.
The γ correction data written in the ROM 2M will be described with reference to FIG. The input dynamic range of the RGB signal (relative to the brightness adjustment value) when performing normal brightness adjustment is in the range (1) in the graph of FIG. In this case, the γ correction data is in the range (1) ′.
[0036]
Corresponding to the RGB signal level (relative to the brightness adjustment value), addresses 0000... 0 to 0011... 1 of the ROM 2M are allocated as shown in FIG. Then, γ correction data (1) ′ corresponding to the level of the RGB signal is written in each address.
[0037]
On the other hand, when the level conversion circuit 22 performs the predetermined brightness adjustment, the range of the RGB signal is higher than the range of (1) in the graph of FIG. There may be a shift to the lower order (4). In this case, the γ correction data are in the ranges {circle around (2)} and {circle around (4)}, respectively.
[0038]
In the ROM 2M, as shown in FIG. 4B, addresses 0100... 0 to 0111... 1 are assigned to the higher-order RGB signals, and γ correction data {2} ′ is assigned to each address. Write down. Also, addresses 1100... 1 to 0111... 1 are assigned corresponding to the lower RGB signals, and γ correction data {circle around (4)} 'is written to each address.
[0039]
The operation in the TFT liquid crystal display device of this embodiment will be described below. The display device is supplied with a digital video signal and a digital bright signal from the outside. This video signal is supplied to the digital RGB generator 1, and the bright signal is supplied to the level conversion circuit 22 of the controller 2.
[0040]
The digital RGB generator 1 generates a clock signal (CK), a horizontal synchronization signal (H), a vertical synchronization signal (V), and an RGB signal based on the video signal. The generated clock signal (CK), horizontal synchronization signal (H), and vertical synchronization signal (V) are supplied to the controller 21. The RGB signals are supplied to the RGB extraction circuit 2A.
[0041]
In the controller 21, an internal clock signal is generated based on the clock signal (CK), horizontal synchronization signal (H), and vertical synchronization signal (V) supplied from the digital RGB generator 1. This internal clock signal is supplied to each circuit part of the control unit 2 to operate each circuit part.
[0042]
Further, in the controller 21, based on the clock signal (CK), the horizontal synchronization signal (H), and the vertical synchronization signal (V) supplied from the digital RGB generator 1, an inverted signal (FRP), a gate control signal, and a source A control signal is generated. The inversion signal (FRP) is supplied to the inversion circuit 2G and the inversion amplifier 6. The gate control signal is supplied to the gate driver 3. The source control signal is supplied to the digital source driver 4.
[0043]
A Vcom level signal, a shift signal, and a limiter level signal are generated from the bright signal supplied to the level conversion circuit 22. The Vcom level signal is a signal for performing brightness adjustment by controlling the potential of the common electrode 74 and is supplied to the D / A converter 5. The shift signal is supplied to the addition circuit 2C and the subtraction circuit 2E, and the limiter level signal is supplied to the limiter 2F.
[0044]
The R, G, and B color signals supplied in parallel to the RGB extraction circuit 2A are supplied in series from the RGB extraction circuit 2A to the contrast processing circuit 2B in a predetermined order. The contrast processing circuit 2B adjusts the contrast of the RGB signal based on the contrast signal supplied from the outside. The image signal whose contrast has been adjusted by the contrast processing circuit 2B is supplied to the adding circuit 2C.
[0045]
Then, γ correction processing is performed from the adding circuit 2C to the limiter 2F. Hereinafter, description will be made with reference to the graph of FIG. 5A and the address map of FIG.
[0046]
The dynamic range of the image signal supplied from the contrast processing circuit 2B to the adding circuit 2C is a range indicated by (1) in FIG. 5A, and the image signal takes any value W in this range. This image signal W corresponds to one of the addresses 0000000 to 0111111 in the ROM 2M in the range indicated by (1) in FIG.
[0047]
Next, in the addition circuit 2C, as shown in (2) in FIGS. 5A and 5B, the shift signal a corresponding to the bright signal supplied from the level conversion circuit 22 is added to the image signal W. To do. 5A and 5B, the γ correction data reading circuit 2D reads the γ correction data X from the address of the added value W + a in the ROM 2M.
[0048]
If the value W + a obtained by adding the image signal W and the shift signal a is above the input dynamic range at the time of normal bright correction, the data X is read from the range of addresses 01000000 to 01111111 in the ROM 2M. When the value is lower (in this case, the shift signal a is a negative number), the γ correction data X is read from the range of addresses 11000000 to 11111111 of the ROM 2M.
[0049]
The shift signal a for the brightness adjustment is actually added to the γ correction data X read by the γ correction data reading circuit 2D. Therefore, as shown in (4) in FIGS. 5A and 5B, the subtraction circuit 2E subtracts the shift signal a from the γ correction data X, and outputs the subtracted value Y as a corrected image signal.
[0050]
Note that the value of the shift signal a is set to 0 during normal brightness adjustment, and is set to a predetermined positive or negative value depending on whether the brightness adjustment is performed on the white side or the black side.
[0051]
As described above, the corrected image signal Y subjected to the γ correction is generated in conjunction with the bright signal, but this value may exceed the dynamic range of the signal that can be applied to the TFT 76. Therefore, as shown in (5) of FIGS. 5A and 5B, the corrected image signal Y is passed through the limiter 2F to obtain a corrected image signal Z limited to a predetermined level or less.
[0052]
The corrected image signal Z is supplied to the inverting circuit 2G. The inversion circuit 2G inverts / non-inverts the corrected image signal Z based on the inversion signal (FRP) to give the signal a polarity.
The corrected image signal given this polarity is sequentially supplied to the digital source driver 4 as an inverted RGB signal after a predetermined timing adjustment is performed by the timing processing circuit 2H.
[0053]
The digital source driver 4 sequentially latches the inverted RGB signals output from the timing processing circuit 2H in accordance with the source control signal supplied from the controller 21. Then, the latched signal is applied to the pixel electrode 75 connected to the gate line 30 selected by the gate driver 3 according to the source control signal (write signal) output when the signal for one line is latched. Write through.
[0054]
The Vcom level signal output from the level conversion circuit 22 is converted into an analog quantity by the D / A converter 5, is given a polarity according to the inverted signal (FRP) by the inverting amplifier 6, and has a predetermined value. Amplified to level. The Vcom signal output from the inverting amplifier 6 is bright-adjusted according to its potential and written to the common electrode 74 of the TFT liquid crystal panel 7.
In this way, gamma correction linked to the brightness adjustment is realized.
[0055]
As described above, in the TFT liquid crystal display device of this embodiment, the value corresponding to the brightness adjustment is added to the digital RGB signal by the adding circuit 2C, and the γ correction data is read from the address of the added value in the ROM 2M. It was. The subtracting circuit 2E subtracts the value added by the adding circuit 2C from the read γ correction data. Therefore, in the TFT liquid crystal display device of this embodiment, gamma correction linked with the brightness adjustment can be realized with a very simple circuit.
[0056]
Thus, the TFT liquid crystal display device of this embodiment does not require a complicated reference potential generation circuit. Further, a line for supplying the reference potential to the source driver is not necessary.
Therefore, the source driver and the display panel can be reduced in size. In addition, the manufacturing / adjustment process can be simplified. Thereby, the cost reduction in the whole apparatus can be measured.
[0057]
[Second Embodiment]
In the first embodiment, the case where the present invention is applied to a TFT liquid crystal display device using a source driver for digital RGB input has been described. However, the present invention can also be applied to a TFT liquid crystal display device using a low voltage analog source driver with analog RGB input.
[0058]
FIG. 6 is a block diagram showing a configuration of a TFT liquid crystal display device according to the second embodiment of the present invention.
In this figure, parts having the same configurations as those of the TFT liquid crystal display device of FIG.
[0059]
The TFT liquid crystal display device includes an A / D converter 81 that performs A / D conversion (analog-to-digital conversion) on an RGB signal of an analog amount, and an A / D converter 82 that performs A / D conversion on an analog amount of a bright signal. And a D / A converter 83 for D / A converting the digital inverted RGB signal supplied from the control unit 2. Further, an analog source driver 84 is provided instead of the digital source driver 4 of the first embodiment, and an inverting amplifier 85 is provided instead of the inverting amplifier 6 of the first embodiment.
[0060]
The operation in the TFT liquid crystal display device of this embodiment will be described below. Analog RGB signals and bright signals supplied from outside are converted into digital quantities by A / D converters 81 and 82, respectively. The RGB signal and the bright signal converted into digital quantities are input to the control unit 2.
[0061]
The operation of the control unit 2 is the same as that of the first embodiment except that the Vcom level signal is not output from the level conversion circuit 22. That is, the control unit 2 performs predetermined processing such as γ correction and polarity inversion on the RGB signal, and generates and outputs each control signal.
[0062]
The gate control signal output from the control unit 2 is supplied to the gate driver 3, and the gate driver 3 selectively drives any one of the gate lines as in the first embodiment.
A source control signal is supplied to the analog source driver 84.
[0063]
The inverted RGB signal output from the control unit 2 is converted into an analog quantity by the D / A converter 83 and supplied to the analog source driver 84 as an inverted analog RGB signal. The analog source driver 84 sequentially latches the inverted analog RGB signals according to the source control signal. When an inverted analog signal for one line is latched in the analog source driver 84, each signal is written to the pixel electrode 75 of the line selected by the gate driver 3.
[0064]
On the other hand, the polarity of the bright signal supplied to the inversion amplifier 85 is inverted for each frame in accordance with the inversion signal (FRP) output from the control unit 2 and written to the common electrode 74 of the TFT liquid crystal panel 7. As described above, also in the TFT liquid crystal display device of this embodiment, an image subjected to γ correction linked to the bright correction can be displayed as in the TFT liquid crystal display device of the first embodiment.
[0065]
[Modification of Embodiment]
In the above embodiment, normal brightness correction data is written to addresses 0000... 0 to 0011... 1 of the ROM 2M, and the upper side is written to addresses 0100.・ Lower side data was written to 0-1111. However, the present invention is not limited to this. For example, the γ correction data may be written so that the RGB signal (the relative value of the RGB signal and the bright signal) obtained by adding the shift signal becomes the address of the ROM 2M as it is. Further, the γ correction data may be written in an address (relative address) obtained by adding a predetermined value (including a negative number) to the relative value.
[0066]
In the above embodiment, the adding circuit 2C adds the amount of data for the brightness adjustment to the RGB image signal, and the γ correction data reading circuit 2D reads the γ correction data written in the ROM 2M by the table lookup method. It was. Then, the subtraction circuit 2E subtracts the data amount for the brightness adjustment from the read γ correction data. However, the present invention is not limited to this. For example, instead of the above method, a method using a processor that calculates γ correction data according to the data amount of RGB image signals and brightness adjustment based on a predetermined processing program may be employed.
[0067]
In the above embodiment, the γ correction for the digital RGB signal is performed by hardware. However, all or part of the gamma correction processing of the present invention may be performed by a general-purpose processor and software for operating the processor.
[0068]
In the above embodiment, the TFT liquid crystal display device that performs full color display using three color signals of R, G, and B has been described. However, the present invention can also be applied to a TFT liquid crystal display device that displays a monochrome image. Further, the present invention can also be applied to a display device such as a multi-panel liquid crystal projector that displays a full color image by combining a plurality of monochrome images.
[0069]
In the above embodiment, the case where the present invention is applied to a TFT liquid crystal display device has been described. However, the present invention is not limited to this. For example, the present invention can also be applied to other active matrix liquid crystal display devices using active elements such as diodes and MIM (Metal Insulator Metal).
[0070]
Furthermore, the present invention can be applied to all display devices that perform bright correction by controlling the potential of the common electrode, such as an organic EL display device.
Since the organic EL element has no polarity, when the present invention is applied to an organic EL display device, an inverting amplifier and an inverting circuit in the control unit are not necessary. In addition, when full-color display is performed on an organic EL display device, the electro-optical characteristics of the organic EL element are different for each color, so a ROM in which γ correction data is written may be prepared for each color.
[0071]
【The invention's effect】
As described above, according to the present invention, appropriate gamma correction can be performed with a simple circuit.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a TFT liquid crystal display device according to a first embodiment of the present invention.
2A and 2B are diagrams illustrating a configuration of the TFT liquid crystal panel of FIG. 1, in which FIG. 2A is a cross-sectional view and FIG. 2B is a schematic diagram.
3 is a block diagram showing a configuration of a control unit in the TFT liquid crystal display device of FIG. 1. FIG.
4A and 4B are diagrams illustrating an example of gamma correction data written in the ROM of FIG. 2, in which FIG. 4A is a graph, and FIG. 4B is an address map.
FIG. 5 is an explanatory diagram of a gamma correction method according to the first embodiment of the invention.
FIG. 6 is a block diagram showing a configuration of a TFT liquid crystal display device according to a second embodiment of the present invention.
FIG. 7 is a diagram showing the relationship between brightness adjustment and gamma potential fluctuation in a conventional TFT liquid crystal display device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Digital RGB generation part, 2 ... Control part, 3 ... Gate driver, 4 ... Digital source driver, 5 ... D / A converter, 6 ... Inverting amplifier, 7 ..TFT liquid crystal panels
21 ... Controller, 22 ... Level conversion circuit, 2A ... RGB extraction circuit, 2B ... Contrast processing circuit, 2C ... Addition circuit, 2D ... Gamma correction data readout circuit, 2E ... Subtraction circuit, 2F ... limiter, 2G ... inversion circuit, 2H ... timing processing circuit, 2M ... ROM (Read Only Memory),
70, 71 ... Transparent substrate, 72 ... Liquid crystal, 74 ... Common electrode, 75 ... Pixel electrode, 76 ... Thin film transistor (TFT),
30 ... Gate line, 40 ... Source line,
81, 82 ... A / D converter, 83 ... D / A converter, 84 ... analog source driver, 85 ... inverting amplifier

Claims (4)

A common electrode; a plurality of pixel electrodes arranged in a matrix and opposed to the common electrode; and a plurality of active elements respectively connected to the plurality of pixel electrodes. Display means for displaying an image according to a difference in signal level between the pixel electrode and the pixel electrode;
Bright adjustment means for controlling the signal to be written to the common electrode based on a bright signal supplied from the outside, and adjusting the brightness of the display means;
Gamma correction means for generating a corrected image signal by performing gamma correction based on a digital signal corresponding to an image signal supplied from the outside and a digital signal corresponding to the bright signal;
Selection drive means for selecting and turning on the plurality of active elements connected to any line of the matrix;
The pixel electrode is selected which is connected to the active element which is turned on by the selection drive means, and a signal drive means for writing the generated the corrected image signal through the active element in the gamma correction means ,
The gamma correction means includes
Storage means in which gamma correction data for performing gamma correction is written at addresses corresponding to the bright signal and the image signal;
Adding means for adding a digital signal corresponding to the bright signal to a digital signal corresponding to the image signal;
Reading means for reading gamma correction data written at an address corresponding to the value of the digital signal added by the adding means of the storage means;
Subtracting means for generating a corrected image signal by subtracting a digital signal corresponding to the bright signal from the gamma correction data read by the reading means;
A display device comprising: The gamma correction means includes a storage means in which gamma correction data for performing gamma correction is written corresponding to the bright signal and the image signal;
Read means for reading gamma correction data written in the storage means based on the bright signal and the image signal;
The display device according to claim 1, further comprising: means for generating the corrected image signal from the gamma correction data read by the reading means. The gamma correction unit further output level of the generated the corrected image signal, and an output adjusting means for limiting to a certain level in accordance with the bright signal, any one of claims 1 to 2, characterized in that 1 The display device according to item. The display means includes a liquid crystal panel in which liquid crystal is sealed between a pair of substrates facing each other, the common electrode is formed on one facing surface of the pair of substrates, and the pixel electrode and the active element are: A first polarity reversing unit that is formed on the other opposing surface of the pair of substrates and that reverses the polarity of the corrected image signal corrected by the gamma correcting unit at predetermined timings; A second polarity reversing means for reversing the polarity of the signal whose brightness has been adjusted by the adjusting means at predetermined timings; and the signal driving means is inverted at every predetermined timing by the first polarity reversing means. The corrected image signal is supplied, and the signal whose polarity is inverted at every predetermined timing by the second polarity inverting means is written to the common electrode. That, the display device according to any one of claims 1 to 3, characterized in that.

Images