JP2007178561A - Display apparatus and drive method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display apparatus capable of calculating a close to ideal gradation correction value by reducing deviation due to non-linearity of a gradation voltage change, when calculating gradation correction values that are not stored in a look-up table (LUT). <P>SOLUTION: The display control circuit 200 for the display apparatus includes a basic LUT 21 for storing some of gradation correction amounts for compensating crosstalks at a prescribed interval; a detail LUT 22 for storing some of gradation correction amounts that are not stored in the basic LUT 21 at an interval narrower than the interval, in a range (for example, in the vicinity of zero) where the deviations due to the non-linearity of the gradation voltage change is large; and a gradation correction part 23 for calculating the gradation correction amount, while referring to the LUTs. By calculating the gradation correction amount while referring to the detail LUT 22, deviations due to the non-linearity of the gradation voltage change are reduced, and close to ideal gradation correction value can be calculated. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a voltage control type active matrix display device such as a liquid crystal display device using a switching element such as a thin film transistor, and a driving method thereof.

  As shown in FIG. 2, the display unit of the active matrix liquid crystal display device includes a plurality (N) of scanning signal lines GL (1) to GL (N) and a plurality ( A plurality of (N × M) video signal lines SL (1) to SL (M) and a plurality (N × M) arranged in a matrix corresponding to the intersections of the plurality of scanning signal lines and the plurality of video signal lines. Pixel forming portions P (1,1) to P (N, M), and each pixel forming portion has a liquid crystal capacitance (“pixel capacitance” formed by a pixel electrode Epix and an electrode facing the pixel electrode Epix. It also includes Clc. As shown in FIGS. 2 and 3, each pixel electrode Epix is provided with two video signal lines SL (m) and SL (m + 1) so as to sandwich them, and these two video signals are arranged. Parasitic capacitance exists between each of the lines and the pixel electrode Epix. One of these two video signal lines SL (m) is connected to the pixel electrode Epix via the TFT 10. Hereinafter, a parasitic capacitance formed between the video signal line (hereinafter referred to as “own source line”) SL (m) and the pixel electrode Epix is indicated by a reference symbol “Csda”, and these two video signals are displayed. A parasitic capacitance formed between the other video signal line (hereinafter referred to as “other source line”) SL (m + 1) of the lines and the pixel electrode Epix is denoted by a reference sign “Csdb”. In this liquid crystal display device, the auxiliary capacitance line CsL is formed in parallel with each scanning signal line GL (n). In each pixel formation portion P (n, m), the pixel electrode Epix and the auxiliary capacitance line CsL A storage capacitor Ccs is formed in between.

  In the active matrix type liquid crystal display device as described above, when the TFT 10 connected to the pixel electrode Epix is in an on state (conductive state) in each pixel formation portion P (n, m), the self source line SL (m) When a voltage is applied from the TFT 10 through the TFT 10 and the TFT 10 is turned off (cut off), the applied voltage is held in the pixel capacitor Clc (and the auxiliary capacitor Ccs) until the TFT 10 is turned on next. Pixels are displayed according to the voltage (n = 1, 2,..., N; m = 1, 2,..., M). However, the pixel electrode Epix that forms the pixel capacitor Clc is connected to the source line SL (m) through the parasitic capacitor Csda and to the other source line SL (m + 1) through the parasitic capacitor Csdb. Yes. Therefore, while the TFT 10 connected to the pixel electrode Epix is in the cut-off state, the potential of the pixel electrode Epix (the retention voltage of the pixel capacitor) changes in the potential of the self source line SL (m) via the parasitic capacitance Csda. As well as the potential change of the other source line SL (m + 1) via the parasitic capacitance Csdb. In this manner, the potential of the pixel electrode Epix and the holding voltage in the pixel capacitor Clc are affected by the potential of the video signal lines SL (m) and SL (m + 1), so that the amount of transmitted light of the liquid crystal varies and a desired gradation A phenomenon (called “crosstalk”) occurs that cannot be obtained. In a liquid crystal display device that displays a color image, three pixel forming units for forming R (red), G (green), and B (blue) pixels as display units of the color image are adjacent to each other. A phenomenon in which a desired color cannot be displayed when the influence (degree or direction) of the potential of the pixel electrode due to crosstalk differs among the three pixel formation portions corresponding to each display unit. (Referred to as “color crosstalk”).

  Here, in the gradation voltage generation circuit provided in the liquid crystal display device, the liquid crystal is supplied to the liquid crystal based on the parasitic capacitance between the pixel electrode Epix connected to the drain terminal of the TFT 10 and the scanning signal line electrode connected to the gate terminal. In order to correct the change (pull-in) of the applied voltage, and to realize a smooth luminance change in the adjacent gradation display, the voltage dividing ratio of the resistor for generating the gradation voltage is the gradation display characteristic. Optimized for That is, the voltage dividing ratio of the resistors is not uniform, and is therefore set to output a gradation voltage that changes nonlinearly (not in a proportional relationship) with respect to a change in display gradation (see Patent Document 1). .

  In the gradation voltage generation circuit having such a configuration, the crosstalk is more accurately based on a voltage correction value corresponding to the amount of potential change due to the crosstalk than ideally based on a predetermined gradation correction value. Can compensate well. This is because the actual applied voltage to the liquid crystal changes due to the potential change due to the parasitic capacitance.

  However, it is easy to provide a new voltage generation circuit for correcting the video signal voltage with the voltage correction value in the video signal line driving circuit (source driver) for driving the video signal line or a control circuit for supplying the video signal thereto. Rather, it costs manufacturing. Therefore, it is preferable that the crosstalk compensation is performed using a gradation correction value for correcting the display gradation.

  In a general gradation voltage generation circuit, each voltage value set corresponding to each (integer) gradation value is not an integer but a decimal value. Further, as described above, the change in voltage value with respect to the change in gradation value is non-linear. Therefore, it is extremely difficult to accurately calculate the gradation correction value corresponding to the voltage correction value corresponding to the potential change amount due to crosstalk based on the above correspondence.

From the above, for the compensation of the crosstalk, the gradation correction value obtained by calculating or measuring in advance based on a predetermined calculation formula is held in the form of a lookup table or the like. preferable. However, since the number of gradation correction values is the square of the number of display gradations, it is not easy to realize a configuration in which all of the gradation correction values are held. In practice, some of them are spaced at regular intervals. The gradation correction values that are discretely stored in the lookup table and are not stored in the lookup table are preferably calculated by linearly interpolating the stored gradation correction values.
Japanese Patent Laid-Open No. 2001-100711

  However, as described above, the gradation voltage generation circuit generates a gradation voltage that changes nonlinearly with respect to a change in display gradation, and therefore linearly interpolates the gradation correction value stored in the lookup table. Thus, the gradation correction value obtained by the above will be different from the ideal gradation correction value.

  Further, such a shift in the gradation correction value due to the nonlinearity of the gradation voltage change is a shift in color crosstalk compensation. For example, this shift appears as a phenomenon (referred to as “color outline”) in which a continuous color change is not obtained in a specific gradation pattern and a line enters a part of the pattern. Specifically, in the middle of the gradation pattern (for example, near the center of the display screen) in which the vertical direction of the display screen is the same color and the brightness of green and red continuously changes from left to right by a predetermined amount, respectively. When the brightness of blue continuously increases from 0 in the right direction, a line extending in the vertical direction of the display screen is generated in the vicinity of the middle portion where blue is added. Such a display defect phenomenon is not preferable and should be eliminated as much as possible.

  Therefore, the present invention is a configuration in which a part of the gradation correction value for compensating for crosstalk is stored in a predetermined lookup table, and the gradation voltage is calculated when calculating a gradation correction value that is not used for this. An object of the present invention is to provide a display device that can calculate an ideal or near ideal gradation correction value by reducing a shift due to non-linearity of change.

According to a first aspect of the present invention, there are provided a plurality of video signal lines for transmitting a plurality of video signals corresponding to an image signal given from the outside of the apparatus so as to indicate an image to be displayed with a predetermined display gradation, and the plurality of video signals A plurality of scanning signal lines intersecting a line, a plurality of pixel forming portions arranged in a matrix corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, and the plurality of images A display device comprising a signal line and a drive control circuit for driving the plurality of scanning signal lines,
Each pixel forming part
A switching element that is turned on or off according to a signal applied to a scanning signal line passing through a corresponding intersection;
A pixel electrode connected via the switching element to a video signal line passing through a corresponding intersection;
A common electrode provided in common to the plurality of pixel formation portions;
A pixel capacitance formed by the pixel electrode and the common electrode;
An electro-optic element that displays a pixel with a display gradation corresponding to a voltage held in the pixel capacitor,
The drive control circuit includes:
A gradation for correcting the first display gradation included in the image signal corresponding to the video signal to be applied to the first video signal line connected to the pixel electrode of each pixel formation portion via the switching element. The correction amount of the pixel formation portion due to the potential change of the second video signal line and the potential change of the first video signal line arranged so that a parasitic capacitance is formed between the pixel electrode and the pixel electrode. The second correction value included in the image signal corresponding to the first display gradation and the video signal to be applied to the second video signal line includes a gradation correction amount for compensating for the variation in the holding voltage in the pixel capacitor. Table storage means for holding a lookup table stored for each of the first and second display gradations with a predetermined interval in association with the combination of display gradations;
By referring to the lookup table held in the table storage means, the second display gradation and the first display gradation at the time when the switching element changes from the conduction state to the cutoff state. Correction amount determining means for determining a gradation correction amount;
Correction means for correcting the first display gradation based on the gradation correction amount determined by the correction amount determination means,
The table storage means is configured to display the display gradation at an interval smaller than the predetermined interval within a range where the change in the gradation correction amount is non-linear with respect to the change in the potential corresponding to the gradation correction amount. A lookup table storing the gradation correction amount is held every time.

According to a second invention, in the first invention,
The table storage means stores the gradation correction amount for each display gradation having an interval smaller than the predetermined interval within a range where the first display gradation is a predetermined value near 0. It is characterized by holding a lookup table.

According to a third invention, in the first invention,
The table storage means corrects the gradation for each display gradation having an interval smaller than the predetermined interval within a range where the first and second display gradations have a predetermined value near 0. A lookup table storing quantities is held.

According to a fourth invention, in the first invention,
The table storage means includes
The first and second display gradations forming an m × m matrix obtained by equally dividing m from the minimum value to the maximum value in the display gradation into m pieces (m is an integer less than the maximum value). A first lookup table storing the gradation correction amount in association with the combination;
The gradation correction amount for each display gradation having an interval smaller than the predetermined interval within a range where the change in the gradation correction amount is non-linear with respect to the change in potential corresponding to the gradation correction amount. And a second look-up table in which is stored.

According to a fifth invention, in any one of the first to fourth inventions,
The correction amount determining means is configured to set the gradation correction amount corresponding to the first or second display gradation not stored in the look-up table in the vicinity before and after the first or second display gradation not stored. It is determined by linearly interpolating between two display gradations stored in the lookup table which is a value.

According to a sixth invention, in the fifth invention,
The correction amount determining means determines a value obtained by subtracting a predetermined value from a value obtained by linearly interpolating the two display gradations as the gradation correction amount.

According to a seventh invention, in any one of the first to fourth inventions,
The correction amount determining means is configured to set the gradation correction amount corresponding to the first or second display gradation not stored in the look-up table in the vicinity before and after the first or second display gradation not stored. The value is determined by nonlinear interpolation between two display gradations stored in the look-up table, which is a value, based on a mathematical expression showing a second-order or higher-order curve that approximates a curve showing an ideal change in the gradation correction amount. It is characterized by doing.

In an eighth aspect based on the first aspect,
The table storage means holds the lookup table storing a gradation correction amount corresponding to a correction voltage ΔV1b defined by the following equation:
ΔV1b = (V2−Vcom) ・ Csdb / Cpix
Here, V2 represents the potential of the second video signal line when the switching element changes from the conduction state to the cutoff state, Vcom represents the potential of the common electrode, and Csdb represents the pixel electrode and the pixel electrode. The value of the parasitic capacitance formed between the second video signal line and Cpix represents the value of the total capacitance formed between the pixel electrode and another electrode.

In a ninth aspect based on the eighth aspect,
The table storage means holds the lookup table storing a gradation correction amount corresponding to a correction voltage ΔV1 defined by the following equation:
ΔV1 = (V1−Vcom) · Csda / Cpix + (V2−Vcom) · Csdb / Cpix
Here, V1 and V2 represent the potentials of the first and second video signal lines when the switching element changes from the conductive state to the cut-off state, respectively, Vcom represents the potential of the common electrode, and Csda Represents the value of the parasitic capacitance formed between the pixel electrode and the first video signal line, and Csdb represents the value of the parasitic capacitance formed between the pixel electrode and the second video signal line. Cpix represents the value of the total capacitance formed between the pixel electrode and the other electrode.

In a tenth aspect based on the first aspect,
When the first display gradation is equal to or lower than the second display gradation, the drive control circuit suppresses correction for the first display gradation or performs correction by a predetermined same value. And

In an eleventh aspect of the invention, a plurality of video signal lines for transmitting a plurality of video signals corresponding to an image signal given from the outside of the apparatus so as to indicate an image to be displayed with a predetermined display gradation, and the plurality of video signals A plurality of scanning signal lines intersecting a line, a plurality of pixel forming portions arranged in a matrix corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, and the plurality of images A display device comprising a signal line and a drive control circuit for driving the plurality of scanning signal lines,
Each pixel forming part
A switching element that is turned on or off according to a signal applied to a scanning signal line passing through a corresponding intersection;
A pixel electrode connected via the switching element to a video signal line passing through a corresponding intersection;
A common electrode provided in common to the plurality of pixel formation portions;
A pixel capacitance formed by the pixel electrode and the common electrode;
An electro-optic element that displays a pixel with a display gradation corresponding to a voltage held in the pixel capacitor,
The drive control circuit includes:
A gradation for correcting the first display gradation included in the image signal corresponding to the video signal to be applied to the first video signal line connected to the pixel electrode of each pixel formation portion via the switching element. The correction amount of the pixel formation portion due to the potential change of the second video signal line and the potential change of the first video signal line arranged so that a parasitic capacitance is formed between the pixel electrode and the pixel electrode. The second correction value included in the image signal corresponding to the first display gradation and the video signal to be applied to the second video signal line includes a gradation correction amount for compensating for the variation in the holding voltage in the pixel capacitor. Table storage means for holding a lookup table stored for each of the first and second display gradations with a predetermined interval in association with the combination of display gradations;
By referring to the lookup table held in the table storage means, the second display gradation and the first display gradation at the time when the switching element changes from the conduction state to the cutoff state. Correction amount determining means for determining a gradation correction amount;
Correction means for correcting the first display gradation based on the gradation correction amount determined by the correction amount determination means,
The correction amount determining means is configured to set the gradation correction amount corresponding to the first or second display gradation not stored in the look-up table in the vicinity before and after the first or second display gradation not stored. A value obtained by subtracting a predetermined value from a value obtained by linear interpolation between two display gradations stored in the lookup table as a value is determined as the gradation correction amount. And

In a twelfth aspect, a plurality of video signal lines for transmitting a plurality of video signals corresponding to image signals given from the outside of the apparatus so as to indicate an image to be displayed with a predetermined display gradation, and the plurality of video signals A plurality of scanning signal lines intersecting a line, a plurality of pixel forming portions arranged in a matrix corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, and the plurality of images A display device comprising a signal line and a drive control circuit for driving the plurality of scanning signal lines,
Each pixel forming part
A switching element that is turned on or off according to a signal applied to a scanning signal line passing through a corresponding intersection;
A pixel electrode connected via the switching element to a video signal line passing through a corresponding intersection;
A common electrode provided in common to the plurality of pixel formation portions;
A pixel capacitance formed by the pixel electrode and the common electrode;
An electro-optic element that displays a pixel with a display gradation corresponding to a voltage held in the pixel capacitor,
The drive control circuit includes:
A gradation for correcting the first display gradation included in the image signal corresponding to the video signal to be applied to the first video signal line connected to the pixel electrode of each pixel formation portion via the switching element. The correction amount of the pixel formation portion due to the potential change of the second video signal line and the potential change of the first video signal line arranged so that a parasitic capacitance is formed between the pixel electrode and the pixel electrode. The second correction value included in the image signal corresponding to the first display gradation and the video signal to be applied to the second video signal line includes a gradation correction amount for compensating for the variation in the holding voltage in the pixel capacitor. Table storage means for holding a lookup table stored for each of the first and second display gradations with a predetermined interval in association with the combination of display gradations;
By referring to the lookup table held in the table storage means, the second display gradation and the first display gradation at the time when the switching element changes from the conduction state to the cutoff state. Correction amount determining means for determining a gradation correction amount;
Correction means for correcting the first display gradation based on the gradation correction amount determined by the correction amount determination means,
The correction amount determining means is configured to set the gradation correction amount corresponding to the first or second display gradation not stored in the look-up table in the vicinity before and after the first or second display gradation not stored. The value is determined by nonlinear interpolation between two display gradations stored in the look-up table, which is a value, based on a mathematical expression showing a second-order or higher-order curve that approximates a curve showing an ideal change in the gradation correction amount. It is characterized by doing.

In a thirteenth aspect, a plurality of video signal lines for transmitting a plurality of video signals indicating an image to be displayed with a predetermined display gradation, a plurality of scanning signal lines intersecting the plurality of video signal lines, A driving method of a display device comprising: a plurality of pixel forming portions arranged in a matrix corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively.
A drive control step for driving the plurality of video signal lines and the plurality of scanning signal lines;
Each pixel forming part
A switching element that is turned on or off according to a signal applied to a scanning signal line passing through a corresponding intersection;
A pixel electrode connected via the switching element to a video signal line passing through a corresponding intersection;
A common electrode provided in common to the plurality of pixel formation portions;
A pixel capacitance formed by the pixel electrode and the common electrode;
An electro-optic element that displays a pixel with a display gradation corresponding to a voltage held in the pixel capacitor,
The drive control step includes
A gradation correction amount for correcting a first display gradation indicated in a video signal to be applied to a first video signal line connected to a pixel electrode of each pixel formation portion via a switching element, A gradation correction amount for compensating for a variation in holding voltage in the pixel capacitance of the pixel formation portion due to a potential change of the second video signal line arranged so that a parasitic capacitance is formed between the pixel electrode and the pixel electrode. , The first and second at a predetermined interval in correspondence with the combination of the first display gradation and the second display gradation indicated in the video signal to be applied to the second video signal line. The gradation correction amount for the second display gradation at the time when the switching element changes from the conductive state to the cutoff state is determined by referring to a lookup table stored for each display gradation. Determine the amount of correction And the step,
A correction step of correcting the first display gradation based on the gradation correction amount determined by the correction amount determination step,
The look-up table includes the display gradations having an interval smaller than the predetermined interval in a range where the change in the gradation correction amount is non-linear with respect to the change in potential corresponding to the gradation correction amount. The gradation correction amount is stored every time.

  A fourteenth invention is a program for executing the driving method according to the thirteenth invention on a predetermined computer.

  According to the first invention, a part of the gradation correction amount for compensating for the so-called crosstalk is constant for each display gradation having a predetermined interval in the lookup table stored in the table storage means. Display floors that are stored at intervals and that are smaller than the predetermined interval within a range in which the change in gradation correction amount is non-linear with respect to the change in potential corresponding to the gradation correction amount. The gradation correction amount is stored for each key. This lookup table may be composed of only one lookup table, or may be a combination of two or more different lookup tables. By calculating the gradation correction amount based on such a lookup table, it is possible to reduce the shift due to the nonlinearity of the gradation voltage change, and to calculate an ideal or near ideal gradation correction value. it can. As a result, color crosstalk is suppressed with the simple configuration as described above, and color reproducibility in image display can be easily improved. Further, since the gradation correction amount is determined in detail within a range where the change in the gradation correction amount is non-linear with respect to the potential change corresponding to the gradation correction amount, the gradation correction amount is obtained. The processing for this is speeded up, and high-definition display can be supported.

  According to the second aspect of the invention, in the look-up table, the gradation for each display gradation having an interval smaller than the predetermined interval within a range where the first display gradation is a predetermined value near 0. The correction amount is stored. In general, when the first display gradation is within a predetermined range near 0, the change in gradation correction amount is often non-linear with respect to the change in potential corresponding to the gradation correction amount. The shift due to the nonlinearity of the gradation voltage change can be specifically reduced within the range, and an ideal or near ideal gradation correction value can be calculated.

  According to the third aspect of the invention, in the lookup table, the display gradations that are smaller than the predetermined interval within a range where the first and second display gradations are predetermined values near 0. A gradation correction amount is stored for each. Generally, when both the first and second display gradations are within a predetermined range near 0, the change in the gradation correction amount may be particularly nonlinear with respect to the change in the potential corresponding to the gradation correction amount. Therefore, the shift due to the nonlinearity of the gradation voltage change can be further reduced within these ranges, and an ideal or near ideal gradation correction value can be calculated.

  According to the fourth aspect of the invention, the first look-up table that forms an m × m matrix and the range in which the change in gradation correction amount is non-linear with respect to the change in potential corresponding to the gradation correction amount In addition, a second lookup table that stores a gradation correction amount is provided for each display gradation having an interval smaller than a predetermined interval, thereby further simplifying the configuration of the lookup table. In addition, the processing for determining the tone correction amount with reference to the lookup table can be simplified.

  According to the fifth aspect of the invention, the two displays stored in the lookup table, which are the neighborhood values before and after the first or second display gradation not stored, are stored in the gradation correction amount that is not stored in the lookup table. Since it is determined by performing linear interpolation between gradations, the gradation correction amount can be calculated by simple interpolation calculation. In addition, even if it is determined by linear interpolation, a display with an interval smaller than a predetermined interval within a range in which the change in gradation correction amount is non-linear with respect to the change in potential corresponding to the gradation correction amount. Since the gradation correction amount is stored for each gradation, the deviation due to the nonlinearity of the gradation voltage change can be reduced, so that an ideal or near ideal gradation correction value can be calculated. it can.

  According to the sixth aspect of the invention, the value obtained by subtracting a predetermined value (which may be a negative value) from the value obtained by linear interpolation is determined as the gradation correction amount. It is possible to calculate a gradation correction value that is more ideal or close to ideal than a value obtained by typical linear interpolation.

  According to the seventh aspect of the present invention, the two display values stored in the lookup table, which are neighboring values before and after the first or second display gradation that is not stored, are stored in the gradation correction amount that is not stored in the lookup table. Since non-linear interpolation is performed between gradations based on a mathematical expression indicating an approximation curve of second order or higher, an ideal or near ideal gradation correction value can be calculated as compared with the case of linear interpolation.

  According to the eighth aspect of the invention, since the gradation correction amount corresponding to the correction voltage ΔV1b is stored in the lookup table, the cross caused by the parasitic capacitance between the pixel electrode and the second video signal line is stored. Talk can be compensated accurately.

  According to the ninth aspect of the invention, since the gradation correction amount corresponding to the correction voltage ΔV1 is stored in the lookup table, the parasitic capacitance between the pixel electrode and the first and second video signal lines is reduced. The resulting crosstalk can be accurately compensated.

  According to the tenth aspect of the invention, when the first display gradation is equal to or lower than the second display gradation, the correction for the first display gradation is suppressed or corrected by a predetermined same value. Processing for determining the adjustment amount can be simplified.

  According to the eleventh aspect of the invention, as in the lookup table shown in the first aspect of the invention, the change in the gradation correction amount is non-linear with respect to the change in potential corresponding to the gradation correction amount. However, although the gradation correction amount is not stored for each display gradation having an interval smaller than the predetermined interval, a predetermined value (a negative value) is obtained from a value obtained by linear interpolation. Since the value obtained by subtracting (or better) is determined as the gradation correction amount, it is necessary to calculate a gradation correction value that is more ideal or closer to the ideal than the value obtained by general linear interpolation. Can do.

  According to the twelfth aspect of the present invention, the change in gradation correction amount is non-linear with respect to the change in potential corresponding to the gradation correction amount as in the lookup table shown in the first aspect of the invention. In the case of linear interpolation, the gradation correction amount is not stored for each display gradation having an interval smaller than the predetermined interval, but nonlinear interpolation is performed based on a mathematical expression indicating a quadratic or higher approximation curve. It is possible to calculate a gradation correction value that is more ideal or close to ideal.

  According to the thirteenth aspect, the same effect can be achieved by the same driving method as in the first aspect.

  According to the fourteenth aspect, the same effect can be achieved by the same program as the thirteenth aspect.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the following description, the display unit is a vertical alignment method and is configured to be normally black. As a driving method, the voltage applied to the liquid crystal is inverted every horizontal scanning period, and one frame is further added. It is assumed that a so-called frame inversion driving method that inverts every period is adopted, but the present invention is not limited to this, and for example, so-called dot inversion driving in which the polarity is inverted every one vertical scanning period, for example. A method may be adopted.

<1. Overall Configuration and Operation of Liquid Crystal Display Device>
FIG. 1 is a block diagram showing the overall configuration of an active matrix liquid crystal display device according to an embodiment of the present invention. The liquid crystal display device includes a display control circuit 200, a drive control unit including a source driver (video signal line drive circuit) 300, and a gate driver (scanning signal line drive circuit) 400, and a display unit 500. The display unit 500 includes a plurality (M) of video signal lines SL (1) to SL (M), a plurality (N) of scanning signal lines GL (1) to GL (N), and a plurality of these. A plurality of (M × N) pixels provided corresponding to the intersections of the video signal lines SL (1) to SL (M) and the plurality of scanning signal lines GL (1) to GL (N), respectively. The pixel forming portion corresponding to the intersection of the scanning signal line GL (n) and the video signal line SL (m) is indicated by the reference symbol “P (n, m)”. ), As shown in FIG. 2 and FIG. Here, FIG. 2 schematically shows a configuration of the display unit 500 in the present embodiment, and FIG. 3 shows an equivalent circuit of the pixel formation unit P (n, m) in the display unit 500.

  As shown in FIG. 2 and FIG. 3, each pixel forming portion P (n, m) has a video signal passing through the intersection while the gate terminal is connected to the scanning signal line SL (n) passing through the corresponding intersection. The TFT 10 which is a switching element having a source terminal connected to the line SL (m), the pixel electrode Epix connected to the drain terminal of the TFT 10, and the plurality of pixel formation portions P (i, j) (i = 1) ˜N, j = 1 to M) and the common electrode Ecom, and the plurality of pixel formation portions P (i, j) (i = 1 to N, j = 1 to M). And a liquid crystal layer as an electro-optical element sandwiched between the pixel electrode Epix and the common electrode Ecom.

  Each pixel forming portion P (n, m) displays one of red (R), green (G), and blue (B), and has the same color as shown in FIG. Is formed along the video signal lines SL (1) to SL (M) and the direction along the scanning signal lines GL (1) to GL (N). Are arranged in the order of RGB.

  In each pixel forming portion P (n, m), a liquid crystal capacitor (also referred to as “pixel capacitor”) Clc is formed by the pixel electrode Epix and the common electrode Ecom that faces the pixel electrode Epix across the liquid crystal layer. Each pixel electrode Epix is provided with two video signal lines SL (m) and SL (m + 1) so as to sandwich the pixel electrode Epix, and one of the two video signal lines SL ( The self source line m) is connected to the pixel electrode Epix via the TFT 10. There is a parasitic capacitance Csda between the source line and the pixel electrode Epix, and the other video signal line SL (m + 1) of the two video signal lines is between the other source line and the pixel electrode Epix. A parasitic capacitance Csdb exists. Further, an auxiliary capacitance line CsL is formed in parallel with each scanning signal line GL (n), and in each pixel formation portion P (n, m), an auxiliary capacitance Ccs is provided between the pixel electrode Epix and the auxiliary capacitance line CsL. Is formed. Note that the total capacitance formed between the pixel electrode Epix and the other electrodes in one pixel formation portion P (n, m) (that is, the total capacitance connected to the pixel electrode Epix) is referred to as “pixel total capacitance”. It is assumed that it is indicated by a symbol “Cpix”. The capacitance values of these capacitors Clc, Csda, Csdb, Ccs, and Cpix are also indicated by the same symbols “Clc”, “Csda”, “Csdb”, “Ccs”, and “Cpix”, respectively.

  The display control circuit 200 receives a display data signal DAT and a timing control signal TS sent from the outside, and controls a digital image signal DV, a source start pulse signal SSP for controlling the timing of displaying an image on the display unit 500, and a source A clock signal SCK, a latch strobe signal LS, a gate start pulse signal GSP, and a gate clock signal GCK are output.

  Here, the external display data signal DAT is a total of 18-bit parallel data composed of red display data DR, green display data DG, and blue display data DB, which are 6-bit data to be given to each pixel forming unit. Contains data.

  The source driver 300 receives the digital image signal DV, the source start pulse signal SSP, the source clock signal SCK, and the latch strobe signal LS output from the display control circuit 200, and each pixel forming unit P (n, In order to charge the pixel capacitor Clc (and auxiliary capacitor Ccs) of m), a driving video signal is applied to the video signal lines SL (1) to SL (M). At this time, the source driver 300 sequentially holds the digital image signal DV indicating the voltage to be applied to each of the video signal lines SL (1) to SL (M) at the timing when the pulse of the source clock signal SCK is generated. . The held digital image signal DV is converted to an analog voltage at the timing when the pulse of the latch strobe signal LS is generated.

  Such D / A conversion is performed by a gradation voltage generation circuit including a D / A conversion circuit. The gradation voltage generation circuit generates an analog voltage corresponding to each display gradation by, for example, dividing a reference voltage for gradation voltage generation given from the outside of the source driver 300.

  The analog voltage generated by the gradation voltage generation circuit is applied to all the video signal lines SL (1) to SL (M) simultaneously as a driving video signal. That is, in the present embodiment, the line sequential driving method is adopted as the driving method of the video signal lines SL (1) to SL (M).

  The gate driver 400 applies an active scanning signal to the scanning signal lines GL (1) to GL (N) based on the gate start pulse signal GSP and the gate clock signal GCK output from the display control circuit 200.

  As described above, the driving video signal is applied to the video signal lines SL (1) to SL (M) and the scanning signal is applied to the scanning signal lines GL (1) to GL (N). The image is displayed on the display unit 500. The common electrode Ecom and the auxiliary capacitance line CsL are supplied with a predetermined voltage by a power supply circuit (not shown) and are held at the common electrode potential Vcom.

<2. Configuration and operation of display control circuit>
FIG. 4 is a configuration diagram of the display control circuit 200 in the present embodiment. The display control circuit 200 includes a basic LUT 21, a detailed LUT 22, a gradation correction unit 23, and a timing control unit 24. Note that the LUT refers to a look-up table in which display gradations to be given to two adjacent pixel forming units are associated with correction gradation values for compensating for crosstalk. It is stored in a predetermined storage area in storage means such as a semiconductor memory (not shown). Hereinafter, the memory itself in which the LUT is stored is also referred to as a lookup table.

  The timing control unit 24 receives a timing control signal TS sent from the outside, and receives a control signal CLT for controlling the operation of the gradation correction unit 23 and a source start for controlling the timing for displaying an image on the display unit 500. A pulse signal SSP, a source clock signal SCK, a latch strobe signal LS, a gate start pulse signal GSP, and a gate clock signal GCK are output.

  The gradation correction unit 23 receives the display data signal DAT sent from the outside and the control signal CT output from the timing control unit 24 and corrects the display data signal DAT based on the basic LUT 21 and the detailed LUT 22. Each drive video signal S (m) is corrected to compensate for variations in the holding voltage in the pixel capacitance due to crosstalk. That is, the gradation correction unit 23 compensates for the influence (crosstalk) caused by the potential change of the adjacent video signal lines SL (m) and SL (m + 1) on the holding voltage of the pixel capacitor Clc in each pixel formation unit P (n, m). Therefore, the red display data DR, the green display data DG, and the blue display data DB constituting the display data signal DAT are corrected, and these corrected signals are converted into a digital image signal DV including display data of each color. Output as. Note that the gradation correction unit 23 may perform correction to compensate only for the influence caused by the potential change of the adjacent video signal line SL (m + 1).

  This digital image signal DV is supplied to the source driver 300 (as parallel data of a total of 18 bits for each of RGB 6 bits). In the source driver 300, the digital image signal DV is converted into an analog voltage for each color and applied to the corresponding video signal lines SL (1) to SL (M) as driving video signals. The voltages applied as video signals for driving to the video signal lines SL (1) to SL (M) in this way are the TFTs 10 that are turned on by sequential application of active scanning signals by the gate driver 400, respectively. Is applied to the pixel electrode Epix of each pixel formation portion P (n, m) and held in the pixel capacitance Clc (and the pixel total capacitance Cpix) of the pixel formation portion P (n, m). An image is displayed by applying a holding voltage in the pixel capacitor Clc to the liquid crystal and controlling the light transmittance of the display unit 500.

<3. Details of Tone Correction Unit>
<3.1 Configuration of Tone Correction Unit>
FIG. 5 is a block diagram showing a configuration of the gradation correction unit 23 in the present embodiment. The gradation correction unit 23 includes delay units 31 to 33, correction amount determination units 34 to 36, and adders 37 to 39. The red display data DR constituting the display data signal DAT is a delay unit. 31 and the correction amount determination unit 36, the green display data DG is input to the delay unit 32, and the blue display data DB is input to the delay unit 33.

  The delay units 31 to 33 latch the display data DR, DG, DB applied simultaneously in accordance with the control signal CT applied from the timing control unit 24, and receive the next display data DR, DG, DB at the timing of receiving the next display data DR, DG, DB. By outputting the latched display data, the received data is delayed and output. Therefore, as a result, the delay units 31 to 33 delay the input display data by 3 dots (3 pixels), that is, 3 pulse repetition periods in the source clock signal SCK.

  Here, the display data DR, DG, and DB after being delayed by the delay units 31 to 33 are referred to as display data DRd, DGd, and DBd, respectively. In this case, the display data DRd and the display data DGd, the display data DGd and the display data DBd, and the display data DBd and the display data DR should be held in the pixel capacitance Clc in the two pixel formation portions adjacent to each other in the horizontal direction. This is display data corresponding to the voltage, that is, the voltage applied to the liquid crystal. Now, focusing on the pixel formation portion P (n, m) including the pixel capacitance Clc that should hold the voltage corresponding to the display data DRd, the pixel electrode Epix in the pixel formation portion P (n, m) is connected to the pixel electrode Epix via the TFT 10. The connected video signal line corresponds to its own source line SL (m) to which a voltage corresponding to the display data DRd is applied from the source driver 300. The video signal line connected to the pixel electrode Epix in the adjacent pixel formation portion P (n, m + 1) including the pixel capacitor Clc that should hold the voltage corresponding to the display data DGd via the TFT 10 is connected to the display data DGd. The corresponding voltage is a video signal line applied from the source driver 300 and corresponds to the other source line SL (m + 1) when viewed from the target pixel formation portion P (n, m) (see FIGS. 2 and 3). ).

  These relationships are the same in the relationship between the display data DGd and the display data DBd and the relationship between the display data DBd and the display data DR. That is, when attention is paid to the pixel formation portion P (n, m + 1) including the pixel capacitance Clc to hold the voltage corresponding to the display data DGd, the video signal line connected to the pixel formation portion P (n, m) is This corresponds to the source line SL (m + 1) to which a voltage corresponding to the display data DGd is applied. The video signal line connected to the adjacent pixel formation portion P (n, m + 2) including the pixel capacitance Clc that should hold the voltage corresponding to the display data DBd is the video to which the voltage corresponding to the display data DGd is applied. It is a signal line and corresponds to the other source line SL (m + 2) when viewed from the target pixel formation portion P (n, m + 1). When attention is paid to the pixel formation portion P (n, m + 2) including the pixel capacitance Clc that should hold the voltage corresponding to the display data DBd, the video signal line connected to the pixel formation portion P (n, m + 2) is This corresponds to the source line SL (m + 2) to which a voltage corresponding to the display data DBd is applied. The video signal line connected to the adjacent pixel formation portion P (n, m + 3) including the pixel capacitance Clc that should hold the voltage corresponding to the display data DR is the video to which the voltage corresponding to the display data DR is applied. It is a signal line and corresponds to the other source line SL (m + 3) when viewed from the target pixel formation portion P (n, m + 2).

  Since the display data DR, DG, and DB are given simultaneously as described above, the display data DR, DG, and DB are delayed by the delay units 31 to 33 in order to simultaneously obtain these data and the next display data DR. do it. In this way, the display data DBd and the display data DR can be obtained at the same time, so that the display data DBd can be corrected together with the display data DRd and DGd. Here, the digital image signal DV including the display data DR, DG, DB is delayed as described above, and the display data DBd and the display data are based on the digital image signal DV before the delay and the digital image signal DV ′ after the delay. The configuration may be such that DR is obtained at the same time.

  The correction amount determination unit 34 displays the display data DRd, which is data (hereinafter referred to as “own source data”) corresponding to the voltage to be applied to the own source line SL (m) thus obtained, and the other source line SL. Based on display data DGd which is data corresponding to a voltage to be applied to (m + 1) (hereinafter referred to as “other source data”), display data which is the source data is referred to by referring to a basic LUT 21 and a detailed LUT 22 which will be described later. A gradation correction amount ΔLR for DRd is determined.

  Similarly, the correction amount determination unit 35 displays data DGd, which is data corresponding to the voltage to be applied to its own source line SL (m + 1), and data corresponding to the voltage to be applied to the other source line SL (m + 2). By referring to the basic LUT 21 and the detailed LUT 22 based on the display data DBd, the gradation correction amount ΔLG for the display data DGd that is the source data is determined.

  Similarly, the correction amount determination unit 36 displays data DBd, which is data corresponding to the voltage to be applied to the source line SL (m + 2), and data corresponding to the voltage to be applied to the other source line SL (m + 3). By referring to the basic LUT 21 and the detailed LUT 22 based on the display data DR, the gradation correction amount ΔLB for the display data DBd that is the source data is determined.

  The adder 37 corrects the display data DRd by adding the gradation correction amount ΔLR determined as described above to the display data DRd, and the corrected display data together with other color data is converted into the digital image signal DV. Output as.

  Similarly, the adder 38 corrects the display data DGd by adding the gradation correction amount ΔLG to the display data DGd, and outputs the corrected display data as a digital image signal DV together with data of other colors.

  Similarly, the adder 38 corrects the display data DBd by adding the gradation correction amount ΔLB to the display data DBd, and outputs the corrected display data as a digital image signal DV together with data of other colors.

<3.2 Principle of gradation correction>
As described above, in the present embodiment, in each pixel formation portion P (n, m), when the TFT 10 is in a conductive state, the voltage of its own source line that is the corresponding video signal line SL (m) is applied to the pixel electrode Epix. When applied, the pixel electrode potential Vpix is charged until its own source line SL (m) becomes equal to the potential. When the TFT 10 is subsequently cut off, the charge potential is maintained during the cut off state. However, in reality, while the TFT 10 is in the cut-off state, the potential Vpix of the pixel electrode Epix (and the holding voltage in the pixel capacitor Clc) is two video signal lines arranged so as to sandwich the pixel electrode Epix, that is, the self source. It is affected by potential changes of the line SL (m) and the other source line SL (m + 1). That is, as shown in FIGS. 2 and 3, each pixel electrode Epix has a parasitic capacitance Csda between itself and the source line SL (m) and a parasitic capacitance Csdb with another source line SL (m + 1). Each exists. Thereby, the potential Vpix of the pixel electrode Epix is passed through the parasitic capacitance Csda while the TFT 10 connected to the pixel electrode Epix is cut off (that is, while the scanning signal G (n) applied to the gate terminal of the TFT 10 is inactive). In addition to being affected by the potential change of the self source line SL (m), it is also affected by the potential change of the other source line SL (m + 1) via the parasitic capacitance Csdb.

  In this embodiment, in order to compensate for the fluctuation of the pixel electrode potential Vpix (the holding voltage at the pixel capacitance Clc) caused by such parasitic capacitances Csda and Csdb, that is, to compensate for crosstalk, the basic LUT 21 and details are described in this embodiment. With reference to the LUT 22, the values of the display data DR, DG, DB of each color included in the digital image signal DV are corrected. Hereinafter, the principle of this correction will be described.

The magnitude and direction of the influence of the potential change of the own source line SL (m) on the pixel electrode potential Vpix of each pixel formation portion P (n, m) is the own source line at the time when the TFT 10 changes from the conductive state to the cut-off state. This is determined by how the potential of the source line SL (m) changes in the cutoff state with respect to the potential of SL (m) (hereinafter referred to as “V1”). Here, the potential V1 can be regarded as a potential of the driving video signal S (m) for holding the voltage applied to the liquid crystal in the pixel capacitor Clc, that is, a writing potential to the pixel formation portion P (n, m). . By the way, in the present embodiment, a line inversion driving method is employed in which each video signal line SL (j) (j = 1 to M) is driven so that the voltage applied to the liquid crystal is inverted every horizontal scanning period. That is, since the voltage of the driving video signal S (j) is substantially AC with respect to the common electrode potential Vcom in each frame period, any video signal line SL (j) (j = 1 to M) It can be considered that the time average is also equal to the common electrode potential Vcom. Therefore, the change ΔV1a of the pixel electrode potential Vpix due to the potential change of the self source line SL (m) is expressed by the following equation, considering the capacitance ratio.
ΔV1a = (Vcom−V1) · Csda / Cpix (1)
Here, Cpix is the total capacitance connected to the pixel electrode Epix (Cpix≈Ccl + Ccs), and the pixel electrode potential Vpix is affected so as to increase when ΔV1a> 0 and decrease when ΔV1a <0.

Similarly, the magnitude and direction of the influence of the potential change of the other source line SL (m + 1) is also the potential of the other source line SL (m + 1) (hereinafter referred to as “V2”) when the TFT 10 changes from the conductive state to the cutoff state. It is determined by how the potential of the other source line SL (m + 1) changes in the cutoff state. Here, the potential V2 can be regarded as a potential of the driving video signal S (m + 1) for holding the voltage applied to the liquid crystal in the pixel capacitor Clc, that is, a writing potential to the pixel formation portion P (n, m + 1). Here, in this embodiment, since the line inversion driving method is adopted, the time average of any video signal line SL (j) (j = 1 to M) is considered to be equal to the common electrode potential Vcom as described above. be able to. Therefore, the change ΔV1b of the pixel electrode potential due to the potential change of the other source line SL (m + 1) is expressed by the following equation, considering the capacitance ratio.
ΔV1b = (Vcom−V2) · Csdb / Cpix (2)
Here, the pixel electrode potential is affected so as to increase when ΔV1b> 0 and decrease when ΔV1b <0.

Therefore, in consideration of both the influence due to the potential change of the self source line SL (m) and the influence due to the potential change of the other source line SL (m + 1), the pixel electrode potential Vpix (the holding voltage of the pixel capacitance) in the cutoff state of the TFT 10. The fluctuation ΔV (s) of ΔV (s) = ΔV1a + ΔV1b (3)
Therefore, the actual potential RV (V1, V2) of the pixel electrode Epix is
RV (V1, V2) = V1 + (Vcom-V1) .Csda / Cpix
+ (Vcom−V2) ・ Csdb / Cpix (4)
It becomes. Here, for RV (Va, Vb), the potential of the source line SL (m) at the time when the TFT 10 changes from the conductive state to the cutoff state is Va, and the potential of the other source line SL (m + 1) is Vb. The actual potential at the pixel electrode Epix is shown.

  As can be seen from the above equation (4), in order to bring the actual potential RV (V1, V2) of the pixel electrode Epix closer to the original potential V1, the driving image is set so that the variation ΔV (s) is offset. It is only necessary to correct the voltage to be applied to the source line SL (m) as the signal S (m) (the gradation correction amount ΔVm of the voltage applied to the source line is (V1−Vcom) · Csda / Cpix + (V2−). Vcom) · Csdb / Cpix) That is, based on the display gradations corresponding to the potential V1 of the source line SL (m) and the potential V2 of the other source line SL (m + 1) at the time when the TFT 10 changes from the conductive state to the cutoff state, the above equation (3) What is necessary is just to correct | amend the voltage which should be applied to self-source line SL (m) so that the fluctuation | variation (DELTA) V (s) shown by may be canceled. For this purpose, for example, as in the present embodiment shown in FIG. 5, red display data DR corresponding to the voltage to be applied to the source line SL (m) connected to the pixel forming portion where red (R) is to be formed. Based on the value and the value of the green display data DG corresponding to the voltage to be applied to the other source line SL (m + 1) connected to the pixel forming portion where green (G) is to be formed, the correction amount determining unit 36 By correcting, the digital image signal DV to be supplied to the source driver 300 may be generated.

  Note that the potentials V1, V2, Vcom, and the like are actually affected by the potential change of the scanning signal lines GL (1) to GL (N). It is assumed that the influence of the potential change is discarded or already compensated. Further, in order to simplify the configuration, the voltage to be applied to the own source line SL (m) may be corrected based on the above formula (2) (the gradation correction amount of the applied voltage to the own source line). ΔVm may be (Vcom−V2) · Csdb / Cpix). That is, the voltage to be applied to the source line SL (m) is corrected based only on the display gradation corresponding to the potential V2 of the other source line SL (m + 1) when the TFT 10 changes from the conductive state to the cutoff state. Also good.

  As described above, the value of the display data DR is corrected by the gradation correction amount ΔLR that is uniquely determined by the value of the display data DR that is the source data and the value of the display data DG that is the other source data. Similarly, the values of DG and DB are corrected by gradation correction amounts ΔLG and ΔLB that are uniquely determined by the respective source data and other source data. Note that in order to determine these gradation correction amounts included in the basic LUT 21 and the detailed LUT 22, it is actually necessary to convert the voltage value obtained by the above equation (4) into display gradations. Is performed based on, for example, a detailed conversion table or a mathematical expression for deriving a display gradation from a voltage value, which is determined according to the characteristics of the gradation voltage generation circuit.

  However, as described above, since the number of values indicating these gradation correction amounts is the square of the number of display gradations, all of them are looked up in association with the own source data and other source data based on the above equation (4). Setting up (and storing) uptables is not practical. Therefore, in this embodiment, in order to minimize the deviation of the gradation correction amount due to the nonlinearity of the gradation voltage change, in the present embodiment, a predetermined value of the basic LUT 21 associated with the self source data and other source data that are determined with a relatively large interval. A detailed LUT 22 that defines the part in more detail is defined. Details will be described below.

<3.3 Configuration example of each lookup table>
FIG. 6 is a diagram illustrating a configuration example of a basic lookup table (LUT). As shown in FIG. 6, this basic LUT 21 is a combination of the value of its own source data that changes along the horizontal direction of the figure and the value of other source data that changes along the vertical direction of the figure. This is a look-up table (LUT) that correlates the gradation correction amount ΔL (which should be the gradation correction amounts ΔLR, ΔLG, ΔLB), so that the liquid crystal display device is a vertical alignment method and is normally black. It is assumed that it is configured.

  In the basic LUT 21 shown in FIG. 6, the portion where the gradation correction amount ΔL is “0” may be corrected, but it is a region where the effect of the correction is small, that is, a region where the error is originally hardly visible. You don't have to. This is due to the following reason. That is, in the portion where the gradation correction amount ΔL is “0”, the display gradation value corresponding to the voltage applied to the self source line SL (m) corresponds to the voltage applied to the other source line SL (m + 1). This is an area smaller than the tone value. In this case, even if crosstalk occurs between the pixel electrode Epix and the own source line SL (m), the display gradation level of the pixel formation portion P (n, m) including the pixel electrode Epix is low. The influence of the crosstalk on the display level of the pixel formation portion P (n, m) is reduced.

  Further, the gradation correction amount ΔL within the range surrounded by the alternate long and short dash line shown in FIG. 6 is defined in more detail in a detailed LUT 22 different from the basic LUT 21. Thus, the detailed LUT 22 corresponding only when the value of the other source data is within the range from 0 to 32 is set because the gradation voltage generated by the gradation voltage generation circuit within this range is set. This is because it changes non-linearly with respect to changes in display gradation. In addition, the numerical value which shows the said range is an example, Comprising: It is not necessarily limited to the said numerical value. Hereinafter, a description will be given with reference to FIGS.

  FIG. 7 is a diagram showing the relationship between the gradation voltage generated by the gradation voltage generation circuit and the corresponding display gradation. The vertical axis in the figure is the gradation voltage value, and the horizontal axis is the display gradation value. In the figure, both a positive gradation voltage and a negative gradation voltage based on the common electrode potential Vcom are shown.

  As shown in FIG. 7, for example, in the range where the display gradation is 100 to 150, the correspondence is almost linear, but the display gradation is near “0” (in this embodiment, the display gradation is 0 to 32). In the range of the above, the above correspondence is particularly nonlinear. Thus, since the gradation voltage changes non-linearly within the display gradation range of 0 to 32, the gradation correction amount obtained by linearly interpolating the gradation correction amount ΔL in the basic LUT 21 (linear interpolation). Causes a deviation from the ideal gradation correction amount. Therefore, by setting the detailed LUT 22 within the above range, the ideal tone correction amount and deviation can be reduced.

  Next, paying attention to the change in the gradation correction amount ΔL within the range surrounded by the dotted line shown in FIG. 6 (that is, when the value of its own source data is “32”), the deviation is actually reduced. Will be specifically described with reference to FIG. Note that the deviation is similarly reduced by setting the detailed LUT 22 even outside the above-described range, but the description thereof is omitted and replaced with the following description.

  FIG. 8 is a diagram showing the detailed gradation correction amount ΔL in the detailed LUT 22 when the value of the source data is “32”. This corresponds to the gradation correction amount ΔL within the range surrounded by the dotted line shown in FIG. More specifically, FIG. 8A shows both the detailed gradation correction amount ΔL and the ideal gradation correction amount, and FIG. 8B shows the value of the source data in the detailed LUT 22. It is a figure which shows the value of other source data when is "32". In FIG. 8A, the vertical axis represents the gradation correction amount ΔL, and the horizontal axis represents other source data. 8A indicates the gradation correction amount ΔL in the detailed LUT 22 (shown in FIG. 8B), and the curve drawn with a solid line indicates the ideal gradation correction described above. A straight line drawn with a one-dot chain line indicates a change in gradation correction amount when linear interpolation is performed in the conventional case where only the basic LUT 21 is provided.

  As shown in FIG. 8A, the ideal gradation correction amount change in the detailed LUT 22 is non-linear in relation to other source data, and the gradation when linear interpolation is performed in the conventional case. A portion deviated by about 2 to 3 gradations from the correction amount can be seen. On the other hand, the gradation correction amount ΔL (that is, each point in FIG. 8A) in the detailed LUT 22 shows only a deviation of about 0.5 gradations from the ideal gradation correction amount at the maximum. Therefore, it can be seen that the difference between the gradation correction amount ΔL and the ideal gradation correction amount is actually reduced by the detailed LUT 22.

  However, in order to reduce the amount of data to be stored, the other source data in the detailed LUT 22 has a value (ie, 4 other than 0 and 1) spaced from 0 to 3 gradations as shown in FIG. 8B. For example, when the value of the other source data is a value not shown in the detailed LUT 22 such as “3” or “5”, the gradation correction amount ΔL cannot be directly derived from the detailed LUT 22.

  Therefore, here, similar to the linear interpolation in the conventional basic LUT 21, simple linear interpolation is performed that connects the two values determined in the basic LUT 21 that are neighboring values before and after the gradation correction amount ΔL to be obtained. Then, the tone correction amount ΔL corresponding to other source data not shown in the detailed LUT 22 can be derived by simple interpolation calculation.

  Further, instead of simple linear interpolation that connects the two values defined in the basic LUT 21 with an interpolation line as described above, it has the same inclination as the above-mentioned line, resulting in a more ideal change in gradation correction amount. A configuration in which linear interpolation is performed by a straight line with a changed Y-intercept so as to approximate (that is, so that an average value of differences from the ideal value becomes small) may be employed. With this configuration, it is possible to derive a gradation correction amount ΔL that is close in average to an ideal gradation correction amount as compared with the simple linear interpolation of the above-described conventional example, by relatively simple interpolation calculation. Details will be described later.

  However, since the above-described linear interpolation cannot accurately interpolate the gradation correction amount ΔL that varies nonlinearly, it is preferable to perform nonlinear interpolation in order to perform more accurate interpolation. Here, in order to interpolate most accurately, it is preferable to use the above equation (4) as a basis for calculating the gradation correction amount ΔL of the basic LUT 21 and the detailed LUT 22, but the calculation by the above equation (4) is very complicated. In addition, since a detailed conversion table or the like from voltage values to display gradation values is required, it is not practical to use the above equation (4) for interpolation.

  Therefore, the gradation correction amount ΔL when the display gradation value of the source data shown in the detailed LUT 22 is LA and the display gradation value of the other source data is LB is expressed by these functions F (LA, LB). At this time, the equation defining the function F (LA, LB) may be an equation showing a quadratic or higher curve approximating the change in the ideal gradation correction amount, and nonlinear interpolation based on this equation may be performed. According to this method, although the calculation is somewhat complicated, the gradation correction amount ΔL that changes nonlinearly can be accurately interpolated. Details will be described later.

  The interpolation calculation using the gradation correction amount shown in the detailed LUT 22 as described above is performed by the correction amount determination units 34 to 36. The correction amount determination units 34 to 36 determine whether to refer only to the basic LUT 21 or the detailed LUT 22 based on the value of the other source data. Specifically, when the value of the other source data is “32” or less, the detailed LUT 22 is referred to, and when it exceeds “32”, only the basic LUT 21 is referenced.

  Even when only the basic LUT 21 is referred to, the gradation correction amount ΔL cannot be directly derived from the basic LUT 21 when other source data in the basic LUT 21 is not shown. Interpolation calculation similar to the above is performed by the units 34 to 36.

  Here, the gradation correction amount obtained as a result of the above-described interpolation calculation is illustrated with reference to an example of a lookup table in which gradation correction amounts different from the basic LUT 21 and the detailed LUT 22 shown in FIGS. 6 and 8 are set. This will be specifically described with reference to FIGS.

  FIG. 9 is a diagram showing display gradation values of RGB colors for generating a gradation pattern in which a color contour may occur. The vertical axis shown in FIG. 9 is the display gradation value, and the horizontal axis is the X coordinate on the display screen. The display gradation value of red (R) is indicated by a solid line, the display gradation value of green (G) is indicated by a one-dot chain line, and the display gradation value of blue (B) is indicated by a two-dot chain line. Note that pixels having the same X coordinate have the same display gradation in all Y coordinates (0 to 250).

  This gradation pattern has a color contour when there is a difference in gradation correction amount due to the nonlinearity of the gradation voltage change as described above. Specifically, since the blue brightness continuously increases from 0 to the right starting from the position where the X coordinate is 200, a line extending in the vertical direction of the display screen is generated in the vicinity of the portion where blue is applied. To do. Therefore, in addition to the basic LUT (a gradation correction amount different from the basic LUT 21 shown in FIG. 6) is set, a gradation correction amount different from the detailed LUT 22 shown in FIG. 8 is set. ) By setting the detailed LUT, it is possible to reduce the deviation of the gradation correction amount due to the nonlinearity of the gradation voltage change.

  FIG. 10 is an enlarged view of the green (G) and blue (B) display gradation values shown in FIG. 9 and the gradation correction amount using the green (G) display gradation values as its own source data. FIG. In FIG. 10, each display gradation value and gradation correction amount are shown in an enlarged manner in the range from 200 to 220 on the X coordinate on the display screen. As shown in FIG. 10, the gradation correction amount using the green (G) display gradation value as its own source data decreases nonlinearly as the blue (B) display gradation value increases. Is determined to be close to a non-linear change in gradation voltage. Therefore, by correcting the display gradation value of green (G) using the gradation correction amount indicated in the detailed LUT, it is possible to accurately compensate for color crosstalk, and as a result, the color contour is corrected. Is resolved.

  Further, as described above, only the basic LUT is used in the range of the self-source data in which the detailed LUT is not provided, and the interpolation calculation is performed when no other source data is indicated in the basic LUT.

  FIG. 11 is a diagram showing each gradation correction amount of the detailed LUT shown in FIG. 9 and gradation correction amounts obtained by two types of interpolation calculations. In the figure, each gradation correction amount of the detailed LUT is indicated by a triangular point sequence. The two types of interpolation calculations are performed when the other LUT is not shown in the basic LUT, assuming that the detailed LUT is not provided.

  Note that these interpolation calculations not only function as interpolation calculations for the basic LUT, but also function as interpolation calculations for the detailed LUT. Therefore, for the explanation of the interpolation calculation for the detailed LUT, the above assumptions are used. There is no problem even if it goes.

  Further, since the following description is also established as a configuration example for performing interpolation calculation on the basic LUT, the detailed LUT 22 in this embodiment may be omitted and the following interpolation calculation may be performed. Also in this configuration, the shift due to the nonlinearity of the gradation voltage change can be reduced, and an ideal or near ideal gradation correction value can be calculated. As a result, color crosstalk is suppressed with a simple configuration, and color reproducibility in image display can be easily improved.

In FIG. 11, a curve including a square point sequence indicates the ideal gradation correction amount obtained by referring to the above equation (4), and a straight line with a Y intercept of 10 is for the conventional linear interpolation. The straight line in which the Y intercept is changed so as to approximate a more ideal change in the gradation correction amount (that is, the average value of the difference from the ideal value becomes smaller) is shown. Specifically, this straight line can be expressed as the following equation (5).
Y = −0.5137X + 10 (5)

  The difference between the gradation correction amount obtained by this straight line and the ideal gradation correction amount is smaller than the difference between the gradation correction amount indicated by the straight line for conventional linear interpolation and the ideal gradation correction amount. It can be seen that better linear interpolation is performed. Setting the Y-intercept appropriately in this way can be easily calculated by subtracting a value corresponding to the difference in Y-intercept from the gradation correction amount obtained by the conventional linear interpolation. The reason why the above value is subtracted is that the curve indicating the ideal change in the gradation correction amount is convex downward. The above value may be a negative value.

Further, the tone correction amount indicated by the dotted curve in FIG. 11 is obtained according to an equation showing a second-order or higher-order curve that approximates the change in the ideal tone correction amount. The derivation of the formula by this approximation can be performed by a known approximate formula calculation method. For example, this equation can be expressed as the following equation (6).
Y = 0.0002X ⁴ −0.0117X ³ + 0.2987X ²
−3.3471X + 16.531 (6)

  The difference between the gradation correction amount obtained by the nonlinear interpolation based on this curve and the ideal gradation correction amount is the same as the gradation correction amount indicated by the conventional linear interpolation or the straight line based on the above equation (5) and the ideal gradation correction amount. It can be seen that the difference from the tone correction amount is considerably smaller and very good interpolation is performed. In addition to the above approximate expression, for example, an approximate expression based on a spline function may be used. In this case, if the approximate expression is determined with reference to a value outside the range shown in FIG. 11, a smoother approximate curve can be obtained as a whole, so that better interpolation can be performed.

<4. Effect>
As described above, according to the present embodiment, a part of the gradation correction amount for compensating for the crosstalk is stored in the basic LUT 21 with a predetermined interval, and the gradation correction amount that is not stored in the basic LUT 21 is stored. In the range where the deviation due to the nonlinearity of the gradation voltage change is large (for example, the value where the gradation voltage is close to 0), a part of the gradation correction amount is stored in the detailed LUT 22 at an interval smaller than the above interval. By calculating the gradation correction amount with reference to the detailed LUT 22, the shift due to the nonlinearity of the gradation voltage change can be reduced, and an ideal or near ideal gradation correction value can be calculated. . As a result, color crosstalk is suppressed with the simple configuration as described above, and color reproducibility in image display can be easily improved. Further, since the gradation correction amount is determined in detail (at a fine interval) in a range where the change in the gradation correction amount is non-linear with respect to the potential change corresponding to the gradation correction amount. The processing for obtaining the correction amount is speeded up, and it is possible to handle high-definition display.

<5. Modification>
In the above embodiment, the detailed LUT 22 is set only when the value of the other source data is in the range from 0 to 32. However, in order to reduce the number of gradation correction amounts ΔL to be held in the memory or the like, The detailed LUT 22 may be set only when the value of its own source data is in the range from 0 to 32. As described above, the numerical value indicating the above range is an example, and is not limited to the above numerical value.

  In the above embodiment, the interpolation has been described in the case where the own source data is set in the detailed LUT 22 or the basic LUT 21 and the other source data is not set in the detailed LUT 22 or the basic LUT 21. The same applies to the interpolation when the detailed LUT 22 or the basic LUT 21 is set. Note that the interpolation calculation in this case is also performed by the correction amount determination units 34 to 36 in the same manner as described above.

  In the above embodiment, the detailed LUT 22 is determined as data different from the basic LUT 21, but the data structure is not limited, and a configuration in which one lookup table including the detailed LUT 22 is provided as part of the basic LUT 21 is provided. It may be. Specifically, in the basic LUT 21, when the own source data (or other source data) is a value close to 0 (for example, from the 0th gradation to the 32nd gradation), the interval between other parts (for example, every 32 gradations). The gradation correction amount ΔL corresponding to the own source data and other source data determined at a finer interval (for example, every four gradations) is stored. In this configuration, a part of the basic LUT 21 determined at the fine intervals corresponds to the detailed LUT 22. Further, at least one of the basic LUT 21 and the detailed LUT 22 may be configured by a plurality of lookup tables.

  In the above embodiment, the gradation correction amount ΔL indicated in the basic LUT 21 and the detailed LUT 22 is determined based on the above equation (4), but may be determined by a simpler equation. For example, when LA is smaller than a predetermined threshold, F (LA, LB) = t (LA−LB) is set (t> 0), and when LA is equal to or larger than the predetermined threshold, F (LA, LB). = K (k ≧ 0). Here, when the display pixel is brighter than 128 gradations out of 256 gradations, a clear correlation between LA and F (LA, LB) cannot be seen. In this case, the predetermined threshold is set to the 128th floor. As a tone, it is possible to perform simple gradation correction with the gradation correction amount ΔL set to a constant value k. Further, since the suitable gradation correction amount ΔL monotonously increases until this threshold value is exceeded, simple gradation correction can be performed with t (LA−LB).

  Further, the gradation correction amount ΔL shown in the basic LUT 21 and the detailed LUT 22 is obtained by measuring the luminance of each RGB color for each display gradation in a single color, and combining the combined white luminance (that is, the sum of the luminance of each color to 2 of the black luminance). (A value obtained by subtracting double) may be calculated based on a change in luminance. In addition, the gradation correction amount ΔL can be calculated by any known method.

  In the above embodiment, the linear interpolation or the non-linear interpolation is performed in the entire range. However, a condition may be set for the range in which the linear interpolation or the non-linear interpolation is performed. Specifically, in the case of LA> LB, simple linear interpolation as in the conventional example, the above-described linear interpolation with the Y-intercept appropriately changed, or the above-described nonlinear interpolation based on an equation showing a quadratic or higher curve, etc. When LA ≦ LB, the gradation correction amount ΔL may be set to “0”, that is, the correction may be suppressed. In this case, the calculation of the gradation correction amount ΔL can be simplified. Here, the gradation correction amount ΔL does not necessarily have to be “0”, and any configuration can be used as long as the correction can be suppressed as a result, for example, the correction operation is stopped. Further, the correction by the same value may be performed by setting the gradation correction amount ΔL to a predetermined value other than “0” (for example, a predetermined negative value). Also with this configuration, the calculation of the gradation correction amount ΔL can be simplified.

  In the above embodiment, the display control circuit 200 corrects the display gradation data in order to compensate for crosstalk, thereby correcting the voltage to be applied to the video signal line as the drive video signal. The source driver 300 may be configured to correct a signal for correcting a voltage to be applied to the signal line.

  In the above description, the active matrix type liquid crystal display device has been described as an example. However, the display device is an active matrix type voltage control display device in which parasitic capacitance exists between the pixel electrode and the video signal line. If it is a device, the present invention can be applied to devices other than liquid crystal display devices.

1 is a block diagram illustrating an overall configuration of an active matrix liquid crystal display device according to an embodiment of the present invention. It is a figure which shows typically the structure of the display part of an active matrix liquid crystal display device. It is a circuit diagram showing an equivalent circuit of a pixel formation portion in an active matrix liquid crystal display device. It is a block diagram which shows the structure of the display control circuit in the said embodiment. It is a block diagram which shows the structure of the gradation correction | amendment part in the said embodiment. In the said embodiment, it is a figure which shows the structural example of a basic look-up table (LUT). It is a figure which shows the relationship between the gradation voltage produced | generated by the gradation voltage generation circuit in the said embodiment, and the corresponding display gradation. In the said embodiment, it is a figure which shows the detailed gradation correction amount in a detailed LUT when the value of self-source data is "32". In the said embodiment, it is a figure which shows the display gradation value of each color of RGB for producing | generating the gradation pattern in which a color outline may arise. In the above embodiment, the display gradation values of green (G) and blue (B) shown in FIG. 9 and the gradation correction amount using the display gradation value of green (G) as its own source data are expanded. FIG. FIG. 10 is a diagram showing each gradation correction amount of the detailed LUT shown in FIG. 9 and gradation correction amounts obtained by two types of interpolation calculations in the embodiment.

Explanation of symbols

10 ... TFT (switching element)
21 ... Basic LUT (look-up table)
22 ... Detailed LUT (Lookup Table)
DESCRIPTION OF SYMBOLS 23 ... Gradation correction | amendment part 24 ... Timing control part 31-33 ... Delay part 34-36 ... Correction amount determination part 37-39 ... Adder 200 ... Display control circuit 300 ... Source driver 400 ... Gate driver 500 ... Display part DV ... Digital image signal DR ... Red display data DG ... Green display data DB ... Blue display data Clc ... Liquid crystal capacity (pixel capacity)
Ccs ... Auxiliary capacitance Csda, Csdb ... Parasitic capacitance Ecom ... Common electrode Epix ... Pixel electrode GL (n) ... Scanning signal line (n = 1 to N)
SL (m) Data line (m = 1 to M)
P (n, m): Pixel formation portion (n = 1 to N, m = 1 to M)

Claims (14)

A plurality of video signal lines for transmitting a plurality of video signals corresponding to image signals given from the outside of the apparatus so as to indicate an image to be displayed with a predetermined display gradation, and a plurality of video signal lines intersecting the plurality of video signal lines A plurality of pixel forming portions arranged in a matrix corresponding to intersections of the scanning signal lines, the plurality of video signal lines, and the plurality of scanning signal lines, and the plurality of video signal lines and the plurality of video signal lines. A display device comprising a drive control circuit for driving a scanning signal line,
Each pixel forming part
A switching element that is turned on or off according to a signal applied to a scanning signal line passing through a corresponding intersection;
A pixel electrode connected via the switching element to a video signal line passing through a corresponding intersection;
A common electrode provided in common to the plurality of pixel formation portions;
A pixel capacitance formed by the pixel electrode and the common electrode;
An electro-optic element that displays a pixel with a display gradation corresponding to a voltage held in the pixel capacitor,
The drive control circuit includes:
A gradation for correcting the first display gradation included in the image signal corresponding to the video signal to be applied to the first video signal line connected to the pixel electrode of each pixel formation portion via the switching element. The correction amount of the pixel formation portion due to the potential change of the second video signal line and the potential change of the first video signal line arranged so that a parasitic capacitance is formed between the pixel electrode and the pixel electrode. The second correction value included in the image signal corresponding to the first display gradation and the video signal to be applied to the second video signal line includes a gradation correction amount for compensating for the variation in the holding voltage in the pixel capacitor. Table storage means for holding a lookup table stored for each of the first and second display gradations with a predetermined interval in association with the combination of display gradations;
By referring to the lookup table held in the table storage means, the second display gradation and the first display gradation at the time when the switching element changes from the conduction state to the cutoff state. Correction amount determining means for determining a gradation correction amount;
Correction means for correcting the first display gradation based on the gradation correction amount determined by the correction amount determination means,
The table storage means is configured to display the display gradation at an interval smaller than the predetermined interval within a range where the change in the gradation correction amount is non-linear with respect to the change in the potential corresponding to the gradation correction amount. A display device characterized by holding a look-up table storing the gradation correction amount for each.   The table storage means stores the gradation correction amount for each display gradation having an interval smaller than the predetermined interval within a range where the first display gradation is a predetermined value near 0. The display device according to claim 1, further comprising a lookup table.   The table storage means corrects the gradation for each display gradation having an interval smaller than the predetermined interval within a range where the first and second display gradations have a predetermined value near 0. 2. A display device according to claim 1, characterized in that it holds a look-up table storing quantities. The table storage means includes
The first and second display gradations forming an m × m matrix obtained by equally dividing m from the minimum value to the maximum value in the display gradation into m pieces (m is an integer less than the maximum value). A first lookup table storing the gradation correction amount in association with the combination;
The gradation correction amount for each display gradation having an interval smaller than the predetermined interval within a range where the change in the gradation correction amount is non-linear with respect to the change in potential corresponding to the gradation correction amount. The display device according to claim 1, further comprising: a second look-up table that stores therein.   The correction amount determining means is configured to set the gradation correction amount corresponding to the first or second display gradation not stored in the look-up table in the vicinity before and after the first or second display gradation not stored. 5. The display device according to claim 1, wherein the display device is determined by linearly interpolating between two display gradations stored in the lookup table which is a value. 6.   The correction amount determining means determines, as the gradation correction amount, a value obtained by subtracting a predetermined value from a value obtained by linearly interpolating the two display gradations. Item 6. The display device according to Item 5.   The correction amount determining means is configured to set the gradation correction amount corresponding to the first or second display gradation not stored in the look-up table in the vicinity before and after the first or second display gradation not stored. The value is determined by nonlinear interpolation between two display gradations stored in the look-up table, which is a value, based on a mathematical expression showing a second-order or higher-order curve that approximates a curve showing an ideal change in the gradation correction amount. The display device according to claim 1, wherein the display device is a display device. 2. The display according to claim 1, wherein the table storage unit holds the look-up table storing a gradation correction amount corresponding to a correction voltage ΔV1b defined by the following equation. apparatus:
ΔV1b = (V2−Vcom) ・ Csdb / Cpix
Here, V2 represents the potential of the second video signal line when the switching element changes from the conduction state to the cutoff state, Vcom represents the potential of the common electrode, and Csdb represents the pixel electrode and the pixel electrode. The value of the parasitic capacitance formed between the second video signal line and Cpix represents the value of the total capacitance formed between the pixel electrode and another electrode. 9. The display according to claim 8, wherein the table storage means holds the look-up table storing a gradation correction amount corresponding to a correction voltage ΔV1 defined by the following equation. apparatus:
ΔV1 = (V1−Vcom) · Csda / Cpix + (V2−Vcom) · Csdb / Cpix
Here, V1 and V2 represent the potentials of the first and second video signal lines when the switching element changes from the conductive state to the cut-off state, respectively, Vcom represents the potential of the common electrode, and Csda Represents the value of the parasitic capacitance formed between the pixel electrode and the first video signal line, and Csdb represents the value of the parasitic capacitance formed between the pixel electrode and the second video signal line. Cpix represents the value of the total capacitance formed between the pixel electrode and the other electrode.   When the first display gradation is equal to or lower than the second display gradation, the drive control circuit suppresses correction for the first display gradation or performs correction by a predetermined same value. The display device according to claim 1. A plurality of video signal lines for transmitting a plurality of video signals corresponding to image signals given from the outside of the apparatus so as to indicate an image to be displayed with a predetermined display gradation, and a plurality of video signal lines intersecting the plurality of video signal lines A plurality of pixel forming portions arranged in a matrix corresponding to intersections of the scanning signal lines, the plurality of video signal lines, and the plurality of scanning signal lines, and the plurality of video signal lines and the plurality of video signal lines. A display device comprising a drive control circuit for driving a scanning signal line,
Each pixel forming part
A switching element that is turned on or off according to a signal applied to a scanning signal line passing through a corresponding intersection;
A pixel electrode connected via the switching element to a video signal line passing through a corresponding intersection;
A common electrode provided in common to the plurality of pixel formation portions;
A pixel capacitance formed by the pixel electrode and the common electrode;
An electro-optic element that displays a pixel with a display gradation corresponding to a voltage held in the pixel capacitor,
The drive control circuit includes:
A gradation for correcting the first display gradation included in the image signal corresponding to the video signal to be applied to the first video signal line connected to the pixel electrode of each pixel formation portion via the switching element. The correction amount of the pixel formation portion due to the potential change of the second video signal line and the potential change of the first video signal line arranged so that a parasitic capacitance is formed between the pixel electrode and the pixel electrode. The second correction value included in the image signal corresponding to the first display gradation and the video signal to be applied to the second video signal line includes a gradation correction amount for compensating for the variation in the holding voltage in the pixel capacitor. Table storage means for holding a lookup table stored for each of the first and second display gradations with a predetermined interval in association with the combination of display gradations;
By referring to the lookup table held in the table storage means, the second display gradation and the first display gradation at the time when the switching element changes from the conduction state to the cutoff state. Correction amount determining means for determining a gradation correction amount;
Correction means for correcting the first display gradation based on the gradation correction amount determined by the correction amount determination means,
The correction amount determining means is configured to set the gradation correction amount corresponding to the first or second display gradation not stored in the look-up table in the vicinity before and after the first or second display gradation not stored. A value obtained by subtracting a predetermined value from a value obtained by linear interpolation between two display gradations stored in the lookup table as a value is determined as the gradation correction amount. A display device. A plurality of video signal lines for transmitting a plurality of video signals corresponding to image signals given from the outside of the apparatus so as to indicate an image to be displayed with a predetermined display gradation, and a plurality of video signal lines intersecting the plurality of video signal lines A plurality of pixel forming portions arranged in a matrix corresponding to intersections of the scanning signal lines, the plurality of video signal lines, and the plurality of scanning signal lines, and the plurality of video signal lines and the plurality of video signal lines. A display device comprising a drive control circuit for driving a scanning signal line,
Each pixel forming part
A switching element that is turned on or off according to a signal applied to a scanning signal line passing through a corresponding intersection;
A pixel electrode connected via the switching element to a video signal line passing through a corresponding intersection;
A common electrode provided in common to the plurality of pixel formation portions;
A pixel capacitance formed by the pixel electrode and the common electrode;
An electro-optic element that displays a pixel with a display gradation corresponding to a voltage held in the pixel capacitor,
The drive control circuit includes:
A gradation for correcting the first display gradation included in the image signal corresponding to the video signal to be applied to the first video signal line connected to the pixel electrode of each pixel formation portion via the switching element. The correction amount of the pixel formation portion due to the potential change of the second video signal line and the potential change of the first video signal line arranged so that a parasitic capacitance is formed between the pixel electrode and the pixel electrode. The second correction value included in the image signal corresponding to the first display gradation and the video signal to be applied to the second video signal line includes a gradation correction amount for compensating for the variation in the holding voltage in the pixel capacitor. Table storage means for holding a lookup table stored for each of the first and second display gradations with a predetermined interval in association with the combination of display gradations;
By referring to the lookup table held in the table storage means, the second display gradation and the first display gradation at the time when the switching element changes from the conduction state to the cutoff state. Correction amount determining means for determining a gradation correction amount;
Correction means for correcting the first display gradation based on the gradation correction amount determined by the correction amount determination means,
The correction amount determining means is configured to set the gradation correction amount corresponding to the first or second display gradation not stored in the look-up table in the vicinity before and after the first or second display gradation not stored. The value is determined by nonlinear interpolation between two display gradations stored in the look-up table, which is a value, based on a mathematical expression showing a second-order or higher-order curve that approximates a curve showing an ideal change in the gradation correction amount. A display device characterized by: A plurality of video signal lines for transmitting a plurality of video signals corresponding to image signals given from the outside of the apparatus so as to indicate an image to be displayed with a predetermined display gradation, and a plurality of video signal lines intersecting the plurality of video signal lines A driving method for a display device, comprising: a scanning signal line; and a plurality of pixel forming portions arranged in a matrix corresponding to intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively.
A drive control step for driving the plurality of video signal lines and the plurality of scanning signal lines;
Each pixel forming part
A switching element that is turned on or off according to a signal applied to a scanning signal line passing through a corresponding intersection;
A pixel electrode connected via the switching element to a video signal line passing through a corresponding intersection;
A common electrode provided in common to the plurality of pixel formation portions;
A pixel capacitance formed by the pixel electrode and the common electrode;
An electro-optic element that displays a pixel with a display gradation corresponding to a voltage held in the pixel capacitor,
The drive control step includes a gradation for correcting a first display gradation indicated in a video signal to be applied to a first video signal line connected to a pixel electrode of each pixel formation portion via a switching element. The correction amount of the pixel formation portion due to the potential change of the second video signal line and the potential change of the first video signal line arranged so that a parasitic capacitance is formed between the pixel electrode and the pixel electrode. A combination of the second display gradation shown in the video signal to be applied to the first display gradation and the second video signal line as the gradation correction amount for compensating for the variation of the holding voltage in the pixel capacitor. The switching element is changed from the conductive state to the cut-off state by referring to the look-up table stored for each of the first and second display gradations with a predetermined interval in association with At the time A correction amount determining step of determining the gradation correction amount for the serial second display gradation and the first display gradation,
A correction step of correcting the first display gradation based on the gradation correction amount determined by the correction amount determination step,
The look-up table includes the display gradations having an interval smaller than the predetermined interval in a range where the change in the gradation correction amount is non-linear with respect to the change in potential corresponding to the gradation correction amount. A driving method characterized in that the gradation correction amount is stored every time.   A program for executing the driving method according to claim 13 in a predetermined computer.

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