JP3607515B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

【００８０】
（表１）から、ライナー膜としてＡｌ膜との反応性の高いＴｉ膜と、Ａｌ膜との反応性の低いＴａ膜は、高アスペクト比の接続孔での充填特性が劣化することが分かる。この結果は以下のように解釈できる。
【００８１】
まず、Ｔｉライナー膜はＡｌ膜との反応性が高いので短時間で全て反応生成物に変化する。そのため、凝集抑制能力の続く時間が短く、Ａｌ膜を接続孔内に流動させる時間を確保できなくなる。その結果、Ｔｉライナー膜は、高アスペクト比の接続孔の充填特性がライナー膜、Ｔａライナー膜に比べ低下する。
【００８２】
一方、Ｔａライナー膜はＡｌ膜との反応性が低いので、反応によってＡｌ膜の凝集を抑制する能力が元来低く、充填特性が劣化する。そして、Ｎｂライナー膜はＡｌ膜との反応時間が長く、かつ反応によってＡｌ膜の凝集を抑制する能力があるため、Ａｌ膜を接続孔内に流動させる時間を十分確保することができる。
【００８３】
その結果、高アスペクト比の接続孔を充填できるようになる。このようにＡｌリフローに用いるＮｂライナー膜は、Ａｌ膜との反応性を考慮して選ぶことが重要である。
【００８４】
さらに、リフローにおいてＡｌ膜の凝集が開始するのは、Ｎｂライナー膜とＡｌ膜の最低膜厚部である。スパッタ法を用いてＮｂライナー膜とＡｌ膜を形成した場合、接続孔の側壁近傍の底部（以下、接続孔側壁底部という）が最低膜厚部となる。
【００８５】
スパッタ法では、接続孔底部におけるスパッタ粒子が入射できる見込み角は減少し、スパッタ粒子の付着率が低下する。この見込み角は接続孔のアスペクト比で決定され、アスペクト比の高い接続孔ほど見込み角は減少し、接続孔側壁底部におけるライナー膜厚およびＡｌ膜厚は薄膜化する。
【００８６】
したがって、所望の接続孔をＮｂライナー膜を用いたＡｌリフローで確実に充填するためには、リフローの温度や時間、すなわちサーマルバジェット（基板温度と加熱時間の積）と、Ｓｉ基板上にある最大アスペクト比の接続孔底部のＮｂライナー膜厚およびＡｌ膜厚と、さらに接続孔内容積を以下のように調整することが必要になる。
【００８７】
すなわち、本実施形態のように、サーマルバジェット（基板温度と加熱時間の積）によって決まるＡｌ流動量が、加熱以前に形成されたＮｂライナー膜とＡｌ膜の占める領域を除く接続孔内容積以上である場合において、最低膜厚部のＮｂライナー膜とＡｌ膜とが反応によってそのいずれかが消滅しないように、Ｎｂライナー膜およびＡｌ膜の膜厚を調整する（第１調整）。
【００８８】
あるいは、Ａｌ流動量が加熱以前に形成されたＮｂライナー膜とＡｌ膜の占める領域を除く接続孔内容積以上となり、かつ最低膜厚部のＮｂライナー膜とＡｌ膜とが反応によってそのいずれかが消滅しないサーマルバジェットとなるように基板温度と加熱時間を調整する（第２調整）。
【００８９】
あるいは、最低膜厚部のＮｂライナー膜とＡｌ膜とが反応によってそのいずれかが消滅しないサーマルバジェットを選んだ場合において、Ａｌ流動量が加熱以前に形成されたＮｂライナー膜とＡｌ膜の占める領域を除く接続孔内容積以上となるように、接続孔内容積を調整する（第３調整）。
【００９０】
本実施形態の方法は第１調整を選択した方法であり、この場合、開口径０．３μｍ以下、アスペクト比３以上の接続孔３を第１および第２Ａｌ膜６で充填できることを確認した。
【００９１】
また、上記第１ないし第３調整は他の膜種の場合にも有効であり、その調整条件を満たすようにすれば、ライナー膜の種類に関係なく高アスペクト比の接続孔の内部を導電膜で充填することが可能となる。
【００９２】
本実施例で説明したように、Ａｌを接続孔にリフローにより充填するためには、Ｎｂライナー膜とＡｌをリフロー過程で反応させて、第１Ａｌ膜の凝集を抑制することが重要である。
【００９３】
従って、本発明のリフロー後には、必ずＮｂとＡｌとの合金であるＡｌ₃ Ｎｂが形成される。特に、Ｎｂを指向性スパッタで形成した場合、配線用溝や接続孔の側面にはＮｂは薄く形成される。従って側面のＮｂはすべてＡｌと反応してＡｌ₃ Ｎｂ層が形成され、リフロー後にはＮｂ膜が残らない場合もある。
【００９４】
しかし、同様のＡｌリフローを用いてもＡｌ₃ Ｎｂを形成させないことも可能である。例えばＮｂをスパッタした後、基板を一旦大気開放し、次いで第１Ａｌ膜を低温で形成し、第２のＡｌ膜を高温で形成しながら、リフローさせる場合である。
【００９５】
この場合、Ｎｂ表面には自然酸化膜が形成され、ＮｂとＡｌの界面にわずかなＮｂ酸化層が介在する。このＮｂ酸化層はＮｂとＡｌの反応を抑制し、Ａｌ₃ Ｎｂはほとんど形成されない。この場合、配線用溝の内面にＮｂとＡｌの合金層が形成されないため、実質的に配線溝内のＡｌ量が増加して、配線抵抗を低下させることができる。
【００９６】
しかし本実施例で説明したように、接続孔をＡｌリフローにより充填するためには、ＮｂとＡｌを反応させることが必要であり、ＮｂとＡｌの反応を抑制した場合、接続孔への充填ができない問題がある。
【００９７】
さらにＮｂとＡｌの界面にＮｂ酸化層が介在するとＡｌとＮｂの混合領域であるＡｌ₃ Ｎｂ領域がなくなり、ＮｂとＡｌの密着性が低下する。この密着性の低下はストレスマイグレーション耐性、エレクトロマイグレーション耐性の劣化につながり、信頼性を劣化させる問題もある。
【００９８】
また、クラスターツールなどの装置を使用してＮｂ、第１のＡｌ膜、第２のＡｌ膜を真空連続的に形成しても、Ｎｂ表面は酸化される。Ｎｂ表面の酸化の度合いはＮｂをスパッタ後、第１のＡｌ膜を形成するまでのウェハ搬送にかかる時間や搬送時の雰囲気真空度によって決まる。
【００９９】
本発明者の研究によれば、搬送（Ｎｂスパッタ終了時から第１のＡｌの形成開始までの雰囲気）真空度が５×１０^-5ｐａ以下、かつＮｂスパッタ終了時から第１のＡｌの形成開始までの時間が５分以内の条件であれば、第１のＡｌ膜の凝集を抑制するのに充分なＮｂとＡｌの反応が起こり、Ａｌ₃ Ｎｂは形成される。上述以外の条件の場合、Ｎｂの表面酸化層はＡｌとＮｂとの反応を抑制し、実質的にＡｌ₃ Ｎｂを形成しない。
【０１００】
従って、本発明は真空連続的にＮｂ膜、第１のＡｌ膜、第２のＡｌ膜を形成することはもちろんのこと、上述した搬送雰囲気真空度と搬送時間の条件内で行われたもので、接続孔の充填能力を高め、かつ構造上信頼性を向上できるのに充分な量のＡｌ₃ Ｎｂ層が形成できる。
【０１０１】
さらに、Ｎｂをスパッタ後大気開放する場合や、Ｎｂ膜表面の酸化層が形成される搬送条件でリフローを行う場合以外にも、Ｎｂ膜をスパッタするスパッタターゲットの純度によっても、ＡｌとＮｂの反応が抑制される場合がある。
【０１０２】
本発明者の研究によれば、９９．９％以上の純度のＮｂターゲットを用いれば、接続孔の充填能力を高め、かつ構造上信頼性を向上できるのに充分な量のＡｌ₃ Ｎｂ層が形成できる。
【０１０３】
９９．９％未満の純度のＮｂターゲットを用いた場合、ターゲットに含まれる不純物原子がＡｌと反応し、その反応層がＮｂとＡｌの反応を抑制することがある。この場合も、Ｎｂ表面に酸化層ができた場合と同様に、接続孔への充填ができず、かつＡｌ₃ Ｎｂが充分量ないため、構造上信頼性を向上させることができない。
【０１０４】
（第２の実施形態）
図５は、本発明の第２の実施形態に係る半導体装置の製造方法を示す工程断面図である。
【０１０５】
本実施形態では、第１の実施形態で説明したＮｂライナー膜を用いたＡｌリフロー法をＤＤ配線の形成方法に適用した場合について説明する。また、本実施形態では、第２調整を選択している。なお、図３と対応する部分には同一符号を付してあり、詳細な説明は省略する。
【０１０６】
まず、図５（ａ）に示すように、素子が形成されたＳｉ基板（図示せず）上にＡｌ配線１を形成する。次に、Ａｌ配線１を覆うように全面に層間絶縁膜２を形成した後、この層間絶縁膜２に接続孔３および配線溝９を形成する。
【０１０７】
次に図５（ｂ）に示すように、第１実施形態と同様の条件で、厚さ７．５ｎｍのＮｂライナー膜４、第１Ａｌ膜を形成した後、第２Ａｌ膜を形成しながら、Ｓｉ基板の加熱温度４２０℃、加熱時間３００秒の条件で、接続孔３および配線溝９の内部をＡｌリフローにより第１および第２Ａｌ膜６で充填する。なお、加熱時間は３００秒以上も可能である。
【０１０８】
最後に、図５（ｃ）に示すように、接続孔３および配線溝９の外部の余剰の第１および第２Ａｌ膜６等をＣＭＰ法を用いて研磨除去することによって、ＤＤ配線６（第２Ａｌ配線６ａとＡｌプラグ６ｂ）が完成する。
【０１０９】
一般に、接続孔３および配線溝９の内部をリフローによりＡｌ膜で充填するＤＤプロセスには、配線溝内に形成されたライナー膜と、ライナー膜とＡｌ膜との反応物による配線抵抗の増加の問題がある。
【０１１０】
配線抵抗の増加はＲＣ遅延の原因となるため、０．１８μｍの配線幅では、配線抵抗を比抵抗換算して４．６μΩ・ｃｍ未満に抑制することが望まれる。
【０１１１】
図６に、ＲＩＥによって形成した従来のＲＩＥ配線、Ｔｉライナー膜（比較例）を用いたＡｌリフローによって形成したＤＤ配線、および本実施形態のＮｂライナー膜を用いたＡｌリフローによって形成したＤＤ配線の比抵抗と配線幅の関係を示す。
【０１１２】
ここで、配線溝の深さは４００ｎｍとした。また、Ｔｉライナー膜（比較例）の膜厚はＮｂライナー膜のそれと同じ１５ｎｍとしたが、この膜厚の場合、Ｔｉライナー膜では、開口径０．３μｍ以下、アスペクト比３以上の接続孔をＡｌ膜で充填することができない。
【０１１３】
図６から、従来のＲＩＥ配線やＴｉライナー膜により形成したＤＤ配線に比べ、本実施形態のＮｂライナー膜を用いたＡｌリフローにより形成したＤＤ配線は、比抵抗の上昇が抑制されていることが分かる。
【０１１４】
また、Ｎｂライナー膜を用いたＡｌリフローにより形成されたＤＤ配線６は、ＥＭ、ＳＭ耐性に優れているという利点がある。これは、Ｎｂライナー膜４あるいは第１Ａｌ膜とＮｂライナー膜４の反応物であるＡｌＮｂ合金膜７（例えばＡｌ₃ Ｎｂ膜）はＥＭ耐性に優れているためで、ＤＤ配線６がＥＭにより断線を起こしても、電流は、Ｎｂライナー膜４あるいはＡｌＮｂ合金膜７を通じて流れ、ＤＤ配線６の断線を抑制することができるからである。
【０１１５】
また、ＤＤ配線６の場合、Ａｌ膜は層間絶縁膜の接続孔および配線溝の内部に埋め込まれるので、ＲＩＥ配線の場合に比べて、Ａｌ膜の側面と層間絶縁膜との密着性はもともと良い。
【０１１６】
しかも、本実施形態の場合、ＤＤ配線６の側面と層間絶縁膜２との界面にＡｌＮｂ合金膜７が形成され、このＡｌＮｂ合金膜７が密着層としては働くので、さらに密着性が高くなり、これによりＳＭ耐性を向上させることができるようになる。
【０１１７】
上述したようにＡｌ₃ Ｎｂ層が存在することでＥＭ，ＳＭ耐性が向上する。この信頼性の向上には、形成されるＡｌ₃ Ｎｂの形状も大きく影響する。
【０１１８】
Ｎｂ／Ａｌ積層膜を形成後、基板を加熱した場合、界面に形成されるＡｌ₃ Ｎｂ層は膜上には形成されず、粒状に形成される。
【０１１９】
Ａｌ₃ Ｎｂが粒状に形成された方が、膜状に形成される場合に比べてＡｌとの接触界面が増加する。この接触界面の増加はＡｌとＡｌ₃ Ｎｂとの密着性を高め、よりＥＭ、ＳＭ耐性を向上させる要因となっている。
【０１２０】
（第３の実施形態）
図７は、本発明の第３の実施形態に係る半導体装置の製造方法を示す工程断面図である。
【０１２１】
なお、図３（ａ）〜図３（ｅ）と対応する部分には同一符号を付してあり詳細な説明は省略する。本実施形態が第１の実施形態と主として異なる点は、Ｎｂライナー膜の代わりにＮｂＮライナー膜を用いたことにある。
【０１２２】
まず、図７（ａ）に示すように、第１の実施形態と同様に、素子が形成されたＳｉ基板（不図示）上にＡｌ配線１、層間絶縁膜２を順次形成する。次に、層間絶縁膜２に開口径０．３μｍ以下、アスペクト比３以上の接続孔３を含む複数の接続孔（以下、まとめて接続孔３という）を形成する。
【０１２３】
次に図７（ｂ）に示すように、層間絶縁膜２の表面において厚さ１５ｎｍのＮｂＮライナー膜１０を指向性スパッタ法を用いて形成する。具体的には、例えば、Ｎｂターゲットを用い、ＡｒガスとＮ₂ ガスの混合ガス雰囲気中での化成スパッタによりＮｂＮライナー膜１０を形成する。
【０１２４】
次に図７（ｃ）に示すように、Ｓｉ基板を大気に晒すことなく、厚さが例えば４００ｎｍの第１Ａｌ膜５を指向性スパッタ法により無加熱で形成する。
【０１２５】
次に図７（ｄ）に示すように、Ｓｉ基板を大気に晒すことなく、Ｓｉ基板を例えば４５０℃に加熱しながら、例えば厚さ４００ｎｍの第２Ａｌ膜を１８０〜３００秒の時間でスパッタ法により形成し、接続孔３の内部を第１および第２Ａｌ膜６で充填する。
【０１２６】
最後に、図７（ｅ）に示すように、接続孔３の外部の第１および第２Ａｌ膜６、ＡｌＮｂ合金膜７、ＮｂＮライナー膜１０をＲＩＥ法を用いて選択的に除去することにより、Ａｌコンタクト層６およびＡｌ配線層１２が完成する。
【０１２７】
ここで、ＮｂＮライナー膜１０や第１Ａｌ膜５を形成するための指向性スパッタ法には、例えば低圧−長距離スパッタ法、コリメーションスパッタ法、バイアススパッタ法、高密度プラズマスパッタ法を用いても良い。
【０１２８】
この場合も、Ａｒガス（あるいは他の希ガス）とＮ₂ ガスの混合ガス雰囲気中でスパッタを行う。
【０１２９】
本実施形態でも第１の実施形態と同様な効果が得られるが、以下に説明するようにＮｂライナー膜を用いた場合よりも以下の点で優れている。
【０１３０】
化成スパッタ法を用いた場合、ＮｂＮライナー膜中の窒化量は、スパッタ時のＡｒガス／Ｎ₂ ガスの混合比を変化させることで、容易に調整することができる。
【０１３１】
形成されたＮｂＮ膜中にはＮ原子と結合していないＮｂ原子が存在し、この未結合のＮｂ原子はＡｌ原子と反応する。したがって、ＮｂＮライナー膜中の窒化量の制御により、ＮｂＮライナー膜とＡｌ膜の反応速度を制御することができ、同一膜厚のＮｂライナー膜と比較して、凝集抑制能力を持続させることができる。
【０１３２】
従って、ＮｂＮライナー膜中の窒化量の制御により、Ａｌ膜の凝集抑制に必要な反応速度以上の反応の抑制、すなわち接続孔底部の最低膜厚部のＮｂＮライナー膜の消費量を抑制することができ、同一膜厚のＮｂライナー膜と比べて、さらに高いアスペクト比の接続孔の充填が可能となる。
【０１３３】
あるいは、同一アスペクト比の接続孔であれば、Ｎｂライナー膜よりも薄い膜厚のＮｂＮライナー膜で接続孔を充填することができる。さらに、Ｔｉライナー膜では、Ｓｉ基板の拡散領域に直接接続する接続孔に使用した場合、リフロー時の基板加熱によってアロイスパイクを発生する問題がある。
【０１３４】
そのため、Ｔｉライナー膜の形成前に、ＴｉＮ膜などの拡散バリアメタル膜を形成する必要がある。しかし、ＮｂＮライナー膜はＡｌとＳｉの拡散バリア性に優れ、Ｓｉ基板の拡散領域に直接接続する接続孔に使用した場合でも、アロイスパイク発生を防止することができる。
【０１３５】
又、ＮｂＮ膜中のＮ量をバリアメタルとして調整すると、ＮｂＮ膜中のＮｂとＡｌの反応が低下する場合がある。この場合は、Ａｌとの反応量を確保するためにＮｂＮ膜上にＮｂ膜を積層しても良い。
【０１３６】
（第４の実施形態）
図８（ａ）〜（ｃ）は、本発明の第４の実施形態に係る半導体装置の製造方法を示す工程断面図である。
【０１３７】
本実施形態では、第３の実施形態で説明したＮｂＮライナー膜を用いたＡｌリフロー法をＤＤ配線の形成方法に適用した場合について説明する。
【０１３８】
なお図１（ａ）〜（ｅ）及び図７（ａ）〜（ｅ）と対応する部分には同一符号を付してあり、詳細な説明は省略する。
【０１３９】
まず、図８（ａ）に示すように、第３の実施形態と同様に、素子が形成されたＳｉ基板（図示せず）上にＡｌ配線１、層間絶縁膜２、接続孔３および配線溝９を形成する。
【０１４０】
次に図８（ｂ）に示すように、第１の実施形態と同様の条件で、ＮｂＮライナー膜１０、第１Ａｌ膜を形成した後、第２Ａｌ膜を形成しながら、接続孔３および配線溝９の内部をＡｌリフローにより第１および第２Ａｌ膜６で充填する。
【０１４１】
最後に、図８（ｃ）に示すように、接続孔３および配線溝９の外部の余剰の第１および第２Ａｌ膜６等をＣＭＰを用いて研磨除去することによって、ＤＤ配線６（第２Ａｌ配線６ａとＡｌプラグ６ｂ）が完成する。
【０１４２】
本実施形態でも第２の実施形態と同様な効果が得られる。ただし、ＮｂＮライナー膜とＡｌ膜との反応速度は、Ｎｂライナー膜とＡｌ膜との反応速度よりも遅くできるので、ＮｂＮライナー膜１０の膜厚を薄膜化でき、配線抵抗をさらに小さくすることができる。
【０１４３】
また、接続孔３および配線溝９に形成されるＡｌＮｂ合金膜７の量も少なくでき、これより配線抵抗もさらに小さくできる。
【０１４４】
（第５の実施形態）
図９（ａ）〜（ｆ）は、本発明の第５の実施形態に係る半導体装置の製造方法を示す工程断面図である。
【０１４５】
図９（ａ）に示すように、素子（図示せず）が形成されたＳｉ基板上２１に第１層間絶縁膜２２を介して第１配線層２３を形成する。この第１配線層２３は、例えばＷ配線やＡｌ配線である。また、第１配線層２３は、ダマシン配線である。
【０１４６】
第１層間絶縁膜２２、第１配線層２３上に第２層間絶縁膜２４を形成する。ここで、第２層間絶縁膜２４は、ＴＥＯＳをソースガスに用いたプラズマＣＶＤによるＣＶＤ絶縁膜、ＨＤＰ−ＣＶＤによるＦ添加低誘電率絶縁膜、あるいは有機ＳＯＧ膜などの塗布絶縁膜である。
【０１４７】
本発明のＮｂライナーを用いたＡｌリフローを低誘電率絶縁膜、例えばＦ素添加ＳｉＯ₂ 膜や有機ＳＯＧ膜と組み合わせた場合、ＴｉやＴａをライナーに用いた場合と比較して充填能力を低下させないというプロセス上のメリットと低誘電率絶緑膜とＮｂあるいはＡｌ₃ Ｎｂ層が密着して信頼性を向上させる構造上のメリットがある。
【０１４８】
一般にＦ添加ＳｉＯ₂ 膜や有機ＳＯＧ膜は、加熱時の脱ガスが多い。脱ガスの主成分は水であり、ライナーにＴｉやＴａを用いた場合、脱離した水によってライナー材料が酸化してしまう。
【０１４９】
ライナー材料の酸化はＡｌとの反応を抑制し、第１のＡｌの凝集を抑制する効果やＡｌと低誘電絶縁膜との密着性を向上させる効果を失わせる。従って、低誘電率絶縁膜とＴｉやＴａライナーを組み合わせて用いた場合、接続孔の充填能力が大幅に低下するプロセス上の問題と、信頼性が低下する構造上の問題がある。これに対しＮｂは、ＴｉやＴａと比べて酸化物を形成する標準生成自由エネルギーが高く、酸化耐性が高い。従って、低誘電率絶縁膜から脱離した水によって変質しにくく、ライナーとしての性質を保持でき、接続孔の充填能力を向上させ、信頼性を確保することができる。
【０１５０】
次に、図９（ｂ）に示すように、第１配線層２３に接続する接続孔２５をフォトリソグラフィとＲＩＥを用いて第１層間絶緑膜２４に形成する。
【０１５１】
以下、ロード・アンロード室（試料準備室）、デガス室、逆スパッタ室、Ｎｂスパッタ室、第１Ａｌスパッタ室、第２Ａｌスパッタ室および基板冷却室を搬送室に接続したクラスターツールを用い、真空連続的にＮｂライナー膜、第１Ａｌ膜、第２Ａｌ膜を順次形成し、第１Ａｌ膜および第２Ａｌ膜を流動させて、接続孔２５の内部をＡｌで充填する方法について説明する（図９（ｃ）〜図９（ｅ））。
【０１５２】
各室間の移動は搬送室を介して行われる。まず、デガスには、静電チャック付きのＰＢＮヒーターを用いる。すなわち、ＰＢＮヒーターによって、３００〜４５０℃の温度範囲で２分以上基板を加熱することによってデガスを行う。
【０１５３】
ここで、ＰＢＮヒーターの代わりに、ハロゲンランプヒーターを使用しても良い。また、デガス室は独立排気系を持ち、デガス工程中に基板から脱離したガスで搬送室のベース真空度が劣化しないようになっている。
【０１５４】
次に逆スパッタ室内で、接続孔２５の底面に露出した第１配線層２３の表面の自然酸化膜や、接続孔２５の形成時に付着した汚れなどを逆スパッタにより除去する。逆スパッタは、平行平板型や誘導結合型などのプラズマスパッタ装置を用いて行えば良い。
【０１５５】
なお、第１配線層２３がＷ配線層などの場合には、有機アルカリ溶液による洗浄で自然酸化膜や接続孔２５の形成時に付着した汚れを除去できるため、逆スパッタを行う必要はない。
【０１５６】
次に、図９（ｃ）に示すように、接続孔２５の内面全面を被覆するように、厚さ７．５〜５０ｎｍのＮｂライナー膜２６をロングスロースパッタ法を用いて形成する。
【０１５７】
ここで、Ｎｂターゲットの直径は約３００ｍｍ、Ｎｂターゲット−基板間の距離は３００ｍｍ、投入パワーは８ｋＷ以上、そしてＡｒ圧力は０．０２〜０．１Ｐａである。
【０１５８】
また、基板は無加熱にするか、あるいはスパッタ中の基板温度上昇を避けるために基板は冷却する。
【０１５９】
次に、図９（ｄ）に示すように、接続孔２５の内面全面を被覆するように、第２Ａｌ配線層となる厚さ２５０〜７００ｎｍの第１Ａｌ膜２７をロングスロースパッタ法を用いて形成する。
【０１６０】
ここで、Ａｌターゲットの直径は約３００ｍｍ、Ａｌターゲット−基板間の距離は３００ｍｍ、投入パワーは１０ｋＷ以上、そしてＡｒ圧力は０．０１〜０．１Ｐａである。また、基板は無加熱にするか、あるいはスパッタ中の基板温度上昇を避けるために基板は冷却する。
【０１６１】
次に図９（ｅ）に示すように、Ｓｉ基板を４３０〜４９５℃に加熱しながら、第２Ａｌ配線層となる厚さ５０〜６００ｎｍの第２Ａｌ膜を標準的スパッタ法を用いて成膜速度３．３３ｎｍ／ｓｅｃでもって形成するとともに、第１および第２Ａｌ膜２８を流動させて、接続孔２５の内部を第１および第２Ａｌ膜２８で充填する。
【０１６２】
標準的スパッタ法とは、例えば直径が約３００ｍｍのＡｌターゲットを用い、ターゲット−基板間の距離を６０ｍｍに設定してスパッタを行う方法である。
【０１６３】
このとき、接続孔２５と第１および第２Ａｌ膜２８との界面には、Ｎｂライナー膜２６と第１Ａｌ膜２７との反応生成物であるＡｌＮｂ合金膜２９が形成される。
【０１６４】
ここでは、標準的スパッタ法を用いて第２Ａｌ膜を形成したが、成膜速度を同等とすれば、すなわち成膜速度を３．３３ｎｍ／ｓｅｃとすれば、ロングスロースパッタ法を用いて第２Ａｌ膜を形成しても問題はない。
【０１６５】
最後に、図９（ｅ）に示すように、第１および第２Ａｌ膜２８、ＡｌＮｂ合金膜２９、Ｎｂライナー膜２６をフォトリソグラフィとＲＩＥにより加工して、第２Ａｌ配線層３０が完成する。
【０１６６】
本発明者らの研究では、Ｎｂ膜を高いスパッタ電力で形成すれば、Ｎｂ膜の基板表面に対して垂直な軸方向（以下、基板垂直軸方向という）の＜１１０＞配向が高まることが明らかになった。さらに、＜１１０＞配向したＮｂ膜上に形成したＡｌ膜は、基板垂直方向に極めて優れた＜１１１＞配向を示すことが明らかになった。
【０１６７】
Ｘ線回折法で測定したＮｂ膜のＮｂ＜１１０＞ピークおよびＮｂ膜上に形成したＡｌ膜のＡｌ＜１１１＞ピークのロッキングカーブの半値幅のスパッタ電力依存性を示す。
【０１６８】
図１０から、スパッタ電力が高くなるにつれ、Ｎｂ＜１１０＞ピーク半値幅が小さくなり、かつＡｌ＜１１１＞ピーク半値幅も小さくなることが分かる。ピーク半値幅は小さいほどその方位の配向度が高いことを示している。
【０１６９】
＜１１０＞配向の高いＮｂ膜の表面は、（１１０）面となっており、この面のＮｂの格子定数がＡｌ（１１１）面のＡｌ格子定数と近い。その結果、Ｎｂ膜の結晶構造をＡｌ膜が引き継ぎ、Ａｌ膜は＜１１１＞に配向すると考えられる。
【０１７０】
さらに、図１０によると、直径２００ｍｍのウェハのセンター部分に比較して、エッジ部分ではＮｂ＜１１０＞配向性、Ａｌ＜１１１＞配向性ともに劣化していることが分かる。
【０１７１】
これは、Ｎｂスパッタ粒子の進行方向が、基板表面に対して垂直な軸に対して傾いていることに依存すると考えられる。Ｎｂ膜の形成に用いたロングスロースパッタ法は、ウェハ面積に対してターゲット面積が十分大きくない場合、スパッタ粒子の進行方向に非対称性があり、ウェハーエッジでは斜め入射成分が増加する。
【０１７２】
この斜め成分がＮｂ膜の配向性を劣化させ、ひいてはＡｌ膜の配向性を劣化させるものと考えられる。しかし、このウェハ面内の配向性のばらつきも、スパッタ電力を大きくするにつれて緩和される。
【０１７３】
Ａｌ配線では＜１１１＞配向性が高いほど、エレクトロマイグレーション耐性に優れる。これは、＜１１１＞配向性の高いＡｌ膜では拡散係数の大きい不安定な結晶粒界が減少するためである。
【０１７４】
図１１に、Ａｌ＜１１１＞配向度とＥＭ信頼性との関係を示す。縦軸は、高温、高電流密度の加速試験下でＡｌ配線が断線に至るまでの寿命を示している。
【０１７５】
＜１１１＞配向性が高いほど、つまり半値幅が小さいほど、Ａｌ配線のＥＭ耐性は向上することが分かる。Ａｌ＜１１１＞ピーク半値幅ωとＥＭライフタイムτとの間には、経験的にτ∝（１／ω）² の関係がある。
【０１７６】
なお、図中、黒丸は、従来からＬＳＩのＡｌ配線の下地材料に用いられているＴｉ／ＴｉＮ膜上でのＡｌ配線の配向度を示している。
【０１７７】
図１０および図１１によると、Ｎｂライナー膜を８ｋＷ以上のスパッタ電力でスパッタ形成すれば、ウェハ全面において従来のＡｌ配線より高い配向度が得られることが分かる。
【０１７８】
言い換えれば、Ｎｂ＜１１０＞ピーク半値幅が５．２１゜以下であれば、Ａｌ＜１１１＞ピーク半値幅が、１．９２以下になり、従来のＡｌ配線より高い配向度が得られることが分かる。
【０１７９】
ところで、スパッタ電力は電圧と電流との積であり、ターゲット径、ターゲット−基板距離、Ａｒ圧力によって変化するため、Ｎｂ膜やＡｌ膜の配向性に対して一義的なパラメータではない。
【０１８０】
Ｎｂ膜が＜１１０＞配向するのは、Ｎｂスパッタ時のＮｂ膜の成長過程に起因している。すなわち、Ａｒ⁺ イオンによってターゲットから放出した運動エネルギーを持ったＮｂ粒子（Ｎｂスパッタ粒子）は、基板に衝突する際、その運動エネルギーのために基板上を移動する。
【０１８１】
したがって、この移動距離が大きいほどＮｂは安定なサイトに移動することが可能となり、安定結晶面である（１１０）面を表面化しながら成長できる。すなわち、飛来するＮｂ粒子が持つ運動エネルギーが大きいほど、Ｎｂは＜１１０＞配向できる。
【０１８２】
このＮｂ粒子の運動エネルギーは、ターゲットに印加された負の電圧に引き込まれるため、ターゲットに加える電圧の絶対値が大きいほど、Ｎｂの運動エネルギーは大きくなる。
【０１８３】
図１２に、スパッタ電圧（ターゲット電圧）との関係を示す。スパッタ電力が大きくなるほど、スパッタ電圧の絶対値も高くなることが分かる。
【０１８４】
また、図１０、図１１および図１２から、ターゲット電圧を−３８０Ｖ以下に設定することにより、Ａｌ＜１１１＞配向度を従来のＡｌ配線のそれよりも高くできることが分かる。
【０１８５】
一般に、スパッタ電力を増加させると、成膜速度は速くなる。本実施形態のように、厚さ７．５〜５０ｎｍという薄いＮｂライナー膜２６の場合、大きいスパッタ電力でＮｂライナー膜２６を形成すると、スパッタ速度が速いために正確な膜厚制御を行えなくなる。
【０１８６】
その結果としてウェハ同士間で膜厚が異なったり、あるいは同じウェハでも面内で膜厚のばらつきが生じるという問題が起こる。
【０１８７】
図１３に、Ｎｂ膜を形成する際のスパッタ電力とスパッタ速度（成膜速度）との関係を示す。スパッタ電力を増加させても、スパッタ速度はそれに比例して大きくはならず、飽和する傾向を示すことが分かる。
【０１８８】
Ｎｂ〈１１０〉配向性が実用的となるターゲット電圧−３８０Ｖ以上に対応するスパッタ電力においても、１〜１．３ｎｍ／ｓｅｃ程度のスパッタ速度であり、膜厚７．５〜５０ｎｍの成膜でも十分制御性がある。
【０１８９】
本発明者らの研究によれば、基板に衝突するＮｂ粒子の運動エネルギーを大きくすることが配向性を向上させる本質であるため、運動エネルギーをターゲット電圧で制御することに限定されない。
【０１９０】
すなわち、スパッタではＮｂ粒子の一部は陽イオン化しており、基板側に負の電圧を加えれば、ターゲット電圧を高くしなくても、イオン化したＮｂ粒子は基板に加速して引き込まれるため、Ｎｂ粒子の運動エネルギーが大きくなる。
【０１９１】
イオン化効率を誘導結合型プラズマなどによって高めればより効果がある。このような方法を用いてもＮｂライナー膜２６を高配向化することが可能であり、ひいては第２Ａｌ配線層３０の配向性が向上し、配線信頼性も向上する。
【０１９２】
しかしながら、基板にバイアスを印加して一部イオン化したＮｂ粒子を引き込み、配向性を向上させる場合には、以下のことに注意する必要がある。例えば、バイアススパッタ法のように基板にバイアスを印加した場合、イオン化したスパッタガスのＡｒも基板に引き込まれ、Ｎｂライナー膜２６中に取り込まれる。
【０１９３】
Ｎｂライナー膜２６中に取り込まれたＡｒは、後工程のリフローの加熱工程、あるいは第２Ａｌ配線層３０の形成後のシンター工程などの熱処理により、Ｎｂライナー膜２６から放出される。
【０１９４】
Ｎｂライナー膜２６と第２Ａｌ配線層３０との界面で剥離が生じる。このような剥離を防止するためには、Ａｒ流量を減少させてＮｂライナー膜２６中に取り込まれたＡｒ量を減少させるなどの調整が必要である。
【０１９５】
また、バイアススパッタ法によるＮｂ膜の形成では、基板にＲＦ電力を投入する機能が必要になり、装置コストが増加する。また、バイアススパッタ法は成膜とエッチングが同時に起こる成膜手法であり、成膜速度が低下しスループットが低下する。
【０１９６】
さらに成膜初期から基板バイアスを印加してエッチングを行うと、層間絶縁膜（ＳｉＯ₂ 膜）の一部がエッチングされ、エッチングされたＳｉＯ₂ がＮｂライナー膜２６に取り込まれ、Ｎｂライナー膜２６の膜質を劣化させる可能性がある。
【０１９７】
これらの観点から、ターゲットの電圧調整だけでＮｂライナー膜２６を高配向化でき、かつ第２Ａｌ配線層３０の配向性を向上させることができる本実施形態の方法は、バイアススパッタ法や、基板バイアスを印加してＮｂイオンを引き込む方法に比べて、簡単な方法といえる。
【０１９８】
この他にも、Ｎｂスパッタ時のガス圧力を低下させることも、ターゲットに印加する電圧の絶対値を増加させるのに有効である。
【０１９９】
例えば、ターゲット径３００ｍｍ、ターゲット−基板間距離３００ｍｍのロングスパッタにおいて、スパッタ電力が２ｋＷのとき、０．０５３ＰａのＡｒ圧力ではターゲット電圧は、−３３０Ｖであるが、０．０２６ＰａのＡｒ圧力ではターゲット電圧は、−３９７Ｖまでその絶対値が増加する。
【０２００】
この０．０２６ＰａのＡｒ圧力、ターゲット電圧−３９７ＶのときのＡｌ＜１１１＞ピーク半値幅は１．４゜であり、これはＥＭ耐性を向上させるのに十分高い配向性である。
【０２０１】
また、ロングスロースパッタでは、Ａｒガス圧力を低下させると、ＡｒガスによるＮｂスパッタ粒子の散乱が抑制されるため、Ｎｂスパッタ粒子の指向性が高まる。
【０２０２】
アスペクト比の高い接続孔２５では、接続孔側壁底部にまでＮｂライナー膜２６を形成することが必要である。Ｎｂスパッタ粒子の指向性を高めることは接続孔側壁底部へのＮｂスパッタ粒子の入射確率を増加させ、その結果として高アスペクト比の接続孔のＡｌ充填が可能になる。
【０２０３】
さらに、Ｎｂスパッタ粒子の運動エネルギーを大きくすることは、接続孔２５へのＡｌ充填特性も向上させる。すなわち、高い運動エネルギーを有するＮｂスパッタ粒子で形成されたＮｂライナー膜２６を用いたほど、より高いアスペクト比の接続孔２５まで第２Ａｌ配線層３０で充填できる。
【０２０４】
図１４に、Ｎｂスパッタ電力と、Ａｌ充填が可能な接続孔のアスペクト比の最大値（以下、Ａｌ充填限界アスペクト比という）との関係を示す。
【０２０５】
Ｎｂスパッタ電力が大きくなるほど、Ａｌ充填限界アスペクト比が大きくなっていることが分かる。Ｎｂライナー膜２７は、第１および第２Ａｌ膜２８の凝集を抑制するために形成する。
【０２０６】
そのため、接続孔２５の側面や底部に形成されることが必要になる。前述したように、Ｎｂスパッタ粒子の運動エネルギーを大きくした場合、基板におけるＮｂスパッタ粒子の移動が促進されるため、接続孔２５の内面のＮｂライナー膜２６の被覆性が向上する。
【０２０７】
Ｎｂライナー膜２６の被覆性の向上は、接続孔側壁底部で起こりやすい第１および第２Ａｌ膜２８の凝集を抑えることができ、Ａｌリフローによって充填できる接続孔２５のアスペクト比を高める。
【０２０８】
また、Ａｌ（１１１）面はその表面エネルギーがＡｌの他の結晶面と比べて最も低く、Ａｌ原子の拡散が膜表面で活発化するため、＜１１１＞配向したＡｌ膜はその流動性が高まる。
【０２０９】
したがって、Ｎｂスパッタ粒子の運動エネルギーを高めることにより、接続孔２５の内面のＮｂライナー膜２６の被覆性およびＡｌ流動性を向上させることができ、その相乗効果としてＡｌ充填特性が大幅に向上し、アスペクト比の高い接続孔２５の内部を第１および第２Ａｌ膜２８で容易に充填できるようになる。
【０２１０】
図１９に、Ｎｂ膜を−３８０Ｖ以下のターゲット電圧でスパッタ形成し、次にＮｂ膜上にＡｌ膜を無加熱で形成し、次に４５０℃の熱処理を行った場合のＡｌ＜１１１＞配向性の時間変化を示す。
【０２１１】
熱処理は、基板を加熱することによって行った。Ａｌ膜の配向性は熱処理時間が長くなるほど向上していることが分かる。すなわち、高配向したＮｂ膜上に無加熱で形成したＡｌ膜は、形成初期には配向性が低く、熱処理過程でＮｂ格子情報をＡｌが受け継ぐことにより、配向性が向上するものと考えられる。
【０２１２】
したがって、高配向化したＮｂ膜上に無加熱で形成したＡｌ膜を高配向化するには、Ａｌ膜の形成後に熱処理を行うことが不可欠である。ここでは、無加熱でＡｌ膜を形成した後に熱処理を行った場合について説明したが、基板を加熱しながらＡｌ膜を形成した場合にも同様に高配向化の効果が得られた。
【０２１３】
ただし、基板を加熱する場合、無加熱の場合に比べて、Ｎｂ膜の表面が酸化しやすいので、装置の真空度などを制御する必要がある。
【０２１４】
（第６の実施形態）
図１５は、本発明の第６の実施形態に係る半導体装置の製造方法を示す工程断面図である。図９と対応する部分には同一符号を付してあり、詳細な説明は省略する。
【０２１５】
まず、図１５（ａ）に示すように、第５の実施形態と同様に、素子（図示せず）が、形成されたＳｉ基板２１上に、第１層間絶縁膜２２、第１配線層２３、第２層間絶縁膜２４、接続孔２５を形成する。次に、図１５（ｂ）に示すように、フォトリソグラフィとＲＩＥにより第２層間絶縁膜２４に第２配線層用の配線溝３１を形成する。
【０２１６】
次に、図１５（ｃ）に示すように、第５の実施形態で説明したようなクラスターツールを用い、第５の実施形態と同様な条件でデガス（ＤＥＧＡＳ）、逆スパッタ、Ｎｂスパッタ、第１Ａｌスパッタおよび第２Ａｌスパッタを行って、接続孔２５および配線溝３１の内部をＮｂライナー膜２６を介して第１および第２Ａｌ膜２８で充填する。
【０２１７】
最後に、図１５（ｄ）に示すように、接続孔２５および配線溝３１の外部の第１および第２Ａｌ膜２８をＣＭＰにより除去して、第１および第２Ａｌ膜２８からなる第２Ａｌ配線層（Ａｌデュアルダマシン配線）３２が完成する。
【０２１８】
第５の実施形態では、高いスパッタ電力を用いてスパッタ形成したＮｂライナー膜は＜１１０＞配向し、この高配向したＮｂライナー膜上のＡｌ配線層は高い＜１１１＞配向を示すことを説明した。
【０２１９】
しかし、本実施形態のようなダマシン型配線の場合、第２Ａｌ配線層３２は、２側面（接続孔側面と配線溝側面）に対して垂直な軸方向、および１底面（配線溝底面）に対して垂直な軸方向に＜１１１＞配向する可能性がある。
【０２２０】
図１６に、配線溝が複数並んだ基板上でのＮｂスパッタ電力とＡｌ＜１１１＞配向との関係を示す。
【０２２１】
配線溝上のＡｌ膜もスパッタ電力が増加するにつれて、基板の垂直軸方向、即ち、配線溝に対して垂直な軸方向に高い＜１１１＞配向を示すことが分かる。
【０２２２】
すなわち、２側面からの配向よりも基板表面や配線溝底面の配向が支配的であり、配線溝内のＡｌ膜の配向性も８ｋＷ以上でＮｂ膜をスパッタすれば、高い信頼性が得られる。
【０２２３】
特に、ロングスロースパッタ法のような指向性スパッタ法でＡｌ膜を形成した場合には、配線溝の側面にＡｌ膜は薄く、基板表面や配線溝底面のＡｌ膜は厚くなる。
【０２２４】
したがって、コンフォーマルに形成されるＣＶＤ法によるＡｌ膜と比べて、より基板表面や配線溝底面からの配向が支配的となり、側面からの配向の影響を軽減できる。
【０２２５】
また、ダマシン配線の場合、２側面と１底面にＮｂライナー膜２６、あるいはＡｌＮｂ合金膜２９／Ｎｂライナー膜２６が存在する。これらは第２Ａｌ配線層が断線した場合に導通が可能となる補償導線として機能するため、ＥＭ耐性の向上に寄与する。
【０２２６】
したがって、高配向Ａｌ膜の効果と補償導線の効果を組み合わせるとその相乗効果により、Ａｌデュアルダマシン配線（以下、単にダマシン配線という）３２のＥＭ耐性は著しく向上する。
【０２２７】
さらに、Ｎｂライナー膜２６と第１Ａｌ膜２７とは反応してＡｌＮｂ合金膜２９を形成するため、ダマシン配線３２の密着性が向上する。密着性に優れる界面ではＡｌの拡散係数が低くなるため、Ａｌ・ＤＤ配線３２のＳＭ耐性は著しく向上する。
【０２２８】
第５の実施形態で説明したように、＜１１１＞高配向したＡｌ膜中には拡散係数の大きい不安定な結晶粒界が減少するため、ＳＭ耐性も向上する。
【０２２９】
したがって、高配向Ａｌ膜の効果と密着性の効果を組み合わせるとその相乗効果により、ダマシン配線３２のＥＭ耐性は著しく向上する。
【０２３０】
図１０では、配線溝上のＡｌ配向性を平均化して評価したが、本発明者らは，さらにダマシン配線の長手方向に対して垂直面および平行面のＡｌ配向性を詳細に調べた。
【０２３１】
図１７に、Ｘ線回折法によってダマシン配線３２の長手方向（以下、配線長手方向という）と平行な方向にＸ線を入射した場合に得られるダマシン配線３２のＡｌ＜１１１＞ピークのロッキングカーブの半値幅（Ａ）と、Ｘ線回折法によって配線長手方向と垂直な方向にＸ線を入射した場合に得られるダマシン配線３２のＡｌ＜１１１＞ピークのロッキングカーブの半値幅（Ｂ）とを示す。
【０２３２】
配線長手方向と平行な方向にＸ線を入射した場合（ｘ軸）、配線長手方向に対して平行な方向に関してＡｌ＜１１１＞配向のばらつきを測定できる。
【０２３３】
一方、配線長手方向と垂直な方向にＸ線を入射した場合（ｙ軸）、配線長手方向に対して垂直な方向に関してＡｌ＜１１１＞配向のばらつきを測定できる。
【０２３４】
ｙ軸にＸ線を入射した場合の方が、ｘ軸方向にＸ線を入射した場合よりも、Ａｌ＜１１１＞ピークのロッキングカーブの半値幅が大きいことが分かる。これは、配線溝側面からのＡｌ配向により、基板垂直幅方向のＡｌ＜１１１＞配向が配線長手方向に退位して垂直な方向でずれが生じているものと考えられる。
【０２３５】
Ｌ／Ｓ（ライン／スペース：ラインが配線溝に対応）が１．０μｍ／１．０μｍよりも０．２５μｍ／０．２５μｍの方がＡｌ＜１１１＞ピークのロッキングカーブの半値幅が大きくなっていることが分かる。
【０２３６】
これは、図１７に示した実験に用いた試料では、１．０μｍ／１．０μｍのＬ／Ｓの場合、配線溝側面よりも配線溝底面の方がダマシン配線との接触面積が広いために、配線溝底面からの配向が支配的になっていると考えられる。
【０２３７】
しかし、０．２５／０．２５μｍのＬ／Ｓの場合、配線溝底面よりも配線溝側面での接触面積が広いために側面の影響をより受け、ｙ軸にＸ線を入射した場合のＡｌ＜１１１＞配向がばらつくと考えられる。
【０２３８】
このようにダマシン配線の場合、配線溝側面の影響により配線長手方向に対して垂直な面ではＡｌ＜１１１＞方位にずれが生じる傾向がある。また、このような配向性のずれは配線幅が微細化するほど顕著となる。
【０２３９】
配線信頼性の観点からは、特にＥＭ耐性を向上させるためには、基板垂直軸方向にＡｌ＜１１１＞配向させ、拡散係数の大きい不安定粒界をなるべく減少させることが好ましい。
【０２４０】
しかし、ダマシン配線の場合、配線長手方向に対して垂直面での配向性のずれは、配線溝の側面の影響を受けているためにランダムなばらつきではなく、かつ配線長手方向に対して平行な垂直面での配向性は確保されているため、不安定粒界が増加せず、ＥＭ耐性劣化の問題は生じない。
【０２４１】
また、高配向したＡｌ膜を熱処理すると突発的に結晶粒が隆起する形状のヒロックが生じやすいことが知られている。これは、配向性の高い多数の結晶粒に囲まれた配向性の低い少数の結晶粒があると、その配向性の低い結晶粒に応力が集中して、突発的なヒロックが発生すると考えられる。
【０２４２】
このようなヒロックはひいては配線の短絡を招く。この問題に対して、配線長手方向に対して垂直な面でＡｌ配向性がずれるダマシン配線は、結晶粒の応力を分散させることが可能であり、突発的に発生するヒロックを防止できる。
【０２４３】
このような各軸方向に対するＡｌ配向性のずれは、Ｎｂを高配向させた本発明で顕著化し、ストレスマイグレーションに対する耐性が向上することが初めて明らかになった。
【０２４４】
したがって、ｙ軸にＸ線を入射した場合の方が、ｘ軸方向にＸ線を入射した場合よりもＡｌ＜１１１＞ピークのロッキングカーブの半値幅が大きいダマシン配線を形成することによって、配線短絡という問題を回避でき、また上述したようにＥＭ耐性劣化の問題もないので、信頼性を向上することができる。
【０２４５】
なお、本発明は、上記実施形態に限定されるものではない。
【０２４６】
例えば、第１〜第４の実施形態では、Ｎｂライナー膜あるいはＮｂＮライナー膜を指向性スパッタ法により形成し、第１Ａｌ膜を無加熱で指向性スパッタ法により形成し、次いで第２Ａｌ膜を加熱しながらスパッタ法で形成する方法について説明した。
【０２４７】
しかし、Ｎｂライナー膜あるいはＮｂＮライナー膜を形成した後、１層のＡｌ膜を加熱しながらスパッタ法で形成しても良い。
【０２４８】
何故なら、Ｎｂライナー膜あるいはＮｂＮライナー膜があるため、加熱しながらＡｌ膜を形成してもＡｌ膜はＮｂライナー膜あるいはＮｂＮライナー膜との反応により、凝集が抑制され、リフローにより充填することができるためである。
【０２４９】
また、第１〜第４の実施形態では、Ｎｂ膜あるいはＮｂＮ膜を指向性スパッタ法により形成し、第１Ａｌ膜を無加熱で指向性スパッタ法により形成し、次いで第２Ａｌ膜を加熱しながらスパッタ法で形成する方法について説明したが、第１Ａｌ膜をＣＶＤで形成しても良い。
【０２５０】
何故なら、Ｎｂライナー膜あるいはＮｂＮライナー膜があるため、ＣＶＤでＡｌ膜を形成してもＡｌ膜は連続膜となり、かつＣＶＤはコンフォーマルに成膜できるため、接続孔底部におけるＡｌ膜厚を厚膜化できる。
【０２５１】
しかし、有機原料ガスを用いたＣＶＤにより形成されたＡｌ膜は、カーボンなどの不純物が混入し、配線層の信頼性が低下するという問題がある。この場合には、ＣＶＤ法により第１Ａｌ膜を薄く形成し、次にスパッタ法により第２Ａｌ膜を厚く形成すれば、信頼性の低下を招くことなく所望の厚さの配線層を形成できる。
【０２５２】
また、第１〜第４の実施形態では、Ｎｂ膜あるいはＮｂＮ膜を指向性スパッタ法により形成する方法について説明したが、Ｎｂ膜あるいはＮｂＮ膜をＣＶＤで形成しても良い。
【０２５３】
その理由は以下の通りである。スパッタ法では、接続孔底部のＮｂ膜あるいはＮｂＮ膜が薄膜化する。したがって、接続孔底部におけるＡｌ凝集抑制に必要なＮｂ膜あるいはＮｂＮ膜厚を確保するため、配線溝内面には不必要なＮｂ膜あるいはＮｂＮ膜が厚く形成される。
【０２５４】
このＮｂ膜あるいはＮｂＮ膜は配線部の実質的Ａｌ断面積を低下させ、配線抵抗の増加を招く。
【０２５５】
一方、ＣＶＤ法では、接続孔や配線溝にＮｂ膜あるいはＮｂＮ膜をコンフオーマルに形成できるため、膜厚が薄くなりやすい接続孔底部にＮｂ膜あるいはＮｂＮ膜を厚く形成できる。
【０２５６】
これにより配線溝内面にＮｂ膜あるいはＮｂＮ膜を必要以上に形成しなくて済むので、配線抵抗の増加より効果的に防止できる。また、室温で蒸気圧の高い弗化Ｎｂにより、Ｎｂ膜は容易にＣＶＤを行うことができる。
【０２５７】
また、ＮｂＮ膜は、弗化Ｎｂとアンモニアとの混合ガスを用いれば形成することができ、その混合比を調節することにより、ＮｂＮ膜の窒化量を制御することができる。
【０２５８】
さらに、ＮｂＮ膜はＮｂ膜を形成した後に後窒化により形成しても良い。後窒化には、Ｎ₂ やＮＨ₃ などの雰囲気中で熱処理する熱窒化やプラズマ下でＮ⁺ イオンをＮｂ膜に照射するプラズマ窒化などがある。
【０２５９】
特にプラズマ窒化では、Ｓｉ基板を低温にできる。また、ＤＤ構造では、接続孔内面より配線溝内面の方がＮ⁺ イオンの衝突確率が高いため、配線溝内面に形成されたＮｂ膜を優先的に窒化できる。
【０２６０】
配線部におけるＮｂ膜とＡｌ膜の反応生成の生成量を少なくでき、配線抵抗を低下できる。この時、Ｎ⁺ イオンの衝突確率は、ガス圧で調節すれば良い。
【０２６１】
また、第１〜第４の実施形態では、Ｓｉ基板を４５０℃に加熱しながらＡｌ膜をリフローさせたが、Ｓｉ基板の加熱を複数のステップに分けてＡｌ膜をリフローさせても良い。
【０２６２】
例えば、リフローの前半を低温で行い、リフローの後半を高温で行う。このような２ステップ加熱によれば、リフロー前半時が低温であることから、Ｎｂ膜あるいはＮｂＮ膜とＡｌ膜との反応が抑制され、Ａｌ膜の凝集が抑制される。
【０２６３】
ここで、リフローの前半時は低温時であることから、Ａｌ膜の流動量は減小するので、接続孔の内部のＡｌ膜中にはボイドが残存してしまう。特に層間絶縁膜として低誘電率の絶縁膜を用いた場合には、絶縁膜からガスが放出され、ボイドの残存が起こりやすい。
【０２６４】
しかし、流動したＡｌ膜により接続孔の内面上のＡｌ膜の膜厚は増加しているため、次に高温でリフローを行ってもＡｌ膜の凝集は起こらず、残存したボイドをＡｌ膜で完全充填することができる。
【０２６５】
また、上述したように層間絶縁膜として特に脱ガスの多い低誘電率の絶縁膜を用いた場合、絶縁膜からのガスの放出によりＡｌ流動性が低下してボイドが残存しやすいが、リフローの前半を低温で行えば、絶縁膜から放出されるガス量を少なくでき、これにより放出ガスによるＡｌ表面の汚染が抑制されてＡｌ表面は活性な状態を保持することができる。
【０２６６】
したがって、低温リフロー時にボイドが残存しても、後半の高温リフローにおいてボイドを容易に充填することができるようになる。したがって、このような多ステップ加熱でリフローを行えば、一定温度の加熱でのリフローを行う場合よりも、さらに高いアスペクト比の接続孔をＡｌ膜で充填できる。
【０２６７】
また、第１〜第４の実施形態では、ライナー膜としてＮｂ膜あるいはＮｂＮ膜をＳｉ基板上に直接形成しているが、Ｓｉ基板との反応を抑制したり、コンタク卜抵抗を下げるためには、例えば図１８に示すように、ＮｂＮ膜、ＴｉＮ膜、Ｎｂ膜、Ｔｉ膜、Ｎｂ膜とその上に形成されたＮｂＮ膜からなるＮｂ／ＮｂＮ膜、あるいはＴｉ膜とその上に形成されたＴｉＮ膜からなるＴｉ／ＴｉＮ膜を下地として形成すると良い。
【０２６８】
ここで、ライナー膜としてバリア性のあるＮｂＮ膜を用いた場合には、下地としてバリアメタル膜を形成する必要は基本的にはない。しかし、窒化量の少ないＮｂＮ膜はバリア性が低下し、必ずしもバリア性を確保できない。
【０２６９】
例えばＡｌ膜との反応速度を少し遅くするためにＮｂ膜を窒化する場合、必ずしもバリア性を確保できない。このような場合、ＮｂＮ膜の下層にバリア性のあるＮｂＮ膜やＴｉＮ膜を形成すれば良い。
【０２７０】
その他、本発明の要旨を逸脱しない範囲で、種々変形して実施できる。
【０２７１】
【発明の効果】
以上説明したように本発明の半導体装置及びその製造方法は、半導体基板の一主面上の層間絶縁膜に形成された接続孔内にＡｌ配線層を埋設する配線構造であって、前記接続孔内側と前記Ａｌ配線層との間に少なくともＮｂライナー膜及びＮｂＡｌ合金膜を用いることにより従来の配線構造に比べ、前記接続孔内の配線抵抗の増加、ＥＭ耐性の低下を防止できるとともに、Ａｌの段切れ、凝集を防ぎＡｌ配線層の前記接続孔との密着性を高めることができる。
【０２７２】
また、本発明によれば、Ｎｂライナー膜またはＮｂＮライナー膜を用いることにより、アスペクト比を高くしても、貫通孔の内部を配線抵抗の増加およびＥＭ耐性の低下を防止できるＡｌ配線層で充填できる半導体装置の製造方法を実現できるようになる。
【０２７３】
また、本発明によれば、ダマシン配線の所定の面におけるＡｌ＜１１１＞配向性を低くすることにより、ヒロックの発生およびＥＭ耐性の劣化を防止でき、もって信頼性の高いダマシン配線を有する半導体装置を実現できるようになる。
【図面の簡単な説明】
【図１】本発明の第１の実施形態に係る半導体装置の製造方法を示す各工程断面図。
【図２】半導体装置の製造工程におけるリフローの充填特性の劣化を説明するための図。
【図３】半導体装置の製造工程におけるライナー膜の凝集抑制能力がライナー膜とＡｌ膜の反応に関係していることを説明するための図。
【図４】Ｔａ膜およびＮｂ膜の各膜上にそれぞれＡｌ−Ｃｕ０．５ｗｔ％膜を真空連続で形成した試料を１時間熱処理した場合の熱処理温度とシート抵抗上昇率との関係を示す図。
【図５】本発明の第２の実施形態に係る半導体装置の製造方法を示す工程断面図。
【図６】ＲＩＥによって形成した従来の配線、Ｔｉライナー膜を用いたリフローによって形成した配線、およびＮｂライナー膜を用いたリフローによって形成した配線の比抵抗と配線幅の関係を示す図。
【図７】本発明の第３の実施形態に係る半導体装置の製造方法を示す工程断面図。
【図８】本発明の第４の実施形態に係る半導体装置の製造方法を示す工程断面図。
【図９】本発明の第５の実施形態に係る半導体装置の製造方法を示す工程断面図。
【図１０】Ｘ線回折法で測定したＮｂ＜１１０＞ピークおよびＡｌ＜１１１＞ピークのロッキングカーブの半値幅のスパッタ電力依存性を示す図。
【図１１】Ａｌ＜１１１＞配向度とＥＭ信頼性との関係を示す図。
【図１２】スパッタ電力とスパッタ電圧との関係を示す図。
【図１３】Ｎｂ膜を形成する際のスパッタ電力とスパッタ速度（成膜速度）との関係を示す図。
【図１４】Ｎｂスパッタ電力とＡｌ充填限界アスペクト比との関係を示す図。
【図１５】本発明の第６の実施形態に係る半導体装置の製造方法を示す工程断面図。
【図１６】配線溝が複数並んだ試料上でのＡｌ＜１１１＞配向とスパッタ電力との関係を示す図。
【図１７】Ｘ線回折法によって配線長手方向と平行な方向および垂直な方向にＸ線を入射して得られたダマシン配線のロッキングカーブを示す図。
【図１８】本発明の半導体装置の要部の構成の変形例を説明するための断面図。
【図１９】Ｎｂ膜を−３８０Ｖ以下のターゲット電圧で形成し、次にＮｂ膜上にＡｌ膜を無加熱で形成し、次に４５０℃の熱処理を行った場合のＡｌ＜１１１＞配向性の時間変化を示す図。
【図２０】従来のＷ−ＣＶＤ技術を用いて形成した多層Ａｌ配線の部分断面図。
【図２１】従来のＡｌリフロー技術を用いて形成した多層Ａｌ配線の部分断面図。
【符号の説明】
１…Ａｌ配線
２…層間絶縁膜
３…接続孔
４…Ｎｂライナー膜
５…第１Ａｌ膜
６…第１および第２Ａｌ膜、Ａｌコンタクト層、ＤＤ配線
６ａ…第２Ａｌ配線
６ｂ…Ａｌプラグ
７…ＡｌＮｂ合金膜
８…反応生成物
９…配線溝
１０…ＮｂＮライナー膜[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a wiring structure in which an Al wiring layer is embedded in an interlayer insulating film, and a method for manufacturing the same.
[0002]
[Prior art]
Conventionally, Al wiring is often used in semiconductor devices, and recently, Al wiring using Al alloy (hereinafter collectively referred to as Al and Al alloy) as a main component is mainly used. ing.
[0003]
In particular, Al is laminated on a barrier metal film such as a TiN film for suppressing the reaction with the lower layer material, or an antireflection film for suppressing irregular reflection of light in the photolithography process is laminated on the Al film. Al wiring (Al-RIE wiring) having a laminated structure formed by etching these laminated films by RIE is often used.
[0004]
However, this type of Al-RIE wiring has a problem that due to the presence of the barrier metal film and the antireflection film, the substantial Al cross-sectional area in the wiring cross-sectional area is reduced and the wiring resistance is increased.
[0005]
In addition, since the RIE reaction product is deposited on the wiring sidewall during the RIE process of the Al film, there is a problem that the Al cross-sectional area becomes smaller. Further, as the degree of integration of LSI increases, it is necessary to increase the number of Al wirings, and a plug forming technique for connecting upper and lower Al wirings has become essential.
[0006]
One conventional plug forming technique is W (tungsten) -CVD technique with good step coverage. FIG. 20 shows a cross-sectional view of a conventional multilayer Al wiring formed by using the W-CVD technique.
[0007]
In the figure, a two-layer Al wiring in which the first Al wiring 81 is connected to the second Al wiring 83 via the W plug 82 is shown. The first and second Al wirings 81 and 83 are respectively formed on the TiN / Ti barrier metal film 84, and the upper surfaces of the first and second Al wirings 81 and 83 are respectively covered with a TiN antireflection film 85.
[0008]
In the figure, reference numerals 86 and 87 denote a first interlayer insulating film and a second interlayer insulating film, respectively. There are two types of W-CVD techniques: “entire deposition” and “selective deposition”. “Overall deposition” is a method of depositing a W film over the entire surface of the substrate including the connection holes.
[0009]
On the other hand, “selective deposition” is a method of selectively depositing a W film only on the bottom surface of the connection hole. Both can be realized under different thermal conditions, but in the case of “selective deposition”, the inside of the connection hole can be filled with a W film in one step, whereas in the case of “entire deposition”, the W outside of the connection hole can be used as a subsequent step. An etch-back process and a CMP process for removing the film are required.
[0010]
By the way, the W plug formed by using the above-described W-CVD technique has a problem of high resistance and a problem of poor EM (electromigration) resistance.
[0011]
EM is a phenomenon in which Al atoms move due to collision of electrons when a current flows through an Al wiring. W is a material that is less likely to cause EM than Al. Therefore, when the upper and lower Al wirings are connected by W plugs, the W plugs function as an EM diffusion barrier, Al accumulation occurs upstream of the Al atomic flow, and Al depletion occurs downstream.
[0012]
This kind of Al accumulation and Al depletion cause hillocks and voids, respectively, which in turn leads to a short circuit between wires and a wire breakage. Such a problem of EM resistance also exists in the aforementioned Al-RIE wiring.
[0013]
That is, in this type of Al wiring, there is a problem that Al <111> orientation is low and EM resistance cannot be secured because there is a barrier metal film such as a TiN film in which Al is difficult to orient as the base.
[0014]
In addition, in the case of “entire surface deposition”, since the W film outside the connection hole needs to be removed, there is a problem that the number of steps increases in addition to the above-described problems of resistance and EM resistance.
[0015]
On the other hand, in the case of “selective deposition”, it is not necessary to remove the W film outside the connection hole. In practice, however, the selectivity is often deteriorated, and the W film is also formed outside the connection hole. There are many. That is, even in the case of “selective deposition”, it is necessary to remove the W film outside the connection hole later by using etch back or the like, and there is a problem that the number of processes increases.
[0016]
By the way, as another plug forming technique, there is an Al reflow technique for forming a plug using Al having a resistance value lower than that of W. This uses flow characteristics due to surface diffusion of the Al film, and it is possible to fill the inside of the connection hole with the Al film by an easy method of heating the substrate, and to use the upper part of the Al film as wiring. Therefore, the process can be shortened.
[0017]
Various studies have been made on Al reflow technology so far, and in many cases, an Al film and a base film such as a Ti (titanium) film having good wettability are used. In addition, the flow temperature can be lowered. R. As an Al reflow technique that can be expected to fill a connection hole having a high aspect ratio (connection hole depth / connection hole opening diameter), an Al film is sputter-formed without heating, and then the Al film is sputter-formed while heating. Step Al reflow technology is known and is becoming mainstream.
[0018]
Further, many Al reflow techniques combined with highly directional sputtering techniques such as low-pressure long-distance sputtering, collimation sputtering, and HDP (high density plasma) sputtering have been proposed. In the Al reflow technology, since the Al film is formed by sputtering, the step coverage of the Al film is originally low.
[0019]
For this reason, the film thickness of the Al film at the bottom of the connection hole is thin. As a result, aggregation of Al occurs during heating for fluidization, and voids are generated inside the connection holes. Therefore, the Al reflow technology could not fill the connection hole with a high aspect ratio.
[0020]
In order to solve such a problem, as described above, Al agglomeration is suppressed by using an Al film such as a Ti film and a base film having good wettability. However, when the Ti film is formed by sputtering, an overhang of the Ti film occurs at the opening of the connection hole, and unevenness occurs on the surface of the Ti film.
[0021]
This unevenness is caused by the crystal plane dependency of the crystal growth of Ti. Such overhangs and surface irregularities hinder the adhesion of Al and deteriorate the reflow characteristics. Moreover, even if the directional sputtering method is used as the Ti film forming method, a Ti film having a sufficient film thickness cannot be formed on the side surface of the connection hole.
[0022]
Moreover, since Ti reacts with Al, Al having high resistance is formed on the bottom surface of the connection hole._ThreeA Ti film is formed. This Al_ThreeSince the Ti film works as an EM diffusion barrier like the W plug, there arises a problem that the EM resistance deteriorates.
[0023]
Recently, application of Al reflow technology to wiring of a damascene structure or a dual damascene structure has been studied.
[0024]
FIG. 21 shows a cross-sectional view of a conventional dual damascene structure wiring (DD wiring) formed using Al reflow technology. In the drawing, a first Al wiring 81 is buried in a wiring groove 92 formed on the surface of the first interlayer insulating film 86.
[0025]
The first Al wiring 81 is connected to a connection hole 88 formed in the second interlayer insulating film 87 and a second Al wiring (hereinafter abbreviated as DD wiring) 83 embedded in the wiring groove 89. In the figure, 90 is Al._ThreeA Ti alloy film is shown, and 91 is a third interlayer insulating film.
[0026]
In the DD wiring 83, a connection hole 88 and a wiring groove 89 are formed in advance in the second interlayer insulating film 87. The inside of the connection hole 88 and the wiring groove 89 is simultaneously filled with an Al film that becomes an Al plug and an Al wiring in one process.
[0027]
The excess external Al film is removed by CMP, and an Al plug and an Al wiring can be formed at the same time, so that the process can be shortened and the cost can be reduced. However, when a Ti liner film is used as the base film of the Al film and the DD wiring 83 is formed by the Al reflow technique, there are the following problems.
[0028]
In this method, a Ti liner film (not shown) is formed on the entire surface after forming the connection hole and the wiring groove, and the entire inner surface (side surface and bottom surface) of the wiring groove is covered with the Ti liner film.
[0029]
For this reason, in the subsequent Al reflow process, Al is formed on the inner surface of the wiring groove._ThreeThe Ti film 90 is formed, and the effective Al volume of the DD wiring 83 is reduced. Al_ThreeSince the Ti film 90 has a high resistance, the resistance of the DD wiring 83 increases.
[0030]
Such an increase in wiring resistance becomes a serious problem as the wiring width is reduced. Also Al_ThreeThe Ti film 90 is also formed on the bottom surface of the connection hole 88, and the Al film formed on the bottom surface is formed._ThreeThe Ti film 90 functions as an EM diffusion barrier.
[0031]
Therefore, as in the case of the W-CVD technique, there is a problem that the EM resistance deteriorates. As described above, various plug forming techniques have been proposed, and among them, the Al reflow technique has been studied for the formation of DD wiring.
[0032]
However, the Al film agglomerates at the bottom of the connection hole, which causes a problem that the connection hole with a high aspect ratio cannot be filled. In order to solve such problems, it has been proposed to use an Al film and a Ti liner film having good wettability as a base.
[0033]
However, this time, Al on the inner surface of the wiring groove_ThreeA Ti film is formed, which increases wiring resistance and reduces EM resistance.
[0034]
As another conventional technique, if attention is paid only to a partial structure, a niobium liner is coated on an insulating layer patterned for a via or a wiring pattern to form a niobium layer, and aluminum or an aluminum alloy is formed on the niobium layer. It is known to form a metal line in a patterned insulator layer by a CMP planarization process from a deposition structure. (Japanese Patent Laid-Open No. 10-74764).
[0035]
In this document, as a preferred embodiment, aluminum or an aluminum alloy formed on a niobium layer is exposed to a niobium liner by CMP polishing using an oxidized acidic colloidal alumina slurry and oxidized to form Nb.₂O_FiveForm.
[0036]
As a result, the niobium liner serves as a polishing stopper layer. Therefore, this document does not intend to actively form an AlNb alloy between a niobium liner and aluminum or an aluminum alloy. An Nb oxide film (Nb) is formed at the interface between Al and Nb.₂O_Five) Makes it difficult to produce an AlNb alloy.
[0037]
[Problems to be solved by the invention]
The present invention has been made under such circumstances, and is a wiring structure in which an Al wiring layer is embedded in a connection hole formed in an interlayer insulating film on one main surface of a semiconductor substrate, and the inside of the connection hole By interposing at least an Nb liner film and an NbAl alloy film between the Al wiring layer and the Al wiring layer, it is possible to prevent an increase in wiring resistance in the connection hole and a decrease in EM resistance, and also prevent Al from being disconnected or agglomerated. An object of the present invention is to provide a semiconductor device capable of improving the adhesion of the Al wiring layer to the connection hole and a method for manufacturing the semiconductor device.
[0038]
[Means for Solving the Problems]
To achieve the above objective,InventionSuch a semiconductor device has an interlayer insulating film having a recess formed on one main surface of a semiconductor substrate; a liner film made of either Nb or NbN formed in the recess; and the liner film An Al wiring layer mainly composed of Al formed in the recess; and formed at any one of an interface between the liner film and the Al wiring layer and an interface between the interlayer insulating film and the Al wiring layer. NbAl alloy; and NbAl alloy.
[0039]
Here, the Al wiring layer may be formed of a pure Al film, or may be formed of an Al film containing a small amount of other elements such as Cu (the same applies to other inventions).
[0040]
The semiconductor of the present inventionEquipmentThe interlayer insulating film has a recess made of a connection hole and a wiring groove.
[0041]
The semiconductor of the present inventionEquipmentThe Nb in the liner film is <110> oriented in an axial direction perpendicular to one main surface of the semiconductor substrate.
[0042]
The semiconductor of the present inventionEquipmentThe rocking curve of the Nb <110> peak measured by the X-ray diffraction method in which the liner film is <110> oriented in the axial direction perpendicular to one main surface of the semiconductor substrate.Half width ofIs 5.21 ° or less.
[0043]
The semiconductor of the present inventionEquipmentNb in the liner film is oriented <110> in an axial direction perpendicular to one main surface of the semiconductor substrate, and the Al wiring layer is in an axial direction perpendicular to one main surface of the semiconductor substrate. <111> orientation.
[0044]
The semiconductor of the present inventionEquipmentNb in the liner film is <110> oriented in an axial direction perpendicular to one main surface of the semiconductor substrate, and the half-value width of the rocking curve of the Nb <110> peak measured by X-ray diffraction method is The Al wiring layer has an orientation of <111> in the axial direction perpendicular to one main surface of the semiconductor substrate, and Al <11 measured by X-ray diffraction method.1> The peak rocking curveHalfThe value range is 1.92 ° or less.
[0045]
Also, a method for manufacturing a semiconductor device of the present inventionHalfA first step of forming an interlayer insulating film having a recess on the conductor substrate; a second step of forming a liner film made of either Nb or NbN inside the recess; and heating the semiconductor substrate. While forming an Al conductive film mainly composed of Al on the region including the inside of the recess, the Al conductive film is reflowed to fill the inside of the recess with the Al conductive film, and is vacuumed together with the second step. A third step in which an NbAl alloy is formed at the interface between the liner film and the conductive film by performing the process continuously; a wiring layer comprising the conductive film by removing the conductive film outside the recess In the method of manufacturing a semiconductor device comprising the fourth step of forming the step, in the third step, the flow amount of the Al conductive film is equal to or greater than the volume in the recess excluding the region occupied by the liner film, and The film thickness of the Al conductive film, the film thickness of the liner film, the thickness of the semiconductor substrate is such that the liner film inside the recess and the Al conductive film react to form a thermal budget with no portion where the liner film disappears. It is characterized by setting the temperature and the heating time of the semiconductor substrate.
[0046]
Also, a method for manufacturing a semiconductor device of the present inventionHalfA first step of forming an interlayer insulating film having a recess on the conductor substrate; a second step of forming a liner film made of either Nb or NbN inside the recess; and heating the semiconductor substrate. While forming an Al conductive film mainly composed of Al on the region including the inside of the recess, the Al conductive film is reflowed to fill the inside of the recess with the Al conductive film, and is vacuumed together with the second step. A third step of forming an NbAl alloy at the interface between the liner film and the conductive film by performing the process continuously; removing the conductive film outside the recess and forming a wiring layer comprising the conductive film In the method of manufacturing a semiconductor device comprising the fourth step of forming a semiconductor substrate, the third step includes a step of forming a first Al conductive film containing Al as a main component that does not fill the recess, and the semiconductor substrate. Forming a second Al conductive film containing Al as a main component on the region including the recess while heating, and reflowing the first Al conductive film and the second Al conductive film to cause the first Al film to pass through the recess. Filled with a conductive film and the second Al conductive film.
[0047]
Where the bookInventionThe Nb liner film is preferably formed by a sputtering method having directivity by heating the semiconductor substrate or cooling the semiconductor substrate.
[0048]
Where the bookInventionNbN liner film is composed of noble gas and N₂ It is preferable to form the film by a chemical conversion sputtering method having directivity using a mixed gas with gas.
[0049]
Alternatively, the NbN liner film is preferably formed by a CVD method which is a film forming method capable of forming a film conformally.
[0050]
Also, a method for manufacturing a semiconductor device of the present inventionHalfA first step of forming an interlayer insulating film having a recess on the conductor substrate; a second step of forming a liner film made of either Nb or NbN inside the recess; and heating the semiconductor substrate. While forming an Al conductive film mainly composed of Al on the region including the inside of the recess, the Al conductive film is reflowed to fill the inside of the recess with the Al conductive film, and is vacuumed together with the second step. A third step of forming an NbAl alloy at the interface between the liner film and the conductive film by performing the process continuously; removing the conductive film outside the recess and forming a wiring layer comprising the conductive film In the method of manufacturing a semiconductor device, the third step includes a step of forming a first Al conductive film whose main component is Al that does not fill the recess, and the semiconductor Base Forming a second Al conductive film containing Al as a main component on the region including the recess while heating, and reflowing the first Al conductive film and the second Al conductive film to pass the first Al conductive film in the recess. And filling the inside of the recess with the first Al conductive film and the second Al conductive film, the flow amount of the first Al conductive film and the second Al conductive film is More than the volume inside the recess excluding the region occupied by the liner film, and the liner film inside the recess reacts with the Al conductive film made of the first Al conductive film and the second Al conductive film, so that the liner The film thickness of the first Al conductive film and the second Al conductive film, the film thickness of the liner, the temperature of the semiconductor substrate, and the semiconductor substrate so that the thermal budget without the film disappears And performing by setting the heating time.
[0051]
Here, the Nb liner film is preferably formed by a sputtering method having directivity by heating the semiconductor substrate or cooling the semiconductor substrate. Alternatively, the Nb liner film is preferably formed by a CVD method that is a film forming method capable of forming a film conformally.
[0052]
Further, before the Nb liner film is formed, as a base, a laminated film of an Nb film and an NbN film formed thereon, an NbN film, a Ti film, a Ti film, a TiN film formed thereon, and TiNfilmIt is preferable to form at least one of the following.
[0053]
Here, the first Al conductive film is preferably formed by a sputtering method having directivity by heating the semiconductor substrate or cooling the semiconductor substrate.
[0054]
Alternatively, the first Al conductive film is preferably formed by a CVD method which is a film forming method capable of forming a film conformally.
[0055]
The second Al conductive film is preferably formed by sputtering or CVD.
[0056]
Also, a method for manufacturing a semiconductor device of the present inventionHalfA first step of forming an interlayer insulating film having a recess on the conductor substrate; a second step of forming a liner film made of either Nb or NbN inside the recess; and heating the semiconductor substrate. While forming an Al conductive film mainly composed of Al on the region including the inside of the recess, the Al conductive film is reflowed to fill the inside of the recess with the Al conductive film, and is vacuumed together with the second step. A third step of forming an NbAl alloy at the interface between the liner film and the conductive film by performing the process continuously; removing the conductive film outside the recess and forming a wiring layer comprising the conductive film In the method of manufacturing a semiconductor device, the third step includes a step of heating the semiconductor substrate at a low temperature to control the reaction between the liner film and the Al while controlling the reaction inside the recess. After filling the Al leaving, characterized in that filling the Al to the semiconductor substrate by high temperature heating eliminate the cavity of the recess.
[0057]
Also, a method for manufacturing a semiconductor device of the present inventionHalfA first step of forming an interlayer insulating film having a recess on the conductor substrate; a second step of forming a liner film made of either Nb or NbN inside the recess; and heating the semiconductor substrate. While forming an Al conductive film mainly composed of Al on the region including the inside of the recess, the Al conductive film is reflowed to fill the inside of the recess with the Al conductive film, and is vacuumed together with the second step. A third step of forming an NbAl alloy at the interface between the liner film and the conductive film by performing the process continuously; removing the conductive film outside the recess and forming a wiring layer comprising the conductive film In the method for manufacturing a semiconductor device, the liner film ionizes Nb particles in plasma and applies the kinetic energy to the semiconductor substrate. Was Nb particles being formed by impinging on the semiconductor substrate.
[0058]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention (hereinafter referred to as embodiments) will be described with reference to the drawings.
[0059]
(First embodiment)
1A to 1E are process cross-sectional views illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention.
[0060]
First, as shown in FIG. 1A, an Al wiring 1 is formed on a Si substrate (not shown) on which elements are formed. At this time, the material of the Al wiring 1 does not need to be pure Al. For example, Al added with 0.5 wt% Cu, 1 wt% Si, or the like may be used.
[0061]
Next, an interlayer insulating film 2 is formed on the entire surface so as to cover the Al wiring 1, and then a plurality of connection holes (hereinafter referred to as “connection holes 3”) including connection holes 3 having an opening diameter of 0.3 μm or less and an aspect ratio of 3 or more on the Al wiring 1. The connection holes 3 are collectively referred to as photolithography and RIE.
[0062]
Next, as shown in FIG. 1B, an Nb liner film 4 is formed on the region including the connection hole 3 by using a directional sputtering method so as to cover the inner surface of the connection hole 3. The film thickness of the Nb liner film 4 is 7.5 nm on the surface of the interlayer insulating film 2.
[0063]
In order to evaluate the Al filling characteristics of the Nb liner film 4, the inventors also formed a Ti liner film and a Ta liner film (not shown) with the same film thickness as a comparative example.
[0064]
Next, as shown in FIG. 1C, the first Al film 5 having a thickness of, for example, 400 nm is formed without heating by directional sputtering without exposing the Si substrate to the atmosphere.
[0065]
Next, as shown in FIG. 1D, the second Al film having a thickness of, eg, 400 nm is sputtered in a time of 180 to 300 seconds while the Si substrate is heated to, eg, 450 ° C. without exposing the Si substrate to the atmosphere. The inside of the connection hole 3 is filled with the first and second Al films 6.
[0066]
At this time, an AlNb alloy film 7 which is a reaction product of the Nb liner film 4 and the first Al film 5 is formed at the interface between the connection hole 3 and the first and second Al films 6.
[0067]
Finally, as shown in FIG. 1E, the first and second Al films 6, the AlNb alloy film 7, and the Nb liner film 4 outside the connection holes 3 are selectively removed using the RIE method. The Al wiring layer 12 and the Al contact layer 6 are completed.
[0068]
In the above process, the directional sputtering method for forming the Nb liner film 4, the first Al film 5, and the first Al film and the second Al film 6 includes, for example, a low pressure-long distance sputtering method, a collimation sputtering method, and a bias sputtering method. A high density plasma sputtering method or the like may be used.
[0069]
The Nb liner film 4 is desirably formed on the inner surface of the connection hole 3 without unevenness. The first Al film 5 is desirably formed with good directivity. For this purpose, for example, when a low pressure-long distance sputtering method is used, the target diameter is 300 mm, the target-substrate distance is 300 mm, and the Ar gas is 0.03 Pa or less. What should I do?
[0070]
According to the studies by the present inventors, the Nb liner film 4 and the NbAl alloy film 7 formed at the interface between the connection hole and the Al wiring layer are the Ti film formed at the interface between the connection hole and the Al wiring layer, It has been found that, unlike a TiAl alloy film, an increase in wiring resistance can be sufficiently suppressed.
[0071]
Therefore, according to the present embodiment, since there is no film that causes an increase in the wiring resistance at the interface between the connection hole 3 and the Al contact layer 6, an increase in the wiring resistance can be prevented.
[0072]
In addition, since any of the films 4 and 7 formed at the interface between the connection hole 3 and the Al contact layer 6 serves as a compensation conductor, EM resistance can be improved. Further, since either the Nb liner film 4 or the AlNb alloy film 7 formed at the interface between the connection hole 3 and the Al contact layer 6 becomes an adhesion layer with the Al contact layer 6, it is possible to improve SM resistance. It becomes.
[0073]
By the way, in general, the deterioration of the filling characteristics in the reflow is caused by the aggregation of the Al film 5a formed on the entire surface in the connection hole 3 as shown in FIG. This occurs when the film 5b is formed and the Al diffusion path is cut off.
[0074]
The Nb liner film 4a has an effect of suppressing the aggregation of the Al film and improves the filling characteristics. As a result of studies by the present inventors, it has been clarified that the aggregation suppressing ability of the Nb liner film is greatly related to the reaction between the liner film 4a and the Al film 5a.
[0075]
That is, as shown in FIG. 3, the aggregation of the Al film 5a on the liner film 4a is suppressed while the reaction of the liner film 4a and the Al film 5a proceeds. However, as shown in FIG. 3, when the liner film 4a is entirely changed to the reaction product 8 with the Al film 5a, the granulated Al film 5b is formed and the aggregation suppressing ability is lowered.
[0076]
FIG. 4 shows a sample (laminated film) in which an Al—Cu 0.5 wt% film (film thickness: 400 nm) is continuously formed on each of a Ti film, a Ta film, and an Nb film (film thickness: 100 nm). The relationship between the heating temperature at the time of time heat processing and a sheet resistance increase rate is shown.
[0077]
Each liner film and Al film form a reaction product by heat treatment, and the effective Al film thickness decreases. For this reason, the higher the sheet resistance increase rate, the more the reaction between the liner film and the Al film proceeds. Therefore, it can be seen from FIG. 4 that the reactivity with the Al film is higher in the order of the Ti film, the Nb film, and the Ta film.
[0078]
Table 1 below shows how the filling characteristics of the Al film change depending on the size of the aspect ratio and the type of liner film (Ti film, Ta film, Nb film).
[0079]
[Table 1]

[0080]
From Table 1, it can be seen that the Ti film having high reactivity with the Al film as the liner film and the Ta film having low reactivity with the Al film have deteriorated filling characteristics in the connection holes having a high aspect ratio. This result can be interpreted as follows.
[0081]
First, since the Ti liner film has a high reactivity with the Al film, it changes to a reaction product in a short time. For this reason, the duration of the aggregation suppressing ability is short, and the time for allowing the Al film to flow into the connection hole cannot be secured. As a result, in the Ti liner film, the filling characteristics of the connection hole having a high aspect ratio are deteriorated as compared with the liner film and the Ta liner film.
[0082]
On the other hand, since the Ta liner film has low reactivity with the Al film, the ability to suppress the aggregation of the Al film due to the reaction is inherently low, and the filling characteristics deteriorate. Since the Nb liner film has a long reaction time with the Al film and has the ability to suppress the aggregation of the Al film by the reaction, it is possible to ensure a sufficient time for the Al film to flow into the connection hole.
[0083]
As a result, a high aspect ratio connection hole can be filled. Thus, it is important to select the Nb liner film used for the Al reflow in consideration of the reactivity with the Al film.
[0084]
Further, the aggregation of the Al film starts in the reflow at the minimum film thickness portion of the Nb liner film and the Al film. When the Nb liner film and the Al film are formed by sputtering, the bottom portion near the side wall of the connection hole (hereinafter referred to as the connection hole side wall bottom) is the minimum film thickness portion.
[0085]
In the sputtering method, the expected angle at which sputtered particles can enter the bottom of the connection hole is reduced, and the adhesion rate of sputtered particles is reduced. The prospective angle is determined by the aspect ratio of the connection hole. The connection angle with a higher aspect ratio decreases the prospective angle, and the liner film thickness and the Al film thickness at the bottom of the connection hole sidewall become thinner.
[0086]
Therefore, in order to reliably fill the desired connection holes with Al reflow using an Nb liner film, the reflow temperature and time, that is, the thermal budget (product of the substrate temperature and the heating time) and the maximum on the Si substrate It is necessary to adjust the Nb liner film thickness and Al film thickness at the bottom of the connection hole of the aspect ratio, and the connection hole internal volume as follows.
[0087]
That is, as in this embodiment, the amount of Al flow determined by the thermal budget (product of substrate temperature and heating time) is greater than or equal to the inner volume of the connection hole excluding the region occupied by the Nb liner film and Al film formed before heating. In some cases, the thicknesses of the Nb liner film and the Al film are adjusted (first adjustment) so that the Nb liner film and the Al film at the minimum film thickness portion do not disappear due to the reaction.
[0088]
Alternatively, the Al flow amount is equal to or greater than the inner volume of the connection hole excluding the region occupied by the Nb liner film and Al film formed before heating, and the Nb liner film and the Al film at the minimum film thickness part are reacted by reaction. The substrate temperature and the heating time are adjusted so that the thermal budget does not disappear (second adjustment).
[0089]
Alternatively, the Nb liner film and the Al film at the minimum thickness part do not disappear due to the reaction.BaWhen the jet is selected, the inner volume of the connection hole is adjusted so that the Al flow rate is equal to or larger than the inner volume of the connection hole excluding the region occupied by the Nb liner film formed before heating and the Al film (third adjustment). .
[0090]
The method of this embodiment is a method in which the first adjustment is selected. In this case, it was confirmed that the connection hole 3 having an opening diameter of 0.3 μm or less and an aspect ratio of 3 or more can be filled with the first and second Al films 6.
[0091]
The first to third adjustments are also effective for other film types. If the adjustment conditions are satisfied, high adjustment is possible regardless of the type of liner film.TheIt becomes possible to fill the inside of the connection hole of the pekt ratio with the conductive film.
[0092]
As described in the present embodiment, in order to fill Al into the connection hole by reflow, it is important to react the Nb liner film and Al in the reflow process to suppress aggregation of the first Al film.
[0093]
Therefore, after reflow of the present invention, Al is always an alloy of Nb and Al._ThreeNb is formed. In particular, when Nb is formed by directional sputtering, Nb is thinly formed on the side surfaces of the wiring grooves and connection holes. Therefore, all Nb on the side reacts with Al and Al_ThreeIn some cases, an Nb layer is formed and no Nb film remains after reflow.
[0094]
However, even if similar Al reflow is used, Al_ThreeIt is also possible not to form Nb. For example, after Nb is sputtered, the substrate is once opened to the atmosphere, then the first Al film is formed at a low temperature, and the second Al film is formed at a high temperature and reflowed.
[0095]
In this case, a natural oxide film is formed on the Nb surface, and a slight Nb oxide layer is interposed at the interface between Nb and Al. This Nb oxide layer suppresses the reaction between Nb and Al, and Al_ThreeNb is hardly formed. In this case, since the alloy layer of Nb and Al is not formed on the inner surface of the wiring groove, the amount of Al in the wiring groove is substantially increased, and the wiring resistance can be reduced.
[0096]
However, as described in the present embodiment, in order to fill the connection hole by Al reflow, it is necessary to cause Nb and Al to react. When the reaction between Nb and Al is suppressed, the connection hole is not filled. There is a problem that cannot be done.
[0097]
Further, when an Nb oxide layer is interposed at the interface between Nb and Al, Al is a mixed region of Al and Nb._ThreeThe Nb region disappears and the adhesion between Nb and Al decreases. This decrease in adhesion is due to stress migration resistance and electromigration.TheThere is also a problem that leads to deterioration of tolerance and deterioration of reliability.
[0098]
Further, even if Nb, the first Al film, and the second Al film are continuously formed in a vacuum using an apparatus such as a cluster tool, the Nb surface is oxidized. The degree of oxidation of the Nb surface is determined by the time required for wafer conveyance until the first Al film is formed after Nb is sputtered and the degree of atmospheric vacuum during conveyance.
[0099]
According to the inventor's research, the transport (atmosphere from the end of Nb sputtering to the start of the formation of the first Al) has a vacuum degree of 5 × 10.^-FiveIf the condition is less than pa and the time from the end of Nb sputtering to the start of formation of the first Al is within 5 minutes, sufficient reaction between Nb and Al occurs to suppress the aggregation of the first Al film. , Al_ThreeNb is formed. In the case of conditions other than those described above, the surface oxide layer of Nb suppresses the reaction between Al and Nb, and substantially Al._ThreeNb is not formed.
[0100]
Therefore, the present invention is carried out within the conditions of the above-described transport atmosphere vacuum degree and transport time as well as the vacuum continuous Nb film, the first Al film, and the second Al film. A sufficient amount of Al to increase the filling capacity of the connection hole and improve the structural reliability_ThreeAn Nb layer can be formed.
[0101]
Furthermore, the reaction between Al and Nb depends on the purity of the sputter target that sputters the Nb film, as well as when Nb is sputtered to the atmosphere after the sputtering, or when reflow is performed under the transport conditions in which the oxide layer on the Nb film surface is formed. May be suppressed.
[0102]
According to the research of the present inventor, when an Nb target having a purity of 99.9% or more is used, a sufficient amount of Al is sufficient to increase the filling capacity of the connection hole and improve the structural reliability._ThreeAn Nb layer can be formed.
[0103]
When an Nb target having a purity of less than 99.9% is used, impurity atoms contained in the target may react with Al, and the reaction layer may suppress the reaction between Nb and Al. Also in this case, as in the case where an oxide layer is formed on the Nb surface, the connection holes cannot be filled and Al_ThreeSince there is not a sufficient amount of Nb, the reliability cannot be improved structurally.
[0104]
(Second Embodiment)
FIG. 5 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention.
[0105]
In this embodiment, a case where the Al reflow method using the Nb liner film described in the first embodiment is applied to a method for forming a DD wiring will be described. In the present embodiment, the second adjustment is selected. Note that portions corresponding to those in FIG. 3 are denoted by the same reference numerals, and detailed description thereof is omitted.
[0106]
First, as shown in FIG. 5A, an Al wiring 1 is formed on a Si substrate (not shown) on which elements are formed. Next, an interlayer insulating film 2 is formed on the entire surface so as to cover the Al wiring 1, and then a connection hole 3 and a wiring groove 9 are formed in the interlayer insulating film 2.
[0107]
Next, as shown in FIG. 5B, an Nb liner film 4 and a first Al film having a thickness of 7.5 nm are formed under the same conditions as in the first embodiment, and then a Si film is formed while forming a second Al film. The inside of the connection hole 3 and the wiring groove 9 is filled with the first and second Al films 6 by Al reflow under the conditions of a substrate heating temperature of 420 ° C. and a heating time of 300 seconds. The heating time can be 300 seconds or more.
[0108]
Finally, as shown in FIG.AndThe DD wiring 6 (second Al wiring 6a and Al plug 6b) is completed by polishing and removing excess first and second Al films 6 and the like outside the wiring trench 9 using the CMP method.
[0109]
Generally, the connection hole 3 andAndIn the DD process in which the inside of the wiring trench 9 is filled with an Al film by reflow, there is a problem of an increase in wiring resistance due to a liner film formed in the wiring trench and a reaction product between the liner film and the Al film.
[0110]
Since the increase in wiring resistance causes RC delay, it is desirable that the wiring resistance is reduced to less than 4.6 μΩ · cm in terms of specific resistance when the wiring width is 0.18 μm.
[0111]
FIG. 6 shows a conventional RIE wiring formed by RIE, a DD wiring formed by Al reflow using a Ti liner film (comparative example), and a DD wiring formed by Al reflow using the Nb liner film of this embodiment. The relationship between specific resistance and wiring width is shown.
[0112]
Here, the depth of the wiring trench was 400 nm. Further, the film thickness of the Ti liner film (comparative example) was set to 15 nm, which is the same as that of the Nb liner film. It cannot be filled with an Al film.
[0113]
From FIG. 6, it can be seen that the increase in specific resistance is suppressed in the DD wiring formed by Al reflow using the Nb liner film of this embodiment, compared to the DD wiring formed by the conventional RIE wiring or Ti liner film. I understand.
[0114]
Further, the DD wiring 6 formed by Al reflow using an Nb liner film has an advantage of being excellent in EM and SM resistance. This is because the Nb liner film 4 or an AlNb alloy film 7 (for example, AlNb) that is a reaction product of the first Al film and the Nb liner film 4 is used._ThreeNb film) is excellent in EM resistance, and even if the DD wiring 6 is disconnected by EM, current flows through the Nb liner film 4 or the AlNb alloy film 7 and suppresses the disconnection of the DD wiring 6. Because it can.
[0115]
In the case of the DD wiring 6, since the Al film is embedded in the connection hole and the wiring groove of the interlayer insulating film, the adhesion between the side surface of the Al film and the interlayer insulating film is originally better than that in the case of the RIE wiring. .
[0116]
Moreover, in the case of the present embodiment, an AlNb alloy film 7 is formed at the interface between the side surface of the DD wiring 6 and the interlayer insulating film 2, and this AlNb alloy film 7 functions as an adhesion layer. Thereby, SM tolerance can be improved.
[0117]
As mentioned above, Al_ThreeThe presence of the Nb layer improves the EM and SM resistance. To improve this reliability, the formed Al_ThreeThe shape of Nb also greatly affects.
[0118]
Al is formed at the interface when the substrate is heated after the Nb / Al laminated film is formed._ThreeThe Nb layer is not formed on the film but is formed in a granular form.
[0119]
Al_ThreeWhen Nb is formed in a granular form, the contact interface with Al increases as compared with the case where the Nb is formed in a film form. This increase in contact interface is caused by Al and Al_ThreeThis is a factor that improves the adhesion with Nb and further improves the resistance to EM and SM.
[0120]
(Third embodiment)
FIG. 7 is a process cross-sectional view illustrating the method for manufacturing a semiconductor device according to the third embodiment of the present invention.
[0121]
The portions corresponding to those in FIGS. 3A to 3E are denoted by the same reference numerals, and detailed description thereof is omitted. This embodiment is mainly different from the first embodiment in that the Nb linerMembraneInstead, an NbN liner film is used.
[0122]
First, as shown in FIG. 7A, similarly to the first embodiment, an Al wiring 1 and an interlayer insulating film 2 are sequentially formed on a Si substrate (not shown) on which elements are formed. Next, a plurality of connection holes (hereinafter collectively referred to as connection holes 3) including connection holes 3 having an opening diameter of 0.3 μm or less and an aspect ratio of 3 or more are formed in the interlayer insulating film 2.
[0123]
Next, as shown in FIG. 7B, an NbN liner film 10 having a thickness of 15 nm is formed on the surface of the interlayer insulating film 2 by using a directional sputtering method. Specifically, for example, using an Nb target, Ar gas and N₂The NbN liner film 10 is formed by chemical sputtering in a gas mixed gas atmosphere.
[0124]
Next, as shown in FIG. 7C, the first Al film 5 having a thickness of, for example, 400 nm is formed without heating by directivity sputtering without exposing the Si substrate to the atmosphere.
[0125]
Next, as shown in FIG. 7D, the second Al film having a thickness of 400 nm, for example, is sputtered in a time of 180 to 300 seconds while the Si substrate is heated to, for example, 450 ° C. without exposing the Si substrate to the atmosphere. The inside of the connection hole 3 is filled with the first and second Al films 6.
[0126]
Finally, as shown in FIG. 7E, the first and second Al films 6, the AlNb alloy film 7, and the NbN liner film 10 outside the connection hole 3 are selectively removed using the RIE method. Al contact layer 6 and Al wiring layer12Is completed.
[0127]
Here, as the directional sputtering method for forming the NbN liner film 10 and the first Al film 5, for example, a low pressure-long distance sputtering method, a collimation sputtering method, a bias sputtering method, or a high density plasma sputtering method may be used. .
[0128]
Also in this case, Ar gas (or other rare gas) and N₂Sputtering is performed in a gas mixed gas atmosphere.
[0129]
In this embodiment, the same effect as that of the first embodiment can be obtained. However, as described below, this embodiment is superior to the case where an Nb liner film is used.
[0130]
When chemical sputtering is used, the amount of nitriding in the NbN liner film is Ar gas / N during sputtering.₂It can be easily adjusted by changing the gas mixing ratio.
[0131]
In the formed NbN film, there are Nb atoms that are not bonded to N atoms, and these unbonded Nb atoms react with Al atoms. Therefore, the reaction rate of the NbN liner film and the Al film can be controlled by controlling the amount of nitriding in the NbN liner film, and the ability to suppress aggregation can be maintained as compared with the Nb liner film having the same film thickness. .
[0132]
Therefore, by controlling the amount of nitriding in the NbN liner film, it is possible to suppress the reaction exceeding the reaction rate necessary for suppressing the aggregation of the Al film, that is, to suppress the consumption of the NbN liner film at the lowest film thickness portion at the bottom of the connection hole. In addition, it is possible to fill the connection holes with a higher aspect ratio than the Nb liner film having the same film thickness.
[0133]
Alternatively, if the connection holes have the same aspect ratio, the connection holes can be filled with an NbN liner film having a thickness smaller than that of the Nb liner film. Further, when the Ti liner film is used for a connection hole that is directly connected to the diffusion region of the Si substrate, there is a problem that alloy spikes are generated due to substrate heating during reflow.
[0134]
Therefore, it is necessary to form a diffusion barrier metal film such as a TiN film before forming the Ti liner film. However, the NbN liner film is excellent in Al and Si diffusion barrier properties, and even when used in a connection hole directly connected to the diffusion region of the Si substrate, the occurrence of alloy spikes can be prevented.
[0135]
Further, when the amount of N in the NbN film is adjusted as a barrier metal, the reaction between Nb and Al in the NbN film may decrease. In this case, an Nb film may be stacked on the NbN film in order to ensure a reaction amount with Al.
[0136]
(Fourth embodiment)
8A to 8C are process cross-sectional views illustrating a method for manufacturing a semiconductor device according to the fourth embodiment of the present invention.
[0137]
In the present embodiment, a case where the Al reflow method using the NbN liner film described in the third embodiment is applied to a DD wiring forming method will be described.
[0138]
Note that portions corresponding to those in FIGS. 1A to 1E and FIGS. 7A to 7E are denoted by the same reference numerals, and detailed description thereof is omitted.
[0139]
First, as shown in FIG. 8A, similarly to the third embodiment, an Al wiring 1, an interlayer insulating film 2, a connection hole 3, and a wiring trench are formed on a Si substrate (not shown) on which elements are formed. 9 is formed.
[0140]
Next, as shown in FIG. 8B, after the NbN liner film 10 and the first Al film are formed under the same conditions as in the first embodiment, the second Al film is formed and the connection holes 3 and 3 are formed.AndThe inside of the wiring trench 9 is filled with the first and second Al films 6 by Al reflow.
[0141]
Finally, as shown in FIG. 8C, by removing the excess first and second Al films 6 and the like outside the connection hole 3 and the wiring groove 9 by using CMP, the DD wiring 6 (second Al The wiring 6a and the Al plug 6b) are completed.
[0142]
In the present embodiment, the same effect as in the second embodiment can be obtained. However, since the reaction rate between the NbN liner film and the Al film can be slower than the reaction rate between the Nb liner film and the Al film, the thickness of the NbN liner film 10 can be reduced, and the wiring resistance can be further reduced. it can.
[0143]
In addition, the connection hole 3 andAndThe amount of the AlNb alloy film 7 formed in the wiring groove 9 can be reduced, and the wiring resistance can be further reduced.
[0144]
(Fifth embodiment)
9A to 9F are process cross-sectional views illustrating a method for manufacturing a semiconductor device according to the fifth embodiment of the present invention.
[0145]
As shown in FIG. 9A, a first wiring layer 23 is formed on a Si substrate 21 on which an element (not shown) is formed via a first interlayer insulating film 22. The first wiring layer 23 is, for example, a W wiring or an Al wiring. The first wiring layer 23 is damascene wiring.
[0146]
A second interlayer insulating film 24 is formed on the first interlayer insulating film 22 and the first wiring layer 23. Here, the second interlayer insulating film 24 is a coating insulating film such as a CVD insulating film by plasma CVD using TEOS as a source gas, an F-added low dielectric constant insulating film by HDP-CVD, or an organic SOG film.
[0147]
Al reflow using the Nb liner of the present invention is made of a low dielectric constant insulating film such as F-doped SiO.₂When combined with a film or an organic SOG film, the process advantage of not lowering the filling capacity compared to the case where Ti or Ta is used for the liner and the low dielectric constant green film and Nb or Al_ThreeThere is a structural merit that the Nb layer adheres and the reliability is improved.
[0148]
Generally F-added SiO₂Membranes and organic SOG membranes often degas during heating. The main component of degassing is water. When Ti or Ta is used for the liner, the liner material is oxidized by the desorbed water.
[0149]
The oxidation of the liner material suppresses the reaction with Al and loses the effect of suppressing the first Al aggregation and the effect of improving the adhesion between Al and the low dielectric insulating film. Therefore, when a low dielectric constant insulating film and a Ti or Ta liner are used in combination, there are a process problem in which the filling capacity of the connection hole is significantly reduced and a structural problem in which the reliability is lowered. On the other hand, Nb has a higher standard free energy for forming an oxide and higher oxidation resistance than Ti and Ta. Therefore, it is difficult to be altered by water desorbed from the low dielectric constant insulating film, the properties as a liner can be maintained, the filling ability of the connection hole can be improved, and the reliability can be ensured.
[0150]
Next, as shown in FIG. 9B, a connection hole 25 connected to the first wiring layer 23 is formed in the first interlayer green film 24 using photolithography and RIE.
[0151]
Hereinafter, using a cluster tool in which a load / unload chamber (sample preparation chamber), a degas chamber, a reverse sputtering chamber, an Nb sputtering chamber, a first Al sputtering chamber, a second Al sputtering chamber, and a substrate cooling chamber are connected to a transfer chamber, continuous vacuum A method of filling the inside of the connection hole 25 with Al by sequentially forming an Nb liner film, a first Al film, and a second Al film, causing the first Al film and the second Al film to flow (FIG. 9C). -FIG.9 (e)).
[0152]
Movement between the chambers is performed via the transfer chamber. First, a PBN heater with an electrostatic chuck is used for degassing. That is, degassing is performed by heating the substrate in a temperature range of 300 to 450 ° C. for 2 minutes or more with a PBN heater.
[0153]
Here, a halogen lamp heater may be used instead of the PBN heater. In addition, the degas chamber has an independent exhaust system so that the base vacuum degree of the transfer chamber is not deteriorated by the gas desorbed from the substrate during the degas process.
[0154]
Next, in the reverse sputtering chamber, a natural oxide film on the surface of the first wiring layer 23 exposed on the bottom surface of the connection hole 25, dirt adhered when forming the connection hole 25, and the like are removed by reverse sputtering. Reverse sputtering may be performed using a plasma sputtering apparatus such as a parallel plate type or an inductively coupled type.
[0155]
When the first wiring layer 23 is a W wiring layer or the like, it is not necessary to perform reverse sputtering because cleaning with an organic alkali solution can remove dirt attached when the natural oxide film and the connection hole 25 are formed.
[0156]
Next, as shown in FIG. 9C, a thickness of 7.5 to 50 nm is formed so as to cover the entire inner surface of the connection hole 25.ofThe Nb liner film 26 is formed using a long throw sputtering method.
[0157]
Here, the diameter of the Nb target is about 300 mm, the distance between the Nb target and the substrate is 300 mm, the input power is 8 kW or more, and the Ar pressure is 0.02 to 0.1 Pa.
[0158]
Further, the substrate is not heated, or the substrate is cooled in order to avoid an increase in the substrate temperature during sputtering.
[0159]
Next, as shown in FIG. 9D, a first Al film 27 having a thickness of 250 to 700 nm to be a second Al wiring layer is formed by using a long throw sputtering method so as to cover the entire inner surface of the connection hole 25. To do.
[0160]
Here, the diameter of the Al target is about 300 mm, the distance between the Al target and the substrate is 300 mm, the input power is 10 kW or more, and the Ar pressure is 0.01 to 0.1 Pa. Further, the substrate is not heated, or the substrate is cooled in order to avoid an increase in the substrate temperature during sputtering.
[0161]
Next, as shown in FIG. 9 (e), a second Al film having a thickness of 50 to 600 nm, which becomes the second Al wiring layer, is heated using a standard sputtering method while heating the Si substrate to 430 to 495 ° C. While forming at 3.33 nm / sec, the first andAndThe second Al film 28 is caused to flow, and the inside of the connection hole 25 is filled with the first and second Al films 28.
[0162]
The standard sputtering method is a method in which, for example, sputtering is performed using an Al target having a diameter of about 300 mm and setting the distance between the target and the substrate to 60 mm.
[0163]
At this time, an AlNb alloy film 29 that is a reaction product of the Nb liner film 26 and the first Al film 27 is formed at the interface between the connection hole 25 and the first and second Al films 28.
[0164]
Here, the second Al film is formed by using the standard sputtering method. However, if the film formation rate is made equal, that is, if the film formation rate is 3.33 nm / sec, the second Al film is formed by using the long throw sputtering method. There is no problem even if a film is formed.
[0165]
Finally, as shown in FIG. 9E, the first and second Al films 28, the AlNb alloy film 29, and the Nb liner film 26 are processed by photolithography and RIE to complete the second Al wiring layer 30.
[0166]
According to the studies by the present inventors, it is clear that if the Nb film is formed with a high sputtering power, the <110> orientation in the axial direction perpendicular to the substrate surface of the Nb film (hereinafter referred to as the substrate vertical axis direction) increases. Became. Furthermore, it was revealed that the Al film formed on the <110> -oriented Nb film exhibits extremely excellent <111> orientation in the direction perpendicular to the substrate.
[0167]
The sputter power dependence of the half width of the rocking curve of the Nb <110> peak of the Nb film and the Al <111> peak of the Al film formed on the Nb film measured by the X-ray diffraction method is shown.
[0168]
FIG. 10 shows that as the sputtering power increases, the Nb <110> peak half width decreases and the Al <111> peak half width decreases. The smaller the peak half-value width, the higher the degree of orientation in that direction.
[0169]
The surface of the Nb film with high <110> orientation is a (110) plane, and the lattice constant of Nb on this plane is close to the Al lattice constant of the Al (111) plane. As a result, it is considered that the Al film takes over the crystal structure of the Nb film, and the Al film is oriented in <111>.
[0170]
Furthermore, according to FIG. 10, it can be seen that both the Nb <110> orientation and the Al <111> orientation are degraded in the edge portion as compared with the center portion of the wafer having a diameter of 200 mm.
[0171]
This is considered to depend on the traveling direction of the Nb sputtered particles being inclined with respect to the axis perpendicular to the substrate surface. In the long throw sputtering method used for forming the Nb film, when the target area is not sufficiently large with respect to the wafer area, there is an asymmetry in the traveling direction of the sputtered particles, and the oblique incident component increases at the wafer edge.
[0172]
This oblique component is considered to degrade the orientation of the Nb film, and consequently the orientation of the Al film. However, this variation in orientation within the wafer surface is also reduced as the sputtering power is increased.
[0173]
In Al wiring, the higher the <111> orientation, the better the electromigration resistance. This is because in the Al film having high <111> orientation, unstable crystal grain boundaries having a large diffusion coefficient are reduced.
[0174]
FIG. 11 shows the relationship between the Al <111> orientation degree and the EM reliability. The vertical axis shows the life until the Al wiring is broken under an accelerated test at high temperature and high current density.
[0175]
It can be seen that the higher the <111> orientation, that is, the smaller the half width, the more improved the EM resistance of the Al wiring. Between Al <111> peak half width ω and EM lifetime τ, τ∝ (1 / ω) is empirically determined.²There is a relationship.
[0176]
In the figure, black circles indicate the degree of orientation of the Al wiring on the Ti / TiN film conventionally used as a base material for LSI Al wiring.
[0177]
10 and 11, it can be seen that if the Nb liner film is formed by sputtering with a sputtering power of 8 kW or more, a higher degree of orientation than the conventional Al wiring can be obtained over the entire surface of the wafer.
[0178]
In other words,Nb <110>It can be seen that when the peak half width is 5.21 ° or less, the Al <111> peak half width is 1.92 or less, and a higher degree of orientation than the conventional Al wiring can be obtained.
[0179]
By the way, the sputtering power is a product of voltage and current, and varies depending on the target diameter, the target-substrate distance, and the Ar pressure, and thus is not a unique parameter for the orientation of the Nb film or Al film.
[0180]
The Nb film is oriented in the <110> orientation due to the growth process of the Nb film during Nb sputtering. That is, Ar⁺Nb particles having kinetic energy released from the target by ions (Nb sputtered particles) move on the substrate due to the kinetic energy when they collide with the substrate.
[0181]
Therefore, Nb can move to a stable site as the moving distance increases, and can grow while the (110) plane which is a stable crystal plane is surfaced. That is, as the kinetic energy of the flying Nb particles increases, Nb can be <110> oriented.
[0182]
Since the kinetic energy of the Nb particles is attracted to the negative voltage applied to the target, the kinetic energy of Nb increases as the absolute value of the voltage applied to the target increases.
[0183]
FIG. 12 shows the relationship with the sputtering voltage (target voltage). It can be seen that the greater the sputtering power, the higher the absolute value of the sputtering voltage.
[0184]
Further, FIG. 10, FIG. 11 and FIG. 12 show that the degree of Al <111> orientation can be made higher than that of the conventional Al wiring by setting the target voltage to −380 V or less.
[0185]
In general, when the sputtering power is increased, the deposition rate is increased. In the case of the thin Nb liner film 26 having a thickness of 7.5 to 50 nm as in this embodiment, if the Nb liner film 26 is formed with a large sputtering power, the film thickness cannot be controlled accurately because the sputtering speed is high.
[0186]
As a result, there arises a problem that the film thickness differs between wafers, or the film thickness varies even within the same wafer.
[0187]
FIG.Shows the relationship between the sputtering power and the sputtering rate (deposition rate) when forming the Nb film. It can be seen that even when the sputtering power is increased, the sputtering rate does not increase proportionally and shows a tendency to saturate.
[0188]
Even at a sputtering power corresponding to a target voltage of −380 V or more at which Nb <110> orientation is practical, the sputtering rate is about 1 to 1.3 nm / sec, and a film thickness of 7.5 to 50 nm is sufficient. There is controllability.
[0189]
According to the study by the present inventors, increasing the kinetic energy of the Nb particles that collide with the substrate is the essence of improving the orientation, so that the kinetic energy is not limited to controlling with the target voltage.
[0190]
That is, in sputtering, some of the Nb particles are positively ionized, and if a negative voltage is applied to the substrate side, the ionized Nb particles are accelerated and drawn into the substrate without increasing the target voltage. The kinetic energy of particles increases.
[0191]
Increasing the ionization efficiency by inductively coupled plasma is more effective. Even if such a method is used, the Nb liner film 26 can be highly oriented. As a result, the orientation of the second Al wiring layer 30 is improved, and the wiring reliability is also improved.
[0192]
However, when applying a bias to the substrate to attract partially ionized Nb particles to improve the orientation, it is necessary to pay attention to the following. For example, when a bias is applied to the substrate as in the bias sputtering method, the ionized sputtering gas Ar is also drawn into the substrate and taken into the Nb liner film 26.
[0193]
Ar taken in the Nb liner film 26 is released from the Nb liner film 26 by a heat treatment such as a reflow heating process in a later process or a sintering process after the formation of the second Al wiring layer 30.
[0194]
Peeling occurs at the interface between the Nb liner film 26 and the second Al wiring layer 30. In order to prevent such peeling, adjustment such as decreasing the Ar flow rate to reduce the amount of Ar taken into the Nb liner film 26 is necessary.
[0195]
In addition, in the formation of the Nb film by the bias sputtering method, a function for supplying RF power to the substrate is required, and the apparatus cost increases. In addition, the bias sputtering method is a film formation method in which film formation and etching occur simultaneously, and the film formation speed decreases and throughput decreases.
[0196]
Further, when etching is performed by applying a substrate bias from the initial stage of film formation, an interlayer insulating film (SiO 2)₂Part of the film) is etched and etched SiO₂May be taken into the Nb liner film 26 and the quality of the Nb liner film 26 may be deteriorated.
[0197]
From these viewpoints, the Nb liner film 26 can be highly oriented only by adjusting the voltage of the target, and the orientation of the second Al wiring layer 30 can be improved by the bias sputtering method, the substrate bias, or the like. Compared to the method of applying Nb and drawing Nb ions, it can be said to be a simple method.
[0198]
In addition to this, reducing the gas pressure during Nb sputtering is also effective in increasing the absolute value of the voltage applied to the target.
[0199]
For example, target diameter 300mm,In long sputtering with a target-substrate distance of 300 mm, when the sputtering power is 2 kW, the target voltage is -330 at an Ar pressure of 0.053 Pa.VHowever, at an Ar pressure of 0.026 Pa, the target voltage increases in absolute value up to −397V.
[0200]
0.026PaofAr pressure, target voltage -397VIn this case, the Al <111> peak half-width is 1.4 °, which is sufficiently high in orientation to improve the EM resistance.
[0201]
In long throw sputtering, if Ar gas pressure is lowered, scattering of Nb sputtered particles by Ar gas is suppressed, so that directivity of Nb sputtered particles is increased.
[0202]
In the connection hole 25 having a high aspect ratio, it is necessary to form the Nb liner film 26 up to the bottom of the connection hole side wall. Increasing the directivity of the Nb sputtered particles increases the probability of the Nb sputtered particles entering the bottom of the side wall of the connection hole, and as a result, Al in the connection hole having a high aspect ratio can be filled.
[0203]
Furthermore, increasing the kinetic energy of the Nb sputtered particles improves the Al filling characteristics of the connection hole 25. That is, as the Nb liner film 26 formed of Nb sputtered particles having higher kinetic energy is used, the connection hole 25 having a higher aspect ratio can be filled with the second Al wiring layer 30.
[0204]
FIG. 14 shows the relationship between the Nb sputtering power and the maximum value of the aspect ratio of the connection hole that can be filled with Al (hereinafter referred to as the Al filling limit aspect ratio).
[0205]
It can be seen that the Al filling limit aspect ratio increases as the Nb sputtering power increases. The Nb liner film 27 is formed in order to suppress aggregation of the first and second Al films 28.
[0206]
Therefore, it is necessary to form on the side surface and bottom of the connection hole 25. As described above, when the kinetic energy of the Nb sputtered particles is increased, the movement of the Nb sputtered particles in the substrate is promoted, so that the coverage of the Nb liner film 26 on the inner surface of the connection hole 25 is improved.
[0207]
The improvement in the coverage of the Nb liner film 26 can suppress the aggregation of the first and second Al films 28 that are likely to occur at the bottom of the side wall of the connection hole, and increase the aspect ratio of the connection hole 25 that can be filled by Al reflow.
[0208]
Also, the Al (111) plane has the lowest surface energy compared to other crystal planes of Al, and the diffusion of Al atoms is activated on the film surface, so that the <111> -oriented Al film has increased fluidity. .
[0209]
Therefore, by increasing the kinetic energy of the Nb sputtered particles, the coverage of the Nb liner film 26 on the inner surface of the connection hole 25 andAndAl fluidity can be improved, and as a synergistic effect, Al filling characteristics are greatly improved, and the inside of the connection hole 25 having a high aspect ratio is first and second.AndThe second Al film 28 can be easily filled.
[0210]
In FIG. 19, the Nb film is changed to -380.VA time change of Al <111> orientation is shown when sputtering is performed at the following target voltage, an Al film is formed on the Nb film without heating, and then a heat treatment at 450 ° C. is performed.
[0211]
The heat treatment was performed by heating the substrate. It can be seen that the orientation of the Al film improves as the heat treatment time increases. That is, it is considered that the Al film formed without heating on the highly oriented Nb film has low orientation in the initial stage of formation, and the Alb inherits the Nb lattice information during the heat treatment process, so that the orientation is improved.
[0212]
Therefore, in order to highly align an Al film formed without heating on a highly oriented Nb film, it is essential to perform a heat treatment after the formation of the Al film. Although the case where the heat treatment is performed after the Al film is formed without heating has been described here, the effect of increasing the orientation is similarly obtained when the Al film is formed while heating the substrate.
[0213]
However, when the substrate is heated, the surface of the Nb film is more easily oxidized than when it is not heated. Therefore, it is necessary to control the degree of vacuum of the apparatus.
[0214]
(Sixth embodiment)
FIG. 15 is a process sectional view showing the method for manufacturing the semiconductor device according to the sixth embodiment of the present invention. Portions corresponding to those in FIG. 9 are denoted by the same reference numerals, and detailed description thereof is omitted.
[0215]
First, as shown in FIG. 15A, as in the fifth embodiment, an element (not shown) is formed on a Si substrate 21 on which a first interlayer insulating film 22 and a first wiring layer 23 are formed. Then, a second interlayer insulating film 24 and a connection hole 25 are formed. Next, as shown in FIG. 15B, a wiring groove 31 for the second wiring layer is formed in the second interlayer insulating film 24 by photolithography and RIE.
[0216]
Next, as shown in FIG. 15 (c), using the cluster tool as described in the fifth embodiment, under the same conditions as in the fifth embodiment, degas (DEGAS), reverse sputtering, Nb sputtering, By performing 1Al sputtering and second Al sputtering, the inside of the connection hole 25 and the wiring groove 31 is filled with the first and second Al films 28 via the Nb liner film 26.
[0217]
Finally, as shown in FIG. 15 (d), the first and second Al films 28 outside the connection holes 25 and the wiring grooves 31 are removed by CMP to form a second Al wiring layer composed of the first and second Al films 28. (Al dual damascene wiring) 32 is completed.
[0218]
In the fifth embodiment, it has been described that the Nb liner film formed by sputtering using a high sputtering power is <110> oriented, and the Al wiring layer on the highly oriented Nb liner film exhibits a high <111> orientation. .
[0219]
However, in the case of the damascene wiring as in the present embodiment, the second Al wiring layer 32 has an axial direction perpendicular to the two side surfaces (connection hole side surface and wiring groove side surface) and one bottom surface (wiring groove bottom surface). And <111> orientation in the vertical axis direction.
[0220]
FIG. 16 shows the relationship between Nb sputtering power and Al <111> orientation on a substrate on which a plurality of wiring grooves are arranged.
[0221]
It can be seen that the Al film on the wiring groove also shows a high <111> orientation in the vertical axis direction of the substrate, that is, the axial direction perpendicular to the wiring groove as the sputtering power increases.
[0222]
That is, the orientation of the substrate surface and the bottom of the wiring groove is more dominant than the orientation from the two side surfaces, and if the Nb film is sputtered with the orientation of the Al film in the wiring groove being 8 kW or more, high reliability can be obtained.
[0223]
In particular, when an Al film is formed by a directional sputtering method such as a long throw sputtering method, the Al film is thin on the side surface of the wiring groove, and the Al film on the substrate surface or the bottom surface of the wiring groove is thick.
[0224]
Therefore, the orientation from the substrate surface and the wiring groove bottom surface becomes more dominant than the Al film formed conformally by the CVD method, and the influence of the orientation from the side surface can be reduced.
[0225]
For damascene wiring, two sides and oneBottomThe Nb liner film 26 or the AlNb alloy film 29 / Nb liner film 26 exists. Since these function as compensating lead wires that can conduct when the second Al wiring layer is disconnected, they contribute to the improvement of EM resistance.
[0226]
Therefore, when the effect of the highly oriented Al film and the effect of the compensation conductor are combined, the EM resistance of the Al dual damascene wiring (hereinafter simply referred to as damascene wiring) 32 is significantly improved by the synergistic effect.
[0227]
Furthermore, since the Nb liner film 26 and the first Al film 27 react to form an AlNb alloy film 29, the adhesion of the damascene wiring 32 is improved. Since the Al diffusion coefficient is low at the interface with excellent adhesion, the SM resistance of the Al / DD wiring 32 is remarkably improved.
[0228]
As described in the fifth embodiment, unstable crystal grain boundaries having a large diffusion coefficient are reduced in the <111> highly oriented Al film, so that SM resistance is also improved.
[0229]
Therefore, when the effect of the highly oriented Al film and the effect of adhesion are combined, the EM resistance of the damascene wiring 32 is remarkably improved by the synergistic effect.
[0230]
In FIG. 10, the Al orientation on the wiring trench was averaged and evaluated, but the present inventors further examined the Al orientation on the plane perpendicular to and parallel to the longitudinal direction of the damascene wiring in detail.
[0231]
FIG. 17 shows the rocking curve of the Al <111> peak of the damascene wiring 32 obtained when X-rays are incident in a direction parallel to the longitudinal direction of the damascene wiring 32 (hereinafter referred to as the wiring longitudinal direction) by the X-ray diffraction method. The half-value width (A) and the half-value width (B) of the rocking curve of the Al <111> peak of the damascene wiring 32 obtained when X-rays are incident in the direction perpendicular to the wiring longitudinal direction by the X-ray diffraction method are shown. .
[0232]
When X-rays are incident in a direction parallel to the wiring longitudinal direction (x axis), variation in Al <111> orientation can be measured with respect to a direction parallel to the wiring longitudinal direction.
[0233]
On the other hand, when X-rays are incident in a direction perpendicular to the wiring longitudinal direction (y-axis), variation in Al <111> orientation can be measured in the direction perpendicular to the wiring longitudinal direction.
[0234]
It can be seen that the half-value width of the rocking curve of the Al <111> peak is greater when X-rays are incident on the y-axis than when X-rays are incident on the x-axis direction. This is presumably because the Al <111> orientation in the vertical direction of the substrate is displaced in the longitudinal direction of the wiring due to the Al orientation from the side surface of the wiring groove, causing a deviation in the vertical direction.
[0235]
When L / S (line / space: line corresponds to wiring groove) is 0.25 μm / 0.25 μm than 1.0 μm / 1.0 μm, the half width of the rocking curve of Al <111> peak is larger. I understand that.
[0236]
This is because, in the sample used for the experiment shown in FIG. 17, in the case of 1.0 μm / 1.0 μm L / S, the contact area with the damascene wiring is wider on the bottom surface of the wiring groove than on the side surface of the wiring groove. The orientation from the bottom of the wiring trench is considered to be dominant.
[0237]
However, 0.25 / 0.25 μmofIn the case of L / S, since the contact area on the side surface of the wiring groove is larger than the bottom surface of the wiring groove, the influence of the side surface is further affected, and the Al <111> orientation when X-rays are incident on the y-axis is considered to vary.
[0238]
As described above, in the case of damascene wiring, there is a tendency that the Al <111> orientation is shifted in a plane perpendicular to the longitudinal direction of the wiring due to the influence of the side surface of the wiring groove. Further, such a shift in orientation becomes more prominent as the wiring width becomes finer.
[0239]
From the viewpoint of wiring reliability, in particular, in order to improve the EM resistance, it is preferable to make Al <111> orientation in the vertical axis direction of the substrate and reduce unstable grain boundaries having a large diffusion coefficient as much as possible.
[0240]
However, in the case of damascene wiring, the deviation in orientation on the plane perpendicular to the longitudinal direction of the wiring is not a random variation because it is affected by the side surface of the wiring groove, and is parallel to the longitudinal direction of the wiring. Since the orientation in the vertical plane is ensured, unstable grain boundaries do not increase and the problem of EM resistance degradation does not occur.
[0241]
In addition, it is known that when a highly oriented Al film is heat-treated, hillocks having a shape in which crystal grains suddenly rise tend to occur. This is because if there are a small number of low-orientation crystal grains surrounded by a large number of highly-oriented crystal grains, stress concentrates on the low-orientation crystal grains and sudden hillocks occur. .
[0242]
Such a hillock eventually leads to a short circuit of the wiring. With respect to this problem, the damascene wiring whose Al orientation is shifted in a plane perpendicular to the longitudinal direction of the wiring can disperse the stress of the crystal grains, and can prevent sudden hillocks.
[0243]
Such a shift in the Al orientation with respect to each axial direction becomes prominent in the present invention in which Nb is highly oriented, and it has become clear for the first time that resistance to stress migration is improved.
[0244]
Therefore, by forming a damascene wiring having a larger half-value width of the Al <111> peak rocking curve when X-rays are incident on the y-axis than when X-rays are incident on the x-axis direction, wiring short-circuiting The above problem can be avoided and, as described above, there is no problem of deterioration of EM resistance, so that the reliability can be improved.
[0245]
The present invention is not limited to the above embodiment.
[0246]
For example, in the first to fourth embodiments, the Nb liner film or the NbN liner film is formed by the directional sputtering method, the first Al film is formed by the directional sputtering method without heating, and then the second Al film is heated. The method of forming by sputtering was explained.
[0247]
However, after the Nb liner film or the NbN liner film is formed, it may be formed by sputtering while heating one Al film.
[0248]
Because there is an Nb liner film or an NbN liner film, even if an Al film is formed while heating, the Al film is prevented from agglomerating due to a reaction with the Nb liner film or the NbN liner film, and can be filled by reflow. This is because it can.
[0249]
In the first to fourth embodiments, the Nb film or the NbN film is formed by the directional sputtering method, the first Al film is formed by the directional sputtering method without heating, and then the second Al film is sputtered while being heated. Although the method of forming by the method has been described, the first Al film may be formed by CVD.
[0250]
Because there is Nb liner film or NbN liner film,By CVDEven if the Al film is formed, the Al film becomes a continuous film, and CVD can be formed conformally, so that the Al film thickness at the bottom of the connection hole can be increased.
[0251]
However, the Al film formed by CVD using an organic source gas has a problem that impurities such as carbon are mixed and the reliability of the wiring layer is lowered. In this case, if the first Al film is formed thin by CVD and then the second Al film is formed thick by sputtering, a wiring layer having a desired thickness can be formed without causing a decrease in reliability.
[0252]
In the first to fourth embodiments, the method of forming the Nb film or NbN film by the directional sputtering method has been described. However, the Nb film or NbN film may be formed by CVD.
[0253]
The reason is as follows. In the sputtering method, the Nb film or NbN film at the bottom of the connection hole is thinned. Therefore, an unnecessary Nb film or NbN film is formed thickly on the inner surface of the wiring groove in order to secure the Nb film or NbN film thickness necessary for suppressing Al aggregation at the bottom of the connection hole.
[0254]
This Nb film or NbN film reduces the substantial Al cross-sectional area of the wiring portion and causes an increase in wiring resistance.
[0255]
On the other hand, in the CVD method, the Nb film or the NbN film can be formed conformally in the connection hole or the wiring groove, so that the Nb film or the NbN film can be formed thick at the bottom of the connection hole where the film thickness tends to be thin.
[0256]
As a result, it is not necessary to form an Nb film or NbN film more than necessary on the inner surface of the wiring groove, and this can be effectively prevented from an increase in wiring resistance. Further, the Nb film can be easily CVD-treated by Nb fluoride having a high vapor pressure at room temperature.
[0257]
The NbN film can be formed by using a mixed gas of Nb fluoride and ammonia, and the nitridation amount of the NbN film can be controlled by adjusting the mixing ratio.
[0258]
Further, the NbN film may be formed by post-nitridation after forming the Nb film. For post-nitridation, N₂And NH_ThreeThermal nitriding heat treatment in an atmosphere such as N under plasma⁺There is plasma nitriding for irradiating the Nb film with ions.
[0259]
In particular, plasma nitriding can lower the temperature of the Si substrate. In the DD structure, the inner surface of the wiring groove is N than the inner surface of the connection hole.⁺Since the collision probability of ions is high, the Nb film formed on the inner surface of the wiring trench can be preferentially nitrided.
[0260]
The amount of reaction product of the Nb film and the Al film in the wiring part can be reduced, and the wiring resistance can be reduced. At this time, N⁺The ion collision probability may be adjusted by gas pressure.
[0261]
In the first to fourth embodiments, the Al film is reflowed while heating the Si substrate to 450 ° C., but the Al film may be reflowed by dividing the heating of the Si substrate into a plurality of steps.
[0262]
For example, the first half of the reflow is performed at a low temperature, and the second half of the reflow is performed at a high temperature. According to such two-step heating, since the first half of the reflow is at a low temperature, the reaction between the Nb film or the NbN film and the Al film is suppressed, and the aggregation of the Al film is suppressed.
[0263]
Here, since the first half of the reflow is at a low temperature, the flow amount of the Al film is reduced, so that voids remain in the Al film inside the connection hole. In particular, when an insulating film having a low dielectric constant is used as the interlayer insulating film, gas is released from the insulating film, and voids are likely to remain.
[0264]
However, since the film thickness of the Al film on the inner surface of the connection hole has increased due to the flowing Al film, the Al film does not aggregate even if reflow is performed at a high temperature next time, and the remaining voids are completely covered with the Al film. Can be filled.
[0265]
In addition, as described above, when an insulating film with a low dielectric constant that is frequently degassed is used as an interlayer insulating film, Al fluidity is reduced due to gas release from the insulating film, and voids are likely to remain. If the first half is performed at a low temperature, the amount of gas released from the insulating film can be reduced, whereby contamination of the Al surface by the released gas can be suppressed and the Al surface can be maintained in an active state.
[0266]
Therefore, even if voids remain during low temperature reflow,BoId can be easily filled. Therefore, if reflow is performed by such multi-step heating, a connection hole having a higher aspect ratio can be filled with an Al film than when reflow is performed by heating at a constant temperature.
[0267]
In the first to fourth embodiments, the Nb film or the NbN film is directly formed on the Si substrate as the liner film. However, in order to suppress the reaction with the Si substrate or reduce the contact resistance. For example, as shown in FIG. 18, NbN film, TiN film, Nb film, Ti film, Nb / NbN film made of NbN film and NbN film formed thereon, or Ti film and TiN formed thereon A Ti / TiN film made of a film may be formed as a base.
[0268]
Here, when an NbN film having a barrier property is used as the liner film,BaThere is basically no need to form a rear metal film. However, the NbN film with a small amount of nitriding has a reduced barrier property,BaReality cannot be secured.
[0269]
For example, when the Nb film is nitrided to slightly reduce the reaction rate with the Al film, the barrier property cannot always be secured. In such a case, an NbN film or a TiN film having a barrier property may be formed below the NbN film.
[0270]
In addition, various modifications can be made without departing from the scope of the present invention.
[0271]
【The invention's effect】
As described above, the semiconductor device and the manufacturing method thereof according to the present invention have a wiring structure in which an Al wiring layer is embedded in a connection hole formed in an interlayer insulating film on one main surface of a semiconductor substrate, and the connection hole By using at least an Nb liner film and an NbAl alloy film between the inner side and the Al wiring layer, it is possible to prevent an increase in wiring resistance in the connection hole and a decrease in EM resistance compared to the conventional wiring structure. It is possible to prevent disconnection and aggregation and to improve the adhesion of the Al wiring layer to the connection hole.
[0272]
Further, according to the present invention, by using an Nb liner film or an NbN liner film, the inside of the through hole is filled with an Al wiring layer that can prevent an increase in wiring resistance and a decrease in EM resistance even when the aspect ratio is increased. A method for manufacturing a semiconductor device can be realized.
[0273]
In addition, according to the present invention, by reducing the Al <111> orientation on a predetermined surface of the damascene wiring, generation of hillocks and deterioration of the EM resistance can be prevented, and thus a semiconductor device having a highly reliable damascene wiring. Can be realized.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing steps in a method for manufacturing a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a view for explaining deterioration of reflow filling characteristics in a manufacturing process of a semiconductor device;
FIG. 3 is a view for explaining that the aggregation suppression ability of the liner film in the manufacturing process of the semiconductor device is related to the reaction between the liner film and the Al film.
FIG. 4 is a graph showing a relationship between a heat treatment temperature and a sheet resistance increase rate when a sample in which an Al—Cu 0.5 wt% film is continuously formed on each of a Ta film and an Nb film is heat treated for 1 hour.
FIG. 5 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device according to a second embodiment of the present invention.
FIG. 6 shows a conventional wiring formed by RIE, a wiring formed by reflow using a Ti liner film, andAndThe figure which shows the relationship between the specific resistance of the wiring formed by the reflow using an Nb liner film | membrane, and wiring width.
FIG. 7 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device according to a third embodiment of the present invention.
FIG. 8 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.
FIG. 9 is a process sectional view showing a method for manufacturing a semiconductor device according to a fifth embodiment of the invention.
FIG. 10 is a diagram showing the sputter power dependence of the half width of rocking curves of Nb <110> peak and Al <111> peak measured by X-ray diffraction method.
FIG. 11 is a diagram showing the relationship between Al <111> orientation and EM reliability.
FIG. 12 is a diagram showing a relationship between sputtering power and sputtering voltage.
FIG. 13 is a diagram showing the relationship between sputtering power and sputtering speed (film formation speed) when forming an Nb film.
FIG. 14 is a diagram showing the relationship between Nb sputtering power and Al filling limit aspect ratio.
FIG. 15 is a process sectional view showing the method for manufacturing the semiconductor device according to the sixth embodiment of the invention.
FIG. 16 is a diagram showing a relationship between Al <111> orientation and sputtering power on a sample in which a plurality of wiring grooves are arranged.
FIG. 17 shows a direction parallel to the longitudinal direction of the wiring and an X-ray diffraction method.AndThe figure which shows the rocking curve of the damascene wiring obtained by making an X-ray inject into a perpendicular direction.
FIG. 18 is a cross-sectional view for explaining a modified example of the structure of the main part of the semiconductor device of the invention.
FIG. 19 shows a Nb film with -380.VThe figure which shows the time change of Al <111> orientation at the time of forming with the following target voltage, forming an Al film | membrane on Nb film | membrane without heating next, and performing 450 degreeC heat processing next.
FIG. 20 is a partial cross-sectional view of a multilayer Al wiring formed using a conventional W-CVD technique.
FIG. 21 is a partial cross-sectional view of a multilayer Al wiring formed using a conventional Al reflow technique.
[Explanation of symbols]
1 ... Al wiring
2 ... Interlayer insulation film
3. Connection hole
4 ... Nb liner film
5 ... 1st Al film
6 ... 1st and 2nd Al film, Al contact layer, DD wiring
6a ... Second Al wiring
6b ... Al plug
7 ... AlNb alloy film
8 ... Reaction product
9 ... Wiring groove
10 ... NbN liner film

Claims (10)

An interlayer insulating film formed on one main surface of the semiconductor substrate and having a recess made of a connection hole and a wiring groove ;
A liner film made of one of Nb and NbN formed inside the recess;
Made by the Al wiring layer mainly composed of Al is buried in the recess with the liner film by X-ray diffraction method, Al <111> obtained when applying X-rays in the longitudinal direction and the vertical direction peak When the full width at half maximum of the rocking curve is A, and the full width at half maximum of the rocking curve of the Al <111> peak obtained when X-rays are incident in a direction parallel to the longitudinal direction by X-ray diffraction is B> Damascene wiring that satisfies the relationship
And NbAl alloy formed on one of the interface and the interface between the interlayer insulating film and the Al wiring layer and said liner layer and said Al wiring layer,
The semiconductor device characterized by comprising comprises a. An interlayer insulating film having a recess formed on one main surface of a semiconductor substrate, a liner film formed in the recess, and Al mainly composed of Al formed in the recess having the liner film a wiring layer, and comprises a, and NbAl alloy formed on either one of the interface between the interface and the interlayer insulating film and the Al wiring layer and said liner layer and said Al wiring layer,
2. A semiconductor device according to claim 1, wherein Nb having a <110> orientation in an axial direction perpendicular to one main surface of the semiconductor substrate is formed as the liner film . 3. The semiconductor device according to claim 2, wherein the Nb in the liner film has a full width at half maximum of a rocking curve of the Nb <110> peak measured by X-ray diffraction method of 5.21 ° or less. 3. The semiconductor device according to claim 2 , wherein the Al wiring layer is <111> oriented in an axial direction perpendicular to one main surface of the semiconductor substrate. Nb in the liner film has a half-value width of a rocking curve of Nb <110> peak measured by X-ray diffraction method of 5.21 ° or less, and the Al wiring layer is 3. The semiconductor according to claim 2 , wherein the half width of the rocking curve of the Al <111> peak measured by the X-ray diffraction method is 1.92 ° or less with <111> orientation in the vertical axis direction. apparatus. A first step of forming an interlayer insulating film having a recess on the semiconductor substrate; a second step of forming a liner film made of either Nb or NbN inside the recess; and heating the semiconductor substrate. However, an Al conductive film mainly composed of Al is formed on a region including the inside of the recess, and the Al conductive film is reflowed to fill the inside of the recess in the vacuum together with the second step. A third step of forming an NbAl alloy at the interface between the liner film and the conductive film, and removing the conductive film outside the recess to form a wiring layer made of the conductive film. A fourth step of forming ,
In the third step, the flow amount of the Al conductive film is equal to or greater than the volume in the concave portion excluding the region occupied by one of the Nb liner film and the NbN liner film, and the liner film inside the concave portion The Al conductive film thickness, the liner film thickness, the temperature of the semiconductor substrate, and the semiconductor substrate A method for manufacturing a semiconductor device, wherein the heating time is set . A first step of forming an interlayer insulating film having a recess on the semiconductor substrate; a second step of forming a liner film made of either Nb or NbN inside the recess; and heating the semiconductor substrate. However, an Al conductive film mainly composed of Al is formed on a region including the inside of the recess, and the Al conductive film is reflowed to fill the inside of the recess in the vacuum together with the second step. A third step of forming an NbAl alloy at the interface between the liner film and the conductive film, and removing the conductive film outside the recess to form a wiring layer made of the conductive film. A fourth step of forming ,
The third step includes a step of forming a first Al conductive film mainly composed of Al that does not fill the recess, and a region mainly including Al on the region including the recess while heating the semiconductor substrate. Forming a second Al conductive film, and reflowing the first Al conductive film and the second Al conductive film to fill the recess with the first Al conductive film and the second Al conductive film. A method for manufacturing a semiconductor device. In the step of filling the recess with the first Al conductive film and the second Al conductive film, the flow amount of the first Al conductive film and the second Al conductive film is equal to or greater than the volume inside the recess excluding the region occupied by the liner film. And the liner film inside the recess, the Al conductive film made of the first Al conductive film, and the second Al conductive film react to form a thermal budget without a portion where the liner film disappears. 8. The semiconductor device according to claim 7, wherein the first Al conductive film and the second Al conductive film are set by setting a film thickness, the liner film thickness, the temperature of the semiconductor substrate, and a heating time of the semiconductor substrate. Production method. A first step of forming an interlayer insulating film having a recess on the semiconductor substrate; a second step of forming a liner film made of either Nb or NbN inside the recess; and heating the semiconductor substrate. However, an Al conductive film mainly composed of Al is formed on a region including the inside of the recess, and the Al conductive film is reflowed to fill the inside of the recess in the vacuum together with the second step. A third step of forming an NbAl alloy at the interface between the liner film and the conductive film, and removing the conductive film outside the recess to form a wiring layer made of the conductive film. A fourth step of forming ,
In the third step, the semiconductor substrate is heated at a low temperature to control the reaction between the liner film and Al while leaving a cavity inside the recess and filled with Al, and then the semiconductor substrate is heated at a high temperature to A method of manufacturing a semiconductor device, comprising filling Al so as to eliminate the cavity of the recess . A first step of forming an interlayer insulating film having a recess on the semiconductor substrate; a second step of forming a liner film made of either Nb or NbN inside the recess; and heating the semiconductor substrate. However, an Al conductive film mainly composed of Al is formed on a region including the inside of the recess, and the Al conductive film is reflowed to fill the inside of the recess in the vacuum together with the second step. A third step of forming an NbAl alloy at the interface between the liner film and the conductive film, and removing the conductive film outside the recess to form a wiring layer made of the conductive film. A fourth step of forming ,
The liner film is formed by ionizing Nb particles in plasma and causing Nb particles having increased kinetic energy by applying a bias to the semiconductor substrate to collide with the semiconductor substrate. Manufacturing method.

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