JP3593391B2 - Active matrix type liquid crystal display - Google Patents

Active matrix type liquid crystal display Download PDF

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JP3593391B2
JP3593391B2 JP24910495A JP24910495A JP3593391B2 JP 3593391 B2 JP3593391 B2 JP 3593391B2 JP 24910495 A JP24910495 A JP 24910495A JP 24910495 A JP24910495 A JP 24910495A JP 3593391 B2 JP3593391 B2 JP 3593391B2
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Prior art keywords
active matrix
liquid crystal
substrate
line
crystal display
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JP24910495A
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JPH0990420A (en
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康行 花澤
哲也 飯塚
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Toshiba Corp
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Toshiba Corp
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Description

【0001】
【産業上の利用分野】
本発明は、マトリクス状に配列された薄膜トランジスタ(以下TFTと略称する。)を駆動素子として備えたアクティブマトリクス基板及び対向基板との間に、液晶組成物を保持して成るアクティブマトリクス型液晶表示装置に関する。
【0002】
【従来の技術】
近年、高密度且つ大容量でありながら高機能更には高精細を得る液晶表示装置の実用化が図られている。
【0003】
これ等液晶表示装置のうち、隣接する画素間のクロストークが無く、高コントラスト表示を得られると共に、透過型表示が可能であり且つ、大面積化も容易である等の理由から、従来よりTFTを制御素子として備えたアクティブマトリクス型の液晶表示装置が多用されている。
【0004】
そして、液晶表示装置に用いるアクティブマトリクス基板のうち、蓄積容量線を、走査線及びゲート電極と同じ材質を用い、同じ形成工程にて一緒にパターン形成が成されるものにあっては、従来、図4に示す第1の従来例の様な構造とされていた。
【0005】
即ち、アクティブマトリクス基板1の絶縁基板上には、走査線2及び信号線3の交差部に設けられるTFT4のソース電極4aに接続される画素電極6がマトリクス状にパターン形成され、更に画素電極6の下方には走査線2と同一工程にてパターン形成される遮光部材からなる蓄積容量線7がパターン形成されており、ゲート絶縁膜を介し、画素電極6との間で補助容量を形成している。
【0006】
しかしながらこの様なアクティブマトリクス基板1にあっては、蓄積容量線7が画素電極6のほぼ中央を横切る様に形成されており、この蓄積容量線7により画素電極6中の遮光面積が増大される事から、開口率が低減されてしまっていた。従ってこの様なアクティブマトリクス基板を液晶表示装置に用いた場合、表示された画面輝度が低下されてしまい、所要の輝度を得ようとすると、バックライトの光量を上げなければ成らず、その為の消費電力が増大され、装置の省エネルギー化が妨げられるという問題を生じていた。
【0007】
このため、走査線と独立した蓄積容量線を設けるのでは無く、図5に示す第2の従来例の様に、走査線8の一部を蓄積容量線として作用させ、ゲート絶縁膜を介し、走査線8及び画素電極9との重なり部分10で補助容量を形成するアクテイブマトリクス基板11の開発も成されている。
【0008】
【発明が解決しようとする課題】
従来、TFTを駆動素子とするアクティブマトリクス基板を用いた透過型の液晶表示装置にあっては、走査線から独立した、画素電極のほぼ中央を横切る位置に蓄積容量線を設け、画素電極との重なり部分で補助容量を形成したり或いは、走査線の一部を蓄積容量線とし、画素電極と走査線との重なり部分で補助容量を形成していた。
【0009】
このため前者にあっては、画素電極中の光透過面積が低減され、ひいては液晶表示装置の開口率が低減され、必要な画面輝度を得られず、バックライトの光量を上昇しなければならず、省エネルギー化が妨げられるという問題を生じていた。
【0010】
一方、後者にあっては、走査線の一部が蓄積容量線を兼用する事から、画素電極を横切る蓄積容量線を無くす事が出来、アクティブマトリクス基板の開口率向上を図れるものの、補助容量が、画素電極端部にて走査線との重なり部分で形成される事から、製造時に走査線と画素電極のパターンの重ね合わせにずれを生じると、画素電極と走査線との重なり面積が変動する事から、蓄積容量の大きさが大きく変化してしまっていた。
【0011】
即ち例えば、図6に示す様に走査線8に対して画素電極9が矢印s方向にずれを生じると、走査線8及び画素電極9の重なり部分10が図5に比し縮小され、これに比例して蓄積容量も図5に示す場合に比し小さくなってしまい、ショットムラや焼き付き等の表示不良を生じ表示品位を低下するという問題を生じていた。
【0012】
更に大面積液晶表示装置において、一画面を複数のブロックに分割して、ブロック毎に露光、エッチングを行い蓄積容量線或いは画素電極等をパターン形成する様な場合には、ブロック毎の走査線及び画素電極のパターンのずれによりブロック毎に蓄積容量の値がばらつき、ブロック毎に焼き付きやショットむらによる表示不良を生じ、ショットブロックが視認され表示品位が低下されるという問題も生じていた。
【0013】
そこで本発明は上記課題を除去するもので、TFTを駆動素子とするアクティブマトリクス基板において、開口率の低下を招くこと無く、補助容量の安定を図り、画面輝度を向上する事により、従来バックライトに要していたエネルギーの省力化を図ると共に、表示不良を防止し、表示品位の高いアクテイブマトリクス型液晶表示装置を提供する事を目的とする。
【0014】
【課題を解決するための手段】
上記課題を解決する為の請求項1に記載の発明は、マトリクス状に配列される画素電極を有するアクティブマトリクス基板及び、このアクティブマトリクス基板に対向され対向電極を有する対向基板並びに、前記アクティブマトリクス基板及び前記対向基板の間に封入される液晶組成物とを具備するアクテブマトリクス型液晶表示装置において、前記アクティブマトリクス基板が、透明な絶縁基板上に形成され、ゲート絶縁膜を介しゲート電極上方に設けられる活性領域並びに、この活性領域を挾みソース電極更にはドレイン電極を備え、マトリクス状に配列される複数の薄膜トランジスタと、前記絶縁基板上にて形成され、前記ゲート電極に走査信号を供給する細線状の複数の走査線と、前記ドレイン電極に映像信号を供給する複数の信号線と、前記絶縁基板上にて、10μm以下の細線状の間隙を保持して前段の走査線に接続される蓄積容量線と、前記ソース電極に接続してなり、一側が、前記細線状の間隙内に位置するマトリクス状の画素電極とを設けるものである。
【0015】
又請求項2に記載の発明は、請求項1に記載のアクティブマトリクス型液晶表示装置において、走査線の幅を10μm以下とするものである。
【0016】
又請求項3に記載の発明は、請求項1記載のアクティブマトリクス型液晶表示装置を、一画面を複数のブロックに分割して、ブロック毎に露光、エッチングを行い製造するものである。
【0018】
【作用】
本発明によれば、走査線を細線状に加工すると共に、蓄積容量線を細線状の間隙を有するよう前段の走査線に近接する一方、前段の走査線及び蓄積容量線を一部で接続する事により、画素電極の面積の拡大を図り、アクティブマトリクス基板の開口率ひいては画面輝度を向上し、バックライトに要する電力の節約を図ると共に、細線化したために走査線に断線を生じた場合であっても、電気的には、蓄積容量線側にバイパスされ導通されるので、信号伝達機能が損なわれる事が無い。
【0019】
又本発明によれば、画素電極をその一側が走査線及び蓄積容量線との細線状の間隙に位置する様に形成する事により、走査線及び蓄積容量線のパターンと画素電極のパターンの重ね合わせがずれたとしても、細線状の間隙にてそのずれを補償出来るので、蓄積容量は常に必要な一定値を得られ、焼き付きやショットむらによる表示不良の発生を防止し、表示品位の向上を図るものである。
【0020】
【実施例】
以下、本発明の一実施例を図1及び図2を参照して説明する。20は、アクティブマトリクス型の液晶表示装置であり、駆動素子としてTFT21を用いるアクティブマトリクス基板22及び対向基板23の間に、ポリイミドからなる配向膜24、26を介して、液晶組成物であるネマチック型液晶27が保持されると共に偏光板53、54を有している。
【0021】
ここでアクティブマトリクス基板22は、透明なガラスからなる絶縁基板28上に、タリウム(Ta)、モリブデン(Mo)、タングステン(W)、チタン(Ti)、クロム(Cr)、アルミニウム(Al)、銅(Cu)等の金属材料、あるいはその合金からなる単層膜や積層膜からなり、走査信号を供給すると共に一部がゲート電極31として突設され、最小加工限度寸法程度の、幅5μmのN段目の走査線30及び、この走査線30と幅5μmの細線状の間隙12を隔てると共に、接続部13aにて走査線30と接続される(N+1)段目の蓄積容量線13がパターン形成されている。
【0022】
そしてこれ等の上には、酸化シリコン(SiOx)からなるゲート絶縁膜32が被覆され、このゲート絶縁膜32を介したゲート電極31上方には、i型の水素化アモルファスシリコン(以下i型a−Si:Hと称する。)からなる半導体層34及び、窒化シリコン(SiNx)からなる保護絶縁膜35並びに、良好なオーミックコンタクトを得るためのn型アモルファスシリコン(以下n型a−Siと称する。)からなるオーミック膜40がパターン形成され、チャネル領域(A)を挾み、ソース領域(B)、ドレイン領域(C)を有するTFT21を形成している。
【0023】
更にゲート絶縁膜32上にはインジウム錫酸化物(以下ITOと称する。)からなる画素電極43がパターン形成されるが、この画素電極43の蓄積容量線13側端部43aは、蓄積容量線13及び走査線30の間隙12のほぼ中央に位置する様、蓄積容量線13の端部13bより約2μm大きくなるようパターン形成されている。そして蓄積容量線13及び画素電極43との重なり部分により蓄積容量を形成している。
【0024】
更に、タリウム(Ta)、モリブデン(Mo)、タングステン(W)、チタン(Ti)、クロム(Cr)、アルミニウム(Al)、銅(Cu)等の金属材料、あるいはその合金からなる単層膜や積層膜からなり、画素電極43に接続されるソース電極37及び、信号線38並びに、信号線38から枝別れして成るドレイン電極39がパターン形成されている。
【0025】
そしてこれ等の上面には、窒化シリコン(SiNx)からなる絶縁性保護膜41が被覆されている。
【0026】
一方対向基板23は、透明なガラスからなる絶縁基板46上に遮光性材料であるクロム(Cr)からなり、各領域に赤(R)、緑(G)、青(B)の着色層を有するブラックマトリクス47及び、ITOからなる対向電極48を有している。
【0027】
次に液晶表示装置20の製造方法について述べる。先ずアクティブマトリクス基板22は、絶縁基板28上にスパッタ法によりタリウム(Ta)、モリブデン(Mo)、タングステン(W)、チタン(Ti)、クロム(Cr)、アルミニウム(Al)等の金属材料、あるいはその合金からなる単層膜や積層膜を成膜し、フォトレジスト(図示せず)をマスクとしてエッチング加工するフォトリソグラフィ技術を用い、走査線30及びゲート電極31並びに蓄積容量線13をパターン形成する。
【0028】
次にプラズマCVD法によりゲート絶縁膜32、(i型a−Si:H)膜、窒化シリコン(SiNx)膜を積層形成した上に、ネガ型レジストを塗布し、ゲート電極31をマスクにして絶縁基板28背面から露光し、ネガ型レジストを露光部分を残してパターン形成する。そしてこのネガ型レジストをマスクにして、窒化シリコン(SiNx)膜をゲート電極31に対して自己整合的に形状加工し、保護絶縁膜35を形成する。これにより保護絶縁膜35は、裏面露光時の光の回析によりゲート電極31より0〜3μm小さく形成される事となる。
【0029】
続いてプラズマCVD法を用いて(i型a−Si:H)膜上に、(n型a−Si)膜を形成し、フォトリソグラフィ技術により、(i型a−Si:H)膜及び(n型a−Si)膜をフォトエッチングし半導体層34及びオーミック層40をパターン形成する。
【0030】
次にスパッタ法によりITO膜を成膜た上に、レジストを塗布し、フォトリソグラフィ技術によりレジストをパターン形成し、このレジストをマスクにITO膜をフォトエッチングして画素電極43をパターン形成する。
【0031】
更にスパッタ法によりタリウム(Ta)、モリブデン(Mo)、タングステン(W)、チタン(Ti)、クロム(Cr)、アルミニウム(Al)等の金属材料、あるいはその合金からなる単層膜や積層膜を成膜し、フォトリソグラフィ技術によりソース電極37、信号線38及びドレイン電極39をパターン形成した後、窒化シリコン(SiNx)からなる絶縁性保護膜41を成膜し、フォトリソグラフィ技術により所定の形状にパターニングをし、アクティブマトリクス基板22を形成する。
【0032】
次に対向基板23にあっては、絶縁基板46上にスパッタ法によりクロム(Cr)を成膜し、フォトリソグラフィ技術により所定の形状にエッチングし、ブラックマトリクス47を格子状に形成する。そしてブラックマトリクス47に顔料を分散させた層を塗布後、パターン露光、現像を繰り返し、ブラックマトリクス47上に赤、緑、青の3色のストライプ領域を形成した後、スパッタ法によりITOからなる対向電極48を全面に形成して対向基板23を形成する。
【0033】
続いて、アクティブマトリクス基板22及び対向基板23の画素電極43側及び対向電極48側全面に低温キュア型のポリイミドからなる配向膜24、26を印刷塗布し、両基板22、23の対向時に、配向軸が90°と成るようにラビング処理をした後、両基板22、23を対向して組み立て、セル化し、その間隙にネマチック型液晶27を注入し封止する。そして両基板22、23の絶縁基板28、46側に偏光板53、54を取着して液晶表示装置20とする。
【0034】
この様に構成すれば、走査線30幅を最小加工寸法にパターン形成すると共に、走査線30及び蓄積容量線13の間隙12が最小加工寸法となるよう、蓄積容量線13を走査線30に近接パターン形成する事により、画素電極43の光透過部分の面積を拡大出来るので、アクティブマトリクス基板22の開口率を向上出来、ひいては液晶表示装置20の画面輝度を向上出来る。従って、バックライトの光量を低減出来、装置の省エネルギー化を促進出来る。
【0035】
しかも走査線30幅を最小加工寸法にする事により、断線を生じたとしても、接続部13aにて蓄積容量線13に接続され、電気的に導通される事から、走査信号の供給機能が損なわれる事がなく、製造時、走査線30断線により歩留まりが低減される事もない。
【0036】
更に製造時、蓄積容量線13上に重ねられる画素電極43のパターンがずれたとしても、実際には、蓄積容量線13及び走査線30の間隙12への画素電極43の突出量が変動されるものの、蓄積容量線13と画素電極43との重なり部分の面積が同じである事から、蓄積容量の値が変化される事無く、ショットむらや焼き付きによる表示欠陥を防止出来、高品位の表示画像を得られる。
【0037】
尚本発明は上記実施例に限られるものでなく、その趣旨を変えない範囲での変更は可能であって、例えばゲート電極や、走査線或いは信号線の材質或いはゲート絶縁膜や絶縁性保護膜の材料等任意である。
【0038】
又走査線の幅や走査線及び蓄積容量線の間隙の幅等も任意であるが、開口率を向上する為には、細く加工される事が望ましく、より好ましくは、10μm以下とされる。
【0039】
但し、走査線及び蓄積容量線の間隙の幅は、更に蓄積容量線及び走査線のパターンと画素電極パターンとの重ね合わせ精度をも考慮する必要があり、例えば、両パターンの重ね合わせ精度がaμmとすると、間隙の幅を、少なくとも2a(μm)保持する様に設定すれば、パターン形成時のずれを確実に補償出来、蓄積容量のばらつきをより確実に防止出来る。
【0040】
更に蓄積容量線も、走査線と細線状の間隙を保持するよう近接されていればその形状は任意であり、例えば図3に示す他の変形例の様に、走査線57に間隙58を保持して近接される蓄積容量線60を、線状ではなく、π型にパターン形成し、接続部60aにて走査線57と接続する様にしても良い。
【0041】
この様に形成すれば、蓄積容量線60を遮光体の一部を兼用出来ると共に、画素電極61の斜線で示す領域(D)にも光が透過されることから、アクテイブマトリクス基板62の開口率をより向上することが出来る。
【0042】
又アクティブマトリクス基板の製造方法も任意であり、例えば大面積液晶表示装置用等にあっては、一画面を複数のブロックに分割して、ブロック毎に露光、エッチングを行い蓄積容量線或いは画素電極等をパターン形成しても良い。この様な製造方法においても、従来のようにブロック毎に蓄積容量の値がばらつく事が無いので、中間調表示を行ってもブロック毎の焼き付きやショットむらによるショットブロックが視認される事もなく、表示品位の向上を図れる。
【0043】
【発明の効果】
以上説明したように本発明によれば、走査線及び、走査線と蓄積容量線との間隙を細線状にパターン形成する事により、画素電極の光透過部分の面積を拡大出来、アクティブマトリクス基板の開口率ひいては液晶表示装置の画面輝度を向上出来る事から、バックライトの光量低減による省エネルギー化促進が可能となる。
【0044】
しかも走査線を細線化したために断線を生じたとしても、一部が蓄積容量線に接続され走査信号は蓄積容量線にバイパスされるのでその信号伝達機能が損なわれる事がなく、走査線断線により歩留まりが低減される事もない。
【0045】
更に製造時、蓄積容量線のパターンとその上に重ねられる画素電極のパターンがずれたとしても、間隙にてそのずれが補償され、蓄積容量線と画素電極との重なり部分の面積が常に一定に保持される事から、ショットむらや焼き付き更にはショットブロックの視認等による表示不良を防止出来、高品位の表示画像を得られる。
【図面の簡単な説明】
【図1】本発明の一実施例のアクティブマトリクス基板を上面から見た一部概略説明図である。
【図2】本発明の一実施例の液晶表示装置を示し、図1のA−B線及びB−C線に相当する位置における概略断面図である。
【図3】本発明の他の変型例のアクティブマトリクス基板を上面から見た一部概略説明図である。
【図4】第1の従来例のアクティブマトリクス基板を上面から見た一部概略説明図である。
【図5】第2の従来例のアクティブマトリクス基板を上面から見た一部概略説明図である。
【図6】第2の従来例のアクティブマトリクス基板の蓄積容量電極のパターンと画素電極のパターン形成がずれた場合を上面から見た一部概略説明図である。
【符号の説明】
12…間隙
13…蓄積容量線
20…液晶表示装置
21…TFT
22…アクティブマトリクス基板
30…走査線
43…画素電極
[0001]
[Industrial applications]
The present invention relates to an active matrix liquid crystal display device in which a liquid crystal composition is held between an active matrix substrate having a thin film transistor (hereinafter abbreviated as TFT) arranged in a matrix as a driving element and a counter substrate. About.
[0002]
[Prior art]
2. Description of the Related Art In recent years, liquid crystal display devices that achieve high performance and high definition while having high density and large capacity have been put to practical use.
[0003]
Among these liquid crystal display devices, TFTs have been conventionally used because there is no crosstalk between adjacent pixels, a high contrast display can be obtained, a transmissive display is possible, and a large area can be easily achieved. An active matrix type liquid crystal display device provided with as a control element is often used.
[0004]
And, among active matrix substrates used for liquid crystal display devices, the storage capacitor line is formed of the same material as the scanning line and the gate electrode, and the pattern is formed together in the same forming step. The structure is similar to that of the first conventional example shown in FIG.
[0005]
That is, on the insulating substrate of the active matrix substrate 1, pixel electrodes 6 connected to the source electrodes 4a of the TFTs 4 provided at intersections of the scanning lines 2 and the signal lines 3 are formed in a matrix pattern. A storage capacitor line 7 made of a light-shielding member, which is patterned in the same step as the scanning line 2, is formed in a pattern below, and an auxiliary capacitor is formed between the storage capacitor line 7 and the pixel electrode 6 via a gate insulating film. I have.
[0006]
However, in such an active matrix substrate 1, the storage capacitance line 7 is formed so as to cross substantially the center of the pixel electrode 6, and the storage capacitance line 7 increases the light shielding area in the pixel electrode 6. For this reason, the aperture ratio has been reduced. Therefore, when such an active matrix substrate is used in a liquid crystal display device, the brightness of the displayed screen is reduced, and in order to obtain the required brightness, the amount of light of the backlight must be increased. There has been a problem that power consumption is increased and energy saving of the device is hindered.
[0007]
For this reason, instead of providing a storage capacitance line independent of the scanning line, a part of the scanning line 8 is made to function as a storage capacitance line as in the second conventional example shown in FIG. An active matrix substrate 11 has been developed in which an auxiliary capacitance is formed at a portion 10 where the scanning line 8 and the pixel electrode 9 overlap.
[0008]
[Problems to be solved by the invention]
Conventionally, in a transmissive liquid crystal display device using an active matrix substrate using a TFT as a driving element, a storage capacitor line is provided at a position which is independent of a scanning line and crosses substantially the center of a pixel electrode, and is provided with a pixel electrode. A storage capacitor is formed at the overlapping portion, or a part of the scanning line is used as a storage capacitor line, and a storage capacitor is formed at the overlapping portion of the pixel electrode and the scanning line.
[0009]
For this reason, in the former, the light transmission area in the pixel electrode is reduced, and thus the aperture ratio of the liquid crystal display device is reduced, the required screen luminance cannot be obtained, and the light amount of the backlight must be increased. However, there has been a problem that energy saving is hindered.
[0010]
On the other hand, in the latter, since a part of the scanning line also serves as the storage capacitance line, the storage capacitance line crossing the pixel electrode can be eliminated, and the aperture ratio of the active matrix substrate can be improved, but the auxiliary capacitance is not increased. Since the pixel electrode is formed at the overlapping portion with the scanning line at the edge of the pixel electrode, if the pattern of the scanning line and the pixel electrode is misaligned during manufacturing, the overlapping area between the pixel electrode and the scanning line varies. As a result, the size of the storage capacity has changed greatly.
[0011]
That is, for example, when the pixel electrode 9 is displaced from the scanning line 8 in the direction of the arrow s as shown in FIG. 6, the overlapping portion 10 of the scanning line 8 and the pixel electrode 9 is reduced as compared with FIG. In proportion, the storage capacity also becomes smaller than that in the case shown in FIG. 5, causing a display defect such as shot unevenness or burn-in, resulting in a problem of deteriorating the display quality.
[0012]
Furthermore, in a large-area liquid crystal display device, when one screen is divided into a plurality of blocks, and exposure and etching are performed for each block to form a pattern of a storage capacitor line or a pixel electrode, a scanning line for each block and The value of the storage capacitance fluctuates from block to block due to a shift in the pattern of the pixel electrodes, and a display defect occurs due to burn-in or shot unevenness in each block, and a shot block is visually recognized and display quality is degraded.
[0013]
In view of the above, the present invention has been made to solve the above-described problems. In an active matrix substrate using a TFT as a driving element, a conventional backlight is provided by stabilizing an auxiliary capacitor and improving screen brightness without causing a decrease in aperture ratio. It is an object of the present invention to provide an active matrix type liquid crystal display device having high display quality, while saving energy required for the device and preventing display defects.
[0014]
[Means for Solving the Problems]
According to an aspect of the present invention, there is provided an active matrix substrate having pixel electrodes arranged in a matrix, a counter substrate having a counter electrode opposed to the active matrix substrate, and the active matrix substrate. and in Akti I blanking matrix type liquid crystal display device comprising a liquid crystal composition sealed between the counter substrate, the active matrix substrate is formed on a transparent insulating substrate, a gate electrode above a gate insulating film A plurality of thin-film transistors arranged in a matrix and having a source electrode and a drain electrode sandwiching the active region, formed on the insulating substrate, and supplying a scanning signal to the gate electrode. And a plurality of signals for supplying a video signal to the drain electrode. A line at the insulating substrate, a storage capacitor line which is connected to the previous scan line holds the following thin-wire gap 10 [mu] m, it will be connected to the source electrode, one side, the thin wires And a matrix-shaped pixel electrode located in the gap between the pixels.
[0015]
According to a second aspect of the present invention, in the active matrix type liquid crystal display device according to the first aspect, the width of the scanning line is set to 10 μm or less .
[0016]
The invention described in claim 3, the active matrix type liquid crystal display device according to claim 1, by dividing one screen into a plurality of blocks, the exposure for each block, and producing etched.
[0018]
[Action]
According to the present invention, the scanning line is processed into a fine line, and the storage capacitor line is close to the preceding scanning line so as to have a fine line gap, while the preceding scanning line and the storage capacitance line are partially connected. As a result, the area of the pixel electrode is increased, the aperture ratio of the active matrix substrate and thus the screen brightness are improved, the power required for the backlight is reduced, and the thinning of the scanning line causes disconnection of the scanning line. However, since the signal is electrically bypassed to the storage capacitor line side and is conducted, the signal transmission function is not impaired.
[0019]
Further, according to the present invention, by forming the pixel electrode so that one side thereof is located in a fine line gap between the scanning line and the storage capacitor line, the pattern of the scanning line and the storage capacitor line and the pattern of the pixel electrode are overlapped. Even if the alignment is misaligned, the misalignment can be compensated for by the fine line-shaped gap, so that the required storage capacity is always at a required constant value, preventing display defects due to image sticking and uneven shots, and improving display quality. It is intended.
[0020]
【Example】
Hereinafter, an embodiment of the present invention will be described with reference to FIGS. Reference numeral 20 denotes an active matrix type liquid crystal display device, which is a nematic type liquid crystal composition between an active matrix substrate 22 using a TFT 21 as a driving element and a counter substrate 23 via alignment films 24 and 26 made of polyimide. The liquid crystal 27 is held and has polarizing plates 53 and 54.
[0021]
Here, the active matrix substrate 22 is formed by forming thallium (Ta), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), aluminum (Al), copper on an insulating substrate 28 made of transparent glass. It is composed of a single layer film or a laminated film made of a metal material such as (Cu) or an alloy thereof, supplies a scanning signal and partially projects as a gate electrode 31. The scanning line 30 of the stage and the storage line 13 of the (N + 1) th stage connected to the scanning line 30 at the connection portion 13a are separated from the scanning line 30 by a fine line-shaped gap 12 having a width of 5 μm. Have been.
[0022]
These are covered with a gate insulating film 32 made of silicon oxide (SiOx). Above the gate electrode 31 via the gate insulating film 32, i-type hydrogenated amorphous silicon (hereinafter referred to as i-type a -Si: H), a protective insulating film 35 made of silicon nitride (SiNx), and n-type amorphous silicon (hereinafter referred to as n-type a-Si) for obtaining a good ohmic contact. The ohmic film 40 is patterned to form a TFT 21 having a source region (B) and a drain region (C) sandwiching the channel region (A).
[0023]
Further, a pixel electrode 43 made of indium tin oxide (hereinafter, referred to as ITO) is pattern-formed on the gate insulating film 32, and an end 43 a of the pixel electrode 43 on the side of the storage capacitor line 13 is connected to the storage capacitor line 13. The pattern is formed so as to be approximately 2 μm larger than the end 13 b of the storage capacitor line 13 so as to be located substantially at the center of the gap 12 between the scanning lines 30. Then, a storage capacitor is formed by a portion where the storage capacitor line 13 and the pixel electrode 43 overlap.
[0024]
Furthermore, a single-layer film made of a metal material such as thallium (Ta), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), aluminum (Al), copper (Cu), or an alloy thereof, A source electrode 37 connected to the pixel electrode 43, a signal line 38, and a drain electrode 39 branched from the signal line 38 are formed by patterning.
[0025]
These upper surfaces are covered with an insulating protective film 41 made of silicon nitride (SiNx).
[0026]
On the other hand, the counter substrate 23 is made of chromium (Cr), which is a light-shielding material, on an insulating substrate 46 made of transparent glass, and has a red (R), green (G), and blue (B) coloring layer in each region. It has a black matrix 47 and a counter electrode 48 made of ITO.
[0027]
Next, a method for manufacturing the liquid crystal display device 20 will be described. First, the active matrix substrate 22 is formed by sputtering a metal material such as thallium (Ta), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), or aluminum (Al) on an insulating substrate 28 by sputtering. A single-layer film or a stacked film made of the alloy is formed, and the scanning line 30, the gate electrode 31, and the storage capacitor line 13 are patterned by using a photolithography technique of etching using a photoresist (not shown) as a mask. .
[0028]
Next, after a gate insulating film 32, an (i-type a-Si: H) film, and a silicon nitride (SiNx) film are laminated and formed by a plasma CVD method, a negative resist is applied, and insulation is performed using the gate electrode 31 as a mask. Exposure is performed from the back surface of the substrate 28, and a negative resist is patterned to leave an exposed portion. Then, using this negative resist as a mask, a silicon nitride (SiNx) film is shaped in a self-aligned manner with respect to the gate electrode 31 to form a protective insulating film 35. Thus, the protective insulating film 35 is formed to be smaller than the gate electrode 31 by 0 to 3 μm by diffraction of light at the time of back surface exposure.
[0029]
Subsequently, an (n-type a-Si) film is formed on the (i-type a-Si: H) film using a plasma CVD method, and the (i-type a-Si: H) film and the (n-type a-Si: H) film are formed by photolithography. The semiconductor layer 34 and the ohmic layer 40 are patterned by photoetching the n-type a-Si) film.
[0030]
Next, after forming an ITO film by a sputtering method, a resist is applied, a resist is patterned by a photolithography technique, and the ITO film is photo-etched using the resist as a mask to pattern-form the pixel electrode 43.
[0031]
Further, a single layer film or a laminated film made of a metal material such as thallium (Ta), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), aluminum (Al), or an alloy thereof is formed by a sputtering method. After forming a film and patterning the source electrode 37, the signal line 38, and the drain electrode 39 by photolithography, an insulating protective film 41 made of silicon nitride (SiNx) is formed and formed into a predetermined shape by photolithography. The active matrix substrate 22 is formed by patterning.
[0032]
Next, in the counter substrate 23, a chromium (Cr) film is formed on the insulating substrate 46 by a sputtering method, and etched into a predetermined shape by a photolithography technique to form a black matrix 47 in a lattice shape. Then, after a layer in which a pigment is dispersed is applied to the black matrix 47, pattern exposure and development are repeated to form three stripe regions of red, green, and blue on the black matrix 47. The counter substrate 23 is formed by forming the electrode 48 on the entire surface.
[0033]
Subsequently, alignment films 24 and 26 made of low-temperature curing type polyimide are applied by printing on the entire surface of the active matrix substrate 22 and the counter substrate 23 on the pixel electrode 43 side and the counter electrode 48 side. After performing a rubbing process so that the axis becomes 90 °, the two substrates 22 and 23 are assembled to face each other to form a cell, and a nematic liquid crystal 27 is injected into a gap therebetween and sealed. Then, polarizing plates 53 and 54 are attached to the insulating substrates 28 and 46 of the substrates 22 and 23, respectively, to complete the liquid crystal display device 20.
[0034]
With this configuration, the width of the scanning line 30 is patterned to the minimum processing size, and the storage capacitor line 13 is brought close to the scanning line 30 so that the gap 12 between the scanning line 30 and the storage capacitor line 13 becomes the minimum processing size. By forming the pattern, the area of the light transmitting portion of the pixel electrode 43 can be increased, so that the aperture ratio of the active matrix substrate 22 can be improved, and the screen brightness of the liquid crystal display device 20 can be improved. Therefore, the amount of light of the backlight can be reduced, and energy saving of the device can be promoted.
[0035]
In addition, by setting the width of the scanning line 30 to the minimum processing size, even if a disconnection occurs, the scanning line 30 is connected to the storage capacitor line 13 at the connection portion 13a and is electrically conducted, thereby impairing the scanning signal supply function. The yield is not reduced due to the disconnection of the scanning line 30 during manufacturing.
[0036]
Furthermore, at the time of manufacturing, even if the pattern of the pixel electrode 43 superimposed on the storage capacitor line 13 is shifted, the amount of protrusion of the pixel electrode 43 into the gap 12 between the storage capacitor line 13 and the scanning line 30 is actually changed. However, since the area of the overlapping portion of the storage capacitor line 13 and the pixel electrode 43 is the same, the value of the storage capacitor is not changed, and display defects due to shot unevenness and image sticking can be prevented, and a high-quality display image can be prevented. Can be obtained.
[0037]
The present invention is not limited to the above embodiment, and can be modified without departing from the scope of the invention. For example, the material of the gate electrode, the scanning line or the signal line, or the gate insulating film or the insulating protective film Is arbitrary.
[0038]
The width of the scanning line and the width of the gap between the scanning line and the storage capacitor line are also arbitrary. However, in order to improve the aperture ratio, it is desirable that the processing be thin, and more preferably 10 μm or less.
[0039]
However, for the width of the gap between the scanning line and the storage capacitor line, it is necessary to further consider the overlay accuracy of the pattern of the storage capacitor line and the scan line and the pixel electrode pattern. For example, the overlay accuracy of both patterns is a μm If the width of the gap is set so as to maintain at least 2a (μm), the displacement at the time of pattern formation can be surely compensated, and the variation of the storage capacitance can be more reliably prevented.
[0040]
Further, the shape of the storage capacitor line is also arbitrary as long as it is close to the scanning line so as to maintain a fine line-shaped gap. For example, as in another modification shown in FIG. Alternatively, the storage capacitor line 60 that is brought into close proximity may be formed in a π-shaped pattern instead of a linear shape, and may be connected to the scanning line 57 at the connection portion 60a.
[0041]
When formed in this manner, the storage capacitor line 60 can also serve as a part of a light shield, and light is also transmitted to the hatched area (D) of the pixel electrode 61. Can be further improved.
[0042]
The method of manufacturing the active matrix substrate is also arbitrary. For example, in the case of a large area liquid crystal display device, one screen is divided into a plurality of blocks, and exposure and etching are performed for each block, and a storage capacitor line or a pixel electrode is formed. Etc. may be patterned. Even in such a manufacturing method, since the value of the storage capacity does not vary from block to block as in the related art, even when the halftone display is performed, the shot block due to burn-in or block unevenness of each block is not visually recognized. And display quality can be improved.
[0043]
【The invention's effect】
As described above, according to the present invention, the area of the light transmitting portion of the pixel electrode can be enlarged by patterning the scanning line and the gap between the scanning line and the storage capacitor line in a fine line shape, and Since the aperture ratio and thus the screen brightness of the liquid crystal display device can be improved, energy saving can be promoted by reducing the amount of light of the backlight.
[0044]
Moreover, even if the scanning line is thinned and a disconnection occurs, a part of the scanning signal is connected to the storage capacitance line and the scanning signal is bypassed to the storage capacitance line, so that the signal transmission function is not impaired. The yield is not reduced.
[0045]
Further, even if the pattern of the storage capacitor line and the pattern of the pixel electrode superimposed thereon are shifted during manufacturing, the shift is compensated by the gap, and the area of the overlapping portion between the storage capacitor line and the pixel electrode is always constant. Since the shot blocks are held, it is possible to prevent a display defect due to shot unevenness or burn-in and visual recognition of a shot block, and to obtain a high-quality display image.
[Brief description of the drawings]
FIG. 1 is a partially schematic explanatory view of an active matrix substrate according to an embodiment of the present invention as viewed from above.
FIG. 2 is a schematic cross-sectional view showing a liquid crystal display device according to an embodiment of the present invention at a position corresponding to the line AB and the line BC in FIG.
FIG. 3 is a partially schematic explanatory view of an active matrix substrate of another modified example of the present invention as viewed from above.
FIG. 4 is a partial schematic explanatory view of a first conventional active matrix substrate as viewed from above.
FIG. 5 is a partial schematic explanatory view of a second conventional active matrix substrate viewed from above.
FIG. 6 is a partial schematic explanatory view of a case where a pattern of a storage capacitor electrode and a pattern of a pixel electrode of a second conventional active matrix substrate are displaced, as viewed from above.
[Explanation of symbols]
12 gap 13 storage capacitance line 20 liquid crystal display device 21 TFT
22 Active matrix substrate 30 Scanning line 43 Pixel electrode

Claims (3)

マトリクス状に配列される画素電極を有するアクティブマトリクス基板及び、このアクティブマトリクス基板に対向され対向電極を有する対向基板並びに、前記アクティブマトリクス基板及び前記対向基板の間に封入される液晶組成物とを具備するアクテブマトリクス型液晶表示装置において、
前記アクティブマトリクス基板が、
透明な絶縁基板上に形成され、ゲート絶縁膜を介しゲート電極上方に設けられる活性領域並びに、この活性領域を挾みソース電極更にはドレイン電極を備え、マトリクス状に配列される複数の薄膜トランジスタと、
前記絶縁基板上にて形成され、前記ゲート電極に走査信号を供給する細線状の複数の走査線と、
前記ドレイン電極に映像信号を供給する複数の信号線と、
前記絶縁基板上にて、10μm以下の細線状の間隙を保持して前段の走査線に接続される蓄積容量線と、
前記ソース電極に接続してなり、一側が、前記細線状の間隙内に位置するマトリクス状の画素電極とを具備する事を特徴とするアクティブマトリクス型液晶表示装置。
An active matrix substrate having pixel electrodes arranged in a matrix, a counter substrate facing the active matrix substrate and having a counter electrode, and a liquid crystal composition sealed between the active matrix substrate and the counter substrate are provided. in Akti I blanking matrix type liquid crystal display device which,
The active matrix substrate,
An active region formed on a transparent insulating substrate and provided above the gate electrode with a gate insulating film interposed therebetween, and a plurality of thin film transistors having a source electrode and a drain electrode sandwiching the active region and arranged in a matrix;
A plurality of fine scanning lines formed on the insulating substrate and supplying a scanning signal to the gate electrode;
A plurality of signal lines for supplying a video signal to the drain electrode,
The insulated by the substrate, the storage capacitor line which is connected to the previous scan line holds the following thin-wire gap 10 [mu] m,
An active matrix liquid crystal display device, comprising: a matrix-shaped pixel electrode connected to the source electrode and having one side positioned in the fine line gap .
前記走査線の幅が10μm以下である事を特徴とする請求項1記載のアクティブマトリクス型液晶表示装置。Active matrix liquid crystal display device according to claim 1 Symbol mounting and wherein the width of the scanning line is 10μm or less. 一画面を複数のブロックに分割して、ブロック毎に露光、エッチングを行い製造されたことを特徴とする請求項1記載のアクティブマトリクス型液晶表示装置。 2. The active matrix type liquid crystal display device according to claim 1, wherein one screen is divided into a plurality of blocks, and each block is exposed and etched to manufacture .
JP24910495A 1995-09-27 1995-09-27 Active matrix type liquid crystal display Expired - Fee Related JP3593391B2 (en)

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