JP3591730B2 - A / D converter - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an A / D converter having a test function for determining a failure of a built-in comparator.
[0002]
[Prior art]
FIG. 5 is a block diagram for explaining a conventional technique for performing a function test of a general A / D converter. In FIG. 5, a potential AVDD is supplied from a first power supply 511 to an analog circuit of the A / D converter 500 via an analog power supply terminal 501. DVDD is supplied to the digital circuit of the A / D converter 500 from the second power supply 512 via the digital power supply terminal 502. In the ladder resistance in the A / D converter 500, the point where the highest reference potential is applied is the point where the potential VRT is applied from the third power supply 513 via the upper reference power supply terminal 503 and the lowest reference potential is applied. Is supplied with a potential VRB from a fourth power supply 514 via a lower reference power supply terminal 504.
[0003]
Further, in FIG. 5, an analog input voltage VIN is supplied to the A / D converter 500 from an analog source 515 via an analog voltage input terminal 505. The digital code 507 obtained from the A / D converter 500 is output to the outside, and the digital code 507 is taken into an LSI tester for inspection. Here, it is assumed that the A / D converter 500 outputs an 8-bit digital code 507. The A / D converter 500 is connected to the ground 508, and further receives a sampling clock of the A / D converter from a clock source 516 via a clock input terminal 506.
[0004]
In a normal inspection method, first, the first to fourth power supplies are turned on, and the analog power supply terminal 501, the digital power supply terminal 502, the upper reference power supply terminal 503, and the lower reference power supply terminal 504 are supplied with AVDD, DVDD, VRT, Apply VRB. Next, a sampling clock is applied to the clock input terminal 506 from the clock source 516. Further, the resolution of the analog input voltage VIN output from the analog source 515 is separately set, and the analog input voltage VIN is stepwise increased by the set resolution and supplied to the analog input voltage terminal 505. The digital code 507 output in this manner is taken into an LSI tester, and the quality is determined by a pre-programmed process.
[0005]
[Problems to be solved by the invention]
The n-bit A / D converter has 2 ^{n -1} comparators, and the output result is converted into an n-bit digital code by a logic circuit arranged at the subsequent stage and output. However, due to the configuration of the logic circuit, there is a case in which even if one or a plurality of comparators outputs an erroneous comparison result, no miscode occurs.
[0006]
Here, for convenience of explanation, n = 3 by taking a 3-bit A / D converter as an example. Therefore, the number of comparators is seven. The output of each comparator is determined by where the voltage value to be compared with VIN input to the comparator is located between VRT and VRB. That is, the comparator whose comparison voltage value is between VIN and VRT outputs 1 and the comparator whose comparison voltage value is between VIN and VRB outputs 0.
[0007]
FIG. 6 is a circuit diagram illustrating a circuit for converting the output of the A / D converter into a digital code. In this circuit, a point at which the outputs of the seven comparators change from 1 to 0 is calculated by a subsequent logic circuit to obtain a 3-bit digital code output.
[0008]
In FIG. 6, in addition to the outputs C6 to C0 of the seven comparators, a comparison signal corresponding to VRT and positioned above C6, and a comparison signal corresponding to VRB and positioned lower than C0 are indicated by under. A total of nine signals are input to eight two-input exclusive OR circuits 601.
[0009]
The exclusive OR circuit 601 is a circuit for detecting a change point of the output of the comparator, inputs two signals at positions adjacent to each other, and outputs signals E7 to E0 indicating input mismatch. The OR circuit 602 encodes the outputs E7 to E0 of the exclusive OR circuit 601 and outputs a 3-bit digital code.
[0010]
For example, if the comparison output signal of over becomes 1 and the comparison output signal from C6 to under becomes 0, the output E7 of the exclusive OR circuit 601 becomes 1 and the encoded output becomes 111.
[0011]
Here, if there is a comparator which is positioned between VIN and VRB and outputs all 0s, and there is a comparator which outputs 1s, among the outputs E6 to E0 of the exclusive OR circuit 601, Although there are some which become 1, the output digital code is 111 and the result does not change. There is a problem that such a defect cannot be detected by a conventional test, and an expensive analog test system must be used to detect such a defect.
[0012]
SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problem. When an comparator output from an A / D converter outputs an erroneous comparison result, the error is detected without using an expensive analog test system. It is an object of the present invention to provide an A / D converter having a simple test function capable of making a determination.
[0013]
[Means for Solving the Problems]
To solve this problem, an A / D converter according to claim 1 of the present invention includes an A / D converter having a built-in comparator group for comparing a comparison potential generated from an upper reference potential and a lower reference potential with an input voltage. A group selecting means (switch matrix 211) for sequentially selecting a group excluding a group including a comparator in which the comparison result of the comparison potential and the input voltage is inverted from among the plurality of groups of comparators; Group determining means (exclusive OR circuit 212) for detecting that the outputs of all comparators in the group selected by the group selecting means are the same, and outputs of all comparators in the group selected by the group determining means Are not the same, the comparator of the group is judged to be defective. Failure judging means for (a logic circuit 213) and those having a.
[0014]
According to the above configuration, the comparator is divided into a plurality of groups by the group selection unit, and the outputs of all the comparators in the selected group are the same for groups other than the group including the comparator whose comparison result is inverted by the group determination unit. , The quality of the group can be determined based on whether or not the comparator group is defective. Therefore, it is possible to determine the defect of the comparator group simply by applying the analog input voltage having relatively low resolution.
[0015]
An A / D converter according to a second aspect of the present invention is the A / D converter according to the first aspect, wherein the group determination means sequentially selects the outputs of the individual comparators included in each of the selected groups. And means for detecting that the outputs of the sequentially selected individual comparators are all specific values.
[0016]
According to the configuration, it is possible to sequentially select the outputs of the individual comparators in the selected group and check whether or not the output has a specific value, so that the group determination unit can be easily realized, It is possible to determine a defect in the comparator group only by applying an analog input voltage having relatively low resolution.
[0017]
An A / D converter according to a third aspect of the present invention is the A / D converter according to the first aspect, wherein the group determining means adds the outputs of all comparators included in each of the selected groups. Means for detecting that the value added by the adding means matches the number of comparators included in the group selected by the group selecting means or is zero.
[0018]
According to the configuration, it is possible to confirm whether or not the added value of the outputs of all the comparators included in the selected group is a specific value, so that the group determination unit can be easily realized. By simply applying an analog input voltage having a relatively coarse resolution, it is possible to determine a defect in the comparator group.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram illustrating a configuration example of an A / D converter according to an embodiment of the present invention. In the configuration example of FIG. 1, the A / D converter has 8 bits for convenience of explanation.
[0022]
In FIG. 1, a potential AVDD is supplied to an analog circuit of an A / D converter via an analog power supply terminal 101, a DVDD is supplied to a digital circuit via a digital power supply terminal 102, and the highest reference potential of the A / D converter. The point is supplied with the potential VRT via the upper reference power supply terminal 103, and the point to which the lowest reference potential is supplied is supplied with the potential VRB via the lower reference power supply terminal 104. The analog input voltage VIN is input to the A / D converter via the analog voltage input terminal 105.
[0023]
Inside the A / D converter, a ladder resistor 111 that generates 255 comparison voltages from VRT and VRB, a group of 255 comparators 112, and an encoder 113 that converts the output of the comparator group and outputs a digital code 107 And a failure determination logic circuit 114 that performs failure determination on the comparator output of the A / D converter and outputs a failure determination signal 109.
[0024]
FIG. 2 is a circuit diagram showing a configuration of a failure determination logic circuit for performing failure determination of a comparator built in the A / D converter according to the first embodiment of the present invention. In FIG. 2, 255 comparator outputs 201 are divided into eight groups each of 32 by the preceding stage of the switch matrix 211, and the divided 32 comparator outputs are further selected one by one by the subsequent stage of the switch matrix 211. Is done. The output 202 of the switch matrix is compared with 1 or 0 by an exclusive OR circuit 212, and the output is input to a logic circuit 213 that performs a defect determination.
[0025]
When a preset analog input voltage VIN is input to the analog voltage input terminal 105, this is compared with a 255-stage comparison voltage generated by the ladder resistor 111 in the comparator group 112, and the 255 comparator outputs 201 are output to the switch matrix 211. Is input to The switch matrix 211 selects a comparator group in order from the top, and the logic circuit 213 determines the comparison input of the exclusive OR circuit 212 in accordance with the output of the selected comparator group.
[0026]
Here, it is assumed that the supposed analog input voltage VIN has such a value that all the first five groups of the comparator groups are 1 and all the lower two groups are 0, and that the sixth group from the top has a change point. I do. The switch matrix 211 is selected in order from the upper comparator group, and the output is compared with the comparison input by the exclusive OR circuit 212. At this time, the comparison input of the exclusive OR circuit 212 is fixed to 1 for the upper five groups.
[0027]
After comparing the top five groups, the sixth group having a change point is skipped, and the lower two groups are selected. At this time, the comparison input of the exclusive OR circuit 212 is fixed to 0. In this way, the switch matrix 211 operates so that the output of the exclusive OR circuit 212 always becomes 0, and the logic circuit 213 outputs a failure determination signal when 1 is detected in the output of the exclusive OR circuit 212. 203 is output.
[0028]
By setting the analog input voltage VIN so that a change point exists in any one of the comparator groups and performing the above-described operation eight times, the analog input voltage with relatively coarse resolution is applied to VIN. A simple test for judging a defect of the eight comparator groups can be performed.
[0029]
FIG. 3 is a circuit diagram showing a configuration of a failure determination logic circuit for performing failure determination of a comparator built in an A / D converter according to Embodiment 2 of the present invention. In FIG. 3, 255 comparator outputs 301 are divided into eight groups of 32 each by a switch matrix 311, and one group of comparator outputs sequentially selected from a higher-order group is used as a switch matrix output 302 as an adder in a subsequent stage. Input to 312. The adder 312 adds the 32 comparator outputs that have been input.
[0030]
Here, it is assumed that the supposed analog input voltage VIN has such a value that all the first five groups of the comparator groups are 1 and all the lower two groups are 0, and that the sixth group from the top has a change point. Then, the addition result of the upper five groups is always 32, and the addition result of the lower two groups is always zero. In this way, the logic circuit 313 outputs the failure determination signal 303 when a value other than 32 or 0 is detected in the output of the adder 312 for the group excluding the group where the change point exists.
[0031]
By setting the analog input voltage VIN so that a change point exists in any one of the comparator groups and performing the above-described operation eight times, the analog input voltage with relatively coarse resolution is applied to VIN. A simple test for judging a defect of the eight comparator groups can be performed.
[0032]
FIG. 4 is a circuit diagram showing a configuration of a failure determination logic circuit for determining failure of a comparator built in an A / D converter according to a third embodiment of the present invention. In FIG. 4, a logic circuit for determining a defect of a comparator includes a flip-flop group 411 and a logic circuit 413 having a preset comparison table 412.
[0033]
The flip-flop group 411 operates with the sampling clock of the A / D converter provided from the clock input terminal 402, and stores 255 comparator outputs 401. The comparison table 412 is configured so that all 1s from the highest position to an appropriate place are all 1s, and all the lowermost positions are 0s. The comparison table 412 has several types in which the changing points of 1 and 0 are changed. Further, in consideration of the error of the change point, the change point portion of the comparison table 412 is configured to be either 1 or 0 within a certain range.
[0034]
In the test of the A / D converter, several types of analog input voltages VIN corresponding to the settings of the comparison table 412 are input, and the 255 comparator outputs 401 are stored in the flip-flop group 411. Next, the logic circuit 413 compares the output of the flip-flop group 411 with the value set in the comparison table 412, and outputs a failure determination signal 403 when detecting a mismatch.
[0035]
In this way, several kinds of set values of the comparison table that have an appropriate change point are prepared, the corresponding analog input voltage VIN is applied to the A / D converter, and the comparator output is compared with the set value of the comparison table. By doing so, a simple test for judging the failure of the comparator can be performed only by applying the analog input voltage with relatively coarse resolution to VIN.
[0036]
【The invention's effect】
As described above, according to the present invention, the comparator is divided into a plurality of groups by the group selecting unit, and the outputs of all the comparators except for the group including the comparator whose comparison result is inverted by the group determining unit are output. Since the quality of the group can be determined based on whether or not they are the same, the failure of the comparator group can be determined only by applying an analog input voltage having relatively coarse resolution.
[0037]
Further, according to the present invention, the temporarily stored output of the comparator can be compared with the set value held in the comparison table, so that the failure of the comparator group can be determined only by applying the analog input voltage having relatively coarse resolution. be able to.
[0038]
Therefore, according to the present invention, it is possible to perform a simple A / D converter test using an inexpensive logic test system without requiring an expensive analog test system having a high input voltage resolution. Sometimes it is possible to carry out tests.
[0039]
As described above, according to the present invention, a simple test according to the present invention is performed at the time of a probe test using an inexpensive logic test system, and a detailed test is performed by a final test using an expensive analog test system. This will be effective in reducing test costs and improving yield in final inspection.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration example of an A / D converter according to an embodiment of the present invention.
FIG. 2 is a circuit diagram showing a configuration of a failure determination logic circuit of a comparator built in the A / D converter according to the first embodiment of the present invention.
FIG. 3 is a circuit diagram showing a configuration of a failure determination logic circuit of a comparator built in an A / D converter according to a second embodiment of the present invention.
FIG. 4 is a circuit diagram showing a configuration of a failure judgment logic circuit of a comparator built in an A / D converter according to a third embodiment of the present invention.
FIG. 5 is a block diagram illustrating a function test of a conventional general A / D converter.
FIG. 6 is a circuit diagram for converting an output of a comparator in a conventional A / D converter into a digital code.
[Explanation of symbols]
101, 501 Analog power supply terminal 102, 502 Digital power supply terminal 103, 503 Upper reference power supply terminal 104, 504 Lower reference power supply terminal 105, 505 Analog input voltage terminal 107, 507 Digital code 109, 203, 303, 403 Failure judgment signal 111 Ladder Resistor 112 Comparator group 113 Encoder 114 Failure judgment logic circuit 201, 301, 401 Comparator output 202, 302 Switch matrix output 211, 311 Switch matrix 212, 601 Exclusive OR circuit 213, 313, 413 Logic circuit 312 Adder 402, 506 Clock input terminal 411 Flip-flop 412 Comparison table 500 A / D converter 508 Ground 511, 512, 513, 514 Power supply 515 Analog source 516 Clock source 602 OR circuit

Claims (3)

An A / D converter including a comparator group for comparing a comparison potential generated from an upper reference potential and a lower reference potential with an input voltage,
Group selecting means for sequentially selecting a group excluding a group including a comparator in which the comparison result of the comparison potential and the input voltage is inverted among the comparator groups divided into a plurality of groups;
Group determination means for detecting that the outputs of all comparators of the group selected by the group selection means are the same,
A failure determination unit that determines that the comparators of the group are defective when it is detected that the outputs of all the comparators of the group selected by the group determination unit are not the same;
An A / D converter comprising: The group determining means sequentially selects the outputs of the individual comparators included in the sequentially selected groups, and detects that the outputs of the sequentially selected individual comparators are all specific values. 2. The A / D converter according to claim 1, comprising: The group determining means includes means for adding outputs of all comparators included in each of the sequentially selected groups, and a comparator in which a value added by the adding means is included in a group selected by the group selecting means. 2. The A / D converter according to claim 1, further comprising: means for detecting whether the number matches or is zero.

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