JP3206295B2 - Analog / digital converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital converter used, for example, for high-speed analog / digital conversion of video signals and the like, and more particularly to improving the inspection accuracy.

[0002]

2. Description of the Related Art In recent years, digitization in a video signal band has been rapidly progressing. There is an increasing demand for high-speed analog / digital converters as means for converting these analog signals into digital signals. These analog / digital converters require high-speed conversion, and a medium-speed type such as a conventional successive approximation type cannot be used. An analog / digital converter of a type called a complete parallel comparison type or a serial / parallel comparison type is mainly used in this signal band.

[0003] A fully parallel comparison type analog / digital converter will be described below. A fully parallel comparison type analog / digital converter uses a number of voltage comparators in parallel according to the resolution, and generally requires 2 ^N -1 voltage comparators to obtain an N-bit resolution. is there. Here 4b
Description will be made with an example having an it resolution.

FIG. 3 shows a conventional complete parallel comparison type analog / digital converter. In FIG. 3, reference numeral 301 denotes a reference voltage dividing resistor, and 302 denotes a voltage comparator.
Reference voltage terminals 2 are supplied with fifteen voltages obtained by dividing the reference voltage Vref inputted to the terminal 307 by the reference voltage dividing resistor 301. The input voltage terminals of the voltage comparators 302 are connected in common, and an analog signal Vin from a terminal 308 is input.

Reference numeral 303 denotes a flip-flop that latches the comparison output of the voltage comparator 302, and 304 denotes a position detection circuit that receives the latched comparison output and obtains an output from a logic circuit at a position corresponding to the magnitude of the input voltage. A flip-flop 305 latches the output of the position detection circuit 304,
A terminal 306 receives the output of the flip-flop, converts it into 4-bit digital data corresponding to the analog signal value, and
9 is an encoder that outputs the data.

[0006] The operation of the analog / digital converter thus configured will be described. The analog input voltage is input to the voltage comparator 302 and is compared with a plurality of reference voltages obtained from the reference voltage dividing resistor 301. The output of the voltage comparator 302 is usually as shown in FIG. Plurality of position detection circuits 30
4 corresponds to the magnitude of the input voltage, and the position detection circuit 304 corresponding to the magnitude of the input voltage from the comparison output.
Outputs data. The encoder 306 outputs digital data according to the input voltage according to which position detection circuit 304 has output data.

Here, the position detection circuit 304 is designed by assuming a voltage comparison output result other than the pattern shown in FIG. If only the pattern of FIG. 4 is considered, a pattern that is 01 in two adjacent data may be detected. However, here, 00 is selected from among three adjacent data.
1 is detected. This is to prevent the output of a plurality of position signals when the voltage comparator malfunctions due to various factors.

Factors that cause the voltage comparator to malfunction include noise or the offset voltage of the voltage comparator itself. Due to these factors, the voltage comparison output result is 000011011111.
It is possible to output a pattern such as 1111. In this case, if two adjacent data were processed,
Since two 01 patterns are detected and a plurality of rows of position signals are output to the encoder 306, the output data of the encoder may output a large error. But,
When a 001 pattern is detected from three adjacent data, even if the voltage comparison output result is input, a series of position signals is output, so that a large number of errors can be suppressed.

[0009]

In the test of the conventional analog / digital converter, the analog signal is input to the voltage comparator 302, and the final digital output data is processed. For example, there is a DC test using a ramp wave as an analog input signal. In this test, digital output data corresponding to the ramp input wave is sampled, an approximate straight line of the sampled data is calculated by the least squares method, and this is set as an ideal straight line. Method.

However, there is a problem that a test of a digital circuit portion cannot be sufficiently performed by a test using an analog signal input. That is, when the analog signal is input, the voltage comparator 302 which cannot be generated in the normal operation is used.
Since it is very difficult to obtain the comparison output of the position detection circuit 304, the operation of the position detection circuit 304 cannot be sufficiently tested. Further, the operation of the voltage comparator 302 could not be confirmed in the analog circuit portion. An object of the present invention is to eliminate and solve the above conventional problems.

[0011]

In order to solve the above-mentioned problems, in the analog / digital converter of the present invention, at least the flip-flop for latching the voltage comparison result has a scan path function in the configuration of the digital circuit portion. Flip-flops are realized, the flip-flops are serially connected separately from the original data path, the input of the serially connected flip-flop is provided with an input terminal for inputting a test pattern, and the flip-flops are serially connected. An output terminal for outputting an output signal of the flip-flop is provided.

[0012]

According to the above arrangement, the test pattern of the position detection circuit, which has been difficult to give by analog signal input,
The data can be sequentially applied to flip-flops connected in series from the input terminal. As a result, the inspection accuracy of the logic section of the fully parallel type analog / digital converter and the serial / parallel comparison type analog / digital converter is improved.

Further, by obtaining from the output terminal the data of the flip-flop which latches the comparison result of the analog input voltage, it becomes possible to observe the voltage comparison result of the voltage comparator which could not be observed conventionally. There are advantages too.

[0014]

Embodiments of the present invention will be described below. 4 in FIG.
1 shows an embodiment of a bit analog / digital converter.
In the figure, 101 is a reference voltage dividing resistor, 102 is a voltage comparator, 103 is a scan flip-flop (SFF) for latching a voltage comparison result, and the output of 15 scan flip-flops is sequentially input to the lower scan flip-flop. So that they are connected in series. 104 is a position detection circuit that converts the latched voltage comparison result into an input voltage position signal, 105 is a flip-flop that latches the position detection signal, and 106 is an encoder that converts the input voltage position signal into 4-bit digital data and outputs it to the output terminal 112 It is.

Reference numeral 107 denotes each scan flip-flop 10
3 is a scan path input terminal for inputting test data to be latched, 108 is a scan path output terminal for extracting data latched by each scan flip-flop,
Reference numeral 109 denotes a mode switching terminal for switching the input of the scan flip-flop 103 to either the comparison output of the voltage comparator 102 or the test data.

FIG. 2 shows an example of an internal circuit of the scan flip-flop 103 used in the present invention. 201 is an analog switch, 202 is an inverter, and 203 is a data flip-flop. Whether the test data (DT signal) from the scan path input terminal 107 or the comparison output (D signal) from the voltage comparator 102 is input to the data terminal of the data flip-flop 203 is determined by the mode switching terminal 109. The selection is made by a switching signal (S signal).

(Normal operation mode) Mode switching terminal 1
The normal operation mode is set by fixing 09 to the LOW level. Reference voltage terminal 110 of voltage comparator 102
The, by the reference voltage dividing resistors 101 a reference voltage Vref and inputs a 2 ⁴ -1 kinds of voltage resistance division. Also, the input voltage terminals 111 of all the voltage comparators are connected in common,
An analog signal Vin is input. The comparison result of the voltage comparator 102 is latched by the scan flip-flop 103,
The data is converted into digital data by a position detection circuit 104, a flip-flop 105, and an encoder 106.

(Scan Test Mode) The scan test mode is set by fixing the mode switching terminal 109 to HIGH level. In the scan test mode, the comparison output of the voltage comparator is disconnected from the flip-flop 103, and the scan path input terminal 107 is connected to the scan flip-flop 103. The scan flip-flops are sequentially output as lower scan flip-flops, and the output of the lowermost scan flip-flop is connected to the scan path output terminal 108.

In the scan path input terminal 107, for example, a malfunction of the voltage comparator is assumed in synchronization with the clock.
When a pattern of 1101000000000000 is input, data is shifted by serial scan and 1
The data of the pattern is set in each of the five scan flip-flops 103. The setting data is input to the encoder 106 via the position detection circuit 104 and the flip-flop 105 and outputs digital data.
In the logic test mode, the determination is made by comparing the digital data output from the encoder 106 with the expected value of the input pattern.

(Observation of Voltage Comparison Result) By combining the normal operation mode and the scan test mode, the comparison result of the voltage comparator 102 can be directly observed.
After the voltage comparison operation is performed in the normal operation mode and the comparison output is latched by the scan flip-flop, the mode is switched to the scan test mode. The voltage comparison result can be observed from the scan output terminal 108 by serial scan. In the past, there was no way to detect all failures of an analog / digital converter from analog measurement results of encoder output digital data. However, by using the scan test mode, the comparison result of the voltage comparator 102 was directly observed. Will be able to

In this embodiment, the completely parallel comparison type analog / digital converter has been described. However, it is needless to say that the present invention can be applied to a serial / parallel comparison type analog / digital converter.

[0022]

As described above, according to the present invention, by introducing a scan test into an analog / digital converter, it is possible to perform a logic test of a digital circuit portion which could not be sufficiently tested conventionally. Also, in the analog circuit portion, the comparison result of the voltage comparator, which cannot be observed conventionally, can be observed. As a result, the inspection accuracy of the analog / digital converter is significantly improved.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an analog / digital converter according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a scan flip-flop of the converter.

FIG. 3 is a configuration diagram of a conventional analog / digital converter.

FIG. 4 is an explanatory diagram of input / output characteristics of a voltage comparator in an analog / digital converter.

[Explanation of symbols]

 101, 301 Reference voltage dividing resistor 102, 302 Voltage comparator 103 Scan flip-flop 104, 304 Position detection circuit 106, 306 Encoder 107 Scan path input terminal 108 Scan path output terminal 109 Mode switching terminal

Claims (2)

(57) [Claims] An input analog voltage is set in a normal operation mode.
Applying to the plurality of voltage comparators;
Comparison operation of multiple reference voltages and input analog voltage by comparator
And a plurality of voltages of the plurality of voltage comparators.
The voltage comparison output is latched by the corresponding flip-flop.
Switch to scan test mode,
The voltage comparison output latched by the flop is connected in series.
Move between flip-flops and flip one
Realized by the step of obtaining the voltage comparison output from the flop
To test voltage comparator of analog / digital converter used
Law. 2. The analog / digital converter according to claim 1, wherein
Column comparison type analog / digital converter or serial / parallel comparison
Type analog / digital converter,
The voltage comparison of the analog / digital converter according to claim 1.
Test method of the vessel.