JP3570776B2 - Magnetic recording / reproducing device - Google Patents

Description

[0001]
[Industrial applications]
The present invention relates to a magnetic recording / reproducing apparatus, and more particularly to a magnetic recording / reproducing apparatus that performs recording / reproduction by adding data to a recording / reproduction video signal in a double speed mode or the like.
[0002]
[Prior art]
A configuration of a conventional magnetic recording / reproducing apparatus for extracting a recording / reproducing RF signal reproduced from a magnetic recording medium and a data signal (video subcode) included in a recording / reproducing video signal will be described below with reference to FIG. explain.
[0003]
Referring to FIG. 4, the magnetic recording / reproducing apparatus is of a helical scan type in which a drum 79 having first and second magnetic heads 80a and 80b rotates, and one field is recorded on one track on a magnetic tape 78. During reproduction, the reproduction RF signal is switched and output alternately for each field by the two magnetic heads 80a and 80b. The recording / reproducing amplifier 81 includes two amplifiers, and a first amplifier (not shown) for amplifying the detection output of the first magnetic head 80a and a second amplifier (not for amplifying the detection output of the second head 80b). In the figure, switching is controlled on a field-by-field basis in accordance with a head switching control signal SWP output from a microprocessor (hereinafter, referred to as a “microprocessor” in the figure) 85 and output from one of the amplifiers. The amplified reproduction RF signal is input to the combining unit 82.
[0004]
Then, the synthesizing unit 82 performs FM demodulation by connecting the output signals of the recording / reproducing amplifier 81, separates the synchronizing signal, and converts the video signal and the synchronizing signal (reproducing video signal) into a data processing circuit (a data processing 1 circuit in FIG. (Hereinafter, referred to as a “data processing circuit”) 83.
[0005]
The data processing circuit 83 receives the head switching control signal SWP output from the microprocessor 85 as an input, and activates processing of a predetermined information data signal (for example, a video subcode signal) in the reproduced video signal by using the head switching control signal SWP as a trigger. Then, a data signal (video subcode) at a predetermined position (for example, after a lapse of a certain time from the input of the SWP or after a coefficient of a certain number of pulses) in the synchronization signal is extracted. The data processing circuit 83 supplies the microprocessor 85 with the extracted data signal (for example, a video subcode) in synchronization with the data communication clock supplied from the microprocessor 85.
[0006]
The microprocessor 85 supplies the head switching control signal SWP to the recording / reproducing amplifier 81 and the data processing circuit 83 as described above, and supplies a data communication clock to the data processing circuit 83 to perform data communication.
[0007]
In such a helical scan type magnetic recording / reproducing apparatus, when the band of a video signal is to be expanded to realize high-quality image recording / reproduction, the relative speed between the recording medium and the recording / reproduction magnetic head must be increased. Is valid. Specifically, a method of rotating the drum 79 at a high speed (double speed or the like) can be considered.
[0008]
[Problems to be solved by the invention]
However, when the conventional magnetic recording / reproducing apparatus performs double-speed reproduction, the data processing circuit 83 and the like are required to have twice the data processing capability. Need to be For this reason, a new integrated circuit must be designed and manufactured, and the development cost increases.
[0009]
Furthermore, raising the clock of the data processing circuit 83 and the like may affect other circuit elements. In particular, in the case of performing double-speed reproduction and recording / reproducing by adding data (video subcode or the like) to a video signal, the circuit configuration is further complicated and basic development factors are increased.
[0010]
The present invention has been made in view of such a problem, and provides a magnetic recording / reproducing apparatus in which, when performing double-speed reproduction, the development cost is greatly reduced by using a conventional element as it is. The purpose is to do.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, the magnetic recording and reproducing apparatus of the present invention is a helical scan type magnetic recording and reproducing apparatus that switches a magnetic head used for recording and reproduction by a head switching control signal and obtains a reproduced video signal via the magnetic head. there are, periodic signal 1 / n of the reproduced video signal and a magnetic head switching control signal (hereinafter referred to as "1 / n cycle signal", where n is 2 or more predetermined integer) as input and a video from the reproduced video signal the data processing circuit extracting and outputting the subcode and n Konami設, each of the data processing circuit includes selecting controlling activation / deactivation of the data processing circuit by the phase different 1 / n periodic signals with each other It is characterized by.
[0012]
The magnetic recording apparatus of the present invention is preferably a magnetic recording / reproducing apparatus that performs double-speed reproduction, in which two data processing circuits are provided (referred to as first and second data processing circuits, respectively) to perform first and second data processing. The circuit has a first data processing circuit and a second data processing circuit, each of which receives a half cycle signal of the head switching control signal synchronized with the head switching control signal (hereinafter referred to as a “1/2 cycle signal”) as an input. The first data processing circuit and the second data processing circuit respectively have a 周期 period shifted by ４ period, and Activation / deactivation is selectively controlled by a periodic signal, and video subcodes are alternately extracted and output.
[0013]
[Action]
With the above configuration, according to the present invention, even in the double-speed reproduction system, n data processing circuits corresponding to the normal reproduction speed are provided. In other words, a plurality of sets (n) corresponding to the rotational speed of the magnetic head are provided. A data processing circuit is provided. For the circuit configuration of the synchronous system, a synchronous system with a phase shift is created, and a magnetic recording / reproducing device is used so that the shortest period of the original data processing circuit (circuit corresponding to normal speed recording / reproducing) is not reduced. By configuring the data processing circuit, the performance of the data processing circuit is equivalent to the conventional processing capacity, so it is possible to apply the conventional element to the data processing circuit as it is, and use a dedicated integrated circuit that matches the playback speed. There is no need for new development, and an existing integrated circuit can be used, and the development cost of the magnetic recording / reproducing apparatus of the present invention is greatly reduced.
[0014]
【Example】
Embodiments of the present invention will be described below with reference to the drawings.
[0015]
Embodiment 1
FIG. 1 is a block diagram showing a schematic configuration of a magnetic recording and reproducing apparatus according to one embodiment of the present invention. Referring to FIG. 1, the magnetic recording / reproducing apparatus of the present embodiment employs a helical scanning system of double speed reproduction, and one field is recorded on one track of the magnetic tape 78. At the time of double speed reproduction, the rotation speed of the magnetic head is doubled, and the reproduction RF signal is alternately switched and output for each field by the first and second magnetic heads 80a and 80b. The recording / reproducing amplifier 81 includes two amplifiers, a first amplifier (not shown) for amplifying the detection output of the first magnetic head 80a, and a second amplifier (for amplifying the detection output of the second magnetic head 80b). The “not shown” means that switching is controlled for each field in accordance with a head switching control signal SWP output from a microprocessor (hereinafter, referred to as a “microprocessor” in the figure) 85, and one of the amplifiers outputs The amplified reproduced RF signal is input to the combining unit 82.
[0016]
The synthesizing unit 82 performs FM demodulation by connecting the output signal (amplified reproduction RF signal) from the recording / reproduction amplifier 81, separates the synchronization signal, and converts the video signal and the synchronization signal (reproduction video signal) into the first data. A processing circuit (hereinafter, referred to as “first data processing circuit” in the drawing, hereinafter referred to as “first data processing circuit”) 83 and a second data processing 2 circuit (hereinafter, referred to as “data processing 2 circuit,” (Referred to as “second data processing circuit”) 84.
[0017]
The first data processing circuit 83 receives the first half cycle signal SWP1 (1 / n cycle signal when the predetermined integer n = 2) of the head switching control signal output from the microprocessor 85 as an input, The processing of the video signal and the synchronizing signal is activated or deactivated by using the １ ／ cycle signal SWP1 as a trigger, and a predetermined portion in the synchronizing signal (for example, input (falling, falling) of the first 周期 cycle signal SWP1) A data signal (video subcode signal) is extracted after a lapse of a predetermined time from a rising edge or the like or after a certain pulse number coefficient).
[0018]
The second data processing circuit 84 receives the second half cycle signal SWP2 (1 / n cycle signal when a predetermined integer n = 2) of the head switching control signal output from the microprocessor 85 as an input, The processing of the video signal and the synchronizing signal is activated or deactivated by using the 1/2 half cycle signal SWP2 as a trigger, and a predetermined portion (for example, the input (falling, falling, A data signal (video subcode) is extracted after a predetermined time has elapsed from a rising edge or the like or after a certain number of pulses have been counted).
[0019]
Further, the first data processing circuit 83 and the microprocessor 85 mutually transmit the extracted data signal (video subcode) by three-wire serial communication in synchronization with a clock output from the microprocessor 85. The same applies to the processing of the second data processing circuit 84.
[0020]
2A and 2B are timing charts for explaining a recording / reproducing operation of the magnetic recording / reproducing apparatus shown in FIG. 1, wherein FIG. 2A shows a head switching control signal SWP output from the microprocessor 85, and FIG. The first half-period signal SWP1, (C) is a second half-period signal SWP2 output from the microprocessor 85, and (D) is a reproduced RF signal (hatched portion) output from the first magnetic head 80a. FIG. 4 is a waveform diagram showing a data signal (video subcode signal), and FIG. 4E is a waveform diagram showing a reproduced RF signal (a hatched portion is a data signal (video subcode signal)) output from the second magnetic head 81a.
[0021]
Referring to FIGS. 2A to 2C, the head switching control signal SWP has a cycle twice as long as the first and second half cycle signals SWP1 and SWP2, and the first half. The rising of the periodic signal SWP1 corresponds to the rising of the head switching control signal SWP, and the rising of the second 周期 periodic signal SWP2 corresponds to the falling of the head switching control signal SWP. The first half-period signal SWP1 and the second half-period signal SWP2 are shifted in phase by a quarter period from each other. Further, the reproduction RF signal is output from the first magnetic head 80a during the low level period of the head switching control signal SWP, and the reproduction RF signal is output from the second magnetic head 80b during the high level period.
[0022]
Referring to FIGS. 1 and 2A, a head switching control signal SWP output from the microprocessor 85 is output to the recording / reproducing amplifier 81. According to the head switching control signal SWP, the two amplifiers of the recording / reproducing amplifier 81 Switching control is performed. The recording / reproducing amplifier 81 amplifies and outputs the reproduced RF signal, and the synthesizing unit 82 connects and demodulates the amplified reproduced RF signal to convert a reproduced video signal including a data (video subcode) signal into a first video signal. The data is output to the data processing circuit 83 and the second data processing circuit 84.
[0023]
Referring to FIG. 1, FIG. 2 (B) and FIG. 2 (D), the first data processing circuit 83 is activated by the rising edge of the half cycle signal SWP1 of the head switching control signal, and the first magnetic head 83 The data (video subcode) in the reproduced RF signal (see FIG. 2D) output by 80a is captured. That is, predetermined information (data) in the reproduced video signal is extracted.
[0024]
Referring to FIG. 1, FIG. 2 (C) and FIG. 2 (E), the second data processing circuit 84 is activated by the rise of the second half cycle signal SWP2 of the head switching control signal, and The data (video sub-code) in the reproduced RF signal (see FIG. 2E) output by 80b is captured. That is, predetermined information (data) in the reproduced video signal is extracted.
[0025]
With reference to FIG. 1, the first data processing circuit 83 and the second data processing circuit 84 generate an extracted data signal (for the video subcode) at a predetermined timing in synchronization with a clock supplied from the microprocessor 85. Is output to the microprocessor 85.
[0026]
Therefore, despite the double speed reproduction, that is, doubling the cycle of the head switching control signal SWP, two data processing circuits (first data) corresponding to the half cycle of the head switching control signal SWP, that is, the normal reproduction speed, are used. By providing the processing circuit 83 and the second data processing circuit 84), the abilities of the first and second data processing circuits 83 and 84 are equivalent to the conventional processing capabilities. The element can be applied, and there is no need to develop a dedicated integrated circuit corresponding to the number of rotations of the magnetic head. An existing integrated circuit can be used, and the development cost of the magnetic recording / reproducing apparatus of this embodiment can be used. Is greatly reduced.
[0027]
In the case of triple-speed reproduction, three data processing circuits are provided (n = 3). In the case of n-times speed, n data processing circuits are preferably provided, but may be n or less. In the case of normal reproduction, only the first data processing circuit 83 need be used and the second data processing circuit 84 need not be used, and activation or deactivation of signal processing is selected according to the head switching control signal. .
[0028]
The contents of the data can include information such as the order of a series of recorded videos (images), a recorder, and a player. Further, the circuit may be configured such that the first and second data processing circuits 83 and 84 perform processing of a video signal, a synchronization signal, and a signal recorded on a control track or an audio track.
[0029]
Furthermore, the first and second data processing circuits 83 and 84 can use integrated circuits for video subcode. The first and second data processing circuits 83 and 84 may be configured to use buffers to perform most of the processing in the microprocessor 85.
[0030]
In this embodiment, the recording is performed in the reverse process of the reproduction, so that it will be briefly described. In the case of the double speed recording, the microprocessor 85 transmits the data (video subcode) to the first data by the 3-wire serial communication. Output to the processing circuit 83 and the second data processing circuit 84. Further, the microprocessor 85 supplies the first data processing circuit 83 and the second data processing circuit 84 with the first and second half cycle signals SWP1 and SWP1 of the head switching control signal SWP whose phases are different by 1/4 cycle from each other. SWP2, and the first data processing circuit 83 and the second data processing circuit 84 output a recording video signal based on the first and second 1 / 2-period signals SWP1 and SWP2 input respectively. The synthesizing section 82 receives the recording video signals output from the first and second data processing circuits 83 and 84, synthesizes the recording video signals, performs FM modulation, and outputs a recording RF signal to the recording / reproducing amplifier 81. The recording / reproducing amplifier 81 receives the head switching control signal SWP as input and amplifies the recording RF signal as input, and selects the first and second magnetic heads 80a and 80b based on the head switching control signal SWP. The recording RF signal amplified via the second magnetic heads 80a and 80b is recorded on the magnetic tape 78.
[0031]
When performing normal recording, the second data processing circuit 84 and the half cycle signal SWP2 of the head switching control signal need not be used.
[0032]
Embodiment 2
In this embodiment, an example in which the magnetic recording and reproducing apparatus according to the first embodiment of the present invention is applied to an image magnetic recording and reproducing apparatus will be described.
[0033]
FIG. 3 is a block diagram showing an overall schematic configuration of an image magnetic recording / reproducing apparatus according to a second embodiment of the present invention.
[0034]
Referring to FIG. 3, the transport / imaging system of the magnetic image recording / reproducing apparatus includes a transport mechanism 20 for transporting a subject and dropping it into an imaging range (between two glasses), and a subject positioned in the imaging range. A strobe 21 that emits light when it is turned on, and two CCD cameras 22 that capture an image of a subject in synchronization with the timing of emission of the strobe 21.
[0035]
The transport mechanism 20 includes a subject passage sensor (paper sensor) not shown in the figure, and starts transporting the subject in response to a transport mechanism operation signal from the system control circuit 25. Drop) is detected, a strobe light emission signal is output to the strobe at a predetermined timing (the subject is within the imaging range), and an imaging signal is also output to the CCD camera 22. In this way, the strobe 21 emits light after a lapse of a predetermined time from the detection of the subject by this sensor, and the two CCD cameras 22 take images of both sides of the subject irradiated with the strobe light while falling between the two glasses, and charge them as electric charges. Temporarily store images.
[0036]
A system control system (corresponding to a microcomputer (microprocessor) 85 or the like in FIG. 1) includes a system control circuit 25 for executing control of the entire apparatus, and an operation panel 23 (external input system) for sending an operation command to the system control circuit 25. ), A memory 24 which is connected to a system control circuit 25 and is capable of temporarily storing and inputting and outputting image data, and A / D (analog / digital) conversion of a current caused by the charge captured by the CCD camera 22 to convert a digital video signal. A / D conversion circuit 32 for outputting, a display memory 26 for receiving a digital video signal and storing it as image data, a conversion timing signal of the A / D conversion circuit 32, and a digital video output from the A / D conversion circuit 32 SSG 33 (Sync Signal) for generating a signal for writing a signal to the display memory 26. A generator (synchronous signal generator), an LCD display 27 that captures image data and reproduced image data from the display memory 26 via the system control circuit 25 and reproduces the image, a printing device 36 that prints the reproduced image, Consists of
[0037]
When a device operation command is input via the operation panel 23, the system control circuit 25 sends a subject transfer start command to the transfer mechanism 20, captures the image data stored in the display memory 26, and stores the image data in the memory 24. , And controls the output to the LCD display 27, and further controls the magnetic recording and reproduction of the image data stored in the display memory 26.
[0038]
The magnetic recording / reproducing system includes a recording / reproducing servo 35, a magnetic recording / reproducing mechanical deck 28, a magnetic recording cassette 30, and a digital video signal stored in the display memory 26 as an analog video signal and a reproduced analog video signal as a digital video signal. It comprises an A / D / D / A (analog / digital / digital / analog) conversion circuit 34 for converting into a video signal, and a magnetic recording / reproducing processing unit 29.
[0039]
The recording / reproducing servo 35 receives a recording / reproducing command from the system control circuit 25 and instructs a magnetic recording / reproducing processing unit 29 via the magnetic recording / reproducing mechanical deck 28 to perform magnetic recording / reproducing. The magnetic recording / reproducing processor 29 magnetically records the D / A-converted image data from the display memory 26 on the cassette 30 via the magnetic recording / reproducing mechanical deck 28 at the time of recording, and the magnetic recording / reproducing mechanical deck 28 at the time of reproducing. A magnetic recording recorded on the cassette 30 is reproduced through the A / D converter and output to the display memory 26 through A / D conversion.
[0040]
The display memory 26 has a capacity capable of storing image data of a plurality of screens, and magnetic recording data corresponding to the image data is recorded in the cassette 30 without gaps (with no empty track or empty area in one track). Is done.
[0041]
By applying the magnetic recording / reproducing apparatus according to the first embodiment of the present invention mainly to the magnetic recording / reproducing processing unit 29 according to the present embodiment, the image magnetic recording / reproducing apparatus of the present embodiment performs double-speed reproduction and In the case of handling the above information, a conventional element can be applied to the magnetic recording / reproducing processing unit 29, and the development cost of the image magnetic recording / reproducing apparatus is greatly reduced. Furthermore, since data (video subcode) related to a large amount of image information can be recorded / reproduced, functions such as image search and security of the magnetic image recording / reproducing apparatus can be further improved based on these data. .
[0042]
As described above, the present invention has been described with reference to the above embodiments. However, the present invention is not limited to the above embodiments, but includes various embodiments according to the principle of the present invention.
[0043]
【The invention's effect】
As described above, according to the present invention, even in double-speed reproduction, by providing n data processing circuits corresponding to the normal reproduction speed, the performance of the data processing circuit is sufficient to be equal to the conventional processing performance. Conventional elements can be applied to the processing circuit, and there is no need to newly develop a dedicated integrated circuit corresponding to the reproduction speed, and the existing integrated circuit can be used. The development cost of the playback device is greatly reduced.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating a schematic configuration of a magnetic recording and reproducing apparatus according to a first embodiment of the present invention.
FIG. 2 is a timing chart illustrating the operation of the magnetic recording / reproducing apparatus of FIG. 1 according to the first embodiment of the present invention.
(A) is a head switching control signal SWP output from the microprocessor 85;
(B) shows a first half cycle signal SWP1 output from the microprocessor 85,
(C) is a second half cycle signal SWP2 output from the microprocessor 85,
(D) is a recording / reproducing RF signal (a hatched portion is a data signal (video subcode signal)) output from the first magnetic head 80a,
(E) is a waveform diagram showing a recording / reproducing RF signal (a hatched portion is a data signal) output from the second magnetic head 81a.
FIG. 3 is a block diagram showing a schematic configuration of a magnetic image recording / reproducing apparatus according to a second embodiment of the present invention.
FIG. 4 is a block diagram showing a schematic configuration of a conventional magnetic recording / reproducing apparatus.
[Explanation of symbols]
Reference Signs List 20 transport mechanism 21 strobe 22 camera (CCD camera)
23 Operation panel 24 Memory (non-volatile memory)
25 System Control Circuit 26 Display Memory 27 LCD (Liquid Crystal Display) 28 Magnetic Recording / Reproducing Mechanical Deck 29 Magnetic Recording / Reproducing Processing Unit 30 Cassette 31 Transport Mechanism Control Circuit 32 A / D (Analog / Digital) Conversion Circuit 33 SSG (Sync Signal Generator; Synchronous signal generator)
34 A / D / D / A (analog / digital / analog / digital) conversion circuit 35 recording / reproducing servo circuit 36 printing device 78 magnetic tape 79 drums 80a, 80b first and second magnetic heads 81 recording / reproducing amplifier 82 synthesis unit 83 data processing circuit, first data processing circuit (one data processing circuit)
84 2nd data processing circuit (2 data processing circuits)
85 Microprocessor (microcomputer)
SWP Head switching control signal SWP1 First half cycle signal (half cycle signal of head switching control signal SWP)
SWP2 Second half cycle signal (half cycle signal of head switching control signal SWP)

Claims (2)

A helical scan type magnetic recording / reproducing apparatus which switches a magnetic head used for recording / reproduction by a head switching control signal and obtains a reproduction video signal via the magnetic head,
The reproduced video signal and the periodic signal 1 / n of the magnetic head switching control signal (hereinafter referred to as "1 / n cycle signal", where n is 2 or more predetermined integer) as input and the video from the reproduction video signal the data processing circuit extracting and outputting the subcode and n Konami設,
A magnetic recording / reproducing apparatus, wherein each of the data processing circuits selectively controls activation / inactivation of the data processing circuit by the 1 / n period signals having different phases. In the magnetic recording / reproducing apparatus for reproducing at double speed,
Providing two data processing circuits (referred to as first and second data processing circuits, respectively);
The first and second data processing circuits each receive a half cycle signal of the head switching control signal (hereinafter, referred to as a “１ ／ cycle signal”) synchronized with the head switching control signal, and
The 周期 period signals input to the first data processing circuit and the second data processing circuit, respectively, are shifted in phase by １ ／ period from each other,
The first data processing circuit and the second data processing circuit selectively control activation / inactivation by the 周期 cycle signal whose phase is shifted by ４ cycle, and alternately perform the 2. The magnetic recording / reproducing apparatus according to claim 1, wherein a video sub-code is extracted and output.

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