JPH0715783B2 - Recording device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described below in the following order.

A. Industrial field of use B. Outline of the invention C. Prior art D. Problems to be solved by the invention E. Means for solving the problems F. Action G. Example G-1. Signal format G-2. Recording device G-3. Reproducing device H. Effect of the invention A. Field of industrial application The present invention relates to a recording device such as a so-called electronic still camera for recording a still image, and particularly, audio corresponding to the still image. Regarding things that can be recorded.

B. Outline of the Invention The present invention is a recording apparatus such as an electronic still camera that records a still image and audio corresponding to the still image, and by providing an overlap portion in the signal recorded in each sector of the recording medium, No signal is sampled during playback, which can minimize the deterioration of the playback sound quality, and eliminates the adverse effects of the low-pass filter to prevent the playback sound from being distorted at the seams between sectors. It is something that can be done.

C. Conventional Technology An electronic still camera has been proposed which has an imaging device such as a charge coupled device (CCD) and records an arbitrary still image on a magnetic disk.
57-197021 etc.).

That is, in the electronic still camera, a video signal from the image pickup device is taken out for one field or one frame at the time of arbitrary shutter operation and recorded on a disk-shaped magnetic disk. At this time, one field signal is recorded so as to form one annular track. Therefore, the signal of one frame is recorded on two tracks.

In the reproducing apparatus, a video signal of a recorded still image is formed by repeatedly reproducing one track or alternately reproducing two tracks. Then, this video signal is supplied to a monitor television receiver to reproduce a still image on the screen or printed by a video printer.

In the electronic still camera as described above, there has been proposed one capable of further recording a voice corresponding to a still image (for example, JP-A-58-218004). To record audio, for example, a method of time-compressing the audio signal using a digital signal processing technique, increasing the band of the audio signal to the band of the video signal, and using the same recording system as the video signal Can be considered. When this method is used, for example, by compressing the audio signal up to 5 kHz to 1/600,
It can be a signal in the video band of MHz, and can record an audio signal for about 10 seconds, which is 600 times that in one field period (1/60 seconds). However, an extremely large-capacity memory device is required to perform the above-mentioned digital signal processing on the audio signal for 10 seconds. Therefore, it is preferable to reduce the capacity of the memory device by dividing the 10 seconds into four equal parts and performing digital signal processing every 2.5 seconds. In this case, a series of respective audio signals which are divided into four equal parts and are respectively time-axis compressed are successively and successively recorded in each sector (segment) obtained by dividing one track on the magnetic disk into four equal parts.
Further, in each of the above-mentioned sectors, for example, a start identification signal, an end identification signal, and an information signal for controlling the reproduction operation of the audio signal are recorded together with the audio signal compressed on the time axis. Then, at the time of reproduction, the sampling section of the signal taken out from the magnetic disk is determined based on the start identification signal and the end identification signal, and the compressed audio signal is expanded and recorded in each sector. The audio signal is made continuous.

D. Problems to be Solved by the Invention However, as described above, when reproducing a series of audio signals divided into each sector and recorded,
The sampling phase, that is, the position of the sampling point of the signal may be slightly deviated due to the so-called jitter component generated at the time of reproduction, the detection accuracy of each identification signal, etc., and if a no-signal component (silent portion) is sampled, the reproduced sound quality will be It deteriorates significantly. Further, an LPF (low-pass filter) is provided immediately after the D / A (digital / analog) conversion circuit in the normal recording device and immediately before the A / D (analog / digital) conversion circuit in the reproducing device, respectively. Due to the so-called transient response due to this LPF, the signal does not instantaneously rise to a steady state at the beginning of the audio signal, and the reproduced sound is distorted at the seams between the sectors.

Therefore, the present invention has been proposed in view of the above-mentioned conventional problems, and an object of the present invention is to provide a recording apparatus in which reproduction sound quality is not significantly deteriorated even if the position of a sampling point of a signal is slightly deviated during reproduction. To do. Another object of the present invention is to provide a recording apparatus in which reproduced sound is not distorted at the joints between sectors due to the bad influence of LPF.

E. Means for Solving the Problems In order to achieve the above-mentioned object, the recording apparatus of the present invention,
An analog / digital conversion unit that converts a series of input signals that have passed through the low-pass filter into a digital amount and a series of input signal data from the analog / digital conversion unit correspond to a plurality of sectors that are recording areas of a recording medium. A memory unit that is divided into a plurality of data blocks and written, and has a storage capacity that is equal to or larger than the total data amount of the one data block and the overlap amount for overlapping recording, and a series of the analog / digital conversion unit. The input signal data of is controlled to be written in the memory means by a write clock signal of a predetermined frequency, and when the written data is read out, the read data is read out at a read clock faster than the write clock signal to compress the data. Address returned from the read end address of the previous sector by the above overlap amount A memory control means for controlling the reading of data for one sector as a read start address and a digital / analog converting means for converting the data from the memory means into an analog quantity are provided, and the signal from the digital / analog converting means is described above. It is characterized by sequentially recording in each sector of each recording medium.

F. Action According to the present invention, the overlap portion of the signal recorded in each sector of the recording medium is provided, and the non-signal portion is not sampled during reproduction, and the LP
The adverse effects of F are eliminated. Furthermore, reading from the memory means can be performed by a simple operation, and the hardware configuration for memory access can be simplified.

G. Example Hereinafter, one example of the present invention will be described in detail with reference to the drawings.

G-1. Signal Format FIG. 1A is a diagram showing a format of a signal relating to audio recorded in one track (4 sectors) of a disk D which is a storage medium described later. In FIG. 1A,
(A), (b), (c) and (d) have 4 tracks per track.
The signals are recorded in each of the divided sectors S _A , S _B , S _C and S _D , and the time axis compressed audio signal AS _A (AS _B , A
The start identification signal SID and the information signal API for controlling the reproduction operation of the audio signal are arranged at the front end of S _C , A _D ) and the end identification signal EID is arranged at the rear end.

The audio signal AS _A ~AS _D, respectively, which is divided into four data blocks of a sequence of audio signal data, formed by adding data of each adjacent ends of the data blocks before and after the both end portions of each data block And each front end is an overlap portion OV. That is, the data at both ends of each audio signal match the data at each adjacent end of the preceding and following audio signals.

In addition, in the signal shown in (d), the end identification signal EI
The polarity of D is made different from the others so that this signal can be detected as the end of a series of signals during reproduction.

G-2, Recording Device The recording device of the present embodiment for forming and recording the above-mentioned signals has a configuration as shown in FIG. 1B.
In FIG. 1B, the video signal is supplied to the input terminal 1 and is converted into a predetermined recording signal by the recording circuit 2, and then is supplied to the FM modulation circuit 5 via the non-linear pre-emphasis circuit 3 and the changeover switch 4. Sent. Then, the FM modulation circuit 5 converts the signal into an FM signal, and the magnetic head 6 outputs, for example, 3600
It is recorded on a disk D which is rotationally driven by a motor M at rpm.

The audio signal is supplied to the input terminal 11, and the LPF1 for band limitation is used.
2. It is sent to the A / D conversion circuit 14 via the noise reduction encoder 13. The signal converted into a digital value by the A / D conversion circuit 14 is written in a RAM (random access memory) 15. The RAM 15 has a capacity slightly larger than one sector of the disk D as a recording medium. The signal read from the RAM15 is the D / A conversion circuit 16
Sent to and converted to analog quantity. At this time, for example, 5k
As the sampling signal of the audio signal band-limited to Hz, the clock signal φ _C is supplied from the oscillator 21 to the A / D conversion circuit 1 described above.
RA supplied to the RAM 4 and driving and controlling the RAM 15
It is supplied to the M controller 22. In the present embodiment, the clock signal 640Fai _C 640 times the frequency of the clock signal phi _C is from the oscillator 23 is supplied to the D / A conversion circuit 16, are supplied to the RAM controller 22 . Further, a pulse signal every 1/60 seconds related to the rotation phase of the disk by the magnetic piece G provided in a predetermined portion of the motor M is detected by the pickup head 24 and supplied to the timing signal generation circuit 25. The timing signal generated by the timing signal generating circuit 25 based on the pulse signal is supplied to the RAM controller 22. The timing signal from the timing signal generation circuit 25 is the same as the identification signal generation circuit 26 and encoder described later.
It is also supplied to 33. A shutter button operation signal generated by operating a shutter button (not shown) is supplied to the timing signal generating circuit 25 from a terminal 27.

That is, according to the clock signal φ _C from the oscillator 21, A /
The audio signal converted into a digital amount by the D conversion circuit 14 is written in the RAM 15 according to the clock signal φ _C. At this time, the voice signal is, for example, 10 seconds divided into four equal 2.5.
It is written to RMA15 every second (one sector). Then, the written signal is the clock signal from the oscillator 23.
According to 640φ _C , it is read from the RAM 15 at a speed of 640 times that at the time of writing. In other words, the audio signal for 2.5 seconds is 1/640
It means that the time axis is compressed. Further, when the data is read from the RAM 15, the data of the rear end portion of the data block corresponding to the previous sector is read redundantly, and as a result, as shown in FIG. 1A, The data at both ends of each audio signal will match the data at each adjacent end of the preceding and following audio signals. Further, at the time of this reading, the sectors S _A , S _B ,
Each audio signal AS _A , AS _B , AS _C , AS _D corresponding to S _C , S _D is 1/4 cycle (1/240 second) based on the 1/60 second cycle pulse signal from the pickup head 24. The signals are read out one after another at a timing with a phase shift.

The audio signal read from the RAM 15 is converted into an analog amount by the D / A conversion circuit 16 as described above, and then the LPF 17
Is supplied to the mixing circuit 18 via. Also, the above mixing circuit
The start identification signal SID and the end identification signal EID generated by the identification signal generation circuit 26 based on the timing signal from the timing signal generation circuit 25 are supplied to 18.
Further, the information signal API generated by the information signal generating circuit 32 based on the control signal from the system controller 31 is supplied to the mixing circuit 18 via the encoder 33.
Then, the mixing circuit 18 mixes the respective signals to form a signal having a form as shown in FIG. This Figure 2 is time
A signal for one sector of t _S is shown, and the audio signal AS (t ₁ + t ₂ ) compressed in the time axis has an overlap portion OV (t ₁ ) which is a portion redundantly read from the RAM 15. Have A start identification signal SID having a pulse width W is arranged at the front end of the audio signal AS at a time t ₃ apart, and the front end is a signalless portion for the time t ₄ . In addition, the information signal A near the voice signal AS for a time t ₅ from the start identification signal SID
PI is arranged. On the other hand, the time t ₆
An end identification signal EID having a pulse width W is arranged at a distance from each other, and the rear end has no signal for a time t ₇ . Here, when the time t ₂ of the audio signal AS is shorter than the predetermined time,
In response to this, the position where the end identification signal EID is arranged is closed to the left in the figure, and the time t ₇ of the no-signal portion is lengthened by this amount. That is, the time t ₂ of the audio signal AS
And the total time t ₇ of the non-signal part is made equal.

The information signal API is composed of, for example, 64 bits, and is composed of data such as a track address, a continuous audio start address, a continuous audio subsequent address, a corresponding image address, a time compression rate mode, a segment usage state, and a recording date. It

The signal from the mixing circuit 18 is sent to the FM modulation circuit 5 via the pre-emphasis circuit 19 having a linear characteristic and the changeover switch 4. Then, the FM modulation circuit 5 converts the signal into an FM signal, which is recorded on the disk D by the magnetic head 6. At this time, each audio signal AS _A , AS _B , AS _C , AS _D and the identification signal SI added to each
D, EID and information signal API (see (a) to (d) of FIG. 1A)
Is a sector S _A , S _B , S _C , S in which one track on the disk D is divided into four, as schematically shown in FIGS.
Each is recorded in _D.

The RAM controller 22 in the above-described recording device may have a configuration as shown in FIG. 5, for example. That is,
Address counter 41 is for writing
Reference numeral 42 respectively controls the address of the RAM 15 at the time of reading, and the address data is supplied to the RAM 15 via the multiplexer 43. A clock signal φ _C is sent from the oscillator 21 to the address counter 41.
A clock signal 640 φ _C is supplied from 42 to the oscillator 23. Registers 44 and 45 are the above address counters 41 and 42.
To save or load the contents of. Further, the control circuit 46 uses the registers 44 and 45 described above.
Is to control.

The audio data from the A / D conversion circuit 14 is the I / O buffer 51 (first
It is written in the RAM 15 via (not shown in FIG. B). The address control at this time depends on the address counter 41. When the audio data for one sector has been written, the recording operation starts. The RAM 15 is controlled by the address counter 42 during recording (when reading audio data). The clock signal 640φ _C supplied to the address counter 42 is gated so as to advance the value of the address counter 42 by one sector. And
It is assumed that the count value of the address counter 42 is N when the output of audio data for one sector is completed. This value N is subsequently saved in the register 45 and read by the control circuit 46. The control circuit 46 sends a value N-M obtained by subtracting the value M of the overlap from this N to the register 45, which is further loaded into the address counter 42. Therefore, the address counter 42 operates up to N, and then N-
It will be returned to M and waiting. Even during these operations, the write operation to the RAM 15 is continuously performed by the address counter 41.

Then, when the data for one sector is accumulated in the RAM 15 again, the same recording operation as described above is started.
At this time, since the value of the address counter 42 is NM, the head portion of the audio signal recorded here is the same as the trailing end portion of the audio signal of the preceding sector. As a result,
The audio signal of each sector is provided with an overlap part.

G-3. Playback Device Next, an example of the playback device will be described with reference to FIG. The signal reproduced by the magnetic head 61 from the disk D is supplied to the FM demodulation circuit 62. When the magnetic head 61 scans the track on which the video signal is recorded, the demodulated signal is a de-emphasis circuit 6 having a non-linear characteristic.
3. The video signal is taken out from the output terminal 65 via the reproduction circuit 64.

When the magnetic head 61 scans a track recorded with an audio signal, the demodulated signal is supplied to the identification signal detection circuit 81 and the information signal detection circuit 82 via the de-emphasis circuit 71 having a linear characteristic. At the same time, it is further supplied to the A / D conversion circuit 73 via the LPF 72 for band limitation. The start identification signal SID and the end identification signal EID detected by the identification signal detection circuit 81 are sent to the timing signal generation circuit 83. The end identification signal EID is the above information signal detection circuit 82.
The information signal API for controlling the reproduction operation of the audio signal detected by the information signal detecting circuit 82 is also sent to the timing signal generating circuit 83 at the timing based on the end identification signal EID. The information signal API is also supplied to the system controller 84, and the system controller 84 controls the entire apparatus.

The audio signal converted into digital quantity by the A / D conversion circuit 73 is RAM
Written in 74. Then, the signal read from the RAM 74 is sent to the D / A conversion circuit 75 and converted into an analog amount.
Here, the clock signal 640φ _C having the same frequency as that of the oscillator 23 is supplied from the oscillator 85 to the A / D conversion circuit 73 and also to the RAM controller 86 for driving and controlling the RAM 74. Further, a clock signal φ _C having the same frequency as that of the oscillator 21 described above, that is, a signal having a frequency of 1/640 of the signal output from the oscillator 85 is supplied from the oscillator 87 to the D / A conversion circuit 75, RAM above
It is supplied to the controller 86. Further, a timing signal based on a pulse signal of a 1/60 second cycle from the pickup head 88 is generated by the timing signal generating circuit 83, and
It is supplied to the RAM controller 86.

That is, for example, as shown in FIG. 2, when the trailing edge of the start identification signal SID is detected, the writing of the signal to the RAM 74 is started after time t ₈ from the time of the detection,
After that, writing is continued according to the signal from the oscillator 85. The writing start point of the above signal is the overlap section OV
The position is set to be approximately the center of. And
When the rising edge of the end identification signal EID is detected, the writing is stopped, and after the writing is stopped, the address of the RAM 74 is returned for the time t ₉ minutes. Therefore, the actual sampling interval is the interval of time t ₁₀ . Reading is performed at a writing speed of 1/640 according to the signal from the oscillator 87. As a result, the audio signal is expanded 640 times in the time axis direction and returned to the original length. Such an operation is repeated for each sector.

The signal from the D / A conversion circuit 75 is taken out from the output terminal 78 as a continuous audio signal via the LPF 76 and the noise reduction decoder 77.

According to the recording apparatus of this embodiment as described above, the following effects can be obtained. That is, in the conventional recording device, when reproducing a series of audio signals recorded divided into each sector, the sampling point of the signal is determined by the jitter component during recording / reproduction and the detection accuracy of each identification signal SID, EID. If there is a slight deviation, as shown in FIG. 7 (a), the non-signal part (silent part) may be sampled, which significantly deteriorates the reproduced sound quality, but overlaps with the audio signal of each sector. According to the recording apparatus of the present embodiment in which the portion OV is provided for recording, even if the sampling points of the signals are slightly deviated, there is a time margin due to the overlapping portion OV, so that as shown in FIG. 7 (b). Moreover, the non-signal portion is not sampled, and the deterioration of the reproduced sound quality can be suppressed to the minimum.

Further, due to the influence of LPF17 at the time of recording and LPF72 at the time of reproduction, the signal cannot instantaneously rise to a steady state at the start portion of the audio signal, but according to the recording apparatus of the present embodiment,
Since the overlap portion OV is provided in the audio signal of each sector, the transient response can be sufficiently absorbed during this period, and the reproduced sound can be prevented from being distorted at the joint between the sectors.

H. Effect of the Invention According to the recording apparatus of the present invention, the non-signal portion is sampled even if the position of the sampling point of the signal is slightly deviated during reproduction by providing the overlap portion in the audio signal of each sector. There is no such a case, and the deterioration of the reproduced sound quality can be suppressed to the minimum. Further, the transient response can be sufficiently absorbed in the LPF depending on the period of the overlap portion, and the reproduced sound can be prevented from being distorted at the joint between the sectors. Furthermore, by returning the address count value when the data for one sector has been read from the memory by the overlap amount and reading the data for the next sector from this address, the data is automatically read after the previous sector. Since the overlapping portions at the ends are read in duplicate, the data having the overlapping portions between the front and rear sectors can be read by simple address control, and the hardware configuration such as the address counter can be simplified.

[Brief description of drawings]

FIG. 1A is a diagram showing a format of a signal relating to audio recorded on one track (4 sectors) of a disc in one embodiment of the present invention, and FIG. 1B is a block diagram showing a recording apparatus of the above one embodiment, FIG. 2 is a diagram showing a signal format for one sector, FIG. 3 is a plan view of a disc showing each sector in which one track is divided into four equal parts, and FIG. 4 is a schematic diagram of a signal recorded in each sector. FIG. 5 is a plan view of the disk shown in FIG. 5, FIG. 5 is a block diagram showing a concrete configuration example of a RAM controller in the recording apparatus of the above-mentioned embodiment, FIG. 6 is a block diagram showing an example of a reproducing apparatus, and FIG. FIG. 7 is a sampling waveform diagram comparing the case of the recording apparatus and the case of the recording apparatus of the above-described embodiment. 11 …… Input terminal 12 …… LPF 14 …… A / D conversion circuit 15 …… RAM 16 …… D / A conversion circuit D …… Disk S _A ~ S _D …… Sector OV …… Overlap part

Claims (1)

[Claims] 1. A plurality of analog / digital conversion means for converting a series of input signals that have passed through a low-pass filter into digital quantities, and a series of input signal data from the analog / digital conversion means to form a recording area of a recording medium. Memory unit, which is divided into a plurality of data blocks corresponding to each sector and written, and has a capacity equal to or more than the total value of the data of the one data block and the overlap portion for overlapping recording, and the analog / digital conversion. A series of input signal data from the means is controlled to be written in the memory means by a write clock signal of a predetermined frequency, and when the written data is read out, it is read out at a read clock faster than the write clock signal to compress the data. And return the read end address of the previous sector by the above overlap amount. The memory control means for controlling the reading of the data for one sector by using the read address as the read start address and the digital / analog converting means for converting the data from the memory means into an analog amount are provided. A recording apparatus for sequentially recording a signal in each sector of each recording medium.