JP3564311B2 - Method for manufacturing semiconductor wafer with columnar electrode and method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor wafer with columnar electrode and method for manufacturing semiconductor device Download PDF

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JP3564311B2
JP3564311B2 JP1823799A JP1823799A JP3564311B2 JP 3564311 B2 JP3564311 B2 JP 3564311B2 JP 1823799 A JP1823799 A JP 1823799A JP 1823799 A JP1823799 A JP 1823799A JP 3564311 B2 JP3564311 B2 JP 3564311B2
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plating film
semiconductor wafer
columnar
electrode
solder
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JP2000216185A (en
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義博 井原
壮 小林
信一 若林
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP1823799A priority Critical patent/JP3564311B2/en
Priority to TW089101296A priority patent/TW444288B/en
Priority to KR1020000003629A priority patent/KR100687548B1/en
Priority to EP00300613A priority patent/EP1024531A3/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

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  • Electroplating Methods And Accessories (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は半導体ウエハを用いてチップサイズパッケージを製造する際に使用する柱状電極付き半導体ウエハの製造方法及び半導体装置の製造方法に関する。
【０００２】
図８は半導体ウエハを用いてチップサイズパッケージを製造する際に使用する柱状電極が形成された半導体ウエハの製造方法を示す。図８（ａ） は半導体ウエハ１０を拡大して示す断面図で、半導体ウエハ１０の表面に電極端子１２とパッシベーション膜１４が形成された状態を示す。この半導体ウエハ１０の表面にまず、ポリイミド膜をコーティングし、電極端子１２を露出させた絶縁層１６を形成する（図８（ｂ））。次に、スパッタリングを施して絶縁層１６と電極端子１２の表面にめっき給電層となる導体層１８を形成する（図８（ｃ））。次に、レジストを塗布し、半導体ウエハ１０の表面に形成する配線パターンにしたがってレジストパターン２０を形成し（図８（ｄ））、前記導体層１８をめっき給電層として銅めっきを施して配線パターン２２を形成する（図８（ｅ））。配線パターン２２は一端側が電極端子１２に接続し、他端側に柱状電極を立設するためのパッド部が形成されたものである。
【０００３】
次に、電解めっきを施して柱状電極２４を形成する。そのため、まず、図８（ｅ） の状態からレジストパターン２０を除去した後、再度、半導体ウエハ１０の表面にめっき用のレジスト２６を塗布し、配線パターン２２のパッド部に位置合わせして柱状電極２４を形成する部位のレジスト２６を除去し、開口穴２６ａを形成する。柱状電極２４は高さ１００μｍ程度に形成するもので、レジスト２６は柱状電極２４の高さよりもやや厚く形成する。
【０００４】
柱状電極２４は電解銅めっきを施して開口穴２６ａ内に銅めっきを盛り上げて形成する。図８（ｆ） は柱状電極２４を形成した状態で、柱状電極２４の頂部端面には保護めっき被膜が形成されている。
図８（ｇ） はレジスト２６を除去した後、半導体ウエハの表面に露出した導体層１８をエッチングして除去した状態である。導体層１８をエッチングすることによって、電極端子形成面に一端側で電極端子１２に電気的に接続された配線パターン２２が形成され、配線パターン２２の他端側に柱状電極２４が形成された半導体ウエハ１０が得られる。
【０００５】
こうして得られた半導体ウエハ１０は各々の電極端子１２に対応して一つずつ柱状電極２４が形成されたものであり、半導体ウエハ１０の表面には多数個の柱状電極２４が形成されている。
図９はこの柱状電極２４が形成された半導体ウエハ１０を樹脂封止する方法を示す。柱状電極２４を上向きにして下型３１に半導体ウエハ１０をのせ、半導体ウエハ１０の上に封止用の樹脂材２８を供給した後、封止用フィルム３０をクランプ面に吸着した上型３２により下型３１との間で半導体ウエハ１０をクランプする。このクランプ操作により半導体ウエハ１０の電極端子形成面側に溶融樹脂が広がって樹脂封止される。樹脂封止後、封止用フィルム３０が被着した半導体ウエハ１０を金型から取り出し、封止用フィルム３０を半導体ウエハ１０から引き剥がす。柱状電極２４の頂部端面に実装用の端子（例えば、はんだボール）を接合した後、半導体ウエハを個片のチップサイズに切断することによってチップサイズパッケージが得られる。
【０００６】
【発明が解決しようとする課題】
上述した製造方法で、半導体ウエハ１０を樹脂封止する際に封止用フィルム３０で柱状電極２４の頂部端面を被覆しているのは、柱状電極２４の頂部端面に樹脂が付着しないようにするためであるが、柱状電極２４の高さにばらつきがあるといったことにより、樹脂封止の際に柱状電極２４の頂部端面に樹脂が侵入し柱状電極２４に樹脂が付着して残留することがある。半導体ウエハ１０を樹脂封止した後、封止用フィルム３０を半導体ウエハ１０から引き剥がすようにするのは、柱状電極２４の頂部端面に残留した樹脂を封止用フィルム３０に付着させて除去するためである。
【０００７】
しかし、封止用フィルム３０を半導体ウエハ１０から引き剥がしただけで柱状電極２４の頂部端面に残留した樹脂が確実に除去されるとは限らない。柱状電極２４の頂部端面は、はんだボール等の実装用の端子を接合する接合面であるから、樹脂が柱状電極２４の頂部端面に付着していることは柱状電極２４と端子との接合性の点で問題となる。このため、封止用フィルム３０を引き剥がした後、ブラスト等によって柱状電極２４の頂部端面をクリーニングすることがなされている。
【０００８】
しかしながら、このようなクリーニングによっても必ずしも柱状電極２４の頂部端面に残留した樹脂を完全に取り除くことができず、また、柱状電極２４の頂部端面から完全に樹脂を取り除くため過度にクリーニングすると、逆に樹脂を劣化させてしまうといった問題も生じる。
このように、従来の柱状電極付きウエハの製造方法では柱状電極の頂部端面に樹脂が残留して、柱状電極と実装用の端子との接合性が阻害されることが課題となっていた。
本発明はこれら従来の課題を解決すべくなされたものであり、その目的とするところは、柱状電極の頂部端面に確実に端子を接合することができ、これによって信頼性の高いチップサイズパッケージを得ることができる柱状電極付き半導体ウエハの好適な製造方法、及び柱状電極付き半導体ウエハを用いて作製する半導体装置の好適な製造方法を提供するにある。
【０００９】
【課題を解決するための手段】
上記目的を達成するため、本発明は次の構成を備える。
すなわち、柱状電極付き半導体ウエハの製造方法として、半導体ウエハの電極端子形成面を電極端子を露出して絶縁層により被覆し、前記電極端子及び絶縁層の表面に導体層を形成した後、導体層の表面にレジストパターンを形成して前記導体層をめっき給電層として銅めっきを施すことにより一端側が各電極端子に接続する配線パターンを形成し、前記レジストパターンを除去した後、半導体ウエハの電極端子形成面にレジストを塗布し、配線パターンの他端側の柱状電極を形成する部位のレジストに、底面に配線パターンの他端側が露出する開口穴を形成し、前記導体層をめっき給電層として前記開口穴内に銅めっきを施して、前記配線パターンの他端側に柱状電極を形成した後、該柱状電極の頂部端面にはんだめっき被膜を形成し、前記レジストを除去して、表面に露出する前記導体層を除去した後、前記はんだめっき被膜の表面が露出するように半導体ウエハの電極端子形成面側を樹脂封止することを特徴とする。
【００１０】
また、はんだめっき被膜の表面が露出するように半導体ウエハの電極端子形成面側を樹脂封止する際に、はんだめっき被膜の表面が封止樹脂の外表面よりも突出するとともに、はんだめっき被膜と表面にはんだめっき被膜が形成される下地層との界面が封止樹脂内に位置するように樹脂封止することを特徴とする。
【００１１】
また、柱状電極の頂部端面に、はんだめっき被膜の下地層としてニッケルめっき被膜を形成し、次いではんだめっき被膜を形成することを特徴とし、また、柱状電極の頂部端面に、ニッケルめっき被膜と、はんだめっき被膜の下地層としてパラジウムめっき被膜とをこの順に形成し、次いではんだめっき被膜を形成することを特徴とし、また、柱状電極の頂部端面に、ニッケルめっき被膜と、はんだめっき被膜の下地層として金めっき被膜とをこの順に形成し、次いではんだめっき被膜を形成することを特徴とし、また、柱状電極の頂部端面に、ニッケルめっき被膜と、パラジウムめっき被膜と、はんだめっき被膜の下地層として金めっき被膜とをこの順に形成し、次いではんだめっき被膜を形成することを特徴とする。
【００１２】
また、半導体装置の製造方法として、前記半導体ウエハの製造方法にしたがって柱状電極付き半導体ウエハを形成し、該柱状電極付き半導体ウエハの電極端子形成面に形成された各々の柱状電極に外部接続端子を接合した後、前記半導体ウエハを所定位置で個片に切断することを特徴とし、また、前記柱状電極に接合する外部接続端子が、はんだボールであることを特徴とする。
【００１３】
【発明の実施の形態】
以下、本発明の好適な実施形態を添付図面に基づいて詳細に説明する。
本発明に係る柱状電極付き半導体ウエハは半導体ウエハを用いてチップサイズパッケージを作製する際に使用する柱状電極付き半導体ウエハであり、従来の柱状電極付き半導体ウエハと比較して柱状電極の構成を除いては変わらない。したがって、以下では、本発明で特徴的な柱状電極の構成について説明する。なお、以下の説明で従来の柱状電極付き半導体ウエハと同一の部位については同一の番号を付している。
【００１４】
前述したように、柱状電極付半導体ウエハは半導体ウエハ１０の電極端子形成面に電気的絶縁層を介して一端側で電極端子１２に電気的に接続する配線パターン２２を形成し、配線パターン２２の他端側に柱状電極２４を立設し、半導体ウエハ１０の電極端子形成面側を柱状電極２４の頂部端面を露出して樹脂２８によって封止したものである。図１に示すように、樹脂２８は隣接するすべての柱状電極２４の間を充填する。
【００１５】
図２は柱状電極付きウエハの柱状電極２４の近傍部分を拡大して示す断面図である。本実施形態の柱状電極付き半導体ウエハは柱状電極２４の基体部（導体部）が銅めっき部４０であり、柱状に形成された銅めっき部４０の頂部端面にめっき被膜としてニッケルめっき被膜４２、パラジウムめっき被膜４４、はんだめっき被膜４６をこの順に設けたことを特徴とする。
【００１６】
前述したように、柱状電極２４の頂部端面にめっき被膜を設けることは従来も行われている。すなわち、はんだ接合性を良好にするめっき被膜として、はんだ拡散防止用のニッケルめっき被膜を設け、ニッケルめっき被膜の上にはんだ濡れ性を良好にするパラジウムめっき被膜を設けることがなされている。
【００１７】
本実施形態では柱状電極２４の頂部端面にニッケルめっき被膜４２、パラジウムめっき被膜４４、はんだめっき被膜４６を設けるが、これらのめっき被膜の構成として特徴的な点は、最外層に比較的厚くはんだめっき被膜４６を設けることと、はんだめっき被膜４６とその下地（下地層）のパラジウムめっき被膜４４との界面の高さ位置を樹脂２８の外表面の高さ位置よりも低位置にしたことにある。図２でｈは、はんだめっき被膜４６とパラジウムめっき被膜４４の界面の高さ位置が樹脂２８の外表面の高さ位置よりもｈだけ低位置（封止樹脂内）にあることを示す。
【００１８】
前述したように、ニッケルめっき被膜４２ははんだの拡散防止を目的とし、パラジウムめっき被膜４４ははんだの濡れ性を向上させることを目的とするものであり、はんだめっき被膜４６は実装用の端子の濡れ性を向上させ、はんだボール等の実装用の端子を強固に接合することを目的とする。
図３は柱状電極２４にはんだボール５０を接合した状態を示す。はんだリフローにより、はんだめっき被膜４６のはんだ、およびパラジウムめっき被膜４４のパラジウムは溶融したはんだ中に拡散し、はんだボール５０はニッケルめっき被膜４２に接合することになる。
【００１９】
はんだめっき被膜４６とパラジウムめっき被膜４４の界面の高さ位置が樹脂２８の外表面の高さ位置よりも低位置にあることから、柱状電極２４にはんだボール５０を接合した状態で、はんだボール５０の基部が樹脂２８の外表面よりも内側（封止樹脂内）に入り込んでニッケルめっき被膜４２に接合されることになる。すなわち、はんだボール５０と柱状電極２４との接合部は、樹脂２８の内壁面とニッケルめっき被膜４２によって囲まれた凹部内に支持されることになり、はんだボール５０が強固に支持されて外力に対する耐久性を向上させることが可能となる。
【００２０】
前述したように、柱状電極付き半導体ウエハは封止用フィルム３０を介して上型３２と下型３１とでクランプして樹脂封止する。このときに、封止用フィルム３０は圧縮されて柱状電極２４の頂部端面が封止用フィルム３０に若干くい込むようになる。このため、樹脂封止した状態で柱状電極付き半導体ウエハは柱状電極２４の頂部端面が樹脂２８の外表面よりも若干突出した形状になる。このように、樹脂２８の外表面よりも柱状電極２４の頂部端面が突出した形状となることは、柱状電極２４の頂部端面にはんだボール等の実装用の端子を接合した際に、端子の基部が柱状電極２４の頂部端面に接合し、柱状電極２４の頂部端面に樹脂が付着していたりすると十分な接触面積が確保できなくなり、端子の接合性を阻害するおそれがある。
【００２１】
この点、本実施形態のように柱状電極２４の頂部端面にはんだめっき被膜４６を設けると、柱状電極２４の頂部端面に設けたはんだめっき被膜４６の下地層に樹脂が付着することはないから、下地層の全面にはんだボール５０を確実に接合することが可能になる。また、はんだボール５０の基部が樹脂２８とニッケルめっき被膜４２によって形成された凹部内に入り込んで接合されることにより、はんだボール５０の基部で柱状電極２４との接触面積が大きくなり、凹部内で樹脂２８の内壁面によって支持される作用と合わせて、実装用の端子の接合強度を増大させることができるという利点がある。
【００２２】
柱状電極２４の頂部に設けるニッケルめっき被膜４２、パラジウムめっき被膜４４、はんだめっき被膜４６の厚さは適宜設定できるが、本実施形態ではニッケルめっき被膜４２の厚さを３μｍ、パラジウムめっき被膜４４の厚さを０．１５μｍ、はんだめっき被膜４６の厚さを３μｍとした。
はんだボールを接合した際のはんだボールと柱状電極２４との界面の高さ位置の関係は、接合時にパラジウムめっきが溶融したはんだ中に拡散するから正確には、ニッケルめっき被膜４２とパラジウムめっき被膜４４との界面になるが、パラジウムめっき被膜４４の厚さははんだめっき被膜４６の厚さにくらべてはるかに薄いから、柱状電極２４にはんだめっき被膜４６を形成する場合には、はんだめっき被膜４６の底面の高さ位置又はニッケルめっき被膜４２の表面の高さ位置に注意して柱状電極２４を形成するようにすればよい。
【００２３】
なお、図２に示すめっき被膜４１のうち、パラジウムめっき被膜４４にかえて金めっき被膜を設けることも可能である。金めっき被膜を設ける場合も、金めっき被膜はパラジウムめっき被膜と同程度の厚さに形成すればよい。金めっき被膜を設けることによって、パラジウムめっき被膜と同様にはんだとニッケルめっき被膜４２との濡れ性を向上させ、はんだボール等の実装用の端子と柱状電極２４との接合性を良好にすることができる。
【００２４】
図４は柱状電極付き半導体ウエハに形成する柱状電極２４の他の構成例を示す。本実施形態では柱状電極２４の頂部端面にニッケルめっき被膜４２、パラジウムめっき被膜４４、金めっき被膜４８、はんだめっき被膜４６をこの順に設けたことを特徴とする。はんだめっき被膜４６と金めっき被膜４８との界面の高さ位置を樹脂２８の外表面の高さ位置よりも低位置にしたことは上記実施形態と同様である。
【００２５】
本実施形態のように、パラジウムめっき被膜４４の上に金めっき被膜４８を設けた場合は、金めっき被膜４８を設けない場合にくらべてパラジウムめっき被膜４４の厚さを薄くできるという利点がある。本実施形態で各層の厚さは、ニッケルめっき被膜４２が３μｍ、パラジウムめっき被膜４４が０．０５μｍ、金めっき被膜４８が０．０１μｍ、はんだめっき被膜４６が３μｍである。パラジウムめっき被膜４４と金めっき被膜４８を設けた場合は、これらの各層の厚さを薄くして、かつはんだの濡れ性を向上させることができ、はんだボール５０を柱状電極２４に確実に接合することが可能になる。
【００２６】
図５は柱状電極付き半導体ウエハに形成する柱状電極２４の他の構成例を示す。本実施形態では柱状電極２４に設けるめっき被膜をニッケルめっき被膜４２とはんだめっき被膜４６としたものである。めっき被膜がニッケルめっき被膜４２とはんだめっき被膜４６によることから、製造工程が簡素であり製造コストが安くなるという利点がある。
本実施形態でニッケルめっき被膜４２とはんだめっき被膜４６の厚さはともに３μｍである。はんだめっき被膜４６とニッケルめっき被膜４２の界面の高さ位置を樹脂２８の外表面の高さ位置よりも低位置にすることは上記各実施形態と同様である。
【００２７】
図６は柱状電極付き半導体ウエハの製造方法の実施形態を示す。本発明に係る柱状電極付き半導体ウエハの製造方法は柱状電極に設けるめっき被膜の形成方法を除いて従来方法と同一である。したがって、図６で柱状電極２４を形成する製造工程を示す。
図６（ａ） は、半導体ウエハ１０の表面に絶縁層１６を介して一端側で電極端子１２と電気的に接続して配線パターン２２を設け、導体層１８及び配線パターン２２の表面にレジスト２６を塗布し、配線パターン２２の他端側の柱状電極２４を形成する部位のレジスト２６に、底面に配線パターン２２の他端側が露出する開口穴２６ａを形成した状態を示す。
【００２８】
開口穴２６ａを形成した後、導体層１８をめっき給電層として電解銅めっきを施し開口穴２６ａ内に銅めっき部４０を形成する（図６（ｂ））。銅めっき部４０は柱状電極２４の導体部の主要部となるもので、開口穴２６ａをほぼ充填する程度の厚さにめっきを盛り上げて形成する。柱状電極２４の高さは１００μｍ程度であり、レジスト２６もこれに合わせて１００μｍ程度の厚さに形成する。
【００２９】
次に、めっき被膜を形成するため所要の電解めっきを施す。図示例は銅めっき部４０の上に、めっき被膜４１としてニッケルめっき被膜４２、パラジウムめっき被膜４４、はんだめっき被膜４６を形成した状態を示す（図６（ｃ） ） 。前述したように、ニッケルめっき被膜４２の厚さは３μｍ、パラジウムめっき被膜４４の厚さは０．１５μｍ、はんだめっき被膜４６の厚さは３μｍである。
銅めっき部４０、ニッケルめっき被膜４２、パラジウムめっき被膜４４、はんだめっき被膜４６の厚さは適宜選択できるが、柱状電極付き半導体ウエハを樹脂封止した際に樹脂２８の外表面の高さ位置よりも、はんだめっき被膜４６とパラジウムめっき被膜４４との界面の高さ位置が低位置になるように、これらのめっき被膜の厚さを設定しておくことが必要である。
【００３０】
めっき被膜４１を形成した後、レジスト２６を溶解除去し、半導体ウエハ１０の表面に露出した導体層１８をエッチングすることにより、ニッケルめっき被膜４２、パラジウムめっき被膜４４、はんだめっき被膜４６の３層構造からなるめっき被膜４１が頂部端面に形成された柱状電極２４を有する半導体ウエハが得られる（図６（ｄ））。導体層１８の厚さは０．０５μｍ程度であり、柱状電極２４及び配線パターン２２にくらべてはるかに薄いから、柱状電極２４と配線パターン２２をレジスト等で被覆して保護することなく、導体層１８のみをエッチングして除去することができる。
こうして得られた半導体ウエハの電極端子形成面側を柱状電極２４の頂部端面に形成したはんだめっき被膜４６の表面を露出させて樹脂封止することにより図１に示すような柱状電極付き半導体ウエハが得られる。
【００３１】
以上説明したように、本発明に係る柱状電極付き半導体ウエハの製造方法は、従来の柱状電極付き半導体ウエハの製造方法で柱状電極の頂部端面に形成するめっき被膜のめっき構成を変え、めっき厚を調節するだけで良いから、従来方法がそのまま適用できるという利点がある。
なお、柱状電極２４にはんだめっき被膜４６を形成する際に使用するはんだは、Ｓｎ−Ｐｂ等の鉛を含有するタイプのもの、Ｓｎ−Ａｇ等の鉛を含有しないタイプのもののどちらも使用可能である。
【００３２】
上記のようにして形成した柱状電極付き半導体ウエハからチップサイズの半導体装置を得るには、柱状電極付き半導体ウエハに形成されている各々の柱状電極２４に実装用の外部接続端子を接合し、所定の切断位置で半導体ウエハを個片に切断すればよい。前述したように、柱状電極２４の頂部端面に設けたはんだめっき被膜４６と表面にはんだめっき被膜が形成される下地層との界面の高さ位置を樹脂２８の外表面の高さ位置よりも低位置に形成したことから、図３に示すように、柱状電極の頂部端面に設けためっき被膜と外部接続端子の接合部との界面が封止樹脂内に位置して外部接続端子が接合される。これにより、外部接続端子が強固かつ確実に支持されるようになる。
【００３３】
従来の柱状電極付き半導体ウエハに設けられている柱状電極２４は、上述した各実施形態でも示したように円柱状に形成されたものである。図７（ｂ） は従来の柱状電極２４を拡大して示す斜視図で、円柱状の柱状電極２４が配線パターン２２のパッド部２２ａ上に立設されている状態を示す。柱状電極付き半導体ウエハは柱状電極２４を形成した面側が樹脂封止され、図１、２に示すように、隣接する柱状電極２４の間に樹脂２８が充填される。ところが、樹脂と金属とは一般的に密着性が良いとはいえないから、柱状電極２４にはんだボール等の実装用の端子を接合した際に、柱状電極２４の側面と樹脂２８との界面にはんだが流れ込んだり、界面に水分が吸着されたりする。
【００３４】
この結果、柱状電極２４に接合された実装用の端子と柱状電極２４との接合信頼性が低下するという問題があった。図７（ａ） はこれらの問題を解消する柱状電極２４の形態を示すもので、柱状電極２４の側面を凹凸面形状とした例である。このように、柱状電極２４の側面を凹凸面に形成しておけば、柱状電極２４の側面と樹脂２８との接触面積が増大し、柱状電極２４の側面での樹脂２８と柱状電極２４とのくいつき性が向上し、柱状電極２４と樹脂２８との密着性が改善される。
【００３５】
柱状電極２４は図６で示したように、レジスト２６に形成する開口穴２６ａの形状によって側面の形状が決められるから、レジスト２６を露光、現像する際に開口穴２６ａの内壁面が凹凸面になるように露光すればよい。開口穴２６ａの形状を選択することは容易であり、柱状電極２４の側面を任意の形状に形成することができる。そして、このように柱状電極２４の側面を凹凸面形状に形成することにより、柱状電極２４と樹脂２８との密着性が良好になり、柱状電極２４にはんだボール等の実装用の端子を接合した場合に柱状電極２４の側面と樹脂２８との界面にはんだが流れ込んだり、水分が侵入したりすることを防止することができる。
【００３６】
なお、柱状電極２４と樹脂２８との密着性をさらに高めるために、柱状電極２４を形成してレジスト２６を除去した後、プラズマアッシング等によって柱状電極２４の側面を粗面に形成することも有効である。
また、柱状電極２４の側面を凹凸面形状、粗面等に形成して樹脂２８との密着性を向上させることと合わせて、前述したように、柱状電極２４の頂部端面にはんだめっき被膜を設けることによってさらに柱状電極２４と実装用の端子との接合性を向上させることができ、信頼性の高い半導体装置を得ることができる。
【００３７】
【発明の効果】
本発明に係る柱状電極付き半導体ウエハの製造方法によれば、柱状電極と実装用の外部接続端子とのはんだ濡れ性が良好で、柱状電極に強固にかつ確実に外部接続端子を接合することができる柱状電極付き半導体ウエハを容易に製造することが可能となる。また、本発明に係る半導体装置の製造方法によれば、外部接続端子の接合性が良好で信頼性の高いチップサイズの半導体装置を得ることができる。
【図面の簡単な説明】
【図１】柱状電極付き半導体ウエハの構成を示す断面図である。
【図２】柱状電極付き半導体ウエハの柱状電極の構成を拡大して示す断面図である。
【図３】柱状電極にはんだボールを接合した状態を示す断面図である。
【図４】柱状電極付き半導体ウエハの柱状電極の構成を拡大して示す断面図である。
【図５】柱状電極付き半導体ウエハの柱状電極の構成を拡大して示す断面図である。
【図６】柱状電極付き半導体ウエハの製造方法を示す説明図である。
【図７】柱状電極の他の形成例を示す斜視図である。
【図８】半導体ウエハを用いたチップサイズパッケージの製造で用いる柱状電極付き半導体ウエハの従来の製造方法を示す説明図である。
【図９】半導体ウエハを用いたチップサイズパッケージの製造で用いる柱状電極付き半導体ウエハの製造方法を示す説明図である。
【符号の説明】
１０ 半導体ウエハ
１２ 電極端子
１８ 導体層
２０ レジストパターン
２２ 配線パターン
２４ 柱状電極
２６ レジスト
２６ａ 開口穴
２８ 樹脂
３０ 封止用フィルム
３１ 下型
３２ 上型
４０ 銅めっき部
４１ めっき被膜
４２ ニッケルめっき被膜
４４ パラジウムめっき被膜
４６ はんだめっき被膜
５０ はんだボール[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a process for the preparation of the manufacturing method and semiconductor equipment semiconductor weather toothed columnar electrode used in manufacturing a chip size package with a semiconductor wafer.
[0002]
FIG. 8 shows a method for manufacturing a semiconductor wafer on which columnar electrodes used for manufacturing a chip size package using the semiconductor wafer are formed. FIG. 8A is an enlarged cross-sectional view of the semiconductor wafer 10 and shows a state where the electrode terminals 12 and the passivation film 14 are formed on the surface of the semiconductor wafer 10. First, a polyimide film is coated on the surface of the semiconductor wafer 10 to form an insulating layer 16 exposing the electrode terminals 12 (FIG. 8B). Next, a conductor layer 18 serving as a plating power supply layer is formed on the surfaces of the insulating layer 16 and the electrode terminals 12 by performing sputtering (FIG. 8C). Next, a resist is applied, a resist pattern 20 is formed in accordance with a wiring pattern formed on the surface of the semiconductor wafer 10 (FIG. 8D), and copper plating is performed using the conductor layer 18 as a plating power supply layer. 22 are formed (FIG. 8E). The wiring pattern 22 has one end connected to the electrode terminal 12 and the other end formed with a pad for erecting a columnar electrode.
[0003]
Next, columnar electrodes 24 are formed by performing electrolytic plating. For this reason, first, after removing the resist pattern 20 from the state of FIG. 8E, a plating resist 26 is applied again on the surface of the semiconductor wafer 10 and is aligned with the pad portion of the wiring pattern 22 so as to be aligned with the columnar electrode. The resist 26 at the portion where the film 24 is to be formed is removed to form an opening 26a. The columnar electrode 24 is formed to have a height of about 100 μm, and the resist 26 is formed to be slightly thicker than the columnar electrode 24.
[0004]
The columnar electrode 24 is formed by performing electrolytic copper plating and raising copper plating in the opening hole 26a. FIG. 8F shows a state in which the columnar electrode 24 is formed, and a protective plating film is formed on the top end surface of the columnar electrode 24.
FIG. 8G shows a state in which after removing the resist 26, the conductor layer 18 exposed on the surface of the semiconductor wafer is removed by etching. A semiconductor in which a wiring pattern 22 electrically connected to the electrode terminal 12 at one end is formed on the electrode terminal formation surface by etching the conductor layer 18 and a columnar electrode 24 is formed at the other end of the wiring pattern 22 The wafer 10 is obtained.
[0005]
The semiconductor wafer 10 thus obtained has column electrodes 24 formed one by one corresponding to the respective electrode terminals 12, and a large number of column electrodes 24 are formed on the surface of the semiconductor wafer 10.
FIG. 9 shows a method of resin-sealing the semiconductor wafer 10 on which the columnar electrodes 24 are formed. After the semiconductor wafer 10 is placed on the lower mold 31 with the columnar electrodes 24 facing upward, a sealing resin material 28 is supplied on the semiconductor wafer 10, and then the sealing film 30 is adsorbed on the clamp surface by the upper mold 32. The semiconductor wafer 10 is clamped between the lower die 31. By this clamping operation, the molten resin spreads on the electrode terminal forming surface side of the semiconductor wafer 10 and is sealed with the resin. After resin sealing, the semiconductor wafer 10 on which the sealing film 30 is adhered is taken out of the mold, and the sealing film 30 is peeled off from the semiconductor wafer 10. After joining mounting terminals (for example, solder balls) to the top end surface of the columnar electrode 24, the semiconductor wafer is cut into individual chip sizes to obtain a chip size package.
[0006]
[Problems to be solved by the invention]
In the above-described manufacturing method, the top end surface of the columnar electrode 24 is covered with the sealing film 30 when the semiconductor wafer 10 is resin-sealed so that the resin does not adhere to the top end surface of the columnar electrode 24. However, the resin may penetrate into the top end surface of the columnar electrode 24 and adhere to the columnar electrode 24 when the resin is sealed, so that the resin may remain. . After the semiconductor wafer 10 is sealed with a resin, the sealing film 30 is peeled off from the semiconductor wafer 10 because the resin remaining on the top end surface of the columnar electrode 24 is adhered to the sealing film 30 and removed. That's why.
[0007]
However, the resin remaining on the top end surface of the columnar electrode 24 is not always removed simply by peeling the sealing film 30 from the semiconductor wafer 10. Since the top end surface of the columnar electrode 24 is a bonding surface for bonding a mounting terminal such as a solder ball, the fact that the resin adheres to the top end surface of the columnar electrode 24 indicates that the bonding property between the columnar electrode 24 and the terminal is high. This is a problem. For this reason, after peeling off the sealing film 30, the top end surface of the columnar electrode 24 is cleaned by blasting or the like.
[0008]
However, even by such cleaning, the resin remaining on the top end surface of the columnar electrode 24 cannot always be completely removed, and if the cleaning is performed excessively to completely remove the resin from the top end surface of the columnar electrode 24, conversely, There is also a problem that the resin is deteriorated.
As described above, the conventional method of manufacturing a wafer with columnar electrodes has a problem that the resin remains on the top end surface of the columnar electrodes and the bondability between the columnar electrodes and the mounting terminals is hindered.
The present invention has been made to solve these conventional problems, and an object of the present invention is to make it possible to securely connect terminals to the top end surface of a columnar electrode, thereby providing a highly reliable chip size package. suitable method for manufacturing a semiconductor weather toothed columnar electrodes which can be obtained, and to provide a suitable manufacturing method for the semiconductor equipment made using semiconductor wafer having columnar electrodes.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, the present invention has the following configuration.
That is, as a method of manufacturing a semiconductor wafer with columnar electrodes , an electrode terminal formation surface of a semiconductor wafer is covered with an insulating layer by exposing the electrode terminal, and a conductor layer is formed on the surface of the electrode terminal and the insulating layer. After forming a resist pattern on the surface of the substrate and performing copper plating using the conductor layer as a plating power supply layer to form a wiring pattern having one end connected to each electrode terminal, and removing the resist pattern, the electrode terminal of the semiconductor wafer is removed. A resist is applied to the formation surface, and an opening hole where the other end of the wiring pattern is exposed is formed on the bottom of the resist at a position where the columnar electrode on the other end of the wiring pattern is formed, and the conductive layer is used as a plating power supply layer. Copper plating is performed in the opening hole to form a columnar electrode on the other end side of the wiring pattern, and then a solder plating film is formed on the top end surface of the columnar electrode. The resist is removed, after removing the conductive layer exposed to the surface, wherein a surface of the solder plating film resin sealing the electrode terminal forming surface of the semiconductor wafer so as to expose.
[0010]
Also, when resin-sealing the electrode terminal forming surface side of the semiconductor wafer so that the surface of the solder plating film is exposed, the surface of the solder plating film protrudes from the outer surface of the sealing resin, and the solder plating film It is characterized in that resin sealing is performed so that an interface with a base layer on which a solder plating film is formed is located in a sealing resin .
[0011]
In addition, a nickel plating film is formed as a base layer of a solder plating film on the top end surface of the columnar electrode, and then a solder plating film is formed, and a nickel plating film and a solder plating film are formed on the top end surface of the columnar electrode. A palladium plating film is formed in this order as a base layer of the plating film, and then a solder plating film is formed. Further, a nickel plating film is formed on the top end surface of the columnar electrode, and gold is formed as a base layer of the solder plating film. A plating film is formed in this order, and then a solder plating film is formed. Also, a nickel plating film, a palladium plating film, and a gold plating film as an underlayer of the solder plating film are formed on the top end surface of the columnar electrode. Are formed in this order, and then a solder plating film is formed.
[0012]
Further, as a method for manufacturing a semiconductor device, a semiconductor wafer with columnar electrodes is formed according to the method for manufacturing a semiconductor wafer, and external connection terminals are provided on each of the columnar electrodes formed on the electrode terminal formation surface of the semiconductor wafer with columnar electrodes. After the bonding, the semiconductor wafer is cut into individual pieces at predetermined positions, and the external connection terminals bonded to the columnar electrodes are solder balls .
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
The semiconductor wafer with a columnar electrode according to the present invention is a semiconductor wafer with a columnar electrode used when manufacturing a chip size package using the semiconductor wafer, and is different from a conventional semiconductor wafer with a columnar electrode except for the configuration of the columnar electrode. Does not change. Therefore, the configuration of the columnar electrode characteristic of the present invention will be described below. In the following description, the same portions as those of the conventional semiconductor wafer with columnar electrodes are denoted by the same reference numerals.
[0014]
As described above, in the semiconductor wafer with columnar electrodes, the wiring pattern 22 that is electrically connected to the electrode terminal 12 at one end via the electrical insulating layer is formed on the electrode terminal forming surface of the semiconductor wafer 10. The columnar electrode 24 is erected on the other end side, and the electrode terminal forming surface side of the semiconductor wafer 10 is sealed with a resin 28 by exposing the top end surface of the columnar electrode 24. As shown in FIG. 1, the resin 28 fills the space between all adjacent columnar electrodes 24.
[0015]
FIG. 2 is an enlarged sectional view showing a portion near the columnar electrode 24 of the wafer with columnar electrodes. In the semiconductor wafer with columnar electrodes according to the present embodiment, the base portion (conductor portion) of the columnar electrode 24 is a copper plating portion 40, and a nickel plating film 42 as a plating film on the top end surface of the copper plating portion 40 formed in a columnar shape, and palladium The plating film 44 and the solder plating film 46 are provided in this order.
[0016]
As described above, providing a plating film on the top end surface of the columnar electrode 24 has been conventionally performed. That is, a nickel plating film for preventing solder diffusion is provided as a plating film for improving solder jointability, and a palladium plating film for improving solder wettability is provided on the nickel plating film.
[0017]
In this embodiment, a nickel plating film 42, a palladium plating film 44, and a solder plating film 46 are provided on the top end surface of the columnar electrode 24. The characteristic feature of these plating films is that the outermost layer has a relatively thick solder plating film. The provision of the coating 46 is that the height position of the interface between the solder plating film 46 and the underlying palladium plating film 44 is lower than the height position of the outer surface of the resin 28. In FIG. 2, h indicates that the height position of the interface between the solder plating film 46 and the palladium plating film 44 is lower than the height position of the outer surface of the resin 28 by h (in the sealing resin).
[0018]
As described above, the nickel plating film 42 is for preventing the diffusion of solder, the palladium plating film 44 is for improving the wettability of the solder, and the solder plating film 46 is for preventing the wetting of the mounting terminals. An object of the present invention is to improve the performance and to firmly join mounting terminals such as solder balls.
FIG. 3 shows a state in which a solder ball 50 is joined to the columnar electrode 24. By the solder reflow, the solder of the solder plating film 46 and the palladium of the palladium plating film 44 diffuse into the molten solder, and the solder balls 50 are joined to the nickel plating film 42.
[0019]
Since the height position of the interface between the solder plating film 46 and the palladium plating film 44 is lower than the height position of the outer surface of the resin 28, the solder ball 50 is joined to the columnar electrode 24 in a state where the solder ball 50 is joined. Enters into the inside of the outer surface of the resin 28 (inside the sealing resin) and is joined to the nickel plating film 42. That is, the joint between the solder ball 50 and the columnar electrode 24 is supported in the concave portion surrounded by the inner wall surface of the resin 28 and the nickel plating film 42, and the solder ball 50 is firmly supported and resists external force. The durability can be improved.
[0020]
As described above, the semiconductor wafer with the columnar electrodes is clamped by the upper mold 32 and the lower mold 31 via the sealing film 30 and sealed with resin. At this time, the sealing film 30 is compressed so that the top end surface of the columnar electrode 24 slightly bites into the sealing film 30. Therefore, the semiconductor wafer with the columnar electrodes in the resin-sealed state has a shape in which the top end surface of the columnar electrodes 24 slightly protrudes from the outer surface of the resin 28. As described above, the shape in which the top end surface of the columnar electrode 24 protrudes from the outer surface of the resin 28 is that when a mounting terminal such as a solder ball is joined to the top end surface of the columnar electrode 24, Is bonded to the top end surface of the columnar electrode 24, and if a resin adheres to the top end surface of the columnar electrode 24, a sufficient contact area cannot be ensured, and there is a possibility that the joining properties of the terminals may be hindered.
[0021]
In this regard, when the solder plating film 46 is provided on the top end surface of the columnar electrode 24 as in the present embodiment, the resin does not adhere to the base layer of the solder plating film 46 provided on the top end surface of the columnar electrode 24. The solder balls 50 can be securely bonded to the entire surface of the underlayer. Further, the base of the solder ball 50 penetrates into and is joined to the recess formed by the resin 28 and the nickel plating film 42, so that the contact area with the columnar electrode 24 at the base of the solder ball 50 increases, and In addition to the function supported by the inner wall surface of the resin 28, there is an advantage that the bonding strength of the mounting terminal can be increased.
[0022]
The thickness of the nickel plating film 42, the palladium plating film 44, and the solder plating film 46 provided on the top of the columnar electrode 24 can be appropriately set. In the present embodiment, the thickness of the nickel plating film 42 is 3 μm, and the thickness of the palladium plating film 44 is 3 μm. And the thickness of the solder plating film 46 was 3 μm.
The relationship between the height position of the interface between the solder ball and the columnar electrode 24 when the solder ball is joined is exactly as follows: the nickel plating film 42 and the palladium plating film 44 However, since the thickness of the palladium plating film 44 is much smaller than the thickness of the solder plating film 46, when the solder plating film 46 is formed on the columnar electrode 24, The columnar electrode 24 may be formed while paying attention to the height position of the bottom surface or the height position of the surface of the nickel plating film 42.
[0023]
It is also possible to provide a gold plating film instead of the palladium plating film 44 among the plating films 41 shown in FIG. When a gold plating film is provided, the gold plating film may be formed to have the same thickness as the palladium plating film. By providing the gold plating film, it is possible to improve the wettability between the solder and the nickel plating film 42 as in the case of the palladium plating film, and to improve the bondability between the mounting terminal such as a solder ball and the columnar electrode 24. it can.
[0024]
FIG. 4 shows another configuration example of the columnar electrodes 24 formed on the semiconductor wafer with columnar electrodes. The present embodiment is characterized in that a nickel plating film 42, a palladium plating film 44, a gold plating film 48, and a solder plating film 46 are provided in this order on the top end surface of the columnar electrode 24. The height position of the interface between the solder plating film 46 and the gold plating film 48 is lower than the height position of the outer surface of the resin 28 as in the above embodiment.
[0025]
When the gold plating film 48 is provided on the palladium plating film 44 as in the present embodiment, there is an advantage that the thickness of the palladium plating film 44 can be reduced as compared with the case where the gold plating film 48 is not provided. In this embodiment, the thickness of each layer is 3 μm for the nickel plating film 42, 0.05 μm for the palladium plating film 44, 0.01 μm for the gold plating film 48, and 3 μm for the solder plating film 46. When the palladium plating film 44 and the gold plating film 48 are provided, the thickness of each of these layers can be reduced and the wettability of the solder can be improved, so that the solder ball 50 can be securely joined to the columnar electrode 24. It becomes possible.
[0026]
FIG. 5 shows another configuration example of the columnar electrodes 24 formed on the semiconductor wafer with columnar electrodes. In this embodiment, the plating films provided on the columnar electrodes 24 are the nickel plating film 42 and the solder plating film 46. Since the plating film is composed of the nickel plating film 42 and the solder plating film 46, there is an advantage that the manufacturing process is simple and the manufacturing cost is low.
In the present embodiment, the thickness of each of the nickel plating film 42 and the solder plating film 46 is 3 μm. The height position of the interface between the solder plating film 46 and the nickel plating film 42 is lower than the height position of the outer surface of the resin 28 as in the above-described embodiments.
[0027]
FIG. 6 shows an embodiment of a method for manufacturing a semiconductor wafer with columnar electrodes. The method of manufacturing a semiconductor wafer with columnar electrodes according to the present invention is the same as the conventional method except for the method of forming a plating film provided on the columnar electrodes. Therefore, a manufacturing process for forming the columnar electrode 24 is shown in FIG.
FIG. 6A shows that the wiring pattern 22 is provided on the surface of the semiconductor wafer 10 by electrically connecting to the electrode terminal 12 at one end via the insulating layer 16. This shows a state in which an opening 26a for exposing the other end of the wiring pattern 22 is formed on the bottom surface of the resist 26 at the portion where the columnar electrode 24 on the other end of the wiring pattern 22 is formed.
[0028]
After forming the opening 26a, electrolytic copper plating is performed using the conductor layer 18 as a plating power supply layer to form a copper plating portion 40 in the opening 26a (FIG. 6B). The copper plating part 40 is a main part of the conductor part of the columnar electrode 24, and is formed by raising the plating to a thickness that substantially fills the opening 26a. The height of the columnar electrode 24 is about 100 μm, and the resist 26 is also formed to a thickness of about 100 μm in accordance with the height.
[0029]
Next, required electrolytic plating is performed to form a plating film. The illustrated example shows a state in which a nickel plating film 42, a palladium plating film 44, and a solder plating film 46 are formed as a plating film 41 on the copper plating portion 40 (FIG. 6C). As described above, the thickness of the nickel plating film 42 is 3 μm, the thickness of the palladium plating film 44 is 0.15 μm, and the thickness of the solder plating film 46 is 3 μm.
The thicknesses of the copper plating portion 40, the nickel plating film 42, the palladium plating film 44, and the solder plating film 46 can be appropriately selected. However, when the semiconductor wafer with the columnar electrodes is sealed with the resin, the thickness is higher than the height position of the outer surface of the resin 28. Also, it is necessary to set the thicknesses of these plating films so that the height position of the interface between the solder plating film 46 and the palladium plating film 44 is at a low position.
[0030]
After the plating film 41 is formed, the resist 26 is dissolved and removed, and the conductor layer 18 exposed on the surface of the semiconductor wafer 10 is etched to form a three-layer structure of a nickel plating film 42, a palladium plating film 44, and a solder plating film 46. A semiconductor wafer having a columnar electrode 24 having a plating film 41 made of a film on the top end surface is obtained (FIG. 6D). The thickness of the conductor layer 18 is about 0.05 μm, which is much thinner than the columnar electrode 24 and the wiring pattern 22. Therefore, the columnar electrode 24 and the wiring pattern 22 are covered with a resist or the like without being protected. Only 18 can be removed by etching.
The semiconductor wafer with the columnar electrodes as shown in FIG. 1 is obtained by exposing the surface of the solder plating film 46 formed on the top end surface of the columnar electrode 24 to the electrode terminal forming surface side of the semiconductor wafer thus obtained and sealing with resin. can get.
[0031]
As described above, the method of manufacturing a semiconductor wafer with a columnar electrode according to the present invention changes the plating configuration of the plating film formed on the top end surface of the columnar electrode by the conventional method of manufacturing a semiconductor wafer with a columnar electrode, and changes the plating thickness. There is an advantage that the conventional method can be applied as it is because only adjustment is required.
The solder used when forming the solder plating film 46 on the columnar electrode 24 may be either a lead-containing type such as Sn-Pb or a lead-free type such as Sn-Ag. is there.
[0032]
To obtain a chip-sized semiconductor device from the semiconductor wafer with columnar electrodes formed as described above, an external connection terminal for mounting is bonded to each of the columnar electrodes 24 formed on the semiconductor wafer with columnar electrodes, and The semiconductor wafer may be cut into individual pieces at the cutting position. As described above, the height position of the interface between the solder plating film 46 provided on the top end surface of the columnar electrode 24 and the underlying layer on which the solder plating film is formed is lower than the height position of the outer surface of the resin 28. 3, the interface between the plating film provided on the top end surface of the columnar electrode and the joint between the external connection terminal is located in the sealing resin, and the external connection terminal is joined, as shown in FIG. . As a result, the external connection terminals are firmly and reliably supported.
[0033]
The columnar electrode 24 provided on the conventional semiconductor wafer with columnar electrodes is formed in a columnar shape as described in each of the above embodiments. FIG. 7B is an enlarged perspective view of the conventional columnar electrode 24, showing a state where the columnar columnar electrode 24 is erected on the pad portion 22 a of the wiring pattern 22. The surface of the semiconductor wafer with the columnar electrodes on which the columnar electrodes 24 are formed is resin-sealed, and the resin 28 is filled between the adjacent columnar electrodes 24 as shown in FIGS. However, since the resin and the metal generally cannot be said to have good adhesion, when a mounting terminal such as a solder ball is joined to the columnar electrode 24, an interface between the side surface of the columnar electrode 24 and the resin 28 is formed. Solder flows in or moisture is adsorbed on the interface.
[0034]
As a result, there is a problem that the bonding reliability between the mounting terminal bonded to the columnar electrode 24 and the columnar electrode 24 is reduced. FIG. 7A shows a form of the columnar electrode 24 which solves these problems, and is an example in which the side surface of the columnar electrode 24 is formed into an uneven surface shape. If the side surface of the columnar electrode 24 is formed as an uneven surface as described above, the contact area between the side surface of the columnar electrode 24 and the resin 28 increases, and the contact between the resin 28 and the columnar electrode 24 on the side surface of the columnar electrode 24 increases. The sticking property is improved, and the adhesion between the columnar electrode 24 and the resin 28 is improved.
[0035]
As shown in FIG. 6, since the shape of the side surface of the columnar electrode 24 is determined by the shape of the opening 26a formed in the resist 26, the inner wall surface of the opening 26a becomes uneven when the resist 26 is exposed and developed. Exposure may be performed. It is easy to select the shape of the opening 26a, and the side surface of the columnar electrode 24 can be formed in any shape. By forming the side surface of the columnar electrode 24 in an uneven shape in this manner, the adhesion between the columnar electrode 24 and the resin 28 is improved, and a mounting terminal such as a solder ball is joined to the columnar electrode 24. In this case, it is possible to prevent the solder from flowing into the interface between the side surface of the columnar electrode 24 and the resin 28 and the penetration of moisture.
[0036]
In order to further increase the adhesion between the columnar electrode 24 and the resin 28, it is also effective to form the columnar electrode 24 and remove the resist 26, and then form the side surface of the columnar electrode 24 with a rough surface by plasma ashing or the like. It is.
As described above, a solder plating film is provided on the top end surface of the columnar electrode 24 in combination with forming the side surface of the columnar electrode 24 into an uneven surface shape, a rough surface, and the like to improve the adhesion with the resin 28. Thereby, the bonding property between the columnar electrode 24 and the mounting terminal can be further improved, and a highly reliable semiconductor device can be obtained.
[0037]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to the manufacturing method of the semiconductor wafer with a columnar electrode according to the present invention, the solderability of the columnar electrode and the external connection terminal for mounting is good , and the external connection terminal can be firmly and reliably joined to the columnar electrode. the pillar-like electrodes with a semiconductor wafer that can be made can be easily manufactured. Further, according to the method of manufacturing a semiconductor device according to the present invention, it can be joined for external connection terminals to obtain a semiconductor device of high position Ppusaizu good reliability.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a configuration of a semiconductor wafer with columnar electrodes.
FIG. 2 is an enlarged sectional view showing a configuration of a columnar electrode of a semiconductor wafer with columnar electrodes.
FIG. 3 is a cross-sectional view showing a state where a solder ball is joined to a columnar electrode.
FIG. 4 is an enlarged sectional view showing a configuration of a columnar electrode of a semiconductor wafer with columnar electrodes.
FIG. 5 is an enlarged sectional view showing a configuration of a columnar electrode of a semiconductor wafer with columnar electrodes.
FIG. 6 is an explanatory view illustrating a method for manufacturing a semiconductor wafer with columnar electrodes.
FIG. 7 is a perspective view showing another example of forming a columnar electrode.
FIG. 8 is an explanatory view showing a conventional method for manufacturing a semiconductor wafer with columnar electrodes used in manufacturing a chip size package using a semiconductor wafer.
FIG. 9 is an explanatory view showing a method of manufacturing a semiconductor wafer with columnar electrodes used in manufacturing a chip size package using a semiconductor wafer.
[Explanation of symbols]
Reference Signs List 10 semiconductor wafer 12 electrode terminal 18 conductor layer 20 resist pattern 22 wiring pattern 24 columnar electrode 26 resist 26a opening hole 28 resin 30 sealing film 31 lower mold 32 upper mold 40 copper plating portion 41 plating film 42 nickel plating film 44 palladium plating Coating 46 Solder plating 50 Solder ball

Claims (8)

半導体ウエハの電極端子形成面を電極端子を露出して絶縁層により被覆し、前記電極端子及び絶縁層の表面に導体層を形成した後、導体層の表面にレジストパターンを形成して前記導体層をめっき給電層として銅めっきを施すことにより一端側が各電極端子に接続する配線パターンを形成し、
前記レジストパターンを除去した後、半導体ウエハの電極端子形成面にレジストを塗布し、配線パターンの他端側の柱状電極を形成する部位のレジストに、底面に配線パターンの他端側が露出する開口穴を形成し、
前記導体層をめっき給電層として前記開口穴内に銅めっきを施して、前記配線パターンの他端側に柱状電極を形成した後、
該柱状電極の頂部端面にはんだめっき被膜を形成し、
前記レジストを除去して、表面に露出する前記導体層を除去した後、前記はんだめっき被膜の表面が露出するように半導体ウエハの電極端子形成面側を樹脂封止することを特徴とする柱状電極付き半導体ウエハの製造方法。 The electrode terminal forming surface of the semiconductor wafer is covered with an insulating layer by exposing the electrode terminals, and after forming a conductor layer on the surface of the electrode terminals and the insulating layer, a resist pattern is formed on the surface of the conductor layer to form the conductor layer. By applying copper plating as a plating power supply layer, one end side is formed with a wiring pattern connected to each electrode terminal,
After removing the resist pattern, a resist is applied to the electrode terminal forming surface of the semiconductor wafer, and the other end of the wiring pattern is provided with an opening hole on the bottom where the other end of the wiring pattern is exposed. To form
After performing copper plating in the opening hole using the conductor layer as a plating power supply layer and forming a columnar electrode on the other end side of the wiring pattern,
Forming a solder plating film on the top end surface of the columnar electrode,
Removing the resist, removing the conductor layer exposed on the surface, and sealing the electrode terminal forming surface side of the semiconductor wafer with a resin so that the surface of the solder plating film is exposed; Of manufacturing a semiconductor wafer with a hole . はんだめっき被膜の表面が露出するように半導体ウエハの電極端子形成面側を樹脂封止する際に、はんだめっき被膜の表面が封止樹脂の外表面よりも突出するとともに、はんだめっき被膜と表面にはんだめっき被膜が形成される下地層との界面が封止樹脂内に位置するように樹脂封止することを特徴とする請求項１記載の柱状電極付き半導体ウエハの製造方法。 When sealing the electrode terminal forming surface side of the semiconductor wafer with resin so that the surface of the solder plating film is exposed, the surface of the solder plating film protrudes from the outer surface of the sealing resin and the solder plating film and the surface manufacturing method of the columnar electrodes with the semiconductor wafer according to claim 1, wherein the resin sealing as the interface with the underlying layer on which the solder plating film is formed is located in the sealing resin. 柱状電極の頂部端面に、はんだめっき被膜の下地層としてニッケルめっき被膜を形成し、次いではんだめっき被膜を形成することを特徴とする請求項２記載の柱状電極付き半導体ウエハの製造方法。 3. The method according to claim 2 , wherein a nickel plating film is formed as an underlayer of the solder plating film on the top end surface of the columnar electrode, and then a solder plating film is formed . 柱状電極の頂部端面に、ニッケルめっき被膜と、はんだめっき被膜の下地層としてパラジウムめっき被膜とをこの順に形成し、次いではんだめっき被膜を形成することを特徴とする請求項２記載の柱状電極付き半導体ウエハの製造方法。 3. The semiconductor with columnar electrodes according to claim 2 , wherein a nickel plating film and a palladium plating film as an underlayer of the solder plating film are formed in this order on the top end surface of the columnar electrode, and then a solder plating film is formed. Wafer manufacturing method. 柱状電極の頂部端面に、ニッケルめっき被膜と、はんだめっき被膜の下地層として金めっき被膜とをこの順に形成し、次いではんだめっき被膜を形成することを特徴とする請求項２記載の柱状電極付き半導体ウエハの製造方法。 3. The semiconductor with columnar electrodes according to claim 2 , wherein a nickel plating film and a gold plating film as an underlayer of the solder plating film are formed in this order on the top end surface of the columnar electrode, and then the solder plating film is formed. Wafer manufacturing method. 柱状電極の頂部端面に、ニッケルめっき被膜と、パラジウムめっき被膜と、はんだめっき被膜の下地層として金めっき被膜とをこの順に形成し、次いではんだめっき被膜を形成することを特徴とする請求項２記載の柱状電極付き半導体ウエハの製造方法。 3. The method according to claim 2 , wherein a nickel plating film, a palladium plating film, and a gold plating film as a base layer of the solder plating film are formed in this order on the top end surface of the columnar electrode, and then a solder plating film is formed. Of manufacturing a semiconductor wafer with columnar electrodes. 請求項１〜６のいずれか一項記載の半導体ウエハの製造方法にしたがって柱状電極付き半導体ウエハを形成し、
該柱状電極付き半導体ウエハの電極端子形成面に形成された各々の柱状電極に外部接続端子を接合した後、
前記半導体ウエハを所定位置で個片に切断することを特徴とする半導体装置の製造方法。 Forming a semiconductor wafer with columnar electrodes according to the method of manufacturing a semiconductor wafer according to any one of claims 1 to 6,
After joining external connection terminals to each columnar electrode formed on the electrode terminal forming surface of the semiconductor wafer with columnar electrodes,
A method of manufacturing a semiconductor device , comprising cutting the semiconductor wafer into individual pieces at predetermined positions . 柱状電極に接合する外部接続端子が、はんだボールであることを特徴とする請求項７記載の半導体装置の製造方法。8. The method according to claim 7, wherein the external connection terminal joined to the columnar electrode is a solder ball.
JP1823799A 1999-01-27 1999-01-27 Method for manufacturing semiconductor wafer with columnar electrode and method for manufacturing semiconductor device Expired - Fee Related JP3564311B2 (en)

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TW089101296A TW444288B (en) 1999-01-27 2000-01-26 Semiconductor wafer and semiconductor device provided with columnar electrodes and methods of producing the wafer and device
KR1020000003629A KR100687548B1 (en) 1999-01-27 2000-01-26 Semiconductor wafer and semiconductor device provided with columnar electrodes and methods of producing the wafer and device
EP00300613A EP1024531A3 (en) 1999-01-27 2000-01-27 Semiconductor wafer and device having columnar electrodes
US10/323,645 US7220657B2 (en) 1999-01-27 2002-12-20 Semiconductor wafer and semiconductor device provided with columnar electrodes and methods of producing the wafer and device

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