JP3560298B2 - Photoelectric conversion device, driving method thereof, and system having the same - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a photoelectric conversion device, a driving method thereof, and a system having the same. For example, a one-dimensional or two-dimensional photoelectric conversion device capable of performing equal-magnification reading of a facsimile, a digital copying machine, an X-ray imaging device, or the like. , A driving method thereof, and a system having the same.
[0002]
[Prior art]
Conventionally, a reading system using a reduction optical system and a CCD type sensor has been used as a reading system of a facsimile, a digital copying machine, an X-ray imaging device, or the like. In recent years, hydrogenated amorphous silicon (hereinafter referred to as “a-Si The development of a photoelectric conversion semiconductor material typified by ")" has led to the development of a so-called contact type sensor in which a photoelectric conversion element and a signal processing unit are formed on a large-area substrate and read by an information source and an optical system of the same magnification. Remarkable. In particular, a-Si can be used not only as a photoelectric conversion material but also as a thin film field effect transistor (hereinafter, referred to as “TFT”), so that a photoelectric conversion semiconductor layer and a semiconductor layer of a TFT can be formed simultaneously. It has the advantages that can be.
[0003]
FIG. 21 is a sectional view showing the configuration of a conventional optical sensor. FIGS. 21A and 21B show the layer structure of two types of optical sensors, and FIG. 21C shows a common representative driving method. FIGS. 21A and 21B both show a photodiode type optical sensor. FIG. 21A is called a PIN type, and FIG. 21B is called a Schottky type. In the figure, 1 is an insulating substrate, 2 is a lower electrode, 3 is a p-type semiconductor layer (hereinafter referred to as “p layer”), 4 is an intrinsic semiconductor layer (hereinafter referred to as “i layer”), and 5 is n-type. The semiconductor layer (hereinafter, referred to as “n layer”) and 6 are transparent electrodes. In FIG. 21B, the material of the lower electrode 2 is appropriately selected, and a Schottky barrier layer is formed so that electrons are not injected from the lower electrode 2 into the i-layer 4. Numeral 10 denotes an optical sensor which symbolizes the optical sensor, numeral 11 denotes a power source, and numeral 12 denotes a detection unit such as a current amplifier. The direction indicated by C in the optical sensor 10 is the transparent electrode 6 side in FIGS. 21A and 21B, and the direction indicated by A is the lower electrode 2 side. It is set so that a positive voltage is applied to the C side.
[0004]
Here, the operation will be briefly described. When light is incident from the direction indicated by the arrow and reaches the i-layer 4, the light is absorbed and electrons and holes are generated. Since an electric field is applied to the i-layer 4 by the power supply 11, electrons move to the transparent electrode 6 through the C-side, that is, the n-layer 5, and holes move to the A-side, that is, the lower electrode 2. Therefore, a photocurrent has flowed through the optical sensor 10. When light does not enter, neither electrons nor holes are generated in the i-layer 4, the holes in the transparent electrode 6 serve as a hole injection blocking layer for the n-layer 5, and the electrons in the lower electrode 2 correspond to the PIN pattern. In FIG. 21A, the p layer 3 functions as a Schottky barrier, and in FIG. 21B, the Schottky barrier layer functions as an electron injection preventing layer. Both electrons and holes cannot move, and no current flows. Therefore, the current changes depending on the presence or absence of the light, and if this is detected by the detection unit 12 in FIG.
[0005]
[Problems to be solved by the invention]
However, it has been difficult to produce a low-cost photoelectric conversion device having a high SN ratio with the conventional optical sensor. The reason will be described below.
[0006]
The first reason is that both the PIN type FIG. 21 (a) and the Schottky type FIG. 21 (b) require two injection blocking layers. In the PIN sensor, the n-layer 5 which is an injection-blocking layer needs to have a property of preventing electrons from being guided to the transparent electrode 6 and also preventing holes from being injected into the i-layer 4. Further, the Schottky sensor has a characteristic that the Schottky barrier layer 4 blocks electrons from the lower electrode and blocks holes from the n-layer 5. If either of these characteristics is missed, the photocurrent will decrease, or a current when light does not enter (hereinafter referred to as “dark current”) will be generated and increased, causing a reduction in the SN ratio. The dark current itself includes noise, which is considered as noise and fluctuation called shot noise, so-called quantum noise. Even if the dark current is subtracted by the detection unit 12, the quantum noise associated with the dark current is reduced. I can't.
[0007]
Usually, in order to improve this characteristic, it is necessary to optimize the conditions for forming the i-layer 4 and the n-layer 5 and the annealing conditions after the formation. However, the p-layer 3, which is another injection-blocking layer, needs to have the same characteristics although the electron holes are reversed, and similarly, it is necessary to optimize each condition.
[0008]
Usually, the conditions for the optimization of the former n-layer and the optimization of the latter p-layer are not the same, and it is difficult to satisfy both conditions at the same time. In other words, the necessity of two injection blocking layers in the same optical sensor makes it difficult to form an optical sensor having a high SN ratio. This is the same in the Schottky type FIG. 21B. Also, in the Schottky type FIG. 21B, a Schottky barrier layer is used for one of the injection blocking layers, but this utilizes the difference in work function between the lower electrode 2 and the i-layer 4, and the lower electrode 2 The material is limited, and the influence of the localized level of the interface greatly affects the characteristics, and it is more difficult to satisfy the conditions. It has also been reported that a thin silicon or metal oxide film or nitride film of about 100 angstroms is formed between the lower electrode 2 and the i-layer 4 in order to further improve the characteristics of the Schottky barrier layer. This is to improve the effect of introducing holes to the lower electrode 2 by using the tunnel effect to prevent injection of electrons into the i-layer 4. Since the difference in work function is used, the material of the lower electrode 2 is also used. Is necessary, and the oxide film and the nitride film are limited to a very thin place of about 100 angstroms, and the thickness of the oxide film or the nitride film is limited to about 100 Å in order to utilize the opposite property of blocking the injection of electrons and the movement of holes by the tunnel effect. It is difficult to control the pod film quality and the productivity can be reduced.
[0009]
In addition, the need for two injection blocking layers lowers productivity and increases cost. This is because the characteristics of the optical sensor cannot be obtained if a defect occurs due to dust or the like in one of the two places because the injection blocking layer is important in characteristics.
[0010]
The second reason will be described with reference to FIG. FIG. 22 shows a layer structure of a field effect transistor (TFT) formed of a thin semiconductor layer. The TFT may be used as a part of a control unit when forming a photoelectric conversion device. In the figure, the same components as those in FIG. 21 are denoted by the same reference numerals. 7, a gate insulating film; and 60, an upper electrode. The formation method will be described step by step. A lower electrode 2 serving as a gate electrode, a gate insulating film 7, an i-layer 4, an n-layer 5, an upper electrode 60 serving as a source and a drain electrode are sequentially formed on an insulating substrate 1, and the upper electrode 60 is etched to form a source and a drain. After forming an electrode, the n-layer 5 is etched to form a channel portion. The characteristics of the TFT are sensitive to the state of the interface between the gate insulating film 7 and the i-layer 4 and are usually deposited continuously in the same vacuum in order to prevent the contamination.
[0011]
When a conventional optical sensor is formed on the same substrate as the TFT, this layer configuration becomes a problem, resulting in an increase in cost and a decrease in characteristics. The reason for this is that the configuration of the conventional optical sensor shown in FIG. 21 is such that the PIN type sensor shown in FIG. 21A is an electrode / p layer / i layer / n layer / electrode, and the Schottky sensor shown in FIG. This is because the TFT has a configuration of electrode / insulating film / i-layer / n-layer / electrode, whereas the configuration is electrode / i-layer / n-layer / electrode. This indicates that they cannot be formed by the same process, which leads to a decrease in yield and an increase in cost due to complexity of the process. Further, in order to make the i-layer / n-layer common, an etching step of the gate insulating layer 7 and the p-layer 3 is required, and the p-layer 3 and the i-layer of the injection blocking layers, which are important layers of the optical sensor described above. 4 cannot be formed in the same vacuum, or an important interface between the gate insulating film 7 and the i-layer 4 of the TFT is contaminated by etching of the gate insulating film, which causes deterioration of characteristics and a reduction in the SN ratio.
[0012]
In order to improve the characteristics of the above-described Schottky sensor shown in FIG. 21B, an oxide film or a nitride film formed between the lower electrode 2 and the i-layer 4 has the same film configuration in the same order. As described above, the oxide film and the nitride film need to be around 100 angstroms, and it is difficult to share them with the gate insulating film 7. FIG. 23 shows the results of experiments we have performed on the yield of the gate insulating film 7 and the TFT. When the thickness of the gate insulating film was 1000 Å or less, the yield sharply decreased. At 800 Å, the yield was about 30%, when the yield was 500 Å, the yield was 0%, and when the thickness was 250 Å, even the operation of the TFT could not be confirmed. It is obviously difficult to share the oxide film and nitride film of the optical sensor utilizing the tunnel effect with the gate insulating film of the TFT which must insulate electrons and holes, as shown by the data.
[0013]
Further, although not shown, a capacitive element (hereinafter, referred to as a “capacitor”), which is an element necessary to obtain an integrated value of electric charge and current, has the same configuration as a conventional optical sensor and has a small leakage. It is difficult to make things with special characteristics. Since the purpose of a capacitor is to accumulate electric charge between two electrodes, an intermediate layer between the electrodes must have a layer that blocks the movement of electrons and holes, whereas a conventional optical sensor has a layer between the electrodes. This is because it is difficult to obtain an intermediate layer that is thermally stable and has good characteristics with little leakage due to the use of only the semiconductor layer.
[0014]
The poor matching of the TFT or capacitor, which is an important element in the construction of the photoelectric conversion device, in terms of process or characteristics in terms of process or characteristics is caused by arranging a large number of optical sensors in one or two dimensions. Since many steps and complicated steps are required in configuring the entire system for sequentially detecting signals, the yield is extremely low, and this is a serious problem in producing a low-cost, high-performance, multifunctional device.
[0015]
[Object of the invention]
An object of the present invention is to provide a photoelectric conversion device having a high SN ratio and stable characteristics, a driving method thereof, and a system having the same.
[0016]
Specifically, the photoelectric conversion device of the present invention applies an electric field to the photoelectric conversion element in a direction opposite to that during the photoelectric conversion operation in order to suppress the movement of the flat band voltage of the photoelectric conversion element. It is an object of the present invention not to reduce the dynamic range, that is, to have a high SN ratio and stable characteristics.
[0017]
Another object of the present invention is to provide a photoelectric conversion device having a high yield and stable characteristics and a system having the photoelectric conversion device.
[0018]
In addition, the present invention provides a photoelectric conversion device which can be formed in the same process as a TFT and can be manufactured at low cost without complicating a production process, a driving method thereof, and a system including the same. The purpose is to:
[0019]
[Means for Solving the Problems]
The present invention has been made in order to solve the above problems, and a first electrode layer on an insulating substrate, First insulating layer , Photoelectric conversion semiconductor layer, First Blocking layer, which blocks the injection of type carriers, and the second electrode layer Sequentially For photoelectric conversion devices with deposited photoelectric conversion elements You And
The following three operation modes for applying an electric field to each layer of the photoelectric conversion element,
(1) a photoelectric conversion mode in which charges are generated and accumulated according to the amount of incident light,
(2) Photoelectric conversion element Refresh mode to refresh the
(3) Flat band voltage shift suppression mode for suppressing movement of the flat band voltage of the photoelectric conversion element,
And a switch means for repeatedly operating in a predetermined order.
[0020]
Further, the present invention provides the following three operation modes for applying an electric field to each layer of the photoelectric conversion element,
(1) a photoelectric conversion mode in which charges are generated and accumulated according to the amount of incident light,
(2) a refresh mode for refreshing the charge stored in the photoelectric conversion element,
(3) Flat band voltage shift suppression mode for suppressing movement of the flat band voltage of the photoelectric conversion element,
Are switched by a switch means, and the three operation modes are repeatedly operated in a fixed order.
[0021]
Further, the present invention provides Of the present invention Photoelectric conversion device A phosphor provided on the photoelectric conversion device for converting incident X-rays into light, an X-ray source for generating the X-rays, Signal processing means for processing a signal from a photoelectric conversion device, recording means for recording a signal from the signal processing means, display means for displaying a signal from the signal processing means, and the signal processing means Transmission means for transmitting signals from When, A system having:
[0022]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0023]
[Embodiment 1]
Prior to the description of the first embodiment of the present invention, a prior art Japanese Patent Application No. 6-313392, which was previously proposed by the inventors, and a refresh operation thereof will be described.
[0024]
FIGS. 10A and 10B are a schematic layer configuration diagram and a schematic circuit diagram of a photoelectric conversion device, respectively, for explaining a photoelectric conversion element of a photoelectric conversion device previously proposed by the present inventors. is there.
[0025]
In FIG. 10A, 1 is an insulating substrate made of glass or the like, and 2 is a lower electrode made of A1 or Cr. Reference numeral 70 denotes an insulating layer formed of silicon nitride (SiN) or the like which blocks passage of both electrons and holes. The thickness of the insulating layer is 500 Å, which is so small that electrons and holes cannot pass due to the tunnel effect. -More than Reference numeral 4 denotes a photoelectric conversion semiconductor layer formed of an intrinsic semiconductor i-layer of hydrogenated amorphous silicon (a-Si: H). Reference numeral 5 denotes a hole for preventing injection of a hole into the photoelectric conversion semiconductor layer 4 from the transparent electrode 6 side. -Si n ⁺ The injection blocking layer and the transparent electrode 6 formed of a layer are formed of a compound containing indium or tin, such as ITO, or an oxide.
[0026]
In FIG. 10B, reference numeral 100 denotes a symbol of the photoelectric conversion element shown in FIG. 10A, wherein D denotes an electrode on the transparent electrode 6 side, and G denotes an electrode on the lower electrode 2 side. Reference numeral 120 denotes a detection unit that detects a current flowing through the photoelectric conversion element 100, 110 denotes a power supply unit, and the power supply unit 110 includes a positive power supply 111 that applies a positive potential to the D electrode and a negative power supply 112 that applies a negative potential. Is configured by a switch 113 for changing the setting. The switch 113 is controlled so as to be connected to the negative power supply 112 on the refresh side in the refresh mode and to the positive power supply 111 on the read side in the photoelectric conversion mode.
[0027]
Here, the operation of the photoelectric conversion element 100 will be described. FIGS. 11A and 11B are energy band diagrams of the photoelectric conversion unit showing the operation of the refresh mode and the photoelectric conversion mode of the photoelectric conversion element 100, respectively, and the thickness of each layer of the photoelectric conversion element. It shows the state of the direction.
[0028]
In the refresh mode (a) shown in FIG. 11A, since the D electrode is given a negative potential with respect to the G electrode, the hole indicated by the black circle in the i-layer 4 is caused by the electric field. Guided to the electrodes. At the same time, electrons indicated by white circles are injected into the i-layer 4. At this time, some of the holes and electrons recombine in the n-layer 5 and the i-layer 4 and disappear. If this state continues for a sufficiently long time, the holes in the i-layer 4 are swept out of the i-layer 4.
[0029]
In this state, when the photoelectric conversion mode (b) of FIG. 11B is reached, the D electrode is given a positive potential with respect to the G electrode, so that the electrons in the i layer 4 are instantaneously guided to the D electrode. . However, the hole is not led to the i-layer 4 because the n-layer 5 functions as an injection blocking layer. When light enters the i-layer 4 in this state, the light is absorbed and electron-hole pairs are generated. These electrons are guided to the D electrode by the electric field, and the hole moves in the i-layer 4 and reaches the interface of the insulating layer 70. However, since it cannot move into the insulating layer 70, it stays in the i-layer 4. At this time, the electrons move to the D electrode, and the holes move to the interface of the insulating layer 70 in the i-layer 4, so that a current flows from the G electrode to the detection unit 120 in order to maintain electrical neutrality in the device. This current is proportional to the incident light because it corresponds to the electron-hole pair generated by the light.
[0030]
After the photoelectric conversion mode (b) is maintained for a certain period, when the state is changed to the refresh mode (a) again, the holes remaining in the i-layer 4 are led to the D electrode as described above. At the same time, a charge corresponding to the hole flows to the detection unit 120. The amount of the hole corresponds to the total amount of light incident during the photoelectric conversion mode period, and the charge flowing to the detection unit 120 corresponds to the total amount of light. At this time, a charge corresponding to the amount of electrons injected into the i-layer 4 also flows, but since this amount is approximately constant, it may be detected by subtracting it.
[0031]
That is, the photoelectric conversion unit 100 can output the amount of light incident in real time and also output the total amount of light incident in a certain period. This can be said to be a great feature of the configuration example proposed by the inventors before. The detection unit 120 may detect either one of the flow of electrons or the flow of holes or both depending on the purpose. Further, FIG. 11C shows a state diagram obtained after a while from FIG. 11B when the illuminance of the incident light is strong, as described later.
[0032]
Here, the operation of the photoelectric conversion device proposed by the inventors before will be described with reference to FIG.
[0033]
FIG. 12 is a timing chart of the operation in the photoelectric conversion device of FIG. In the figure, Vdg is the potential of the D electrode with respect to the G electrode of the photoelectric conversion unit 100, P indicates the state of light incidence, and is on when light is incident and off when no light is incident. That is, it shows a dark state. IS indicates the current flowing into the detection unit 120, and the horizontal axis indicates the passage of time.
[0034]
First, when the switch 113 is connected in the refresh direction, the refresh mode is entered, Vdg becomes a negative voltage, holes are swept out as shown in FIG. 11A, and electrons are injected into the i-layer 4. Accordingly, a negative rush current E indicated by E in FIG. Thereafter, the refresh mode ends, and when the switch 113 is connected in the read direction, electrons in the i-layer 4 are swept out, a positive rush current E 'flows, and the photoelectric conversion mode is entered. At this time, if light is incident, a photocurrent A indicated by A flows. If the operation is the same, and the lamp is in the dark state, no current flows as indicated by A '. Therefore, if the photocurrent A is integrated directly or for a certain period, the incidence of light can be detected.
[0035]
When the switch 113 is connected in the refresh direction from the state A, the rush current B flows. This amount is reflected in the total amount of light incident during the immediately preceding photoelectric conversion mode period, and the rush current B may be integrated or a value equivalent to integration may be obtained. If no light is incident in the immediately preceding photoelectric conversion mode, the rush current becomes small as B ', and if the difference is detected, the incidence of light can be detected. Further, since the inrush currents E ′ and E ″ described above are approximately equal to the inrush current B ′, they may be subtracted from the inrush current B.
[0036]
Further, even in the same photoelectric conversion mode period, if the light incident state changes, the current IS changes as indicated by C and C '. Even if this is detected, the incident state of light can be detected. In other words, this indicates that it is not always necessary to set the refresh mode every time a detection opportunity occurs. However, for some reason, if the period of the photoelectric conversion mode is long or the illuminance of the incident light is strong, the current may not flow even though light is incident as indicated by D. This is because, as shown in FIG. 11C, a large number of holes remain in the i-layer 4 and the electric field in the i-layer 4 is reduced due to the holes, so that the generated electrons are not conducted to the D electrode. This is because they are recombined with the holes inside. If the state of light incidence changes in this state, the current may flow in an unstable manner. However, when the refresh mode is set again, holes in the i-layer 4 are swept out, and in the next photoelectric conversion mode, A ″ is obtained. A current equal to A is obtained.
[0037]
In the above description, the incident light has been described as being constant. However, the currents of A, B, and C continuously change depending on the intensity of the incident light. It goes without saying that it can be detected.
[0038]
Further, in the above description, when the holes in the i-layer 4 are to be swept out in the refresh mode, it is ideal to sweep out all the holes. Alternatively, the value does not change from that in the case of sweeping out all in C, and there is no problem. In addition, by sweeping out so that a constant amount always remains, the amount of light can be quantitatively detected also by the B current. In other words, it is sufficient that the current value does not reach the state of D, that is, the state of FIG. 11C at the detection opportunity in the next photoelectric conversion mode, the voltage of Vdg in the refresh mode, the period of the refresh mode, and the n-layer 5. The characteristics of the injection blocking layer may be determined.
[0039]
Further, in the refresh mode, injection of electrons into the i-layer 4 is not a necessary condition, and the voltage of Vdg is not limited to a negative value. A part of the hole may be swept out of the i-layer 4. This is because, when many holes remain in the i-layer 4, even if Vdg is a positive voltage, the electric field in the i-layer 4 is applied in a direction to guide the holes to the D electrode. Similarly, the characteristics of the injection blocking layer of the n-layer 5 are not a necessary condition that electrons can be injected into the i-layer 4.
[0040]
FIGS. 13 (a), 13 (b), 13 (c), and 13 (d) show calibration examples of the detection unit. Reference numeral 121 denotes an ammeter represented by a current Amp, 122 denotes a voltmeter, 123 denotes a resistor, 124 denotes a capacitor, 125 denotes a switch element, and 126 denotes an operational amplifier.
[0041]
FIG. 13A directly detects a current, and the output of the ammeter 121 is a voltage or an amplified current. FIG. 13B shows that a current is passed through the resistor 123 and a voltage is detected by the voltmeter 122. FIG. 13C shows that the electric charge is accumulated in the capacitor 124 and the voltage is detected by the voltmeter 122. In FIG. 13D, the operational amplifier 126 detects the integrated value of the current as a voltage. In FIGS. 13C and 13D, the switch element 125 plays a role of giving an initial value for each detection, and can be replaced with a high-resistance resistor depending on the detection method.
[0042]
The ammeter or the voltmeter may be composed of a transistor, an operational amplifier in which the transistor is combined, a resistor, a capacitor, and the like, and may operate at a high speed. The detection unit is not limited to these four types, and it is sufficient if the current or charge can be detected directly or the integrated value can be detected. A detector that detects the current or voltage value, a resistor, a capacitor, and a switch element are combined, and a plurality of The conversion units may be configured to output simultaneously or sequentially.
[0043]
When a line sensor or an area sensor is configured, the potentials of, for example, 1000 or more photoelectric conversion units are controlled in a matrix in combination with wirings and switch elements of a power supply unit, detected, and output as electric signals. In this case, if a part of the switch element, the capacitor, and the resistor are formed on the same substrate as the photoelectric conversion unit, it is advantageous in terms of the SN ratio and the cost. In this case, the photoelectric conversion unit of the configuration example proposed by the inventors et al. Has the same film configuration as the TFT, which is a typical switch element, so that it can be formed simultaneously in the same process, and at low cost and high cost. A photoelectric conversion device having an SN ratio can be realized.
[0044]
Next, a difference in characteristics of the photoelectric conversion device depending on the refresh voltage value in the refresh mode will be described with reference to a photoelectric conversion device previously proposed by the present inventors.
[0045]
FIG. 14 is a 1-bit equivalent circuit diagram of a photoelectric conversion device including a TFT 1700 and a power supply 1115, and FIG. 15 is a timing chart showing the operation.
[0046]
Here, a description will be given with reference to a 1-bit equivalent circuit diagram of the photoelectric conversion device shown in FIG. 14, which is a refresh case in which a positive potential is applied to the G electrode of the photoelectric conversion element 100 via the TFT 1700. The potential of the D electrode of the photoelectric conversion element 100 is designed to be VD by the power supply 114, and the potential of the G electrode during the refresh operation is set to VrG by the power supply 1115.
[0047]
First, a case where the potential (Vo) of the G electrode of the photoelectric conversion element 100 is refreshed to be higher than the potential (VD) of the D electrode (V0 = VrG ≧ VD) as shown in FIG. When refreshed to such a state, all of the holes remaining in the i-layer 4 of the photoelectric conversion element 100 and the holes trapped in the interface defects existing at the interface between the i-layer 4 and the insulating layer 70 become D electrodes. Completely swept out. Conversely, electrons flow from the D electrode into the i-layer 4 at this time, and a part thereof is trapped by an interface defect existing at the interface between the i-layer 4 and the insulating layer 70. Hereinafter, this current is referred to as a negative inrush current B, B ′. After the refresh operation is completed, when the potential of the G electrode of the photoelectric conversion element 100 is initialized to the GND potential or the like, all the electrons trapped in the i-layer 4 and at the interface defects are swept out to the D electrode. Hereinafter, this current is referred to as positive inrush currents E and E '. Since the interface defect existing at the interface between the i-layer 4 and the insulating layer 70 generally has a deep energy level, the energy for moving electrons and holes existing at the interface defect position, and the electrons and holes from other positions to the interface defect position. Is relatively high in energy, and the apparent mobility is low. Therefore, it takes several tens of microseconds to several seconds until the positive rush current becomes zero, that is, until all the electrons trapped in the interface defect are swept out to the D electrode, and the G electrode reset operation ends. Even a large inrush current flows. As a result, the charge accumulated in the capacitance of the G electrode includes the charge due to the rush current which is a noise component, and as a result, the S / N ratio is reduced by the charge.
[0048]
The above reason will be further described in detail with reference to FIGS. 14, Pa, Pb, Pc, and Pd indicate timings of pulses for driving the switch element 1125, the transfer TFT 1300, the refresh TFT 1700, and the reset TFT 1400 in FIG. Here, H indicates a high level that turns on each driving element. Generally, a crystalline silicon semiconductor switching element uses + 5v to + 12v, and an a-Si TFT uses + 8v to + 15v. In general, L is often 0 V. As shown by arrows in FIG. 14, Is and V0 indicate the current flowing in the direction of the arrow and the potential of the G electrode when the photoelectric conversion element 100 is irradiated with a constant signal light, respectively. FIG. 15 shows Is and V0 when the pulse width of Pa to Pd is 20 μs.
[0049]
In FIG. 15, the G electrode potential V0 of the photoelectric conversion element 100 is kept at a constant high potential from the rising of the refresh pulse Pc to the rising of the reset pulse of Pd. Therefore, it is considered that a positive inrush current is not generated during the period, and the electrons trapped in the interface defect are swept out only when the Pd pulse rises. Positive inrush current has occurred. It takes about 80 to 100 microseconds in the device manufactured by the inventors until the positive inrush current attenuates and becomes almost zero. Therefore, at the time of the falling edge of the Pd pulse which starts to accumulate signal charges in the capacitance of the G electrode. , A large amount of positive rush current is generated, and the charges and voltage values in the hatched portions in the figure are accumulated as noise components. As a result, the accumulated S / N ratio is reduced. As a method of reducing the positive inrush current, it is conceivable to lengthen the time of the Pd initialization pulse. However, there is a limit to the time, and increasing the time lengthens the signal reading time of the entire device. This causes a reduction in the speed of the device, that is, a decrease in performance.
[0050]
Next, the conditions of the applied voltage when the photoelectric conversion element 100 is refreshed will be described with reference to FIG. FIG. 16 is an energy band diagram of the photoelectric conversion element 100. Each electrode (D electrode and G electrode) at both ends is in an open state. The photoelectric conversion element 100 has a generally-known MIS (Metal-Insulator-Semiconductor) structure, and a state in which the total capacity is relatively small (depression state) and a state in which the total capacity is relatively large (depression state) depending on the voltage conditions applied to the electrodes at both ends. (Accumulation state) appears.
[0051]
Although both ends of each device in FIG. 16 are open, the energy band diagram in FIG. 16B is the same as the energy band diagram in the depletion state, and the energy band diagram in FIG. 16C is the energy band in the accumulation state. Same as the band diagram.
[0052]
In general, the MIS type capacitor has a state shown in FIG. 16A immediately after fabrication, that is, a state in which the band of the i-layer is flat (flat band voltage VFB = 0 V) or a state shown in FIG. ≧ VFB> 0V) in many cases. Further, by applying a voltage to both ends of the MIS capacitor, VFB can be set to any positive or negative value to some extent.
[0053]
When the one-bit circuit shown in FIG. 10 is driven at the timing shown in FIG. 12, the refresh time can be shorter than the photoelectric conversion time. When two-dimensionally arranging photoelectric conversion elements and performing matrix driving, as the number of photoelectric conversion elements increases, the ratio between the refresh time and the photoelectric conversion time increases.
[0054]
It is generally known that the flat band voltage VFB of the MIS capacitor largely depends on the electric field, time, and temperature. However, the photoelectric conversion element in the photoelectric conversion device of the present invention has a positive flat band voltage VFB during refresh. , And conversely, during photoelectric conversion, the flat band voltage VFB moves in the negative voltage direction.
[0055]
Therefore, in the photoelectric conversion element in the photoelectric conversion device illustrated in FIG. 10 of the present invention, the flat band voltage VFB eventually moves in the negative voltage direction, and the dynamic range of the photoelectric conversion element is reduced. Then, the SN ratio of the photoelectric conversion device becomes small, and stable characteristics cannot be obtained.
[0056]
Further, conditions of a voltage value that causes a positive inrush current (a long decay time and a large current value) are summarized below. First, when the flat band voltage VFB of the i-layer of the photoelectric conversion element 100 is zero, the potential of the G electrode during refresh (VrG) is higher than the potential of the D electrode (VD), that is, if VrG> VD, The positive rush current of the problem that has occurred flows.
[0057]
When the flat band voltage VFB of the i-layer of the photoelectric conversion element 100 is not zero, the potential of the G electrode (VrG) at the time of refresh is higher than the voltage value obtained by subtracting VFB from the potential of the D electrode (VD), that is, If VrG ≧ VD−VFB, the positive rush current of the problem described above flows.
[0058]
The above mechanism will be described with reference to FIG. FIG. 17 is an energy band diagram of the photoelectric conversion element 100 when VrG ≧ VD-VFB, and shows a state in a thickness direction of each layer from the lower electrode 2 to the transparent electrode 6 in FIG. In FIG. 17A of the refresh operation, since the D electrode is given a negative potential with respect to the G electrode, holes indicated by black circles in the i layer 4 are guided to the D electrode by an electric field. At the same time, electrons indicated by white circles are injected into the i-layer 4. The holes trapped in the interface defects between the i-layer 4 and the insulating layer 70 take a certain amount of time to be led to the D electrode, and some of the electrons injected into the i-layer 4 have a certain time. Is trapped in interface defects between the i-layer 4 and the insulating layer 70. At this time, some holes and electrons recombine in the n-layer 5 and the i-layer 4 and disappear. If this state continues for a sufficiently long time, holes in the i-layer 4 are swept out of the i-layer 4. In this state, when the photoelectric conversion operation is as shown in FIG. 17B, a positive potential is applied to the D electrode with respect to the G electrode, so that electrons in the i layer 4 are instantaneously guided to the D electrode. The electrons trapped in the interface defects between the i-layer 4 and the insulating layer 70 are led to the D electrode with some time. The electrons trapped by this interface defect are the cause of the inrush current of the problem described above. Here, the holes are not guided to the i-layer 4 because the n-layer 5 functions as an injection blocking layer. When light enters the i-layer 4 in this state, the light is absorbed and electron-hole pairs are generated. These electrons are guided to the D electrode by the electric field, and the holes move in the i-layer 4 and reach the interface between the i-layer 4 and the insulating layer 70. However, since they cannot move into the insulating layer 70, they stay in the i-layer 4. FIG. 17C shows a state after the photoelectric conversion operation shown in FIG. 17B is maintained for a certain period.
[0059]
Next, the dynamic range (D · R) of the photoelectric conversion element 100 under such refresh conditions will be described. When D · R of the photoelectric conversion element 100 illustrated in FIG. 14 is represented by a charge amount, D · R = VrG × Cs. Here, Cs is the capacitance of the photoelectric conversion element 100. Therefore, the dynamic range (DR) of the photoelectric conversion element 100 increases as the refresh voltage VrG increases. Therefore, when a large amount of signal light is applied to the photoelectric conversion element 100, a large signal amount due to the light can be obtained, so that the SN ratio increases.
[0060]
Next, a case where the voltage is refreshed below the potential (V0) of the G electrode of the photoelectric conversion element 100 (VrG <VD-VFB) will be described.
[0061]
FIG. 18 is a schematic equivalent circuit diagram of one bit of the photoelectric conversion device. FIG. 19 is a timing chart when the photoelectric conversion device of FIG. 18 is actually driven.
[0062]
In FIG. 18, the portions denoted by the same reference numerals as those in FIG. The difference between the schematic equivalent circuit shown in FIG. 14 and the schematic equivalent circuit shown in FIG. 18 is the size of the power supply 1115 connected to the TFT 1700. Here, since the photoelectric conversion element 100 has the same structure as that of FIG. 10A, the injection blocking layer between the i-layer and the second electrode layer is n-type, and the injection is blocked. Carrier is a hall. Therefore, assuming that the charge of one carrier whose injection is blocked is q, q> 0 also in this case.
[0063]
In FIG. 18, the signal detection unit includes a detection unit indicated by a dotted line in FIG. 18, a TFT 1300, and a unit that applies a high-level pulse Pb.
[0064]
FIG. 18 differs from FIG. 14 in that the potential VrG of the power supply 1115 that applies a positive potential to the G electrode in the refresh operation of the photoelectric conversion element 100 is lower than the potential VD of the power supply 114 that applies a positive potential to the D electrode. The only thing that does. More specifically, since the photoelectric conversion element 100 has a flat band voltage (VFB) applied to the G electrode to flatten the energy band of the i-layer, actually, in the example of FIG. 14, VrG ≧ VD −VFB, whereas in FIG. 18, VrG <VD
It is driven in the state of -VFB.
[0065]
Next, the operation of the photoelectric conversion device in the state of VrG <VD-VFB will be described with reference to FIG. 19 differs from FIG. 15 in the current IS of the photoelectric conversion element 100 and the behavior of the potential V0 of the G electrode due to the current IS.
[0066]
In FIG. 19, when a refresh pulse of Pc rises and a voltage VrG (VrG <VD-VFB) is applied to the G electrode of the photoelectric conversion element 100, a part of the holes remaining in the i-layer of the photoelectric conversion element 100 is removed. It is swept out to the D electrode. At this time, it is considered that almost all of the holes trapped by the interface defect between the i-layer and the insulating layer remain as they are. At this time, the amount of electrons flowing into the i-layer from the D-electrode is equal to or less than the amount of some holes swept out to the D-electrode, but the electric field in the i-layer has a low potential on the G-electrode side. Therefore, it is considered that the number of electrons trapped by the interface defect between the i-layer and the insulating layer is almost zero. Therefore, in the IS of FIG. 19, only a small negative rush current is generated when the refresh pulse of Pc rises, and the decay time is short. FIG. 19 shows that the voltage V0 of the G electrode from the rising of the refresh pulse of Pc to the rising of the reset electrode of Pd is almost equal to VrG, and the potential is lower than VD-VFB.
[0067]
Next, when the G electrode reset pulse rises and the G electrode of the photoelectric conversion element 100 is grounded to GND, all the electrons remaining in the i-layer flow out to the D electrode. At this time, since no electrons exist at the interface defect between the i-layer and the insulating layer, it is considered that the electrons flow out in a small amount and instantaneously. At this time, it seems that holes existing in the interface defects hardly move. Thus, when the Pd G electrode reset pulse rises, IS generates only a small positive rush current, and the decay time is short. If the operation from the rising to the falling of the Pd G electrode reset pulse is performed in about 20 microseconds, the rush current becomes almost zero at the time of the falling of the Pd pulse which starts the photoelectric conversion operation as shown in the figure. Therefore, almost all charges starting to be accumulated from the falling edge of the pulse of Pd become charges due to the signal light incident on the photoelectric conversion element 100, and reading out the signal voltage makes it possible to obtain information with a high SN ratio. .
[0068]
The basic mechanism in the configuration example proposed by the inventors before will be further described below with reference to the drawings.
[0069]
FIGS. 20A to 20C are energy band diagrams illustrating the operation of the photoelectric conversion element 100 in the case of VrG <VD-VFB, and are the energy bands illustrated in FIGS. 17A to 17C. It corresponds to the figure.
[0070]
In FIG. 20A of the refresh operation, since a positive potential is applied to the D electrode with respect to the G electrode, a part of the hole indicated by a black circle in the i layer 4 is guided to the D electrode by an electric field. . At the same time, electrons indicated by white circles are injected into the i-layer 4. Here, the holes trapped by the interface defects between the i-layer 4 and the insulating layer 70 hardly move, and the electrons are not trapped by the interface defects.
[0071]
In this state, when the photoelectric conversion operation is as shown in FIG. 20B, a larger negative potential is applied to the G electrode with respect to the D electrode, so that the electrons in the i-layer 4 are instantaneously guided to the D electrode. Since almost no electrons are trapped in the photoelectric conversion device of FIG. 14 described above, there is almost no rush current which becomes a problem.
[0072]
FIG. 20C shows a state after FIG. 20B of the photoelectric conversion operation is maintained for a certain period.
[0073]
As described above, when refreshing to the condition of VrG <VD-VFB, since there is almost no electron at the interface defect between the i-layer 4 and the insulating layer 70, it is not necessary to spend a long time for the electron to enter and exit. As a result, it is possible to greatly reduce the rush current that becomes a noise component.
[0074]
However, under such a refresh condition, the dynamic range (D · R) of the photoelectric conversion element 100 shown in FIG. 18 is D · R = VrG × Cs, and VrG is larger than that in the case of VrG ≧ VD−VFB. The dynamic range in the case of <VD-VFB is reduced. Therefore, when the signal processing is large, the charges generated by the signal light are saturated, and the S / N ratio is lowered.
[0075]
Here, in the photoelectric conversion device proposed by the inventors and the like, items for maintaining the SN ratio and stabilizing the characteristics will be described again.
[0076]
When the one-bit circuit shown in FIG. 10 is driven at the timing shown in FIG. 12, the refresh time can be shorter than the photoelectric conversion time. When two-dimensionally arranging photoelectric conversion elements and performing matrix driving, the ratio between the refresh time and the photoelectric conversion time increases as the number of photoelectric conversion elements increases.
[0077]
It is generally known that the flat band voltage VFB of the MIS capacitor largely depends on the electric field, time, and temperature. However, the photoelectric conversion element in the photoelectric conversion device of the present invention has a positive flat band voltage VFB during refresh. , And conversely, during photoelectric conversion, the flat band voltage VFB moves in the negative voltage direction.
[0078]
Therefore, in the photoelectric conversion element in the photoelectric conversion device illustrated in FIG. 10 of the present invention, the flat band voltage VFB eventually moves in the negative voltage direction, and the dynamic range of the photoelectric conversion element is reduced. Then, the SN ratio of the photoelectric conversion device becomes small, and stable characteristics cannot be obtained.
[0079]
In view of the above points, embodiments newly devised in the present invention are as follows.
[0080]
FIG. 1 is a 1-bit equivalent circuit diagram of the photoelectric conversion device according to the first embodiment of the present invention. In FIG. 1, portions denoted by the same reference numerals as those in FIG. 10B indicate the same components.
[0081]
10B is different from FIG. 10B in that a power supply 115 for suppressing the movement of the flat band voltage (VFB) of the photoelectric conversion element 100 is added, and an electric field opposite to that in the photoelectric conversion mode when the photoelectric conversion element 100 is in the photoelectric conversion mode is added. A power supply 115 is arranged to be applied.
[0082]
In FIG. 1, in the photoelectric conversion mode, a power supply 111 is applied to the D electrode of the photoelectric conversion element 100 to apply a positive voltage to read out photoelectric conversion charges, and then in a refresh mode, a negative voltage of the power supply 112 is applied to apply a negative voltage. The remaining charge stored in the conversion element and not read out is discharged, and then a large negative voltage is applied as a flat band voltage shift suppression mode to discharge the remaining charge of the photoelectric conversion element, thereby reducing the amount of light. , And an accurate charge can be read out in a short period of time, and an image signal with a high S / N can be obtained. Here, the refresh power supply 112 of the D electrode of the photoelectric conversion element 100 is set to a negative value, but the refresh power supply 112 can be used with a positive value for the purpose of reducing the inrush current as described above. It is.
[0083]
Further, here, by using the power supply 115 as a power supply to which a relatively large voltage can be applied, the time for suppressing the movement of the flat band voltage, that is, the time for connecting the power supply 115 to the movable contact of the switch 113 is relatively shortened. This makes it possible to shorten the overall driving time of the photoelectric conversion device.
[0084]
With such a circuit, the photoelectric conversion element 100 is capable of suppressing the photoelectric conversion mode (the state where the switch 113 is connected to the read side), the refresh mode (the state where the switch 113 is connected to the refresh side), and the flat band voltage shift. The mode (the state in which the switch 113 is connected to the compensation side) can be sequentially switched for driving, and the shift of the flat band voltage described above can be reduced. For this reason, it is possible to prevent the dynamic range of the sensor from being reduced, maintain a high SN ratio, and obtain stable characteristics.
[0085]
In other words, in the case of the flat band voltage shift suppression mode, the flat band voltage suppression mode is the product of the voltage (VrG) of the first electrode layer of the photoelectric conversion element and the charge (q) of the first type carrier (q). VrG · q) is the product of the voltage (VD−VFB) obtained by subtracting the flat band voltage (VFB) from the voltage (VD) of the second electrode layer, and the charge (q) of the first type carrier (q). (VD-VFB) · q｝
(VrG · q) ≧ (VD · q−VFB · q)
Means an operation mode in which an electric field is applied to each layer.
[0086]
More specifically, in use of the present photoelectric conversion device, in a state where the photoelectric conversion device is driven for a long time, that is, in the photoelectric conversion mode, ((VrG · q) <(VD · q−VFB · q)), In the present invention, the flat band voltage shifts in the negative direction. In order to restore this, the flat band voltage shift suppression mode is set in the present invention, and the state opposite to the above, that is, (VrG · q) ≧ (VD Q-VFB.q) returns the movement of the flat band voltage, thereby preventing the dynamic range from lowering.
[0087]
[Embodiment 2]
FIG. 2 is an overall circuit diagram showing a second embodiment of the photoelectric conversion device of the present invention. FIG. 3A is a plan view of each element corresponding to one pixel in this embodiment, and FIG. FIG. 4 is a sectional view taken along line AB in FIG.
[0088]
In FIG. 2, S11 to S33 are photoelectric conversion elements, in which the lower electrode side is denoted by G and the upper electrode side is denoted by D. C11 to C33 are storage capacitors, and T11 to T33 are transfer TFTs. Vs is a read power supply, Vg is a refresh power supply, and Vc is a flat band voltage shift suppression power supply. Each power supply is connected to the G electrodes of all the photoelectric conversion elements S11 to S33 via a switch SWs, a switch SWg, and a switch SWc. It is connected. Here, the potential of each power supply applied to the G electrode of the sensor is set as Vc>Vg>0> Vs. The switches SWs, SWg, and SWc are directly connected to the shift register SR3, and the switches SWs, SWg, and SWc are controlled so as not to be turned on at the same time. The ON time of each switch can be set arbitrarily.
[0089]
One pixel includes one photoelectric conversion element, a capacitor, and a TFT, and a signal output thereof is connected to the integrated circuit IC for detection by a signal wiring SIG. The photoelectric conversion device of the present embodiment divides a total of nine pixels into three blocks, simultaneously transfers the outputs of three pixels per block, and sequentially converts and outputs the outputs through the signal wiring SIG by the detection integrated circuit IC ( Vout). Each pixel is two-dimensionally arranged by arranging three pixels in one block in the horizontal direction and sequentially arranging the three blocks in the vertical direction.
[0090]
In FIG. 3, a portion surrounded by a broken line is formed on the same insulating substrate having a large area. A plan view of a portion corresponding to the first pixel is shown in FIG. FIG. 3B is a cross-sectional view of a portion indicated by a broken line AB in the drawing. S11 is a photoelectric conversion element, T11 is a TFT, C11 is a capacitor, and SIG is a signal wiring. In the present embodiment, the capacitor C11 and the photoelectric conversion element S11 are not particularly separated from each other, and the capacitor C11 is formed by increasing the area of the electrode of the photoelectric conversion element S11. This is possible because the photoelectric conversion element and the capacitor of the present embodiment have the same layer configuration. In addition, a phosphor CsI such as a passivation silicon nitride film SiN and cesium iodide is formed above the pixel. When an X-ray (X-ray) enters from above, the phosphor CsI converts the X-ray into light (broken arrow), and this light enters the photoelectric conversion element. Note that the passivation material and the phosphor material are not limited to those described above, and other materials may be used as long as they have this function.
[0091]
Next, the operation of the photoelectric conversion device according to the present embodiment will be described with reference to FIGS.
[0092]
FIG. 4 is a timing chart showing the operation of the present embodiment. First, Hi is applied to the control lines g1 to g3 and sg1 to sg3 by the shift registers SR1 and SR2. Then, the transfer TFTs T11 to T33 and the switches M1 to M3 are turned on to conduct, and the D electrodes of all the photoelectric conversion elements S11 to S33 are set to the GND potential (the input terminal of the integration detector Amp is designed to the GND potential. Because).
[0093]
At the same time, the shift register SR3 outputs Hi to RF, the switch SWg turns on, and the G electrodes of all the photoelectric conversion elements S11 to S33 become the refresh power supply Vg. When Vg> 0 of the refresh power supply is selected, the condition is the same as that of VrG ≧ VD−VFB described above with reference to FIG. 14, so that VrG <VD in FIG. 18 where Vg <0 is selected as described above. As compared with the condition of −VFB, more inrush current occurs, and noise increases. However, the dynamic range of the photoelectric conversion element increases. After that, all the photoelectric conversion elements S11 to S33 enter the refresh mode and are refreshed.
[0094]
Next, the shift register SR3 outputs Lo to RF and Hi to RE, switches SWg are turned off, switches SWs are turned on, and the G electrodes of all the photoelectric conversion elements S11 to S33 are set to a negative potential by the reading power supply Vs. Then, all the photoelectric conversion elements S11 to S33 enter the photoelectric conversion mode, and the capacitors C11 to C33 are initialized at the same time. In this state, Lo is applied to the control wires g1 to g3 and sg1 to sg3 by the shift registers SR1 and SR2. Then, the switches M1 to M3 of the transfer TFTs T11 to T33 are turned off, and the D electrodes of all the photoelectric conversion elements S11 to S33 are opened in terms of DC, but the potential is held by the capacitors C11 to C33. However, at this time, since no X-rays have been incident, no light is incident on all the photoelectric conversion elements S11 to S33, and no photocurrent flows. In this state, when X-rays are emitted in a pulsed manner, pass through a human body or the like and enter the phosphor CsI, they are converted into light, and the light enters the respective photoelectric conversion elements S11 to S33. This light contains information on the internal structure of the human body and the like. The photocurrent flowing by this light is accumulated as electric charges in the respective capacitors C11 to C33, and is retained even after the end of X-ray incidence. Next, a control pulse of Hi is applied to the control line g1 by the shift register SR1, and v1 to v3 are passed through the transfer TFTs T11 to T33 and the switches M1 to M3 by applying control pulses to the control lines sg1 to sg3 of the shift register SR2. Output sequentially. Thereby, two-dimensional information on the internal structure of the human body or the like is obtained as v1 to v9.
[0095]
Thereafter, RE of the shift register SR3 becomes Lo, and CO becomes Hi. Hi is applied to the control wirings g1 to g3 and sg1 to sg3 by the cyst registers SR1 and SR2. Then, the transfer TFTs T11 to T33 and the switches M1 to M3 are turned on to conduct, and the D electrodes of all the photoelectric conversion elements S11 to S33 have the GND potential (the input terminal of the integration detector Amp is designed to have the GND potential). For). Therefore, the G electrodes of all the photoelectric conversion elements S11 to S33 have a positive potential (Vc), and all the photoelectric conversion elements S11 to S33 are in the flat band voltage shift mode.
[0096]
The above operation is performed when a still image is obtained, but the above operation is repeated when a moving image is obtained. In general, when a moving image is obtained, the intensity of the irradiated X-ray is weaker than when a still image is obtained, but the irradiation time is often long. Therefore, the signal light amount increases, and a large dynamic range is required. In general, when obtaining a moving image, rough positioning is often performed, and in some cases, some noise or the like can be ignored. Therefore, when obtaining a moving image, it is better to select the condition of VrG ≧ VD−VFB, that is, Vg> 0, which has a large dynamic range. As described above, in the present embodiment, the refresh voltage can be changed for each required image.
[0097]
In the same manner as in the first embodiment, also in the embodiment, the flat band voltage suppression mode is such that the voltage (VrG) of the first electrode layer of the photoelectric conversion element and the charge (q) of the first type carrier are set. (VrG · q) is the voltage (VD−VFB) obtained by subtracting the flat band voltage (VFB) from the voltage (VD) of the second electrode layer, and the charge (q) of the first type carrier. Condition larger than the product {(VD−VFB) · q}
(VrG · q) ≧ (VD · q−VFB · q)
Therefore, if the operation mode is such that an electric field can be applied to each layer, a dynamic range (D · R) can be increased and characteristics with good S / N can be obtained.
[0098]
More specifically, in the use of the present photoelectric conversion device, in a state of being driven for a long time, that is, in the photoelectric conversion mode, ((VrG · q) <(VD · q−VFB · q), and the photoelectric conversion is performed. In order to return the flat band voltage of the device to the negative direction, in the present invention, the flat band voltage shift suppression mode is set in the present invention, and the state opposite to the above, that is, (VrG · q) ≧ ( VD · q−VFB · q), the movement of the flat band voltage can be returned, and the dynamic range can be increased.
[0099]
As in FIG. 1, the refresh power supply Vg for the G electrode of the photoelectric conversion element 100 is set to a positive value in FIG. 2, but as described above, the refresh power supply Vg is set to a negative value in order to reduce the inrush current. Can also be used.
[0100]
Further, here, by using the power supply Vc as a power supply to which a relatively large voltage can be applied, the time for suppressing the movement of the flat band voltage, that is, the time for turning on the SWc can be made relatively short, and the overall photoelectric The driving time of the converter can be shortened.
[0101]
As in the first embodiment, the photoelectric conversion device of the present embodiment can be driven by sequentially switching between the photoelectric conversion mode, the refresh mode, and the flat band voltage shift suppression mode. Can be reduced. For this reason, it is possible to prevent the dynamic range of the sensor from being reduced, maintain a high SN ratio, and obtain stable characteristics.
[0102]
In the present embodiment, the G electrodes of the photoelectric conversion elements are commonly connected, and this common wiring is connected to the refresh power supply Vg, the read power supply Vs, and the flat band voltage suppression power supply Vc via the switches SWg, SWs, and SWc. Accordingly, all the photoelectric conversion elements can be simultaneously switched to the refresh mode, the photoelectric conversion mode, and the flat band voltage suppression mode. Therefore, an optical output can be obtained with one TFT per pixel without complicated control.
[0103]
Further, in the present embodiment, nine pixels are two-dimensionally arranged in 3 × 3 and three pixels are simultaneously transferred and output by dividing three times, but the present invention is not limited to this. For example, 5 × 5 pixels per 1 mm in length and width are used. Are two-dimensionally arranged as 2000 × 2000 pixels, an X-ray detector of 40 cm × 40 cm can be obtained. If this is combined with an X-ray generator instead of an X-ray film to constitute an X-ray radiograph, it can be used for a chest X-ray examination or breast cancer examination. Then, unlike a film, the output can be instantly projected on a CRT, and the output can be converted to digital, processed by a computer and converted into an output suitable for the purpose. It can also be stored on a magneto-optical disk, and past images can be searched instantaneously. Further, the sensitivity is better than that of a film, and a clear image can be obtained with weak X-rays having little effect on the human body.
[0104]
5 and 6 are conceptual diagrams showing the implementation of a detector having 2000 × 2000 pixels. In the case of configuring 2000 × 2000 detectors, the number of elements within the broken line shown in FIG. 2 may be increased in the vertical and horizontal directions. In this case, the number of control wirings is g1 to g2000 and the number of signal wirings SIG is also 2000. sig1 to sig2000 and 2,000. In addition, the shift register SR1 and the integrated circuit IC for detection also need to control and process 2,000 lines, resulting in a large scale. Performing this process using one chip element is disadvantageous in terms of yield, cost, and the like during manufacture because one chip becomes very large. Therefore, the shift register SR1 may be formed on one chip for every 100 stages, for example, and 20 (SR1-1 to SR1-20) may be used. Also, the detection integrated circuit is formed on one chip for every 100 processing circuits, and 20 (IC1 to IC20) are used.
[0105]
In FIG. 5, 20 chips (SR1-1 to SR1-20) are mounted on the left side (L) and 20 chips are mounted on the lower side (D), and 100 control wirings and signal wirings per chip are connected to the chip by wire bonding. Connected. 5 corresponds to the broken line in FIG. Connection to the outside is omitted. Also, SWg, SWs, SWx, Vg1, Vg2, RF, etc. are omitted. Although there are 20 outputs (Vout) from the integration circuits IC1 to IC20, these may be integrated into one via a switch or the like, or may be output as they are and processed in parallel.
[0106]
Alternatively, as shown in FIG. 6, 10 chips (SR1-1 to SR1-10) on the left side (L), 10 chips (SR1-11 to SR1-20) on the right side (R) and 10 chips (IC1 to 10) on the upper side. Alternatively, 10 chips (ICs 11 to 20) may be mounted on the lower side (D). In this configuration, since each wiring is distributed to 1000 lines each in the upper, lower, left and right sides (UDD, L, R), the density of the wiring on each side is reduced, and the wire bonding of each side is reduced. The density is small, and the yield is improved. .. G2000 on the left (L) and g2, g4, g6,... G2000 on the right (R), that is, the odd-numbered control lines are on the left (L) and the even-numbered control lines. To the right (R). In this case, the wirings are drawn out at equal intervals and wired, so that the yield is further improved without concentration. In addition, the wiring to the upper side (U) and the lower side (D) may be similarly allocated. Although not shown, as another embodiment, wiring distribution is performed on the left side (L) as g1 to g100, g201 to g300,. g2000, that is, a continuous control line is distributed for each chip, and the control lines are distributed left and right (LR) alternately. In this way, the inside of one chip can be controlled continuously, the drive timing is easy, the circuit is not complicated, and an inexpensive device can be used. The same applies to the upper side (U) and the lower side (D), and an inexpensive circuit capable of continuous processing can be used.
[0107]
In each of the examples shown in FIGS. 5 and 6, after forming a circuit indicated by a broken line on one substrate, a chip may be mounted on the substrate, or a circuit indicated by a broken line may be mounted on another large substrate. A substrate and a chip may be mounted. Alternatively, the chip may be mounted on a flexible substrate and attached to the circuit board indicated by a broken line to make a tangential connection.
[0108]
Further, such a large-area photoelectric conversion device having a very large number of pixels was impossible with a complicated process using a conventional optical sensor, but the process of the photoelectric conversion device of the present invention uses common elements. Since the film is formed at the same time, the number of steps is small, and a simple step is enough. Therefore, a high yield can be achieved, and a large-area, high-performance photoelectric conversion device can be produced at low cost. Further, the capacitor and the photoelectric conversion element can be configured in the same element, and the number of elements can be substantially reduced by half, and the yield can be further improved.
[0109]
To summarize the present embodiment, a plurality of photoelectric conversion elements are arranged one-dimensionally or two-dimensionally, a switch element is connected for each photoelectric conversion element, and all the photoelectric conversion elements are divided into a plurality of n blocks. By operating the switch element every time, optical signals of all n × m photoelectric conversion elements divided into a plurality of n blocks are output by a matrix signal wiring, and an intersection of the matrix signal wiring is at least a first electrode layer. , An insulating layer, a semiconductor layer, and a second electrode layer in this order. Each layer of the stacked structure is a first electrode layer, an insulating layer, a photoelectric conversion semiconductor layer, and a second electrode layer of a photoelectric conversion element. This layer is formed from the same layer as each layer and has the same film thickness. With this configuration, by appropriately supplying a flat band voltage suppression power supply, the dynamic range, S / N In it is possible to obtain excellent characteristics. Since flat band voltage suppression driving can be performed simultaneously for each line, VFB return can be performed even in a two-dimensional large area without substantially increasing the reading time.
[0110]
[Embodiment 3]
FIG. 7 is a schematic block diagram showing the entire system using the photoelectric conversion device of the present invention. Reference numeral 6001 denotes an a-Si sensor substrate. In this figure, a plurality of shift registers SR1 are driven in series, and a plurality of integrated circuits IC for detection are also driven. The output of the detection integrated circuit IC is input to an analog-to-digital converter 6002 in the processing circuit 6008 and digitized. This output is stored in the memory 6004 via the fixed pattern correction subtracter 6003. The information in the memory 6004 is controlled by the controller 6005, transferred to the image processor 6007 as signal processing means via the buffer 6006, and subjected to image processing there.
[0111]
FIGS. 8A and 8B are a schematic configuration diagram and a schematic cross-sectional view when the present invention is applied to a photoelectric conversion device for X-ray detection.
[0112]
A plurality of photoelectric conversion elements and TFTs are formed in an a-Si sensor substrate 6011, and a shift register SR1 and a flexible circuit substrate 6010 on which a detection integrated circuit IC is mounted are connected. The opposite side of the flexible circuit board 6010 is connected to the circuit boards PCB1 and PCB2. A plurality of the a-Si sensor substrates 6011 are bonded on a base 6012, and a memory 6014 in a processing circuit 6019 mounted on a substrate 6018 is mounted under the base 6012 constituting a large-sized photoelectric conversion device. A lead plate 6013 is mounted for protection from wires. On the a-Si sensor substrate 6011, a phosphor 6030 for converting X-rays into visible light, for example, CsI is applied or pasted. This photoelectric conversion device can detect X-rays based on the same principle as the X-ray detection method described with reference to FIG. In the present embodiment, as shown in FIG. 8B, the whole is housed in a case 6020 made of carbon fiber.
[0113]
FIG. 9 shows an application example of the photoelectric conversion device of the present invention to an X-ray diagnostic system.
[0114]
X-rays 6060 generated by the X-ray tube 6050 pass through the chest 6062 of the patient or subject 6061 and enter a photoelectric conversion device 6040 on which a phosphor is mounted. The incident X-ray contains information on the inside of the body of the patient 6061. The phosphor emits light in response to X-ray incidence, and photoelectrically converts the light to obtain electrical information. This information is converted into digital data, image-processed by an image processor 6070, and can be observed on a display 6080 in the control room.
[0115]
Further, this information can be transferred to a remote place by a transmission means such as a telephone line 6090, and can be displayed on a display 6081 or stored in a storage means such as an optical disk in a doctor room at another place. Diagnosis is also possible. Further, it can be recorded on a film 6110 by a film processor 6100.
[0116]
【The invention's effect】
As described above, the photoelectric conversion device of the present invention can be driven by sequentially switching between the photoelectric conversion mode, the refresh mode, and the flat band voltage shift suppression mode, and can reduce the shift of the flat band voltage. It becomes. For this reason, it is possible to prevent the dynamic range of the sensor from being reduced, maintain a high SN ratio, and obtain stable characteristics.
[0117]
Further, as described above, according to the present invention, it is possible to provide a photoelectric conversion device having a high SN ratio and stable characteristics, a driving method thereof, and a system having the same.
[0118]
In addition, by using a photoelectric conversion device having the above-described excellent characteristics, a facsimile or an X-ray X-ray apparatus having a large area, high performance, and high characteristics can be provided at lower cost.
[Brief explanation of the figure]
FIG. 1 is a 1-bit equivalent circuit diagram for explaining a photoelectric conversion device according to a first embodiment of the present invention.
FIG. 2 is a schematic circuit diagram for explaining a photoelectric conversion device according to a second embodiment of the present invention.
FIG. 3 is a schematic plan view (a) and a schematic cross-sectional view (b) for explaining an example of the photoelectric conversion device of the present invention.
FIG. 4 is a timing chart illustrating an example of the operation of the photoelectric conversion device of the present invention.
FIG. 5 is a schematic layout diagram for explaining a mounting example of the photoelectric conversion device of the present invention.
FIG. 6 is a schematic layout diagram for explaining a mounting example of the photoelectric conversion device of the present invention.
FIG. 7 is a system configuration diagram for explaining an example of a system having a photoelectric conversion device of the present invention.
FIGS. 8A and 8B are a schematic configuration diagram (a) and a schematic cross-sectional view (b) illustrating an example when applied to an X-ray detection device.
FIG. 9 is a system configuration diagram for explaining an example of a system having the photoelectric conversion device of the present invention.
FIGS. 10A and 10B are a schematic cross-sectional view and a schematic circuit diagram illustrating a configuration example of a power conversion unit previously proposed by the inventors.
FIG. 11 is an energy band diagram for explaining an energy state of a photoelectric conversion unit.
FIG. 12 is a timing chart for explaining an example of the operation of the photoelectric conversion device proposed by the inventors before.
FIG. 13 is a schematic circuit diagram illustrating a configuration example of a detection unit.
FIG. 14 is a schematic circuit diagram for explaining a photoelectric conversion device of the present invention.
FIG. 15 is a timing chart illustrating an example of an operation of the photoelectric conversion device.
FIG. 16 is an energy band diagram for explaining an energy state of a photoelectric conversion unit.
FIG. 17 is an energy band diagram for explaining an energy state of a photoelectric conversion unit.
FIG. 18 is a schematic circuit diagram illustrating a photoelectric conversion device.
FIG. 19 is a timing chart illustrating an example of the operation of the photoelectric conversion device.
FIG.
FIG. 4 is an energy band diagram for explaining an energy state of a photoelectric conversion unit.
FIG. 21 is a schematic cross-sectional view illustrating an example of a configuration of an optical sensor.
FIG. 22 is a schematic cross-sectional view illustrating an example of a configuration of an optical sensor.
FIG. 23 is a graph showing the relationship between the thickness of the gate insulating film of the optical sensor and the yield.
[Explanation of symbols]
1 insulating substrate
2 Lower electrode
4 i-layer
5 n layers
6,60 transparent electrode
7,70 insulating layer
100 photoelectric conversion element
111 Reading power supply
112 Power supply for refresh
113 Power switch
115 Flat band voltage shift power supply
120 current detector
200 TFT for refresh
300 TFT for transfer
400 TFT for reset
1125 switch element
1300 Transfer TFT
1400 Reset TFT
1700 Refresh TFT

Claims (6)

On an insulating substrate, a first electrode layer, a first insulating layer , a photoelectric conversion semiconductor layer, an injection blocking layer for preventing injection of a first type carrier into the semiconductor layer, and a second electrode layer are sequentially deposited. Photoelectric conversion device having a photoelectric conversion element,
The following three operation modes for applying an electric field to each layer of the photoelectric conversion element,
(1) a photoelectric conversion mode in which charges are generated and accumulated according to the amount of incident light,
(2) a refresh mode for refreshing the photoelectric conversion element ,
(3) Flat band voltage shift suppression mode for suppressing movement of the flat band voltage of the photoelectric conversion element,
Characterized by having switch means for repeatedly operating in a predetermined order. In the flat band voltage shift suppression mode, the product (VrG · q) of the voltage (VrG) of the first electrode layer of the photoelectric conversion element and the charge (q) of the first type carrier is the second electrode. It is larger than the product {(VD-VFB) .q} of the voltage (VD-VFB) obtained by subtracting the flat band voltage (VFB) from the voltage (VD) of the layer and the charge (q) of the carrier of the first type. 2. The photoelectric conversion device according to claim 1, wherein the operation mode is an operation mode in which an electric field is applied to each layer according to a condition {(VrG · q) ≧ (VD · q−VFB · q)}. A plurality of the photoelectric conversion elements are arranged one-dimensionally or two-dimensionally, and the switch elements are connected for each of the photoelectric conversion elements, and all the photoelectric conversion elements are divided into a plurality of n blocks, and the switch is provided for each block. By operating the element, the optical signals of all the n × m photoelectric conversion elements divided into the plurality of n blocks are output by the matrix signal wiring, and the intersection of the matrix signal wiring is formed by at least the first electrode layer and the insulating layer. A layer, a semiconductor layer, and a second electrode layer in the order of lamination. Each layer of the lamination structure is a first electrode layer, an insulating layer, a photoelectric conversion semiconductor layer, and a second electrode layer of the photoelectric conversion element. The photoelectric conversion device according to claim 2, wherein the photoelectric conversion device is formed of the same layer as each layer and has the same thickness. A photoelectric conversion device according to any one of claims 1 to 3, a phosphor provided on the photoelectric conversion device for converting incident X-rays into light, and an X-ray source for generating the X-rays. a signal processing means for processing signals from the photoelectric conversion device, and a recording means for recording a signal from said signal processing means, and display means for displaying the signal from said signal processing means, said signal system characterized by having a electrical transmission means for electrical transmission of the signal from the processing means. On an insulating substrate, a first electrode layer, a first insulating layer , a photoelectric conversion semiconductor layer, an injection blocking layer for preventing injection of a first type carrier into the semiconductor layer, and a second electrode layer are sequentially deposited. Photoelectric conversion device having a photoelectric conversion element,
The following three operation modes for applying an electric field to each layer of the photoelectric conversion element,
(1) a photoelectric conversion mode in which charges are generated and accumulated according to the amount of incident light,
(2) a refresh mode for refreshing the charge stored in the photoelectric conversion element,
(3) Flat band voltage shift suppression mode for suppressing movement of the flat band voltage of the photoelectric conversion element,
And a switch means, and the three operation modes are repeatedly operated in a fixed order. In the flat band voltage shift suppression mode, the product (VrG · q) of the voltage (VrG) of the first electrode layer of the photoelectric conversion element and the charge (q) of the first type carrier is the second electrode. It is larger than the product {(VD-VFB) .q} of the voltage (VD-VFB) obtained by subtracting the flat band voltage (VFB) from the voltage (VD) of the layer and the charge (q) of the first type carrier. 6. The driving method for a photoelectric conversion device according to claim 5, wherein the operation mode is an operation mode in which an electric field is applied to each of the layers according to a condition {(VrG · q) ≧ (VD · q−VFB · q)}.

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