JP3553864B2 - LCD panel accelerated test method and structure therefor - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method of manufacturing an accelerated test panel for a liquid crystal display (LCD) panel up power test.
[0002]
[Prior art]
LCD panels are widely used in LCDs of desktop computers, laptop computers and other electronic devices. There is an electrode terminal in the margin of the glass plate of the LCD panel, and the terminal is usually provided with connection wiring provided in a flexible film to constitute a signal transmission between the electrode terminal and the host system circuit. Is connected to The flexible film with connection wiring is a flexible printed circuit (FPC) or tape. An output signal from the host system circuit is processed by a driver integrated circuit (IC) and sent to an electrode terminal to drive a pixel on the LCD panel. The driver IC is mounted on, for example, a TAB (tape automatic coupling technology) tape carrier, an input lead to a host system circuit of the tape carrier connection driver IC, and an output lead to an electrode terminal of the tape carrier connection driver IC. The signal is transmitted to the electrode terminals and the host circuit via the tape carrier.
[0003]
However, after the LCD panel is manufactured and before it is sent to the subsequent LCD monitor (LCM) module to perform the driver IC package and system link, they turn on the LCD panel pixels via accelerated testing and the product is good. Should be checked. LCD panels should pass an accelerated test before entering the subsequent driver IC packaging process. Because high resolution LCD panels are arranged near the input electrodes of the electrode terminals (ie, small electrode pitch), the conventional method of performing accelerated tests using probes to the input electrodes of the electrode terminals is extremely difficult. Making test equipment is equally difficult. Therefore, it is costly to perform such tests.
[0004]
Therefore, there is a need to provide a new accelerated test method for testing LCD panels.
[0005]
[Problems to be solved by the invention]
It is a primary object of the present invention to provide a method of manufacturing an accelerated test panel for an LCD panel accelerated test, thereby greatly reducing the difficulty and cost of the accelerated test.
[0007]
It is an object of the present invention to provide a method of manufacturing an accelerated test panel for an LCD panel accelerated test, wherein the accelerated test panel is capable of contacting a plurality of input electrodes at electrode terminals of the LCD panel to perform an accelerated test. Having a test electrode, forming a metal layer on the substrate, patterning the metal layer to form a normal metal circuit pattern, forming an insulating layer on the metal layer and the substrate layer, patterning the insulating layer Exposing a suitable contact window, forming a photoresist layer on the insulating layer and the metal layer, exposing areas to pattern the photoresist layer to form a plurality of test electrodes, and forming a photosensitive polyimide (PSPI); A) forming a layer on the photoresist layer, the insulating layer and the metal layer and patterning the PSPI layer to form a plurality of test electrodes; Exposing the metal part of the region, to form a plurality of test electrodes to the exposed metal part, further a method of manufacturing a promotion test panel and removing the photoresist layer is achieved by.
[0009]
Further areas of applicability of the present invention will become apparent from the detailed description provided hereinafter. However, while the detailed description and examples illustrate preferred embodiments of the present invention, they are for illustrative purposes only, and various changes and modifications within the spirit and scope of the present invention will be apparent from the detailed description. It is because it becomes clear to the trader.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
In accordance with the above objectives, the present invention uses an accelerated test panel to test LCD panels. The accelerated test panel includes a plurality of test electrodes, which are connected to a plurality of input electrodes at the electrode terminals of the LCD panel for performing an accelerated test.
[0011]
The accelerated test panel preferably includes a glass substrate and a plurality of test electrodes formed on the glass substrate. Each of the test electrodes has a one-to-one correspondence with one of the plurality of input electrodes on the LCD panel. When performing the accelerated test, the accelerated test panel and the electrode terminals on the LCD panel are directly matched, and when the appropriate pressure is applied to them, each of the test electrodes will have a corresponding input electrode on the LCD panel to perform the accelerated test. And electrically communicate with it. Further, the accelerated test panel includes a first connection line and a circuit terminal formed on the glass substrate, wherein the first connection line connects the test electrode to the circuit terminal, and the circuit terminal is for signal transmission with the outside. . The second connection wiring on the flexible film can be used to connect the circuit terminal to a host system circuit. The flexible film provided with the second connection wiring is a flexible printed circuit (FPC) or a tape.
[0012]
The host circuit includes a driver (drive) IC, processes a signal from the host circuit, and outputs the signal to the acceleration test panel through the second connection wiring.
[0013]
The driver IC is preferably mounted on a flexible film and processes signals from a host system circuit. Attachment of the driver IC to the flexible film can be achieved using chip on film (COF) or TAB packaging technology.
[0014]
The driver IC is also mounted on the accelerated test panel and can process signals from host related circuits. The driver IC can be mounted on an accelerated test panel using chip on glass (COG) technology.
[0015]
According to the object of the present invention, an accelerated test panel with a plurality of test electrodes can be formed by the following steps: (1) forming a metal layer on a substrate and forming a suitable circuit pattern thereon; (2) A) forming an insulating layer on the metal layer and the substrate and forming a pattern thereon to produce a suitable contact window; (3) forming a photoresist layer on the insulating layer and the metal layer and forming the pattern on the photoresist. Exposing certain areas to form test electrodes on the layer: (4) Form photosensitive polyimide (PSPI) on photoresist layer, insulating layer and metal layer and pattern on PSPI layer Exposing a metal circuit on the area to form a test electrode; (5) forming a test electrode by growing a metal bump on the exposed metal circuit; (6) Removing the photoresist layer al.
[0016]
The test panel forming substrate is a glass substrate. The formation of test electrodes on the exposed metal circuits can be achieved by electroplating.
[0017]
The contents of the present invention will be described in detail with reference to the drawings.
[0018]
1 and 2 show a preferred embodiment of an accelerated test panel and an accelerated test method for an LCD panel according to the present invention. The accelerated test panel 10 includes a plurality of test electrodes 11 and circuit terminals 12. It is preferable that the plurality of test electrodes 11 project from the test panel surface and correspond to the plurality of input electrodes 22 in the electrode terminals 21 of the LCD panel 20 on a one-to-one basis. A photosensitive polyimide (PSPI) layer 14 can be formed on both sides of the test electrode 11 to protect the test electrode 11 from distortion due to pressure. The test electrode 11 is connected to the circuit terminal 12 via the first connection wiring 13. An insulating layer 15 having an appropriate pattern can be formed on the first connection wiring 13 to protect the first connection wiring 13.
[0019]
The circuit terminal 12 transmits a signal to the host circuit 40 via the second connection wiring on the flexible film 30. The flexible film 30 is, for example, a tape, and has a driver IC 50 embedded by, for example, a TAB package technology. The driver IC 50 processes the signal from the host circuit 40 and outputs the signal to the accelerated test panel 10. The flexible film 30 and the driver IC 50 attached thereto can also be packaged with other techniques of chip on film (COF).
[0020]
When performing the accelerated test, the test electrodes 11 of the accelerated test panel 10 are matched with the electrode terminals 21 on the LCD panel 20 using a CCD optical system (not shown) and alignment marks 23 and 24 to apply an appropriate pressure. Since the test is performed, the test electrode 11 and the input electrode 22 are in one-to-one contact, and the acceleration test is performed.
[0021]
3a to 3g illustrate a preferred embodiment method for manufacturing the accelerated test panel 10. FIG. First, as shown in FIG. 3a, a substrate 60, for example a glass substrate, is coated with a metal layer 61 by sputtering. The circuit pattern is then formed on the metal layer 61, as in FIG.
[0022]
Referring to FIG. 3C, the metal layer 61 and the substrate 60 form an insulating layer 62 by a sputtering or deposition method. Thereafter, the insulating layer 62 is patterned as shown in FIG. 3d, exposing the appropriate circuitry or contacting the window. For example, the circuit at the location for test electrode 11 and the circuit at the location for circuit terminal 12 are exposed in this step.
[0023]
Referring to FIGS. 3 e and 4, a photoresist layer 63 is coated on the insulating layer 62 and the metal layer 61. The photoresist layer 63 is patterned and exposes certain areas to form the test electrodes 11.
[0024]
As shown in FIG. 3f, the photoresist layer 63, the insulating layer 62, and the metal layer 61 are covered with a PSPI layer 64, and the PSPI layer 64 is patterned to form a metal circuit in a position for forming the test electrode 11. Expose.
[0025]
Finally, Ni, Au or Cu is coated on the exposed metal 61 by electroplating to form a test electrode 65, as shown in FIG. The test electrode 65 is preferably slightly higher than the PSPI layer 64. After removing the photoresist layer 63, the accelerated test panel 10 is completed.
[0026]
Driver IC 50 is mounted on flexible printed circuit 40 or packaged on accelerated test panel 10 as shown in FIG. The driver IC 50 can be embedded between the circuit terminal 12 and the test electrode 11 on the accelerated test panel 10 using COG packaging technology. Circuit terminal 12 communicates with host system 40 via flexible printed circuit 70. The connection between the flexible printed circuit 70 and the host system 40 can be achieved, for example, using a connector (not shown). Therefore, the signal from the host system 40 can be input to the circuit terminal 12 via the flexible printed circuit, processed by the driver IC 50, and output to the test electrode 11.
[0027]
As described above, it is particularly useful for accelerated testing of high resolution LCD panels with very small pitches between input electrodes.
[0028]
Although the invention is thus described, it is clear that the same can be varied in many ways. Such variations do not depart from the spirit and scope of the invention, and modifications obvious to those skilled in the art should be included within the scope of the claims of the invention.
[0029]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to the method of this invention and the structure for it, a test of an LCD panel can be performed by a simple method and low cost.
[Brief description of the drawings]
FIG. 1 is a schematic diagram of an accelerated test panel, a connecting flexible film (tape) with a driver IC packaged on the flexible film, and a host circuit.
FIG. 2 is a schematic diagram of an acceleration test.
FIGS. 3a to 3g are cross-sectional views of steps of a preferred embodiment for manufacturing the accelerated test panel of the present invention.
FIG. 4 is a partially enlarged view when a photoresist layer is formed after the step of FIG. 3e.
FIG. 5 is a schematic diagram of an accelerated test panel and a connection flexible film with a driver IC packaged on the accelerated test panel.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... Promoting test panel 11 ... Test electrode 12 ... Circuit terminal 13 ... First connection wiring 14 ... Photosensitive polyimide layer 15, 62 ... Insulating layer 21 ... Electrode terminal 22 ... Input electrode 30 ... Flexible film 40 ... Host circuit 50 … Driver IC
Reference numeral 60: substrate 61: metal layer 63: photoresist layer

Claims (3)

A method of manufacturing an accelerated test panel for an LCD panel accelerated test, the accelerated test panel having a plurality of test electrodes capable of contacting a plurality of input electrodes at electrode terminals of the LCD panel for performing an accelerated test;
Form a metal layer on the substrate, pattern the metal layer to form a normal metal circuit pattern,
Forming an insulating layer on the metal layer and the substrate layer, patterning the insulating layer and exposing a suitable contact window;
Forming a photoresist layer on the insulating layer and the metal layer, exposing regions to pattern the photoresist layer to form a plurality of test electrodes;
Forming a photosensitive polyimide (PSPI) layer on the photoresist layer, the insulating layer and the metal layer, and exposing a metal portion of the region to pattern the PSPI layer to form a plurality of test electrodes;
A method of manufacturing an accelerated test panel, comprising forming a plurality of test electrodes on the exposed metal portion and removing the photoresist layer. The method of claim 1 wherein the substrate is a glass substrate. The step of forming a plurality of test electrodes The method of claim 1, wherein is included the step of forming a plurality of test electrodes in electroplating on the exposed metal part.

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