JP3549943B2 - Semiconductor device test data processing apparatus and test data processing method - Google Patents

Description

[0001]
[Industrial applications]
The present invention relates to a test data processing device and a test data processing method for a semiconductor device such as a semiconductor memory or a semiconductor logic device having a memory portion.
[0002]
[Prior art]
A conventional memory tester will be described with reference to FIG. FIG. 13 is a diagram schematically illustrating the appearance of a conventional memory tester.
[0003]
In FIG. 13, reference numeral 1 denotes a tester, 2 denotes a CRT (display device), a keyboard, a pointing device (mouse), etc., and controls an entire data processing system and EWS (engineering workstation) for processing test data. Is a driving device, 4 is a wafer, 5 is a table on which the wafer 4 is mounted, 6 is a prober for performing an electrical test by contacting a chip pad of the wafer 4, and 7 is a driving arm for moving the prober 6 three-dimensionally. .
[0004]
Data obtained from the EWS 2 of the conventional tester 1 is binary data of H and L, and is a two-dimensional table (fail bit map). This fail bitmap is in wafer units. FIG. 14 shows a specific example of one chip displayed on a CRT of EWS2, for example.
[0005]
In FIG. 14, H data indicated by oblique lines is represented on a fail bit map (x, y) (x = 0, 1, 2, 3, to m, y = 0, 1, 2, 3, to n). Output as points, lines, and surfaces. L data is not output on the fail bitmap.
[0006]
Conventionally, these points, lines, and surfaces have not been recognized. The shapes of the points, lines, and surfaces are effective information for estimating the cause of the device failure, but have not been automatically recognized as shapes. For this reason, it took a very long time since the breaker (operator) visually converted and counted. In addition, since the shape recognition process could not be performed, the shape classification process and the statistical process could not be automatically performed.
[0007]
In other words, the data output from the tester 1 is visually visible as shown in FIG. 14, but the analyst must determine what the H data in the hatched portion is defective. Therefore, it lacks accuracy and takes time.
[0008]
[Problems to be solved by the invention]
In the conventional tester described above, the failure data is output so as to be visually understood, but the cause of the failure has to be determined by an analyst, which is inaccurate and takes time. was there.
[0009]
SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem, and has a test data processing apparatus for a semiconductor device capable of automatically recognizing a shape of data output from a tester and performing a shape classification process and a statistical process. The purpose is to obtain the test data processing method.
[0011]
[Means for Solving the Problems]
This The test data processing apparatus for a semiconductor device according to the invention of A shape recognition processing unit for recognizing the shape of the fail bitmap data output from the tester, a shape classification processing unit for classifying the recognized shape data to create an output data table, and a statistical process based on the output data table A statistical processing unit that creates a statistical table Furthermore, a diagnostic processing unit for diagnosing a shape cause based on data of a plurality of test items output from the tester for the same semiconductor device, the output data table, and a previously described cause diagnosis logic table. It is.
[0012]
Further, the test data processing device for a semiconductor device according to the present invention further includes a data comparison processing unit that obtains a defect cause by superimposing the shape cause data and inspection data output from another device. is there.
[0013]
Further, in the test data processing method for a semiconductor device according to the present invention, the fail bit map is scanned one bit at a time, and if defective data is found, adjacent bits in eight directions are checked, and all adjacent bits in the eight directions are checked. If the data is not defective data, the step of recognizing BIT as the shape data, the step of recognizing WLINE as the shape data if the right bit in the x-axis direction is defective data, and the step of recognizing the lower adjacent bit in the y-axis direction as the defective data And the step of recognizing the shape as OTHER when the adjacent bits other than the right adjacent bit in the x-axis direction and the lower adjacent bit in the y-axis direction are defective data. Including.
[0014]
Also, the test data processing method for a semiconductor device according to the present invention includes a step of scanning the fail bit map one bit at a time, and a step of sequentially storing coordinate data of the dot in the defective data coordinate table when defective data is found. And retrieves the coordinate data one by one from the defective data coordinate table, examines the adjacent bits in the eight directions of the bits of the retrieved coordinate data in the fail bit map, and determines that all the adjacent bits in the eight directions are not defective data. The step of recognizing BIT as shape data, the step of recognizing WLINE as shape data when the right adjacent bit in the x-axis direction is defective data, and the step of recognizing the shape when the lower adjacent bit in the y-axis direction is defective data. A step of recognizing BLINE, the right adjacent bit in the x-axis direction and the y-axis When adjacent bits other than Koshitatonari bit is bad data is intended to include the OTHER and recognizing as a shape.
[0015]
Further, the test data processing method for a semiconductor device according to the present invention may further include the recognized shape data, a cause diagnosis logic table based on a result of a plurality of test items, and data of a plurality of test items by a tester. Diagnosing the shape cause in combination.
[0016]
Further, the test data processing method for a semiconductor device according to the present invention further includes a step of superimposing the diagnosed shape cause data and the inspection data output from another device to determine a cause of the defect.
[0018]
[Action]
This In the test data processing apparatus for a semiconductor device according to the present invention, A shape recognition processing unit that recognizes the shape of the fail bitmap data output from the tester; a shape classification processing unit that classifies the recognized shape data to create an output data table; and a statistic based on the output data table. A statistical processing unit for processing and creating a statistical table, Furthermore, since the diagnostic processing unit for diagnosing the shape cause based on the data of the plurality of test items output from the tester for the same semiconductor device, the output data table, and the previously described cause diagnosis logic table is provided. , Shape recognition, shape classification, and statistical processing of data output from the tester can be automatically performed, processing time can be reduced, and The cause of the shape can be automatically diagnosed.
[0019]
Further, the test data processing device for a semiconductor device according to the present invention further includes a data comparison processing unit for obtaining the cause of failure by superimposing the data on the shape cause and the inspection data output from another device. The cause of the defect can be automatically obtained.
[0020]
In the method of processing test data for a semiconductor device according to the present invention, the step of scanning the fail bit map one bit at a time, and if defective data is found, the adjacent bits in eight directions are checked. When the bit is not defective data, the step of recognizing the bit as shape data is BIT; when the bit on the right side in the x-axis direction is defective data, the step of recognizing it as WLINE as the shape data; When there is, a step of recognizing the shape as BLINE, and a step of recognizing the shape as OTHER when adjacent bits other than the right adjacent bit in the x-axis direction and the lower adjacent bit in the y-axis direction are defective data, , The shape can be automatically recognized and the processing time can be reduced.
[0021]
Further, in the test data processing method for a semiconductor device according to the present invention, the step of scanning the fail bit map one bit at a time, and if defective data is found, the coordinate data of the dot is sequentially stored in the defective data coordinate table. Step: extracting coordinate data one by one from the defective data coordinate table, examining eight adjacent bits of the extracted coordinate data bits in the fail bit map, and determining that all adjacent bits in the eight directions are not defective data. Is a step of recognizing BIT as shape data, a step of recognizing WLINE as shape data when the right adjacent bit in the x-axis direction is defective data, and a shape when the lower adjacent bit in the y-axis direction is defective data. , And the right adjacent bit in the x-axis direction and Since when adjacent bits other than serial y-axis direction lower neighbor bits is bad data includes the OTHER and recognizing as a shape, the shape recognition can automatically be shortened processing time.
[0022]
In the test data processing method for a semiconductor device according to the present invention, the recognized shape data, a cause diagnosis logic table based on a result of a plurality of test items, and data of a plurality of test items by a tester. And a step of diagnosing the cause of the shape by combining the two.
[0023]
Furthermore, the test data processing method for a semiconductor device according to the present invention further includes a step of obtaining the cause of failure by superimposing the data of the diagnosed shape cause and the inspection data output from another device. The cause of failure can be determined automatically.
[0024]
【Example】
Embodiment 1 FIG.
First Embodiment A first embodiment of the present invention will be described with reference to FIGS. 1, 2, 3, and 4. FIG. FIG. 1 is a diagram illustrating functional blocks of a test data processing device according to a first embodiment of the present invention. FIG. 2 is a flowchart showing the operation of the first embodiment. FIGS. 3 and 4 are diagrams showing output results of the first embodiment. In the drawings, the same reference numerals indicate the same or corresponding parts.
[0025]
In FIG. 1, reference numeral 10 denotes an EWS which is a test data processing device; 11, a data input unit connected to a data output unit of the memory tester 1 via a line; 12, a data holding unit; 13, a shape recognition processing unit; Denotes a processing data holding unit, 15 denotes a shape classification processing unit, 16 denotes a statistical processing unit, and 17 denotes a data output unit. Each of the above-mentioned parts indicates each functional part of the software.
[0026]
First, data (fail bit map) output from the memory tester 1 has a structure as shown in FIG. This fail bitmap is partitioned into an m × n mesh (matrix), and contains one dot (bit) or binary information of H, L (or 0, 1) for each pixel. I have. Each dot has an address (x, y) preset in the x and y directions.
[0027]
That is, if an arbitrary address (x, y) is called, binary information of H or L can be extracted from the dot of that address. If this is expressed two-dimensionally, it can be displayed and output as shown in FIG. In the case of a memory device, the cell address of the device matches the address (x, y) in FIG. Normally, H or L data is used to indicate a defective cell of the memory device. In this embodiment, H data is treated as defective.
[0028]
The shape of the failure data (H data) in the fail bit map of FIG. 14 is very effective in estimating the cause of the failure depending on the test contents of the memory device by the tester 1, but the shape recognition processing is conventionally performed. Since it could not be done automatically, the operator judged it visually and classified the shape into points, lines, surfaces, etc. In addition, the number of the classified points, the number of lines, and the number of surfaces are also counted by the operator, which is very laborious.
[0029]
In the first embodiment, data (fail bitmap (x, y)) output from the data output unit of the tester 1 is first held in the data holding unit 12 via the data input unit 11. At the time of saving, it is saved as a file for each chip unit of the wafer 4 output from the tester 1. Next, the data is read from the data holding unit 12 and the shape is recognized by the shape recognition processing unit 13. The shape-recognized data is stored in the processed data holding unit 14, then processed by the shape classification processing unit 15 and the statistical processing unit 16, and output data tables (X, Y) are again processed by the processed data holding unit 14. Stored as a statistical data table. Then, this data is output from the data output unit 17 to the outside.
[0030]
Next, shape recognition and shape classification processing according to the first embodiment will be described with reference to the flowchart in FIG.
[0031]
In steps 20 and 21, a file (fail bitmap (x, y)) to be recognized is called. Also, the maximum values m and n of the (x, y) coordinates are set. For the sake of simplicity, the fail bitmap (x, y) is referred to as an input data table (x, y) in this processing.
[0032]
In step 22, counters BIT, BLINE (1), BLINE (2), BLINE (3), .about.BLINE (n), WLINE for each of the shape data "bit", "bit line", "word line", and "other". (1), WLINE (2), WLINE (3), .about.WLINE (m), and the initial value "0" of OTHER are set. Here, the length (number of bits) of each of BLINE and WLINE is indicated by L and LL, and these are also set to the initial value “0”.
[0033]
In step 23, initialization is performed as coordinates x = 0, y = 0 of the input data table (x, y). The output data table (X, Y) for each chip is initialized as (X, Y) = (0, 0).
[0034]
In step 24, scanning of the dots of the input data table (x, y) is started. Here, when the data of the dot is L, if the x coordinate is not the maximum value m in step 34, the next dot is set as x = x + 1 in the next step 35 and the next dot is scanned. If the x coordinate is the maximum value m in step 34, the process proceeds to step 36. If the y coordinate is not the maximum value n in this step 36, the next dot is scanned in the next step 37 with y = y + 1. If the y coordinate is the maximum value n in step 36, the process ends. On the other hand, when the data of the dot is H, the process proceeds to the next step 25.
[0035]
In Steps 25 to 33, if the data of the (x, y) dot is H, the adjacent dots in the eight directions are scanned. If there is no H data in those adjacent dots, "bit" is stored as shape data. That is, X = x, Y = y, and the output data table (X, Y) = “BIT”. Also, the counter is updated. That is, BIT = BIT + 1. If it is determined in step 25 that H data exists in the adjacent dot in the x (plus) direction, the process proceeds to step 40. If it is determined in step 29 that H data exists in the adjacent dot in the y (plus) direction, the process proceeds to step 50. Further, in Steps 26, 27, 28, 30, 31, or 32, when there is H data in an adjacent dot other than (x + 1, y) and (x, y + 1), the process proceeds to Step 60.
[0036]
In steps 40 to 44, when there is H data in the dots of the input data table (x + 1, y), x = x + 1, LL = LL + 1, and the dots of the input data table (x, y) are scanned. Then, the length LL in the x direction is counted until L data is found. A “word line” having a length LL is stored as shape data. That is, the coordinates are set to X = x-LL, Y = y, and the output data table (X, Y) is set to “WLINE (LL)”. Also, the counter is updated as WLINE (LL) = WLINE (LL) +1. Note that, assuming that x = x-LL, the value of the x coordinate of the input data table is restored.
[0037]
In steps 50 to 54, if there is H data in the dots of the input data table (x, y + 1), y = y + 1 and L = L + 1, and the dots of the input data table (x, y) are scanned. Then, the length L in the y direction is counted until L data is found. A “bit line” having a length L is stored as shape data. That is, the coordinates are set to X = x, Y = yl, and the output data table (X, Y) is set to “BLINE (L)”. Also, the counter is updated as BLINE (L) = BLINE (L) +1. The value of the y coordinate in the input data table is returned to the original value, where y = y−L.
[0038]
In step 60, if there is H data in an adjacent dot other than the input data table (x + 1, y) and (x, y + 1), "other" is stored as shape data. That is, the coordinates are set to X = x, Y = y, and the output data table (X, Y) = “OTHER”. Further, the counter is updated as OTHER = OTHER + 1.
[0039]
In the above processing flow, coordinates for scanning each dot of the input data table (x, y) are represented by (0, 0), (1, 0), (2, 0), (3, 0), to (m, 0). ), (0,1), (1,1), (2,1), (3,1), ~ (m, 1), (0,2), (1,2), (2,2) , (3,2), ~ (m, 2), ~ (0, n), (1, n), (2, n), (3, n), ~ (m, n), x The scanning is performed with priority given to the axis to detect defective data (H data). The detected defective data is subjected to recognition processing each time to classify the shape. Note that scanning may be performed with priority given to the y-axis. Each dot of the input data table (x, y) stores binary data of H and L. However, when the above recognition and classification processing is performed, defective data exists in the output data table (X, Y). The shape data classified according to the coordinates and the count value for each shape data are obtained in each counter.
[0040]
The statistical processing unit 16 performs shape recognition and classification from the data of the fail bitmap (x, y) by the shape recognition processing unit 13 and the shape classification processing unit 15, and stores the output data table stored in the processed data holding unit 14. Statistical processing is performed based on (X, Y).
[0041]
For example, the statistical processing unit 16 counts the number of defects for each shape, and creates a statistical table including defect coordinates, the number of defects, and a defect name, as shown in FIG. FIG. 3 is created based on a specific example of the fail bitmap (x, y) shown in FIG. In the figure, BIT is used as shape data at coordinates (1, 1) of the fail bitmap, WLINE (3) having a length LL of 3 is used as coordinates at coordinates (3, 3) to (3, 5), and coordinates (1) , 4) to (1, 5) indicate that BLINE (2) having a length L of 2 was present as shape data.
[0042]
Further, the statistical processing unit 16 creates a statistical table shown in FIG. 4 from the statistical table. These statistical tables and statistical tables are displayed on the EWS CRT. The data is printed (tabulated) by a printer.
[0043]
Embodiment 2. FIG.
In the first embodiment, shape recognition and shape classification are performed while scanning all bits of the fail bitmap (x, y). In the second embodiment, first, all bits of the fail bitmap (x, y) are Is scanned, and the coordinate (x, y) data having the defective data is created as a “defective data coordinate table”. Then, based on the coordinate data stored in the “defective data coordinate table”, Bits are recognized and classified in the same manner as in the first embodiment. Therefore, since only the bits recognized as defective in the first scan are recognized and classified, the total processing time can be reduced.
[0044]
That is, the difference from the first embodiment is that the dot is scanned first with priority on the x-axis, and the coordinates (x, y) of the dot with the H data are sequentially stored in the defective data coordinate table. Here, the coordinates (x, y) of the dot having the L data are not stored in the defective data coordinate table. In the next recognition / classification processing, the dots having the coordinates (x, y) stored in the bad data coordinate table are symmetrically performed. Therefore, the recognition / classification processing is not performed on the dots having L data, and the processing speed is improved.
[0045]
Therefore, the coordinates (x, y) of the dot having the H data are obtained in the “defective data coordinate table”, and the coordinates corresponding to the coordinates where the defective data exists in the “output data table (X, Y)” are obtained. The shape data classified as above and the count value for each shape data in each “counter” are obtained. The coordinates (x, y) data of the dots having the L data may be sequentially stored in the “good data coordinate table” and recognized as shape data “Pass”.
[0046]
Embodiment 3 FIG.
Third Embodiment A third embodiment of the present invention will be described with reference to FIGS. 5, 6, and 7. FIG. FIG. 5 is a diagram illustrating functional blocks of a test data processing device according to a third embodiment of the present invention. FIG. 6 is a diagram illustrating output data of the tester according to the third embodiment. FIG. 7 is a diagram showing an output result of the third embodiment.
[0047]
In FIG. 5, 10A is an EWS which is a test data processing device, 11 is a data input unit connected to a data output unit of the memory tester 1 via a line, 12 is a data holding unit, 13 is a shape recognition processing unit, 14 Denotes a processing data holding unit, 15 denotes a shape classification processing unit, 16 denotes a statistical processing unit, and 17 denotes a data output unit.
[0048]
Further, in the figure, reference numeral 18 denotes a diagnosis processing unit, and 19 denotes a diagnosis logic content holding unit. Each of the above-mentioned parts indicates each functional part of the software.
[0049]
The shape recognition processing unit 13, the shape classification processing unit 15, and the statistical processing unit 16 have been described in the first embodiment, and will not be described.
[0050]
First, the tester 1 outputs a plurality of tested (test A, test B, test C, test D,...) Data of the same sample via the data output unit. FIG. 6 shows an image diagram of the output data of the tester 1. Each address (bit) has binary H or L data for each test item. For the combination of the results of all the test items, the cause of the test result is described in the diagnostic logic content holding unit 19 as a "cause diagnostic logic table" in advance. In the case of a memory device, it corresponds to a defective process or a defective wiring.
[0051]
Next, a method of a shape cause diagnosis process will be described. The tester 1 outputs data of a plurality of test items to the diagnostic processing unit 18 via the data input unit 11 and the data holding unit 12. The diagnosis processing unit 18 compares the data of the plurality of test items and the shape data output from the shape recognition processing unit 13 with a “cause diagnosis logic table” described in the diagnosis logic content holding unit 19. Then, a shape cause that causes the shape recognized by the shape recognition processing unit 13 is diagnosed. FIG. 7 shows an output example of the diagnosis result.
[0052]
For example, the diagnostic processing unit 18 determines that the recognized shape data is BIT, and the data of test A, test B, test C, and test D are “H”, “H”, “H”, and “L”. In this case, it is diagnosed that “process A” is the cause of the shape.
[0053]
Embodiment 4. FIG.
Fourth Embodiment A fourth embodiment of the present invention will be described with reference to FIGS. 8, 9, 10, 11, and 12. FIG. FIG. 8 is a block diagram showing a test data processing device according to Embodiment 4 of the present invention. FIG. 9 is a diagram showing one of the input test data of the fourth embodiment of the present invention and showing data of the whole wafer outputted from the tester. FIG. 10 is a view showing input test data from another apparatus (foreign matter inspection apparatus), that is, data of the entire wafer. FIG. 11 is a diagram for explaining a processing method according to the fourth embodiment of the present invention. FIG. 12 is a diagram showing an output result of the fourth embodiment of the present invention.
[0054]
In FIG. 8, reference numeral 10B denotes an EWS as a test data processing device, which is a data comparison processing unit having a function of automatically comparing data obtained in each of the above-described embodiments with data output from the other devices 70 and 71. It has.
[0055]
First, the data output in each of the above embodiments is a coordinate address obtained from the fail bit map shown in FIG. 9, shape data whose shape is recognized for each address, and data for each test item. If these data are in units of one wafer, the address can be converted into a position on the wafer. This is performed by the data comparison processing unit. FIG. 9 shows a failure distribution (fail bit map) in the wafer.
[0056]
Next, the same wafer is obtained with in-wafer information such as a foreign substance distribution, a film thickness distribution, a dimensional distribution, and a concentration distribution during the production process. This data is output in a form as shown in FIG. 10 for each process. FIG. 10 is an example output from the foreign matter inspection device (other device). In this example, the information includes the position of foreign matter on the wafer and foreign matter information (particle size, etc.). The data output by the tester 1 and the data output by the other devices 70 and 71 are respectively subjected to address conversion to the same coordinate axes by a data comparison processing unit, and then the same unit performs a superimposition process.
[0057]
The following is shown as a specific example of this superimposition processing. The defects output by the tester 1 are classified into BIT, BLINE, WLINE, and OTHER according to the shape.
[0058]
BIT ratio = (total number of data from the foreign substance inspection device, in which the address where the foreign substance is present matches the data from the tester 1 and the address recognized and classified as BIT as the shape data) / (tester 1 Data, and the total number of addresses recognized and classified as BIT as shape data)
[0059]
WLINE rate = (total number of data from the foreign substance inspection apparatus, in which the address where the foreign substance is present matches the data from the tester 1 and the address recognized and classified as WLINE as the shape data) / (tester 1 , And the total number of addresses that are recognized and classified as WLINE as shape data)
[0060]
For example, when the calculation is performed as described above, it is possible to easily obtain a correlation of what kind of defect the foreign substance found in the process of outputting the data in FIG. This superposition process can be combined in any number of ways. These data may be exchanged via a medium such as a floppy disk or MO, or may be connected via an online line such as Ethernet. Further, the data comparison processing unit may be incorporated in the test data processing devices of the first and third embodiments.
[0061]
A more specific description is as follows. For example, if the data output from the tester 1 is the result of an electrical test, and the data output from the other devices 70 and 71 is dust on a wafer (chip), both data are shown in FIG. And (b) are output in a map as shown in FIG. The data output from the other devices 70 and 71 is dust on the wafer (chip). Specifically, the data is the coordinates of the dust and is the same as the coordinate system of the fail bit map.
[0062]
Assuming that a test result as shown in FIG. 11 is obtained, the data comparison processing unit superimposes these data. If the coordinates match as a result of the superposition, it can be said that the cause of the BIT failure is dust 1. As shown in FIG. 12, the address (x ₁ , Y ₁ In (2), it can be diagnosed that a BIT failure has occurred due to the dust 1 in the process A. The address (x ₂ , Y ₂ ()) Shows a case where a BIT failure has occurred but there is no dust. The cause of the defect has various factors, and garbage is one of the factors. Each of the other devices 70 and 71 inspects an element. By incorporating data obtained from this into the test result obtained in each of the above-described embodiments, it becomes possible to determine the cause of the failure.
[0064]
【The invention's effect】
This As described above, the test data processing apparatus for a semiconductor device according to the present invention, A shape recognition processing unit that recognizes the shape of the fail bitmap data output from the tester; a shape classification processing unit that classifies the recognized shape data to create an output data table; and a statistic based on the output data table. A statistical processing unit for processing and creating a statistical table, Furthermore, since the diagnostic processing unit for diagnosing the shape cause based on the data of the plurality of test items output from the tester for the same semiconductor device, the output data table, and the previously described cause diagnosis logic table is provided. , Shape recognition, shape classification, and statistical processing of data output from the tester can be automatically performed, processing time can be reduced, and This has the effect that the shape cause can be automatically diagnosed.
[0065]
Further, as described above, the test data processing device for a semiconductor device according to the present invention further includes a data comparison processing unit that superimposes the data on the shape cause and the inspection data output from another device to determine the cause of the defect. Therefore, there is an effect that the cause of the defect can be automatically obtained.
[0066]
As described above, the test data processing method for a semiconductor device according to the present invention includes a step of scanning a fail bit map one bit at a time and, if defective data is found, checking adjacent bits in eight directions. When all the adjacent bits are not defective data, it is recognized as BIT as shape data; when the right adjacent bit in the x-axis direction is defective data, it is recognized as WLINE as shape data; When the data is defective data, it is recognized as BLINE as a shape, and when adjacent bits other than the right neighboring bit in the x-axis direction and the lower neighboring bit in the y-axis direction are defective data, the shape is regarded as OTHER and The recognition step is included, so that the shape can be automatically recognized and the processing time can be reduced.
[0067]
Further, as described above, the test data processing method for a semiconductor device according to the present invention includes a step of scanning the fail bit map one bit at a time and, if defective data is found, the coordinate data of the dot is stored in a defective data coordinate table. And sequentially taking out the coordinate data one by one from the bad data coordinate table, and examining eight adjacent bits of the extracted coordinate data bits of the fail bit map. When it is not defective data, a step of recognizing BIT as shape data, when the right adjacent bit in the x-axis direction is defective data, a step of recognizing it as WLINE as shape data when it is defective data, and when the lower adjacent bit in the y-axis direction is defective data Is a shape and a step of recognizing it as BLINE; When the bit and the adjacent bit other than the lower adjacent bit in the y-axis direction are defective data, a step of recognizing the shape as OTHER is included, so that the shape can be automatically recognized and the processing time can be further reduced. Play.
[0068]
As described above, the test data processing method for a semiconductor device according to the present invention further includes a cause diagnosis logic table based on the recognized shape data, a result of a plurality of test items, and a plurality of tests performed by a tester. A step of diagnosing the cause of the shape by combining the data of the item with the data of the item.
[0069]
Further, as described above, the test data processing method for a semiconductor device according to the present invention further includes a step of superimposing the diagnosed shape cause data and the inspection data output from another device to determine a cause of the defect. Therefore, there is an effect that the cause of the defect can be automatically obtained.
[Brief description of the drawings]
FIG. 1 is a diagram showing functional blocks of a test data processing device according to a first embodiment of the present invention.
FIG. 2 is a flowchart illustrating shape recognition and shape classification processing according to the first embodiment of the present invention.
FIG. 3 is a diagram showing an output result of the first embodiment of the present invention.
FIG. 4 is a diagram showing an output result of the first embodiment of the present invention.
FIG. 5 is a diagram showing functional blocks of a test data processing device according to a third embodiment of the present invention.
FIG. 6 is a diagram showing input test data according to the third embodiment of the present invention.
FIG. 7 is a diagram showing an output result of a diagnosis according to the third embodiment of the present invention.
FIG. 8 is a block diagram illustrating a test data processing device according to a fourth embodiment of the present invention.
FIG. 9 is a diagram showing input test data according to a fourth embodiment of the present invention.
FIG. 10 is a diagram showing input test data from another device (foreign matter inspection device).
FIG. 11 is a diagram illustrating a processing method according to a fourth embodiment of the present invention.
FIG. 12 is a diagram showing an output result of the fourth embodiment of the present invention.
FIG. 13 is a view showing a conventional test data processing device for a semiconductor device.
FIG. 14 is a diagram showing an output result of a conventional test data processing device for a semiconductor device.
[Explanation of symbols]
1 tester, 10 10A, 10B test data processing device (EWS), 11 data input unit, 12 data storage unit, 13 shape recognition processing unit, 14 processed data storage unit, 15 shape classification processing unit, 16 statistical processing unit, 17 Data output unit, 18 diagnostic processing unit, 19 diagnostic logic content holding unit, 70, 71 and other devices.

Claims (6)

A shape recognition processing unit for recognizing the shape of the fail bitmap data output from the tester, a shape classification processing unit for classifying the recognized shape data to create an output data table, and a statistical process based on the output data table includes a statistical processing unit for creating statistical tables,
Further, a diagnostic processing unit for diagnosing a shape cause based on data of a plurality of test items output from the tester for the same semiconductor device, the output data table, and a cause diagnosis logic table described in advance is provided . A test data processing apparatus for a semiconductor device, comprising: 2. The test data processing apparatus for a semiconductor device according to claim 1, further comprising a data comparison processing unit that obtains a defect cause by superimposing the shape cause data and inspection data output from another device. . Scanning the fail bit map one bit at a time; if defective data is found, examine adjacent bits in eight directions; if all adjacent bits in the eight directions are not defective data, recognize as BIT as shape data; x The step of recognizing WLINE as shape data when the right adjacent bit in the axial direction is defective data, the step of recognizing BLINE as a shape when the lower adjacent bit in the y-axis direction is defective data, and the step of recognizing the right line in the x-axis direction. A test data processing method for a semiconductor device, comprising a step of recognizing the shape as a shape when the adjacent bit other than the adjacent bit and the adjacent bit other than the lower adjacent bit in the y-axis direction is defective data . Scanning the fail bit map one bit at a time; if defective data is found, storing the coordinate data of the dot in a defective data coordinate table in order; extracting the coordinate data one by one from the defective data coordinate table Checking the adjacent bits in the eight directions of the bits of the extracted coordinate data in the bit map, and recognizing BIT as shape data if all the adjacent bits in the eight directions are not defective data; When the data is data, the step of recognizing it as WLINE as shape data; when the lower adjacent bit in the y-axis direction is defective data, the step of recognizing it as BLINE as a shape; and the right adjacent bit in the x-axis direction and the y-axis direction Shape when adjacent bits other than the lower adjacent bit are defective data Test data processing method of a semiconductor device which comprises an OTHER recognizing step as is. The method further includes a step of diagnosing a shape cause by combining the recognized shape data, a cause diagnosis logic table based on a result of a plurality of test items, and data of a plurality of test items by a tester. The test data processing method for a semiconductor device according to claim 3 . 6. The test data processing method for a semiconductor device according to claim 5 , further comprising a step of superimposing the diagnosed shape cause data and inspection data output from another device to determine a cause of the defect .

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