JP3547837B2 - Inverter device - Google Patents

Inverter device Download PDF

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Publication number
JP3547837B2
JP3547837B2 JP07664895A JP7664895A JP3547837B2 JP 3547837 B2 JP3547837 B2 JP 3547837B2 JP 07664895 A JP07664895 A JP 07664895A JP 7664895 A JP7664895 A JP 7664895A JP 3547837 B2 JP3547837 B2 JP 3547837B2
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Prior art keywords
voltage
switching
circuit
transformer
current
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JPH08275535A (en
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孝男 竹原
正志 法月
敦祥 玉川
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Minebea Co Ltd
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Minebea Co Ltd
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Priority to JP07664895A priority Critical patent/JP3547837B2/en
Priority to US08/622,370 priority patent/US5640313A/en
Priority to EP96302110A priority patent/EP0735658B1/en
Priority to DE69617305T priority patent/DE69617305T2/en
Publication of JPH08275535A publication Critical patent/JPH08275535A/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14Circuit arrangements
    • H05B41/26Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc
    • H05B41/28Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters
    • H05B41/282Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices
    • H05B41/2821Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a single-switch converter or a parallel push-pull converter in the final stage
    • H05B41/2824Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a single-switch converter or a parallel push-pull converter in the final stage using control circuits for the switching element
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S315/00Electric lamp and discharge devices: systems
    • Y10S315/07Starting and control circuits for gas discharge lamp using transistors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Circuit Arrangements For Discharge Lamps (AREA)

Description

【0001】
【産業上の利用分野】
本発明は、広い範囲の電流制御を必要とする負荷に電力を供給するインバ−タ装置に関し、特に調光自在な冷陰極管(以下、CFLという)をいわゆる高周波点灯する点灯装置に適用して好適なインバ−タ装置に関する。
【0002】
【従来技術の構成とその問題点】
インバ−タ装置は、直流電力を交流電力に交換する装置であって、いわゆる逆変換装置として各種の電機機器に使用されている。図8は放電管用として使用されている従来のインバ−タ装置を示す回路図である。図8において、T51は一次コイルNp51、二次コイルNs51、帰還コイルMf51を備えたロイヤ−発振回路用の昇圧トランスである。Q51、Q52はNPN型のスイッチング作動用トランジスタで、昇圧トランジスタT51とともにロイヤ−発振回路を構成する。C51は電圧共振用コンデンサ、L51はチョ−クコイルである。これによりトランジスタQ51、Q52のオフ時のコレクタ−エミッタ間電圧は正弧波状となり、トランスT51の一次コイルNp51、二次コイルNs51の電圧波形は正弧波となる。チョ−クコイルL51は、後に述べるDC−DCコンバ−タに接続され、昇圧トランスT51の出力側にはCFL1が接続されている。このインバ−タの自励発振により、出力側には正弧波状の高電圧が数十KHz単位の周波数で現れ、冷陰極管CFL1が点灯する。IC51はDC−DCコンバ−タを構成するスイッチング作動用のPNPトランジスタQ53のベ−ス回路を制御する集積回路(IC)であり降圧型チョッパ−回路として動作する。
【0003】
このICは、三角波を発生する発信器OSCと、2つの比較用演算増幅器A51と演算増幅器A52と、発振器OSCと演算増幅器A51かA52のいずれか一方の出力電圧とを比較するPWMコンパレ−タCOMPと、このPWMコンパレ−タにより駆動され、前記スイッチング動作用のPNPトランジスタQ53のベ−スを駆動する出力トランジスタQ54とを有する。このICは、前記のように発振器OSCと比較する他方のPWMコンパレ−タ入力回路には2つの演算増幅器A51、A52が接続されているが、これら2つの演算増幅器の内の出力電圧が高い方の電圧と発振器OSCの出力とが比較される。なお、前記の構成を有するICをここでDC−DCコンバ−タ制御用ICと定義し、またこれを他の用途に使用しても、内部の構成が変わらない限りDC−DCコンバ−タ制御用ICと呼ぶことにする。D51はフライホイ−ルダイオ−ド、L52はチョ−クコイルである。C52はコンデンサであり、チョ−クコイルL52とコンデンサC52でLCフィルタを構成する。R51、C53は発振周波数決定用のコンデンサと抵抗、R52、C54、R53、C55は、DC−DCコンバ−タ制御用ICIC51の演算増幅器A51、A52の位相補正用C、R素子である。ダイオ−ドD52、D53はCFL1に流れる放電電流の正の成分を整流するためのものである。R54、C56は電流波形を整流するためのロ−パスフィルタを構成する抵抗とコンデンサである。このフィルタ出力はDC−DCコンバ−タ制御用IC1C51の演算増幅器A52の+入力端に接続される。
【0004】
すなわちコンデンサC56の両端には放電電流の正のサイクルの平均値に比例した電圧が得られ、この電圧とDC−DCコンバ−タ制御用ICIC51内部の基準電圧とが演算増幅器A52で比較され、両者の差電圧に比例した出力電圧が得られる。図9に示すように、この出力電圧とDC−DCコンバ−タ制御用ICIC51の発振器OSCの三角波出力とがPWMコンパレ−タで比較される。すなわち放電電流が何等かの原因で増加すると、エラ−アンプとなる演算増幅器A52の出力電圧はBラインからAラインに移行する。その結果、PWMコンパレ−タの出力はCラインからDラインへと変化する。すなわち出力トランジスタであるスイッチング作動用のPNP型トランジスタQ53のオン時間は狭くなり、DC−DCコンバ−タの出力電圧は減少し、ロイヤ−発振回路の電源電圧が下がることになるので、放電電流は減少する。従って、放電電流の定電流制御を可能としている。R55、R56はDC−DCコンバ−タの出力電圧を定電圧化するための抵抗であり、これはCFL1を接続しない時、または放電を開始する以前の昇圧トランスT51の二次コイルNs51の電圧を定電圧化するためのDC−DCコンバ−タ出力電圧検出用の抵抗である。抵抗R55、R56の接続点はDC−DCコンバ−タ制御用ICIC51の演算増幅器A51+入力端に接続され、負帰還ル−プを構成し、DC−DCコンバ−タの出力電圧を定電圧化している。演算増幅器A51、A52の出力はOR接続されているので、演算幅器A51、A52の出力電圧の高い方が優先されてPWMコンパレ−タに入力される。
【0005】
【発明が解決しようとする問題点】
上記のような従来のインバ−タ装置の電力変換効率には、限界があることが知られている。なぜならば、インバ−タ装置の総合効率ηは、
η=(コンバ−タ部分の効率)*(インバ−タ部分の効率)
となり、総合効率ηを上げるためには、それぞれの効率を高める必要があった。例えば、DC−DCコンバ−タの効率悪化の最大原因は、スイッチング用トランジスタQ53、ダイオ−ドD51のスイッチング損失、チョ−クコイルL52の銅損である。従って、これらの損失をゼロにすることはできない。また、上述した従来のインバ−タ装置は部品数も多く、小型化、低価格化を図ることがかなり難しい。
【0006】
そこで本発明は、上述のような従来の不都合を解消しょうとするものであり、この目的は可及的に効率を向上することができるような、また広い範囲で電流制御が可能なインバ−タ装置であって、部品点数を極力減ずることができるようなインバ−タを提供しようとするものである。
【0007】
【問題点を解決するための手段】
本願発明の目的を達成するために、本願は、直流電源から供給される直流電力をスイッチング素子の動作により、交流に変換して昇圧し冷陰極管を点灯するインバ−タ装置において、 昇圧トランスの一次側のインダクタンスと、これと直列に接続したコンデンサとで構成した共振回路と、該共振回路を流れる電流をオン・オフするスイッチング素子と、該スイッチング素子を該共振周波数より進み位相でスイッチング制御するスイッチング制御手段とで、正弦波状の共振電流を得る準E級電圧共振型インバータを基本的な構成として有する。
【0008】
これに加えて、本発明は、前記昇圧トランスの二次側に巻かれた帰還コイルの出力を前記スイッチング制御手段の入力側に負帰還せしめて出力の安定化を図る負帰還回路と、前記昇圧トランスの二次側に負荷量を検出する検知手段を設け、前記制御手段は該検知手段の信号を受けて負荷を流れる電流が所定値より大きくなる程、前記スイッチング素子のスイッチング周波数を高くして負荷に流れる電流を抑圧すると共に負荷を流れる電流が所定値より小さくなる程、前記スイッチング素子のスイッチング周波数を低くして負荷に流れる電流を増加する電流制御手段と、を具備してなるインバータ装置を提供する。
【0009】
【作用】
本発明に係るインバ−タ装置は、準E級電圧共振型インバ−タであるためパワ−スイッチング素子1個のみで構成でき、かつ基本的な準E級電圧共振型回路を用いたインバ−タに比べ、インダクタとコンデンサ各1個を省略することができるため、効率が高く、部品数の大幅な減少が可能である。
【0010】
【実施例】
本発明の一実施例を図面を用いて詳細に説明にする。図1は冷陰極管CFL1を負荷とした場合のインバ−タ装置の回路図である。図1から分かるように、本発明ではパワ−MOSFETQ1、チョ−クコイルL1、電圧共振用コンデンサC1をもった回路を準E級電圧共振型インバ−タとして作用させる。この準E級電圧共振型インバ−タにより発生した高周波交流電圧を昇圧トランスT1で昇圧した後、CFL1を直接駆動している。準E級電圧共振型インバ−タはパワ−スイッチング素子に流れる電流とスイッチに印加される電圧が共に正弦波の一部になり、正弦波出力が可能のインバ−タとして知られている。
【0011】
以下、図2を用いて準E級電圧共振型インバ−タの動作原理を説明する。図2は準E級電圧共振型インバ−タの基本回路である。この図面において、リアクトルL31はチョ−クコイルであり、その電流が近似的に直流I31となる。インダクタL32とコンデンサC32は共振回路を構成する。スイッチS31のオン・オフ動作によって、インダクタL32、コンデンサC32及び抵抗器R31の同調回路にパルス状の電圧が印加される。スイッチS31のオン・オフ周波数、すなわちスイッチング周波数をインダクタL32とコンデンサC32との共振周波数より少し高い周波数とすれば、前記同調回路を流れる電流I32は近似的に正弦波となる。この場合、前記同調回路は誘導性リアクタンスを持ち、前記同調回路に流れる電流は電圧に対して位相が遅れる。ここでダイオ−ドD31、コンデンサC31及びスイッチS31の並列回路の電流I33も、I31=I32+I33であることからI32が正弦波であるので、正弦波となる。
【0012】
図3の(a)にスイッチのデユ−ティが50%の時のE級共振インバ−タ動作波形を示す。スイッチS31がタ−ンオフされると正弦波の電流はコンデンサC31を流れ、コンデンサC31が電流I35で充電され、電圧V31が零から正弦波状に上昇する。そのためスイッチのタ−ンオフは零電圧、非零電流スイッチングとなる。最適負荷Roptでは、図3(a)に示すようにスイッチの電圧V31は零に近い勾配dV31/dtで零に降下し、V31=0、かつdV31/dt=0となった時点で、スイッチS31がタ−ンオンされる。負荷抵抗が最適抵抗Roptより小さい場合、図3(b)に示すように、スイッチの電圧V31は大きな勾配dV31/dtで零に降下し、並列の逆方向ダイオ−ドD31がオンとなる。スイッチの電圧V31は零電圧にクランプされ、この間スイッチS31がタ−ンオンされる。これは準E級動作であり、電圧共振スイッチと同様で零電圧スイッチングとなる。スイッチングレギュレ−タとして動作させる場合、負荷、入力電圧の可変範囲全体に亘ってE級動作させることはできず、準E級動作となる。R−L−C同調回路のインピ−ダンスはスイッチング周波数に敏感であるため、スイッチング周波数変調により、出力電圧V32(=I32)を制御した場合、スイッチング周波数の変化が少ないという利点を持つ。
【0013】
次に、上記の準E級電圧共振形インバ−タ基本回路から本発明の回路への導出過程について説明する。図4(a)は、準E級電圧共振型CFLインバ−タの基本回路を示す。PGはパワ−MOSFETQ1を駆動するパルス発振器、C33はパラストコンデンサである。図4(b)はバラストコンデンサC33を昇圧トランスT1の一次側に変換した場合を示す。トランスT1の昇圧比をnとするとコンデンサC34は、C34=n2 ×C33となる。次に昇圧トランスとコンデンサC34の下側の接続点を入力電源の−側から+側へ移動すると図4(c)になる。次にコンデンサC32を取り去り、チョ−クコイルL31の下側の端子を共振インダクタL32の左側から右側へ移動すると図4(d)になる。次にチョ−クコイルLをトランスT1に含めると、図4(e)になる。以上により、本発明の回路が導出された。
【0014】
本発明の実施例を示す図1において、昇圧トランスT1は一次コイルNp1、二次コイルNs1、帰還コイルNf1を備えている。Q1はNチャンネルのパワ−MOSFETである。コイルL1と昇圧トランスT1のリ−ケ−ジインダクタンスLgの直列合成インダクタンスとコンデンサC1と3の直列合成キャパシタンスは共振回路を構成し、CFL1はその共振回路と直列に接続される。該共振回路の共振周波数FRは下式の通り

Figure 0003547837
となる。但し、C3はバラストコンデンサC2のトランス一次換算値で、C3=n2×C2となる。nは昇圧トランスT1の昇圧比である。C1は電圧共振キャパシタである。チョ−クコイルL1と電圧共振用キャパシタC1によりパワ−MOSFETQ1のオフ時のドレインとソ−ス間電圧は正弦状になる。IC1はパワ−MOSFETQ1のゲ−ト回路を制御する電圧共振型スイッチング用ICである。この電圧共振型スイッチング用ICは電圧制御発振器(VCO)と演算増幅器A1とスイッチング周波数変調回路(PFM)とこのスイッチング周波数変調回路(PFM)により駆動され、パワ−MOSFETQ1のゲ−トを駆動するFETDRIVERよりなる。R4、C7は電圧共振型スイッチング用ICであるIC1の演算増幅器A1の位相補正用の抵抗とコンデンサである。R5、C8は上記IC1の内部にある電圧制御発振器(VCO)の発振周波決定用のC−R素子である。R6、R7は上記IC1の演算増幅器A1−入力端子のDCバイアス用の抵抗である。R1はパワ−MOSFETQ1のゲ−トドライブ抵抗である。D1はゲ−ト蓄積電荷引き抜き用のスピ−ドアップダイオ−ドである。抵抗R3によりランプ電流が検出され、ダイオ−ドD3とコンデンサC4によりランプ電流の正のサイクルが検出され、直流化される。その出力はランプ電流設定用可変抵抗器VR1、抵抗R8を介して上記IC1の演算増幅器A1+入力端に入力される。すなわち可変抵抗VR1のセンタ−タップには、放電電流の正のサイクルの平均値に比例した電圧が得られ、この電圧と上記IC1の内部基準電圧とが演算増幅器A1で比較され、両者の差電圧に比例した出力電圧が得られる。この出力電圧は電圧制御発振器(VCO)の入力端子に接続されていて、電圧制御発振器(VCO)の発振周波数を制御する。すなわち、放電電流が何等かの原因で増加すると演算増幅器A1の出力は上昇し、電圧制御発振器(VCO)の発振周波数は上昇する。電圧制御発振器(VCO)の出力の立ち下がりで、単安定マルチバイブレ−タ(ONESHOT)はセットされ、その出力はハイレベルとなる。抵抗R2とコンデンサC5は、単安定マルチバイブレ−タ(ONESHOT)の出力パルス幅決定用で、その時定数で定まる期間の出力をハイレベルに保つ。
【0015】
図5(b)におけるToffは、チョ−クコイルL1、昇圧トランスT1の一次インダクタンス、電圧共振用コンデンサC1等のバラツキや温度変化による共振周波数の変動を考慮して、準E級動作が満足されるように設定する。すなわち図5に示すように、前記Toffは一定のまま発振周波数が上昇するので、スイッチのオン時間が減少し、その結果CFL1に供給される電流が減少し、定電流制御が保たれる。ランプ電流が減少すると演算増幅器A1の出力は低下し、電圧制御発振器(VCO)の発振周波数は低くなり、定電流制御が行われる。
【0016】
入力電圧が変動した場合に放電電流を一定に保つ(定電流制御)ため、また放電電流の調光のためにパルス周波変調(PFM)を行うことにより、パルス変調(PWM)に比べて、インバ−タの動作範囲を広くとることが出来る。
【0017】
CFLが放電を開始するためには、約1KV程度の高電圧をこれに印加する必要がある。これを開放電圧というが、該開放電圧の設定方法としては図6に示すように昇圧トランスT1の二次コイルNs1の電圧を抵抗R20、R21で分圧し、ダイオ−ドD20、コンデンサC20により直流化し、電圧共振型スイッチング用ICであるIC1の演算増幅器A1の+入力端子に加える方法が考えられるが、高耐圧の抵抗R20が必要となったり、R20、D20、C20による遅れた時定数による負帰還ル−プの不安定性が増す等の欠点を有する。この問題を解決するために、図1に示すように、昇圧トランス1に帰還コイルNf1を設け、この帰還コイルNf1の電圧をダイオ−ドD2、コンデンサC6により直流化し、抵抗R11、R12で分圧した後、抵抗R9を介して前記IC1の演算増幅器A1の+入力端子に入力して帰還を掛ける。二次コイルNs1の巻数、電圧をそれぞれNs、Vs、帰還コイルNf1の巻数、電圧をそれぞれNf、Vfとすると、二次コイルNs1の電圧Vs=(Ns/nf)Vfなので、Vfを安定化することにより入力される直流電圧の値にかかわらず、Vsを一定化できる。またNfの電圧は演算増幅器A1の入力電圧と同レベルでよいので、電圧も低くてよく、位相遅れも生じない。
【0018】
切り替え用トランジスタQ2のコレクタは抵抗R9、R11、R12の接続点に接続されている。CFL1を接続しないとき、または放電を開始する前にはコンデンサC4の両端の電圧は0Vなので、切り替え用トランジスタQ2はオフである。従って、抵抗R9、R11、R12、演算増幅器A1による負帰還により昇圧トランスT1の二次コイルNsの電圧は入力直流電圧にかかわらず、一定となる。CFL1が接続されていて、放電電流が流れているときにコンデンサC4の電圧を0.7V以上に設定することにより切り替え用トランジスタQ2はオンし、抵抗R11、R12による定電圧動作を阻止し、演算増幅器A1による定電流制御のみになる。
【0019】
前記開放電圧の設定方法として、図7に示す実施例を挙げることができる。図7に示すように、昇圧トランスT1の一次コイルNp1の電圧をコンデンサC22、抵抗24で検出し、ダイオ−ドD21、コンデンサC21で直流化し、抵抗R22、R23で分圧して前記IC1の演算増幅器A1に加えるようにしても良い。
【0020】
【発明の効果】
本発明に係るインバ−タ装置は、準E級電圧共振型インバ−タを用いているので、パワ−スイッチング素子1個のみでインバ−タ装置を構成することができ、なおかつインバ−タ装置の効率が高い。また単一のインバ−タで動作するため、部品の大幅な減少が可能であり、インバ−タ装置全体を小型化することができ、更に準E級電圧共振型インバ−タ基本回路に比べて、チョ−クコイル及びコンデンサを各一個省略できるので、コストダウンを実現できる。
【図面の簡単な説明】
【図1】本発明の一実施例を示す回路図である。
【図2】準E級の動作を説明するための回路図である。
【図3】準E級の動作を説明するための波形図である。
【図4】本発明を説明するための部分回路図である。
【図5】本発明の動作を説明する波形図である。
【図6】本発明の開放電圧の設定方法を説明するための回路図である。
【図7】本発明の開放電圧の設定方法の実施例を示す回路図である。
【図8】従来例を示す回路図である。
【図9】従来例のPWM動作を説明するための波形図である。
【符号の説明】
T1・・・・・昇圧トランス
CFL1・・・冷陰極管
IC1・・・・DC−DCコンバ−タ制御用IC[0001]
[Industrial application fields]
The present invention relates to an inverter device that supplies electric power to a load that requires a wide range of current control, and particularly to a dimmable cold cathode tube (hereinafter referred to as CFL) that is applied to a so-called high-frequency lighting lighting device. The present invention relates to a suitable inverter device.
[0002]
[Configuration of the prior art and its problems]
The inverter device is a device that exchanges DC power with AC power, and is used in various electrical devices as a so-called reverse conversion device. FIG. 8 is a circuit diagram showing a conventional inverter device used for a discharge tube. In FIG. 8, T51 is a step-up transformer for a loyal oscillator circuit including a primary coil Np51, a secondary coil Ns51, and a feedback coil Mf51. Q51 and Q52 are NPN type switching operation transistors, which together with the boosting transistor T51 constitute a Loyer-oscillation circuit. C51 is a voltage resonance capacitor, and L51 is a choke coil. As a result, the collector-emitter voltage when the transistors Q51 and Q52 are off becomes a positive arc, and the voltage waveforms of the primary coil Np51 and the secondary coil Ns51 of the transformer T51 become a positive arc. The choke coil L51 is connected to a DC-DC converter described later, and CFL1 is connected to the output side of the step-up transformer T51. Due to the self-excited oscillation of the inverter, a positive arc-shaped high voltage appears on the output side at a frequency of several tens of KHz, and the cold cathode tube CFL1 is lit. The IC 51 is an integrated circuit (IC) that controls the base circuit of the PNP transistor Q53 for switching operation constituting the DC-DC converter, and operates as a step-down chopper circuit.
[0003]
This IC is composed of an oscillator OSC for generating a triangular wave, two comparison operational amplifiers A51 and A52, and an oscillator OSC and a PWM comparator COMP that compares the output voltage of one of the operational amplifiers A51 and A52. And an output transistor Q54 which is driven by the PWM comparator and drives the base of the PNP transistor Q53 for switching operation. In this IC, two operational amplifiers A51 and A52 are connected to the other PWM comparator input circuit to be compared with the oscillator OSC as described above. The output voltage of the two operational amplifiers is higher. And the output of the oscillator OSC are compared. Here, the IC having the above-described configuration is defined as a DC-DC converter control IC, and even if it is used for other purposes, the DC-DC converter control is performed as long as the internal configuration does not change. It will be called an IC for use. D51 is a flywheel diode, and L52 is a choke coil. C52 is a capacitor, and the choke coil L52 and the capacitor C52 constitute an LC filter. R51 and C53 are capacitors and resistors for determining the oscillation frequency, and R52, C54, R53 and C55 are C and R elements for phase correction of the operational amplifiers A51 and A52 of the ICIC 51 for DC-DC converter control. Diodes D52 and D53 are for rectifying the positive component of the discharge current flowing through CFL1 . R54 and C56 are a resistor and a capacitor constituting a low-pass filter for rectifying the current waveform. This filter output is connected to the + input terminal of the operational amplifier A52 of the DC-DC converter control IC 1C51.
[0004]
That is, a voltage proportional to the average value of the positive cycle of the discharge current is obtained at both ends of the capacitor C56, and this voltage is compared with the reference voltage in the DC-DC converter control ICIC 51 by the operational amplifier A52. An output voltage proportional to the difference voltage is obtained. As shown in FIG. 9, this output voltage is compared with the triangular wave output of the oscillator OSC of the DC-DC converter control ICIC 51 by the PWM comparator. That is, when the discharge current increases for some reason, the output voltage of the operational amplifier A52 serving as an error amplifier shifts from the B line to the A line. As a result, the output of the PWM comparator changes from the C line to the D line. That is, the on-time of the PNP transistor Q53 for switching operation, which is an output transistor, is narrowed, the output voltage of the DC-DC converter is reduced, and the power supply voltage of the royer oscillation circuit is lowered. Decrease. Therefore, constant current control of the discharge current is possible. R55 and R56 are resistors for making the output voltage of the DC-DC converter constant. This is the voltage of the secondary coil Ns51 of the step-up transformer T51 when the CFL1 is not connected or before the discharge is started. This is a resistor for detecting a DC-DC converter output voltage for making a constant voltage. The connection point of the resistors R55 and R56 is connected to the operational amplifier A51 + input terminal of the DC-DC converter control ICIC51 to form a negative feedback loop, and the output voltage of the DC-DC converter is made constant. Yes. Since the outputs of the operational amplifiers A51 and A52 are OR-connected, the higher output voltage of the operational width units A51 and A52 is prioritized and input to the PWM comparator.
[0005]
[Problems to be solved by the invention]
It is known that there is a limit to the power conversion efficiency of the conventional inverter device as described above. This is because the overall efficiency η of the inverter device is
η = (efficiency of the converter part) * (efficiency of the inverter part)
Therefore, in order to increase the overall efficiency η , it is necessary to increase the efficiency of each. For example, the greatest cause of the efficiency deterioration of the DC-DC converter is the switching transistor Q53, the switching loss of the diode D51, and the copper loss of the choke coil L52. Therefore, these losses cannot be made zero. Further, the above-described conventional inverter device has a large number of parts, and it is very difficult to reduce the size and the price.
[0006]
Accordingly, the present invention is intended to eliminate the above-mentioned conventional disadvantages, and the object of this invention is an inverter that can improve efficiency as much as possible and that can control current in a wide range. It is an apparatus that aims to provide an inverter that can reduce the number of parts as much as possible.
[0007]
[Means for solving problems]
In order to achieve the object of the present invention, the present application relates to an inverter device for converting a DC power supplied from a DC power source into an AC by an operation of a switching element and boosting the cold cathode tube. A resonance circuit composed of an inductance on the primary side and a capacitor connected in series therewith, a switching element for turning on and off the current flowing through the resonance circuit, and switching control of the switching element at a phase that is ahead of the resonance frequency A quasi-E class voltage resonance type inverter that obtains a sinusoidal resonance current with the switching control means is provided as a basic configuration.
[0008]
In addition, the present invention provides a negative feedback circuit for stabilizing the output by negatively feeding back the output of the feedback coil wound on the secondary side of the step-up transformer to the input side of the switching control means, and the step-up transformer. Sensing means for detecting the load amount is provided on the secondary side of the transformer, and the control means increases the switching frequency of the switching element as the current flowing through the load becomes larger than a predetermined value in response to the signal of the sensing means. An inverter device comprising: current control means for suppressing a current flowing through the load and increasing a current flowing through the load by lowering a switching frequency of the switching element as the current flowing through the load becomes smaller than a predetermined value. provide.
[0009]
[Action]
Since the inverter device according to the present invention is a quasi-E class voltage resonance type inverter, it can be constituted by only one power switching element, and an inverter using a basic quasi-E class voltage resonance type circuit. In comparison with the above, since one inductor and one capacitor can be omitted, the efficiency is high and the number of parts can be greatly reduced.
[0010]
【Example】
An embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a circuit diagram of an inverter device when the cold cathode fluorescent lamp CFL1 is used as a load. As can be seen from FIG. 1, in the present invention, a circuit having a power MOSFET Q1, a choke coil L1, and a voltage resonance capacitor C1 is operated as a quasi-E class voltage resonance inverter. After the high-frequency AC voltage generated by the quasi-E class voltage resonance type inverter is boosted by the boosting transformer T1, the CFL1 is directly driven. The quasi-E class voltage resonance type inverter is known as an inverter capable of outputting a sine wave because both the current flowing through the power switching element and the voltage applied to the switch are part of the sine wave.
[0011]
Hereinafter, the operation principle of the quasi-E class voltage resonance type inverter will be described with reference to FIG. FIG. 2 is a basic circuit of a quasi-E class voltage resonance type inverter. In this drawing, a reactor L31 is a choke coil, and its current is approximately a direct current I31. The inductor L32 and the capacitor C32 constitute a resonance circuit. A pulse voltage is applied to the tuning circuit of the inductor L32, the capacitor C32, and the resistor R31 by the on / off operation of the switch S31. If the on / off frequency of the switch S31, that is, the switching frequency is set to be slightly higher than the resonance frequency of the inductor L32 and the capacitor C32, the current I32 flowing through the tuning circuit is approximately a sine wave. In this case, the tuning circuit has inductive reactance, and the current flowing through the tuning circuit is delayed in phase with respect to the voltage. Here, the current I33 of the parallel circuit of the diode D31, the capacitor C31, and the switch S31 is also a sine wave because I32 is a sine wave because I31 = I32 + I33.
[0012]
FIG. 3 (a) shows a class E resonance inverter operation waveform when the switch duty is 50%. When the switch S31 is turned off, the sine wave current flows through the capacitor C31, the capacitor C31 is charged with the current I35, and the voltage V31 rises from zero to a sine wave. Therefore, the switch turn-off is zero voltage, non-zero current switching. At the optimum load Ropt, as shown in FIG. 3A, the voltage V31 of the switch drops to zero with a gradient dV31 / dt close to zero, and when V31 = 0 and dV31 / dt = 0, the switch S31 Is turned on. When the load resistance is smaller than the optimum resistance Ropt, as shown in FIG. 3B, the switch voltage V31 drops to zero with a large gradient dV31 / dt, and the parallel reverse diode D31 is turned on. The switch voltage V31 is clamped to zero voltage, and the switch S31 is turned on during this time. This is a quasi-E class operation, and is zero voltage switching similar to a voltage resonance switch. When operating as a switching regulator, class E operation cannot be performed over the entire variable range of the load and input voltage, and quasi class E operation is performed. Since the impedance of the RLC tuning circuit is sensitive to the switching frequency, when the output voltage V32 (= I32) is controlled by switching frequency modulation, there is an advantage that the change of the switching frequency is small.
[0013]
Next, the derivation process from the quasi-E class voltage resonance type inverter basic circuit to the circuit of the present invention will be described. FIG. 4A shows a basic circuit of a quasi-E class voltage resonance type CFL inverter. PG is a pulse oscillator, C 33 for driving the power -MOSFETQ1 is Palast capacitor. FIG. 4B shows a case where the ballast capacitor C33 is converted to the primary side of the step-up transformer T1. When the step-up ratio of the transformer T1 is n, the capacitor C34 becomes C34 = n2 × C33. Next, when the lower junction of the step-up transformer and the capacitor C34 is moved from the negative side to the positive side of the input power supply, FIG. 4C is obtained. Next, when the capacitor C32 is removed and the lower terminal of the choke coil L31 is moved from the left side to the right side of the resonant inductor L32, FIG. 4D is obtained. Next, when the choke coil L is included in the transformer T1, FIG. 4 (e) is obtained. Thus, the circuit of the present invention has been derived.
[0014]
In FIG. 1 showing an embodiment of the present invention, a step-up transformer T1 includes a primary coil Np1, a secondary coil Ns1, and a feedback coil Nf1. Q1 is an N-channel power MOSFET. The series combined inductance of the leakage inductance Lg of the coil L1 and the step-up transformer T1 and the series combined capacitance of the capacitors C1 and C3 constitute a resonance circuit, and the CFL1 is connected in series with the resonance circuit. The resonance frequency FR of the resonance circuit is as follows :
Figure 0003547837
It becomes. However, C3 is a transformer primary conversion value of the ballast capacitor C2, and C3 = n2 × C2. n is the step-up ratio of the step-up transformer T1. C1 is a voltage resonance capacitor. Due to the choke coil L1 and the voltage resonance capacitor C1, the voltage between the drain and the source when the power MOSFET Q1 is OFF becomes sinusoidal. IC1 is a voltage resonance type switching IC for controlling the gate circuit of the power MOSFET Q1. This voltage resonance type switching IC is driven by a voltage controlled oscillator ( VCO ), an operational amplifier A1, a switching frequency modulation circuit (PFM), and this switching frequency modulation circuit (PFM), and FETDRIVER for driving the gate of the power MOSFET Q1. It becomes more. R4 and C7 are resistors and capacitors for phase correction of the operational amplifier A1 of IC1, which is a voltage resonance type switching IC. R5 and C8 are CR elements for determining the oscillation frequency of the voltage controlled oscillator (VCO) inside the IC1. R6 and R7 are resistances for DC bias of the operational amplifier A1-input terminal of the IC1. R1 is a gate drive resistance of the power MOSFET Q1. D1 is a speed-up diode for extracting the gate accumulated charge. The lamp current is detected by the resistor R3, and the positive cycle of the lamp current is detected by the diode D3 and the capacitor C4, and is converted into a direct current. The output is input to the operational amplifier A1 + input terminal of the IC1 through the lamp current setting variable resistor VR1 and the resistor R8. That is, a voltage proportional to the average value of the positive cycle of the discharge current is obtained at the center tap of the variable resistor VR1, and this voltage and the internal reference voltage of the IC1 are compared by the operational amplifier A1, and the difference voltage between the two is obtained. An output voltage proportional to is obtained. This output voltage is connected to the input terminal of the voltage controlled oscillator (VCO) and controls the oscillation frequency of the voltage controlled oscillator (VCO). That is, when the discharge current increases for some reason, the output of the operational amplifier A1 increases and the oscillation frequency of the voltage controlled oscillator (VCO) increases. At the fall of the output of the voltage controlled oscillator (VCO), the monostable multivibrator (ONESHOT) is set, and its output becomes high level. The resistor R2 and the capacitor C5 are for determining the output pulse width of the monostable multivibrator (ONESHOOT), and keep the output during a period determined by the time constant at a high level .
[0015]
In FIG. 5B, Toff satisfies the quasi-E operation in consideration of variations in the primary inductance of the choke coil L1, the step-up transformer T1, the voltage resonance capacitor C1, etc., and fluctuations in the resonance frequency due to temperature changes. Set as follows. That is, as shown in FIG. 5, since the oscillation frequency rises while Toff remains constant, the on-time of the switch decreases, and as a result, the current supplied to CFL1 decreases and constant current control is maintained. When the lamp current decreases, the output of the operational amplifier A1 decreases, the oscillation frequency of the voltage controlled oscillator (VCO) decreases, and constant current control is performed.
[0016]
In order to keep the discharge current constant when the input voltage fluctuates (constant current control), and by performing pulse frequency modulation (PFM) for dimming the discharge current, compared to pulse modulation (PWM), -The operating range of the data can be widened.
[0017]
In order for the CFL to start discharging, a high voltage of about 1 KV needs to be applied thereto. This is called an open circuit voltage. As shown in FIG. 6, the open circuit voltage is set by dividing the voltage of the secondary coil Ns1 of the step-up transformer T1 by resistors R20 and R21 and converting it into a direct current by a diode D20 and a capacitor C20. A method of adding to the positive input terminal of the operational amplifier A1 of the IC 1 that is a voltage resonance type switching IC is conceivable. However, a high withstand voltage resistor R20 is required, or negative feedback due to a delayed time constant by R20, D20, and C20. It has drawbacks such as increased loop instability. In order to solve this problem, as shown in FIG. 1, a feedback coil Nf1 is provided in the step-up transformer 1, the voltage of the feedback coil Nf1 is converted into a direct current by a diode D2 and a capacitor C6, and divided by resistors R11 and R12. After that, it is input to the positive input terminal of the operational amplifier A1 of the IC1 through the resistor R9 and fed back. When the number of turns and voltage of the secondary coil Ns1 are Ns and Vs, respectively, and the number of turns and voltage of the feedback coil Nf1 are Nf and Vf, respectively, the voltage Vs of the secondary coil Ns1 is Vs = (Ns / nf) Vf. Therefore, Vs can be made constant regardless of the value of the input DC voltage. Further, since the voltage Nf may be at the same level as the input voltage of the operational amplifier A1, the voltage may be low and no phase delay will occur.
[0018]
The collector of the switching transistor Q2 is connected to the connection point of the resistors R9, R11, and R12. Since the voltage across the capacitor C4 is 0 V when the CFL1 is not connected or before the discharge is started, the switching transistor Q2 is off. Therefore, the voltage of the secondary coil Ns of the step-up transformer T1 is constant regardless of the input DC voltage due to the negative feedback by the resistors R9, R11, R12 and the operational amplifier A1. When CFL1 is connected and the discharge current is flowing, the switching transistor Q2 is turned on by setting the voltage of the capacitor C4 to 0.7 V or more, and the constant voltage operation by the resistors R11 and R12 is prevented, and the calculation is performed. Only constant current control by the amplifier A1 is performed.
[0019]
As an example of the method for setting the open circuit voltage, the embodiment shown in FIG. As shown in FIG. 7, the voltage of the primary coil Np1 of the step-up transformer T1 is detected by a capacitor C22 and a resistor 24, converted into a direct current by a diode D21 and a capacitor C21, and divided by resistors R22 and R23, and the operational amplifier of the IC1 You may make it add to A1.
[0020]
【The invention's effect】
Since the inverter apparatus according to the present invention uses a quasi-E class voltage resonance type inverter, the inverter apparatus can be configured with only one power switching element, and the inverter apparatus High efficiency. In addition, since it operates with a single inverter, the number of components can be greatly reduced, the entire inverter device can be reduced in size, and compared with the quasi-E class voltage resonance type inverter basic circuit. Since one choke coil and one capacitor can be omitted, the cost can be reduced.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing an embodiment of the present invention.
FIG. 2 is a circuit diagram for explaining a quasi-E class operation;
FIG. 3 is a waveform diagram for explaining a quasi-E class operation;
FIG. 4 is a partial circuit diagram for explaining the present invention.
FIG. 5 is a waveform diagram for explaining the operation of the present invention.
FIG. 6 is a circuit diagram for explaining a method for setting an open-circuit voltage according to the present invention.
FIG. 7 is a circuit diagram showing an embodiment of an open-circuit voltage setting method according to the present invention.
FIG. 8 is a circuit diagram showing a conventional example.
FIG. 9 is a waveform diagram for explaining a conventional PWM operation.
[Explanation of symbols]
T1 ... step-up transformer CFL1 ... cold cathode tube IC1 ... DC-DC converter control IC

Claims (1)

直流電源から供給される直流電力をスイッチング素子の動作により、交流に変換して昇圧し冷陰極管を点灯するインバ−タ装置において、
昇圧トランスの一次側のインダクタンスと、これと直列に接続したコンデンサとで構成した共振回路と、該共振回路を流れる電流をオン・オフするスイッチング素子と、該スイッチング素子を共振周波数より進み位相でスイッチング制御するスイッチング制御手段とで、正弦波状の共振電流を得る準E級電圧共振型インバータ回路と、
前記昇圧トランスの二次側に巻かれた帰還コイルの出力を前記スイッチング制御手段の入力側に負帰還せしめて出力の安定化を図る負帰還回路と、
前記昇圧トランスの二次側に負荷量を検出する検知手段を設け、前記制御手段は該検知手段の信号を受けて負荷を流れる電流が所定値より大きくなる程、前記スイッチング素子のスイッチング周波数を高くして負荷に流れる電流を抑圧すると共に負荷を流れる電流が所定値より小さくなる程、前記スイッチング素子のスイッチング周波数を低くして負荷に流れる電流を増加する電流制御手段と、
を具備してなるインバータ装置。
In an inverter device for converting a DC power supplied from a DC power source into an AC voltage by an operation of a switching element to boost the cold cathode tube ,
A resonant circuit composed of an inductance on the primary side of the step-up transformer and a capacitor connected in series therewith, a switching element for turning on / off the current flowing through the resonant circuit , and switching the switching element at a phase that is ahead of the resonance frequency. A quasi-E class voltage resonance inverter circuit that obtains a sinusoidal resonance current with switching control means for controlling;
A negative feedback circuit for stabilizing the output by negatively feeding back the output of the feedback coil wound on the secondary side of the step-up transformer to the input side of the switching control means;
Detection means for detecting a load amount is provided on the secondary side of the step-up transformer, and the control means receives the signal from the detection means and increases the switching frequency of the switching element as the current flowing through the load becomes larger than a predetermined value. Current control means for suppressing the current flowing through the load and increasing the current flowing through the load by lowering the switching frequency of the switching element as the current flowing through the load becomes smaller than a predetermined value;
An inverter device comprising:
JP07664895A 1995-03-31 1995-03-31 Inverter device Expired - Fee Related JP3547837B2 (en)

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JP07664895A JP3547837B2 (en) 1995-03-31 1995-03-31 Inverter device
US08/622,370 US5640313A (en) 1995-03-31 1996-03-27 Inverter unit
EP96302110A EP0735658B1 (en) 1995-03-31 1996-03-27 Inverter unit
DE69617305T DE69617305T2 (en) 1995-03-31 1996-03-27 inverter

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EP0735658B1 (en) 2001-11-28
DE69617305D1 (en) 2002-01-10
DE69617305T2 (en) 2002-07-11
JPH08275535A (en) 1996-10-18
EP0735658A2 (en) 1996-10-02
EP0735658A3 (en) 1997-06-04

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