JP3544115B2 - Duty control circuit - Google Patents

Duty control circuit Download PDF

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JP3544115B2
JP3544115B2 JP04058098A JP4058098A JP3544115B2 JP 3544115 B2 JP3544115 B2 JP 3544115B2 JP 04058098 A JP04058098 A JP 04058098A JP 4058098 A JP4058098 A JP 4058098A JP 3544115 B2 JP3544115 B2 JP 3544115B2
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signal
triangular wave
potential
amplitude center
input
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JPH11239044A (en
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琢磨 青山
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Toshiba Corp
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Toshiba Corp
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【０００１】
【発明の属する技術分野】
本発明は、入力信号のデューティを制御するデューティ制御回路に関する。
【０００２】
【従来の技術】
図４に、従来のデューティ制御回路を示す。入力端子１０１を介して、デューティが５０％でない第１の入力クロック信号ＩＮが、バッファ１０５に入力される。入力端子１０３を介して、第１の入力クロック信号ＩＮに対し相補的な差動入力である第２の入力クロック信号ＩＮＢが、バッファ１０５に入力される。
【０００３】
バッファ１０５は、後述する位相差積分回路１１１からの相互に相補関係にある２個の位相差積分値に応じて、第１と第２の入力クロック信号ＩＮ、ＩＮＢのデューティを、ほぼ５０％に補正し、それぞれ第１の出力信号ＯＵＴと第２の出力信号ＯＵＴＢとして、出力端子１０７と１０９に出力される。第２の出力信号ＯＵＴＢは、第１の出力信号ＯＵＴに対し、相補の関係にある。
【０００４】
位相差積分回路１１１は、第１と第２の出力信号ＯＵＴ、ＯＵＴＢにより、ハイの期間とローの期間の差を積分し、相補関係にある２個の位相差積分値を、バッファ１０５に供給する。
【０００５】
【発明が解決しようとする課題】
従来のデューティ制御回路では、制御対象となる入力クロック信号のデューティが一定の場合に効力を発揮し、ほぼ正確に５０％のデューティを持った出力信号が得られる。
【０００６】
しかしながら、この積分型デューティ制御回路では、制御対象となる入力クロック信号のデューティが変化する場合には、対処できない。正しい安定動作点に到達するまでの時間が、一般的に非常に長くなるからである。それゆえ、デューティがノイズ等の影響で、短い期間で変化するような場合（位相差積分回路１１１の位相差積分にかかる時間より短い場合）、回路自体が正帰還動作をし、かえってデューティのずれを増幅することもあり得る。その結果、システムとして動作マージンをなくしていく結果になる。
【０００７】
そこで本発明は、入力信号のデューティが短い期間で変化する場合にもデューティ補正を可能にするデューティ制御回路を提供することを目的とする。
【０００８】
【課題を解決するための手段】
任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成する三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位を抽出する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位を抽出する第２に振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の三角波信号と、この第３の三角波信号と相補的な第４の三角波信号を生成し、前記第３と第４の三角波信号の同相電位が前記第１の振幅中心電位により調整される第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の三角波信号と、この第５の三角波信号と相補的な第６の三角波信号を生成し、前記第５と第６の三角波信号の同相電位が前記第２の振幅中心電位により調整される第２の差動増幅手段とを具備し、
デューティ制御回路の第１と第２の出力端子から出力される第１と第２の出力三角波信号の組み合わせは、所望のデューティに対する前記第１の入力信号のデューティのずれが、負帰還がかかって低減された前記第１と第２の差動増幅手段からの前記三角波信号の組み合わせであることを特徴とする。
【０００９】
【発明の実施の形態】
図１に、本発明のデューティ制御回路の第１の実施の形態の構成を示す。図３に、第１の実施の形態と後述する第２の実施の形態の各構成要素の出力の波形を示す。
【００１０】
入力端子１を介して、デューティが５０％でない第１の入力クロック信号ＩＮが、三角波生成回路７に供給される。入力端子３を介して、第１の入力クロック信号ＩＮに対し相補的な差動入力である第２の入力クロック信号ＩＮＢが、三角波生成回路７に供給される。
【００１１】
三角波生成回路７は、第１の入力クロック信号ＩＮに対応する第１の三角波信号Ｔを生成して、差動増幅回路１９の第１の入力端子１３と、差動増幅回路２７の第３の入力端子２１と、振幅中心電位抽出回路９に供給する。三角波生成回路７は、また第２の入力クロック信号ＩＮＢに対応し、第１の三角波信号Ｔに対し相補的な第２の三角波信号ＴＢを生成し、差動増幅回路１９の第２の入力端子１５と、差動増幅回路２７の第４の入力端子２３と、振幅中心電位抽出回路１１に供給する。
【００１２】
振幅中心電位抽出回路９は、低ゲイン増幅回路であり、第１の三角波信号Ｔの第１の振幅中心電位Ａを抽出し、差動増幅回路１９の第１の制御端子１７に供給する。
【００１３】
振幅中心電位抽出回路１１は、低ゲイン増幅回路であり、第２の三角波信号ＴＢの第２の振幅中心電位ＡＢを抽出し、差動増幅回路２７の第２の制御端子２５に供給する。第２の振幅中心電位ＡＢは、第１の振幅中心電位Ａと相補の関係にある。
【００１４】
差動増幅回路１９は、第１と第２の入力端子１３、１５から入力された第１と第２の三角波信号Ｔ、ＴＢの差動増幅を行い、第１の入力クロック信号ＩＮに対応するデューティが５０％の第３の三角波信号Ｃと、第２の入力クロック信号ＩＮＢに対応し、第１の三角波信号Ｃに対し相補的でデューティが５０％の第４の三角波信号ＣＢを出力する。第３と第４の三角波信号Ｃ、ＣＢの同相電位（振幅中心電位）は、第１の制御端子１７から供給される第１の振幅中心電位Ａによって、調整される。第１の出力端子２９には、第１の三角波信号Ｃが供給される。
【００１５】
差動増幅回路２７は、第３と第４の入力端子２１、２３から入力された第１と第２の三角波信号Ｔ、ＴＢの差動増幅を行い、第１の入力クロック信号ＩＮに対応するデューティが５０％の第５の三角波信号Ｅと、第２の入力クロック信号ＩＮＢに対応し、第５の三角波信号Ｅに対し相補的でデューティが５０％の第６の三角波信号ＥＢを出力しする。第５と第６の三角波信号Ｅ、ＥＢの同相電位（振幅中心電位）は、制御端子２５から供給される第２の振幅中心電位ＡＢによって、調整される。第２の出力端子３１には、第６の三角波信号ＥＢが供給される。
【００１６】
第１の振幅中心電位Ａが第２の振幅中心電位ＡＢより高い場合、第３と第４の三角波信号Ｃ、ＣＢの同相電位は、第２の振幅中心電位ＡＢが入力されると仮定した場合に比べて、小さくなる。
【００１７】
第２の振幅中心電位ＡＢが第１の振幅中心電位Ａより高い場合、第５と第６の三角波信号Ｅ、ＥＢの同相電位は、第１の振幅中心電位Ａが入力されると仮定した場合に比べて、小さくなる。
【００１８】
第１と第２の出力端子２９、３１から出力される第３の三角波信号Ｃと第６の三角波信号ＥＢの組み合わせは、５０％のデューティに対する入力信号のデューティのずれが、負帰還がかかって低減された第１と第２の差動増幅回路１９、２７の出力信号の組み合わせといえる。
【００１９】
本実施の形態では、完全な負帰還ループを形成してはいないので、点線で囲まれたデューティ制御回路５の１段では、５０％のデューティを保証することが出来ない場合がある。
【００２０】
その場合、デューティ制御回路５を何段かカスケード接続すれば、５０％のデューティを保証出来る。
【００２１】
本実施の形態のデューティ制御回路５によれば、１サイクル毎のデューティの変化にも追従し得る。高周波のカップリングノイズなどがのった短い周期でデューティが変化している信号も、本実施の形態のデューティ制御回路５に通せば、デューティが５０％に補正出来ることになり、フィルタの役割を果たすことが出来る。
【００２２】
図２に、本発明のデューティ制御回路の第２の実施の形態の構成を示す。図１と同一構成要素には、同一参照符号を付し詳細な説明は省略する。図３に、各構成要素の出力の波形を示す。
【００２３】
第１と第２の入力端子１３、１５の前段に、レベルシフト回路４１を設ける。レベルシフト回路４１は、第１と第２の三角波信号Ｔ、ＴＢを、差動増幅回路１９の入力範囲にマッチさせ、かつ第１の振幅中心電位Ａとタイミングを合わせる。
【００２４】
第３と第４の入力端子２１、２３の前段に、レベルシフト回路４３を設ける。レベルシフト回路４３は、第１と第２の三角波信号Ｔ、ＴＢを、差動増幅回路２７の入力範囲にマッチさせ、かつ第２の振幅中心電位ＡＢとタイミングを合わせる。
【００２５】
第１の出力端子２９からの第３の三角波信号Ｃと、第２の出力端子３１からの第６の三角波信号ＥＢとを、差動増幅回路４５に供給する。差動増幅回路４５は、第３と第６の三角波信号Ｃ、ＥＢを差動増幅し、第３の出力端子４７に第１の出力三角信号ＯＵＴを、第４の出力端子４９に第２の出力三角信号ＯＵＴＢを、それぞれ供給する。
【００２６】
本実施の形態によれば、第１の実施の形態にくらべ、第１と第２の入力クロック信号のデューティを、より５０％に補正可能である。
【００２７】
それでも、本実施の形態も、完全な負帰還ループを形成してはいないので、点線で囲まれたデューティ制御回路６の１段では、５０％のデューティを保証することが出来ない場合がある。
【００２８】
その場合、デューティ制御回路５を何段かカスケード接続すれば、５０％のデューティを保証出来る。
【００２９】
本実施の形態のデューティ制御回路５によれば、１サイクル毎のデューティの変化にも追従し得る。高周波のカップリングノイズなどがのった短い周期でデューティが変化している信号も、本実施の形態のデューティ制御回路５に通せば、デューティが５０％に補正出来ることになり、ある種のフィルタの役割を果たすことが出来る。
【００３０】
【発明の効果】
以上本発明によれば、入力信号のデューティが短い期間で変化する場合にもデューティ補正が可能となる。
【図面の簡単な説明】
【図１】本発明のデューティ制御回路の第１の実施の形態の構成を示す図である。
【図２】本発明のデューティ制御回路の第２の実施の形態の構成を示す図である。
【図３】図１と図２の各構成要素の出力の信号波形を示す図である。
【図４】従来のデューティ制御回路の構成を示す図である。
【符号の説明】
５、６・・・デューティ制御回路、７・・・三角波生成回路、９、１１・・・振幅中心電位抽出回路、１９、２７、４５・・・差動増幅回路、４１、４３・・・レベルシフト回路。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a duty control circuit that controls a duty of an input signal.
[0002]
[Prior art]
FIG. 4 shows a conventional duty control circuit. A first input clock signal IN whose duty is not 50% is input to the buffer 105 via the input terminal 101. A second input clock signal INB, which is a differential input complementary to the first input clock signal IN, is input to the buffer 105 via the input terminal 103.
[0003]
The buffer 105 reduces the duty of the first and second input clock signals IN and INB to approximately 50% in accordance with two mutually complementary phase difference integrated values from a phase difference integration circuit 111 described later. The output is corrected and output to the output terminals 107 and 109 as a first output signal OUT and a second output signal OUTB, respectively. The second output signal OUTB has a complementary relationship with the first output signal OUT.
[0004]
The phase difference integration circuit 111 integrates the difference between the high period and the low period based on the first and second output signals OUT and OUTB, and supplies two complementary phase difference integrated values to the buffer 105. I do.
[0005]
[Problems to be solved by the invention]
The conventional duty control circuit is effective when the duty of the input clock signal to be controlled is constant, and an output signal having a duty of approximately 50% can be obtained almost exactly.
[0006]
However, this integral duty control circuit cannot cope with a case where the duty of the input clock signal to be controlled changes. This is because the time required to reach the correct stable operating point is generally very long. Therefore, when the duty changes in a short period due to the influence of noise or the like (when the time is shorter than the time required for the phase difference integration of the phase difference integration circuit 111), the circuit itself performs a positive feedback operation, and the deviation of the duty is rather changed. May be amplified. As a result, the operation margin of the system is eliminated.
[0007]
Therefore, an object of the present invention is to provide a duty control circuit that enables duty correction even when the duty of an input signal changes in a short period.
[0008]
[Means for Solving the Problems]
A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; A triangular wave generating means for generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal;
First amplitude center potential extracting means for extracting a first amplitude center potential of the first triangular wave signal;
Second amplitude center potential extracting means for extracting a second amplitude center potential of the second triangular wave signal;
A differential amplification of the first and second triangular wave signals is performed to generate a third triangular wave signal corresponding to the first input signal and a fourth triangular wave signal complementary to the third triangular wave signal. A first differential amplifying means for adjusting an in-phase potential of the third and fourth triangular wave signals by the first amplitude center potential;
Differential amplification of the first and second triangular wave signals is performed to generate a fifth triangular wave signal corresponding to the first input signal and a sixth triangular wave signal complementary to the fifth triangular wave signal. , A second differential amplifying means for adjusting an in-phase potential of the fifth and sixth triangular wave signals by the second amplitude center potential,
In the combination of the first and second output triangular wave signals output from the first and second output terminals of the duty control circuit, the difference between the desired duty and the duty of the first input signal is caused by negative feedback. The reduced combination of the triangular wave signals from the first and second differential amplifying means.
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 shows a configuration of a duty control circuit according to a first embodiment of the present invention. FIG. 3 shows an output waveform of each component of the first embodiment and a second embodiment to be described later.
[0010]
A first input clock signal IN having a duty of not 50% is supplied to the triangular wave generation circuit 7 via the input terminal 1. A second input clock signal INB, which is a differential input complementary to the first input clock signal IN, is supplied to the triangular wave generation circuit 7 via the input terminal 3.
[0011]
The triangular wave generation circuit 7 generates a first triangular wave signal T corresponding to the first input clock signal IN, and outputs the first input terminal 13 of the differential amplifier circuit 19 and the third input terminal 13 of the differential amplifier circuit 27. It is supplied to the input terminal 21 and the amplitude center potential extracting circuit 9. The triangular-wave generating circuit 7 also generates a second triangular-wave signal TB corresponding to the second input clock signal INB and complementary to the first triangular-wave signal T, and a second input terminal of the differential amplifying circuit 19. 15, the fourth input terminal 23 of the differential amplifier circuit 27, and the amplitude center potential extraction circuit 11.
[0012]
The amplitude center potential extracting circuit 9 is a low gain amplifier circuit, extracts the first amplitude center potential A of the first triangular wave signal T, and supplies it to the first control terminal 17 of the differential amplifier circuit 19.
[0013]
The amplitude center potential extracting circuit 11 is a low gain amplifier circuit, extracts the second amplitude center potential AB of the second triangular wave signal TB, and supplies the same to the second control terminal 25 of the differential amplifier circuit 27. The second amplitude center potential AB has a complementary relationship with the first amplitude center potential A.
[0014]
The differential amplifier circuit 19 differentially amplifies the first and second triangular wave signals T and TB input from the first and second input terminals 13 and 15, and corresponds to the first input clock signal IN. A fourth triangular wave signal CB having a duty of 50% and being complementary to the first triangular wave signal C and corresponding to the third triangular wave signal C having a duty of 50% and the second input clock signal INB is output. The in-phase potential (amplitude center potential) of the third and fourth triangular wave signals C and CB is adjusted by the first amplitude center potential A supplied from the first control terminal 17. The first output terminal 29 is supplied with a first triangular wave signal C.
[0015]
The differential amplifier circuit 27 differentially amplifies the first and second triangular wave signals T and TB input from the third and fourth input terminals 21 and 23, and corresponds to the first input clock signal IN. A sixth triangular wave signal EB having a duty of 50% and being complementary to the fifth triangular wave signal E and corresponding to the fifth triangular wave signal E having a duty of 50% and the second input clock signal INB is output. . The in-phase potential (amplitude center potential) of the fifth and sixth triangular wave signals E and EB is adjusted by the second amplitude center potential AB supplied from the control terminal 25. The sixth output terminal 31 is supplied with a sixth triangular wave signal EB.
[0016]
When the first amplitude center potential A is higher than the second amplitude center potential AB, the in-phase potentials of the third and fourth triangular wave signals C and CB are assumed to be the second amplitude center potential AB. It is smaller than
[0017]
When the second amplitude center potential AB is higher than the first amplitude center potential A, the in-phase potentials of the fifth and sixth triangular wave signals E and EB are assuming that the first amplitude center potential A is input. It is smaller than
[0018]
In the combination of the third triangular wave signal C and the sixth triangular wave signal EB output from the first and second output terminals 29 and 31, the difference between the duty of the input signal and the duty of 50% is negative feedback. This can be said to be a reduced combination of the output signals of the first and second differential amplifier circuits 19 and 27.
[0019]
In the present embodiment, since a complete negative feedback loop is not formed, one stage of the duty control circuit 5 surrounded by a dotted line may not be able to guarantee a duty of 50%.
[0020]
In that case, if the duty control circuit 5 is cascaded in several stages, a duty of 50% can be guaranteed.
[0021]
According to the duty control circuit 5 of the present embodiment, it is possible to follow a change in duty for each cycle. A signal whose duty changes in a short cycle with high-frequency coupling noise or the like can be corrected to 50% by passing the signal through the duty control circuit 5 of the present embodiment, and the role of the filter is reduced. I can do it.
[0022]
FIG. 2 shows a configuration of a duty control circuit according to a second embodiment of the present invention. The same components as those in FIG. 1 are denoted by the same reference numerals, and detailed description is omitted. FIG. 3 shows an output waveform of each component.
[0023]
A level shift circuit 41 is provided in a stage preceding the first and second input terminals 13 and 15. The level shift circuit 41 matches the first and second triangular wave signals T and TB with the input range of the differential amplifier circuit 19 and matches the timing with the first amplitude center potential A.
[0024]
A level shift circuit 43 is provided before the third and fourth input terminals 21 and 23. The level shift circuit 43 matches the first and second triangular wave signals T and TB with the input range of the differential amplifier circuit 27, and adjusts the timing with the second amplitude center potential AB.
[0025]
The third triangular wave signal C from the first output terminal 29 and the sixth triangular wave signal EB from the second output terminal 31 are supplied to the differential amplifier circuit 45. The differential amplifier circuit 45 differentially amplifies the third and sixth triangular wave signals C and EB, and outputs the first output triangular signal OUT to a third output terminal 47 and the second output triangular signal OUT to a fourth output terminal 49. An output triangular signal OUTB is supplied.
[0026]
According to the present embodiment, it is possible to correct the duty of the first and second input clock signals to 50% more than in the first embodiment.
[0027]
Nevertheless, also in the present embodiment, since a complete negative feedback loop is not formed, one stage of the duty control circuit 6 surrounded by a dotted line may not be able to guarantee a duty of 50%.
[0028]
In that case, if the duty control circuit 5 is cascaded in several stages, a duty of 50% can be guaranteed.
[0029]
According to the duty control circuit 5 of the present embodiment, it is possible to follow a change in duty for each cycle. A signal whose duty changes in a short cycle with high-frequency coupling noise or the like can be corrected to 50% by passing the signal through the duty control circuit 5 of the present embodiment. Can play a role.
[0030]
【The invention's effect】
As described above, according to the present invention, duty correction can be performed even when the duty of the input signal changes in a short period.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of a first embodiment of a duty control circuit of the present invention.
FIG. 2 is a diagram showing a configuration of a second embodiment of the duty control circuit of the present invention.
FIG. 3 is a diagram showing signal waveforms of outputs of respective components of FIGS. 1 and 2;
FIG. 4 is a diagram showing a configuration of a conventional duty control circuit.
[Explanation of symbols]
5, 6 ... duty control circuit, 7 ... triangular wave generation circuit, 9, 11 ... amplitude center potential extraction circuit, 19, 27, 45 ... differential amplifier circuit, 41, 43 ... level Shift circuit.

Claims (13)

任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成する三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位を抽出する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位を抽出する第２の振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の三角波信号と、この第３の三角波信号と相補的な第４の三角波信号を生成し、前記第３と第４の三角波信号の同相電位が前記第１の振幅中心電位により調整される第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の三角波信号と、この第５の三角波信号と相補的な第６の三角波信号を生成し、前記第５と第６の三角波信号の同相電位が前記第２の振幅中心電位により調整される第２の差動増幅手段とを具備し、
デューティ制御回路の第１と第２の出力端子から出力される第１と第２の出力三角波信号の組み合わせは、所望のデューティに対する前記第１の入力信号のデューティのずれが、負帰還がかかって低減された前記第１と第２の差動増幅手段からの前記三角波信号の組み合わせであることを特徴とするデューティ制御回路。A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; A triangular wave generating means for generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal;
First amplitude center potential extracting means for extracting a first amplitude center potential of the first triangular wave signal;
Second amplitude center potential extracting means for extracting a second amplitude center potential of the second triangular wave signal;
A differential amplification of the first and second triangular wave signals is performed to generate a third triangular wave signal corresponding to the first input signal and a fourth triangular wave signal complementary to the third triangular wave signal. A first differential amplifying means for adjusting an in-phase potential of the third and fourth triangular wave signals by the first amplitude center potential;
Differential amplification of the first and second triangular wave signals is performed to generate a fifth triangular wave signal corresponding to the first input signal and a sixth triangular wave signal complementary to the fifth triangular wave signal. , A second differential amplifying means for adjusting an in-phase potential of the fifth and sixth triangular wave signals by the second amplitude center potential,
In the combination of the first and second output triangular wave signals output from the first and second output terminals of the duty control circuit, the difference between the desired duty and the duty of the first input signal is caused by negative feedback. A duty control circuit comprising a reduced combination of the triangular wave signals from the first and second differential amplifiers. 任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成し、前記第１と第２の入力信号のデューティが５０パーセントを超える場合は、前記第１の三角波信号の振幅中心電位は前記第２の三角波信号の振幅中心電位より高くなり、前記第１と第２の入力信号のデューティが５０パーセントに等しい時は、前記第１の三角波信号の振幅中心電位と前記第２の三角波信号の振幅中心電位が等しくなることを特徴とする三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位に比例した電位を出力する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位に比例した電位を出力する第２の振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の信号と、この第３の信号と相補的な第４の信号を生成し、制御端子に入力される前記第１の振幅中心電位抽出手段の出力電位が高ければ、前記第３と第４の信号の同相電位は前記第１の振幅中心電位が低い場合より下がる第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の信号と、この第５の信号と相補的な第６の信号を生成し、制御端子に入力される前記第２の振幅中心電位抽出手段の出力電位が高ければ、前記第５と第６の信号の同相電位は前記第２の振幅中心電位が低い場合より下がる第２の差動増幅手段とを具備し、
前記第３の信号を第１の出力端子に出力する第１の出力信号とし、前記第６の信号を第２の出力端子に出力する第２の出力信号とすることを特徴とするデューティ制御回路。A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; And generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal, and when the duty of the first and second input signals exceeds 50%, When the amplitude center potential of the first triangular wave signal is higher than the amplitude center potential of the second triangular wave signal, and when the duties of the first and second input signals are equal to 50%, the first triangular wave signal A triangular wave generating means, wherein an amplitude central potential of the signal is equal to an amplitude central potential of the second triangular wave signal;
First amplitude center potential extracting means for outputting a potential proportional to a first amplitude center potential of the first triangular wave signal;
A second amplitude center potential extracting means for outputting a potential proportional to a second amplitude center potential of the second triangular wave signal;
Differential amplifying the first and second triangular wave signals to generate a third signal corresponding to the first input signal and a fourth signal complementary to the third signal; When the output potential of the first amplitude center potential extracting means is higher, the common-mode potential of the third and fourth signals is lower than when the first amplitude center potential is lower. Means,
Performing differential amplification of the first and second triangular wave signals to generate a fifth signal corresponding to the first input signal and a sixth signal complementary to the fifth signal; When the output potential of the second amplitude center potential extracting means is higher, the common-mode potential of the fifth and sixth signals is lower than when the second amplitude center potential is lower. Means,
A duty control circuit, wherein the third signal is a first output signal output to a first output terminal, and the sixth signal is a second output signal output to a second output terminal. . 任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成し、前記第１と第２の入力信号のデューティが５０パーセントを超える場合は、前記第１の三角波信号の振幅中心電位は前記第２の三角波信号の振幅中心電位より低くなり、前記第１と第２の入力信号のデューティが５０パーセントに等しい時は、前記第１の三角波信号の振幅中心電位と前記第２の三角波信号の振幅中心電位が等しくなることを特徴とする三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位に比例した電位を出力する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位に比例した電位を出力する第２の振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の信号と、この第３の信号と相補的な第４の信号を生成し、制御端子に入力される前記第１の振幅中心電位抽出手段の出力電位が高ければ、前記第３と第４の信号の同相電位は前記第１の振幅中心電位が低い場合より下がる第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の信号と、この第５の信号と相補的な第６の信号を生成し、制御端子に入力される前記第２の振幅中心電位抽出手段の出力電位が高ければ、前記第５と第６の信号の同相電位は前記第２の振幅中心電位が低い場合より下がる第２の差動増幅手段とを具備し、
前記第４の信号を第１の出力端子に出力する第１の出力信号とし、前記第５の信号を第２の出力端子に出力する第２の出力信号とすることを特徴とするデューティ制御回路。A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; And generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal, and when the duty of the first and second input signals exceeds 50%, When the amplitude center potential of the first triangular wave signal is lower than the amplitude center potential of the second triangular wave signal, and when the duties of the first and second input signals are equal to 50%, the first triangular wave signal A triangular wave generating means, wherein an amplitude central potential of the signal is equal to an amplitude central potential of the second triangular wave signal;
First amplitude center potential extracting means for outputting a potential proportional to a first amplitude center potential of the first triangular wave signal;
A second amplitude center potential extracting means for outputting a potential proportional to a second amplitude center potential of the second triangular wave signal;
Differential amplifying the first and second triangular wave signals to generate a third signal corresponding to the first input signal and a fourth signal complementary to the third signal; When the output potential of the first amplitude center potential extracting means is higher, the common-mode potential of the third and fourth signals is lower than when the first amplitude center potential is lower. Means,
Performing differential amplification of the first and second triangular wave signals to generate a fifth signal corresponding to the first input signal and a sixth signal complementary to the fifth signal; When the output potential of the second amplitude center potential extracting means is higher, the common-mode potential of the fifth and sixth signals is lower than when the second amplitude center potential is lower. Means,
A duty control circuit, wherein the fourth signal is a first output signal output to a first output terminal, and the fifth signal is a second output signal output to a second output terminal. . 任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成し、前記第１と第２の入力信号のデューティが５０パーセントを超える場合は、前記第１の三角波信号の振幅中心電位は前記第２の三角波信号の振幅中心電位より高くなり、前記第１と第２の入力信号のデューティが５０パーセントに等しい時は、前記第１の三角波信号の振幅中心電位と前記第２の三角波信号の振幅中心電位が等しくなることを特徴とする三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位に逆比例した電位を出力する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位に逆比例した電位を出力する第２の振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の信号と、この第３の信号と相補的な第４の信号を生成し、制御端子に入力される前記第１の振幅中心電位抽出手段の出力電位が高ければ、前記第３と第４の信号の同相電位は前記第１の振幅中心電位が低い場合より下がる第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の信号と、この第５の信号と相補的な第６の信号を生成し、制御端子に入力される前記第２の振幅中心電位抽出手段の出力電位が高ければ、前記第５と第６の信号の同相電位は前記第２の振幅中心電位が低い場合より下がる第２の差動増幅手段とを具備し、
前記第４の信号を第１の出力端子に出力する第１の出力信号とし、前記第５の信号を第２の出力端子に出力する第２の出力信号とすることを特徴とするデューティ制御回路。A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; And generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal, and when the duty of the first and second input signals exceeds 50%, When the amplitude center potential of the first triangular wave signal is higher than the amplitude center potential of the second triangular wave signal, and when the duties of the first and second input signals are equal to 50%, the first triangular wave signal A triangular wave generating means, wherein an amplitude central potential of the signal is equal to an amplitude central potential of the second triangular wave signal;
First amplitude center potential extracting means for outputting a potential inversely proportional to a first amplitude center potential of the first triangular wave signal;
Second amplitude center potential extracting means for outputting a potential inversely proportional to a second amplitude center potential of the second triangular wave signal;
Differential amplifying the first and second triangular wave signals to generate a third signal corresponding to the first input signal and a fourth signal complementary to the third signal; When the output potential of the first amplitude center potential extracting means is higher, the common-mode potential of the third and fourth signals is lower than when the first amplitude center potential is lower. Means,
Performing differential amplification of the first and second triangular wave signals to generate a fifth signal corresponding to the first input signal and a sixth signal complementary to the fifth signal; When the output potential of the second amplitude center potential extracting means is higher, the common-mode potential of the fifth and sixth signals is lower than when the second amplitude center potential is lower. Means,
A duty control circuit, wherein the fourth signal is a first output signal output to a first output terminal, and the fifth signal is a second output signal output to a second output terminal. . 任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成し、前記第１と第２の入力信号のデューティが５０パーセントを超える場合は、前記第１の三角波信号の振幅中心電位は前記第２の三角波信号の振幅中心電位より高くなり、前記第１と第２の入力信号のデューティが５０パーセントに等しい時は、前記第１の三角波信号の振幅中心電位と前記第２の三角波信号の振幅中心電位が等しくなることを特徴とする三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位に比例した電位を出力する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位に比例した電位を出力する第２の振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の信号と、この第３の信号と相補的な第４の信号を生成し、制御端子に入力される前記第１の振幅中心電位抽出手段の出力電位が高ければ、前記第３と第４の信号の同相電位は前記第１の振幅中心電位が低い場合より上がる第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の信号と、この第５の信号と相補的な第６の信号を生成し、制御端子に入力される前記第２の振幅中心電位抽出手段の出力電位が高ければ、前記第５と第６の信号の同相電位は前記第２の振幅中心電位が低い場合より上がる第２の差動増幅手段とを具備し、
前記第４の信号を第１の出力端子に出力する第１の出力信号とし、前記第５の信号を第２の出力端子に出力する第２の出力三角波信号とすることを特徴とするデューティ制御回路。A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; And generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal, and when the duty of the first and second input signals exceeds 50%, When the amplitude center potential of the first triangular wave signal is higher than the amplitude center potential of the second triangular wave signal, and when the duties of the first and second input signals are equal to 50%, the first triangular wave signal A triangular wave generating means, wherein an amplitude central potential of the signal is equal to an amplitude central potential of the second triangular wave signal;
First amplitude center potential extracting means for outputting a potential proportional to a first amplitude center potential of the first triangular wave signal;
A second amplitude center potential extracting means for outputting a potential proportional to a second amplitude center potential of the second triangular wave signal;
Differential amplifying the first and second triangular wave signals to generate a third signal corresponding to the first input signal and a fourth signal complementary to the third signal; When the output potential of the first amplitude center potential extracting means is higher, the common-mode potential of the third and fourth signals is higher than when the first amplitude center potential is lower. Means,
Performing differential amplification of the first and second triangular wave signals to generate a fifth signal corresponding to the first input signal and a sixth signal complementary to the fifth signal; When the output potential of the second amplitude center potential extracting means is higher, the in-phase potential of the fifth and sixth signals is higher than when the second amplitude center potential is lower. Means,
A duty control, wherein the fourth signal is a first output signal output to a first output terminal, and the fifth signal is a second output triangular wave signal output to a second output terminal. circuit. 任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成し、前記第１と第２の入力信号のデューティが５０パーセントを超える場合は、前記第１の三角波信号の振幅中心電位は前記第２の三角波信号の振幅中心電位より低くなり、前記第１と第２の入力信号のデューティが５０パーセントに等しい時は、前記第１の三角波信号の振幅中心電位と前記第２の三角波信号の振幅中心電位が等しくなることを特徴とする三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位に逆比例した電位を出力する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位に逆比例した電位を出力する第２の振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の信号と、この第３の信号と相補的な第４の信号を生成し、制御端子に入力される前記第１の振幅中心電位抽出手段の出力電位が高ければ、前記第３と第４の信号の同相電位は前記第１の振幅中心電位が低い場合より下がる第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の信号と、この第５の信号と相補的な第６の信号を生成し、制御端子に入力される前記第２の振幅中心電位抽出手段の出力電位が高ければ、前記第５と第６の信号の同相電位は前記第２の振幅中心電位が低い場合より下がる第２の差動増幅手段とを具備し、
前記第３の信号を第１の出力端子に出力する第１の出力信号とし、前記第６の信号を第２の出力端子に出力する第２の出力信号とすることを特徴とするデューティ制御回路。A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; And generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal, and when the duty of the first and second input signals exceeds 50%, When the amplitude center potential of the first triangular wave signal is lower than the amplitude center potential of the second triangular wave signal, and when the duties of the first and second input signals are equal to 50%, the first triangular wave signal A triangular wave generating means, wherein an amplitude central potential of the signal is equal to an amplitude central potential of the second triangular wave signal;
First amplitude center potential extracting means for outputting a potential inversely proportional to a first amplitude center potential of the first triangular wave signal;
Second amplitude center potential extracting means for outputting a potential inversely proportional to a second amplitude center potential of the second triangular wave signal;
Differential amplifying the first and second triangular wave signals to generate a third signal corresponding to the first input signal and a fourth signal complementary to the third signal; When the output potential of the first amplitude center potential extracting means is higher, the common-mode potential of the third and fourth signals is lower than when the first amplitude center potential is lower. Means,
Performing differential amplification of the first and second triangular wave signals to generate a fifth signal corresponding to the first input signal and a sixth signal complementary to the fifth signal; When the output potential of the second amplitude center potential extracting means is higher, the common-mode potential of the fifth and sixth signals is lower than when the second amplitude center potential is lower. Means,
A duty control circuit, wherein the third signal is a first output signal output to a first output terminal, and the sixth signal is a second output signal output to a second output terminal. . 任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成し、前記第１と第２の入力信号のデューティが５０パーセントを超える場合は、前記第１の三角波信号の振幅中心電位は前記第２の三角波信号の振幅中心電位より低くなり、前記第１と第２の入力信号のデューティが５０パーセントに等しい時は、前記第１の三角波信号の振幅中心電位と前記第２の三角波信号の振幅中心電位が等しくなることを特徴とする三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位に比例した電位を出力する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位に比例した電位を出力する第２の振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の信号と、この第３の信号と相補的な第４の信号を生成し、制御端子に入力される前記第１の振幅中心電位抽出手段の出力電位が高ければ、前記第３と第４の信号の同相電位は前記第１の振幅中心電位が低い場合より上がる第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の信号と、この第５の信号と相補的な第６の信号を生成し、制御端子に入力される前記第２の振幅中心電位抽出手段の出力電位が高ければ、前記第５と第６の信号の同相電位は前記第２の振幅中心電位が低い場合より上がる第２の差動増幅手段とを具備し、
前記第３の信号を第１の出力端子に出力する第１の出力信号とし、前記第６の信号を第２の出力端子に出力する第２の出力信号とすることを特徴とするデューティ制御回路。A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; And generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal, and when the duty of the first and second input signals exceeds 50%, When the amplitude center potential of the first triangular wave signal is lower than the amplitude center potential of the second triangular wave signal, and when the duties of the first and second input signals are equal to 50%, the first triangular wave signal A triangular wave generating means, wherein an amplitude central potential of the signal is equal to an amplitude central potential of the second triangular wave signal;
First amplitude center potential extracting means for outputting a potential proportional to a first amplitude center potential of the first triangular wave signal;
A second amplitude center potential extracting means for outputting a potential proportional to a second amplitude center potential of the second triangular wave signal;
Differential amplifying the first and second triangular wave signals to generate a third signal corresponding to the first input signal and a fourth signal complementary to the third signal; When the output potential of the first amplitude center potential extracting means is higher, the common-mode potential of the third and fourth signals is higher than when the first amplitude center potential is lower. Means,
Performing differential amplification of the first and second triangular wave signals to generate a fifth signal corresponding to the first input signal and a sixth signal complementary to the fifth signal; When the output potential of the second amplitude center potential extracting means is higher, the in-phase potential of the fifth and sixth signals is higher than when the second amplitude center potential is lower. Means,
A duty control circuit, wherein the third signal is a first output signal output to a first output terminal, and the sixth signal is a second output signal output to a second output terminal. . 任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成し、前記第１と第２の入力信号のデューティが５０パーセントを超える場合は、前記第１の三角波信号の振幅中心電位は前記第２の三角波信号の振幅中心電位より高くなり、前記第１と第２の入力信号のデューティが５０パーセントに等しい時は、前記第１の三角波信号の振幅中心電位と前記第２の三角波信号の振幅中心電位が等しくなることを特徴とする三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位に逆比例した電位を出力する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位に逆比例した電位を出力する第２の振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の信号と、この第３の信号と相補的な第４の信号を生成し、制御端子に入力される前記第１の振幅中心電位抽出手段の出力電位が高ければ、前記第３と第４の信号の同相電位は前記第１の振幅中心電位が低い場合より上がる第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の信号と、この第５の信号と相補的な第６の信号を生成し、制御端子に入力される前記第２の振幅中心電位抽出手段の出力電位が高ければ、前記第５と第６の信号の同相電位は前記第２の振幅中心電位が低い場合より上がる第２の差動増幅手段とを具備し、
前記第３の信号を第１の出力端子に出力する第１の出力信号とし、前記第６の信号を第２の出力端子に出力する第２の出力信号とすることを特徴とするデューティ制御回路。A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; And generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal, and when the duty of the first and second input signals exceeds 50%, When the amplitude center potential of the first triangular wave signal is higher than the amplitude center potential of the second triangular wave signal, and when the duties of the first and second input signals are equal to 50%, the first triangular wave signal A triangular wave generating means, wherein an amplitude central potential of the signal is equal to an amplitude central potential of the second triangular wave signal;
First amplitude center potential extracting means for outputting a potential inversely proportional to a first amplitude center potential of the first triangular wave signal;
Second amplitude center potential extracting means for outputting a potential inversely proportional to a second amplitude center potential of the second triangular wave signal;
Differential amplifying the first and second triangular wave signals to generate a third signal corresponding to the first input signal and a fourth signal complementary to the third signal; When the output potential of the first amplitude center potential extracting means is higher, the common-mode potential of the third and fourth signals is higher than when the first amplitude center potential is lower. Means,
Performing differential amplification of the first and second triangular wave signals to generate a fifth signal corresponding to the first input signal and a sixth signal complementary to the fifth signal; When the output potential of the second amplitude center potential extracting means is higher, the in-phase potential of the fifth and sixth signals is higher than when the second amplitude center potential is lower. Means,
A duty control circuit, wherein the third signal is a first output signal output to a first output terminal, and the sixth signal is a second output signal output to a second output terminal. . 任意のデューティを有する第１の入力信号と、この第１の入力信号に対し相補的な差動入力である第２の入力信号とから、前記第１の入力信号に対応する第１の三角波信号と、前記第２の入力信号に対応し前記第１の三角波信号に対して相補的な第２の三角波信号を生成し、前記第１と第２の入力信号のデューティが５０パーセントを超える場合は、前記第１の三角波信号の振幅中心電位は前記第２の三角波信号の振幅中心電位より低くなり、前記第１と第２の入力信号のデューティが５０パーセントに等しい時は、前記第１の三角波信号の振幅中心電位と前記第２の三角波信号の振幅中心電位が等しくなることを特徴とする三角波生成手段と、
前記第１の三角波信号の第１の振幅中心電位に逆比例した電位を出力する第１の振幅中心電位抽出手段と、
前記第２の三角波信号の第２の振幅中心電位に逆比例した電位を出力する第２の振幅中心電位抽出手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第３の信号と、この第３の信号と相補的な第４の信号を生成し、制御端子に入力される前記第１の振幅中心電位抽出手段の出力電位が高ければ、前記第３と第４の信号の同相電位は前記第１の振幅中心電位が低い場合より上がる第１の差動増幅手段と、
前記第１と第２の三角波信号の差動増幅を行い、前記第１の入力信号に対応する第５の信号と、この第５の信号と相補的な第６の信号を生成し、制御端子に入力される前記第２の振幅中心電位抽出手段の出力電位が高ければ、前記第５と第６の信号の同相電位は前記第２の振幅中心電位が低い場合より上がる第２の差動増幅手段とを具備し、
前記第４の信号を第１の出力端子に出力する第１の出力信号とし、前記第５の信号を第２の出力端子に出力する第２の出力信号とすることを特徴とするデューティ制御回路。A first triangular wave signal corresponding to the first input signal from a first input signal having an arbitrary duty and a second input signal which is a differential input complementary to the first input signal; And generating a second triangular wave signal corresponding to the second input signal and complementary to the first triangular wave signal, and when the duty of the first and second input signals exceeds 50%, When the amplitude center potential of the first triangular wave signal is lower than the amplitude center potential of the second triangular wave signal, and when the duties of the first and second input signals are equal to 50%, the first triangular wave signal A triangular wave generating means, wherein an amplitude central potential of the signal is equal to an amplitude central potential of the second triangular wave signal;
First amplitude center potential extracting means for outputting a potential inversely proportional to a first amplitude center potential of the first triangular wave signal;
Second amplitude center potential extracting means for outputting a potential inversely proportional to a second amplitude center potential of the second triangular wave signal;
Differential amplifying the first and second triangular wave signals to generate a third signal corresponding to the first input signal and a fourth signal complementary to the third signal; When the output potential of the first amplitude center potential extracting means is higher, the common-mode potential of the third and fourth signals is higher than when the first amplitude center potential is lower. Means,
Performing differential amplification of the first and second triangular wave signals to generate a fifth signal corresponding to the first input signal and a sixth signal complementary to the fifth signal; When the output potential of the second amplitude center potential extracting means is higher, the in-phase potential of the fifth and sixth signals is higher than when the second amplitude center potential is lower. Means,
A duty control circuit, wherein the fourth signal is a first output signal output to a first output terminal, and the fifth signal is a second output signal output to a second output terminal. . 前記構成要素の組み合わせからなるデューティ制御回路を、２以上カスケード接続したことを特徴とする請求項１乃至９の中のいずれか１つに記載のデューティ制御回路。The duty control circuit according to any one of claims 1 to 9, wherein two or more duty control circuits each including a combination of the components are cascaded. 前記三角波生成手段と前記第１の差動増幅手段の間に配置され、前記第第１と第２の三角波信号を、前記第１の差動増幅手段の入力範囲にマッチさせ、かつ前記第１の振幅中心電位とタイミングを合わせる第１のシフトレベル手段と、
前記三角波生成手段と前記第２の差動増幅手段の間に配置され、前記第１と第２の三角波信号を、前記第２の差動増幅手段の入力範囲にマッチさせ、かつ前記第２の振幅中心電位とタイミングを合わせる第２のレベルシフト手段とを具備したことを特徴とする請求項１乃至９の中のいずれか１つに記載のデューティ制御回路。The first and second triangular wave signals are arranged between the triangular wave generating means and the first differential amplifying means, and match the first and second triangular wave signals with an input range of the first differential amplifying means. First shift level means for adjusting the timing with the amplitude center potential of
The first and second triangular wave signals are arranged between the triangular wave generating unit and the second differential amplifying unit, and match the first and second triangular wave signals with an input range of the second differential amplifying unit. The duty control circuit according to any one of claims 1 to 9, further comprising a second level shift means for adjusting timing with the amplitude center potential. 前記第１と第２の出力端子からの前記信号を差動増幅し、第７の信号と、この第７の信号と相補的な第８の信号を生成する第３の差動増幅手段を具備したことを特徴とする請求項１１に記載のデューティ制御回路。A third differential amplifying means for differentially amplifying the signal from the first and second output terminals to generate a seventh signal and an eighth signal complementary to the seventh signal; The duty control circuit according to claim 11, wherein: 前記構成要素の組み合わせからなるデューティ制御回路を、２以上カスケード接続したことを特徴とする請求項１１または１２のいずれかに記載のデューティ制御回路。13. The duty control circuit according to claim 11, wherein two or more duty control circuits composed of a combination of the components are cascaded.
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