JP3534036B2 - Liquid crystal image display device and method of driving liquid crystal display element - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal image display device and a method for driving a liquid crystal display element, and more particularly to a matrix type liquid crystal image display device for a projector and a method for driving the liquid crystal display element.

[0002]

2. Description of the Related Art Recently, liquid crystal display devices have become widespread as image display devices for television receivers, personal computers, projectors and the like. In recent years, in particular, there is an increasing need for portable and lightweight projectors in which a high-resolution liquid crystal display device is applied to a small projector, and the liquid crystal display device, the optical system, and the drive circuit have been noticeably miniaturized. is there.

As a liquid crystal image display device using these liquid crystal display elements, conventionally, a liquid crystal image display device based on an active matrix drive system is generally known (Japanese Patent Laid-Open No. 10-268258). FIG. 9 shows a circuit system diagram of an example of the conventional liquid crystal image display device. In the figure, the liquid crystal image display device includes a signal processing circuit 1 for performing a predetermined digital processing on an image signal, an inverting circuit 2 for inverting the data of the processed digital image signal, and inverting and non-inverting data for each field. Switch circuit 3 for selecting
D / A converter 4 for digital-analog conversion, and D / A
An amplifier 5 that amplifies the A-converted image signal, a switch control circuit 6 that outputs a switching signal, and capacitors 7a and 7b and a resistor 8a that add different DC voltages E1 and E2 to the output signal of the amplifier 5 as offsets. , 8
b, an offset adding circuit composed of DC power supplies 9a and 9b, and a switch circuit 10 for switching an image signal to which a different DC voltage is added in a field cycle, and is connected to a reflective liquid crystal display panel 11.

Here, for example, in the above reflective type liquid crystal display panel 11 of the active matrix drive system, one pixel of its display area has a basic structure as shown in FIG. 10, and the structure is arranged in a matrix. Configure the panel surface. In the cross-sectional view of the element structure of FIG. 10A, a MOS field effect transistor (FET) 16 and a signal holding capacitor 17 are formed on a silicon substrate 21 by a semiconductor process.
And are formed. The FET 16 has a source electrode 22,
It has a gate electrode 23 and a drain electrode 24. That is, after the diffusion layers 61, 62, and 63 are formed on the silicon substrate 21 by a known method, silicon dioxide (Si) is formed on the silicon substrate 21 between the diffusion layers 61 and 62.
O ₂ ) oxide film 64 is formed, oxide film 26 is formed on diffusion layer 63, source electrode 22 and drain electrode 24 are further formed on diffusion layers 61 and 62, and oxide film 64 is also formed.
A gate electrode 23 is formed on the oxide film 26, and a conductor film 25 is formed on the oxide film 26.

The FET 16 is covered with an insulating layer 27, and a pixel electrode (reflective electrode) 28 made of aluminum is formed on the insulating layer 27. The portion is connected to the drain electrode 24 of the FET 16. Further, the conductor portion 25 extends laterally from the connection portion of the pixel electrode (reflection electrode) 28, and by interposing the oxide film 26 between the conductor portion 25 and the diffusion layer 63, the signal holding capacitor 17 is provided. Are configured.

MOS which is such a switching element
The active element circuit for one pixel, which is composed of the type FET 16, the signal holding capacitor 17, and the pixel electrode 28, is formed in a matrix, and constitutes an active element substrate 29 as a whole.

On the other hand, the transparent substrate 30 has a structure in which a transparent common electrode film 19 is formed on one surface of a glass substrate 31. Liquid crystal alignment films 32 and 33 are provided on the surface of the active element substrate 29 and the surface of the common electrode film 19 of the transparent substrate 30, which face each other, respectively. The liquid crystal layer 18 is sandwiched and sealed between them to form a liquid crystal display panel as a whole.

FIG. 10B shows an equivalent circuit for one pixel of this liquid crystal display panel. The gate electrode 23 of each MOS type FET 16 is connected to the gate line 13 for supplying a vertical scanning signal from the V driver 12 shown in FIG.
2, a signal line 15 for supplying an image signal from the H driver 14 shown in FIG. 9 is connected. Where the gate line 13
When the vertical scanning signal is applied to the gate electrode 23 through the MOS type FET 16, the MOS type FET 16 is turned on and the image signal of the signal line 15 is applied from the source electrode 22 to the drain electrode 24 to the pixel electrode 28 shown in FIG. At the same time, the signal holding capacitor 17 is charged via the conductor portion 25.

Therefore, even if the selection signal of the gate line 13 is in the non-selected state, the electric charge corresponding to the image signal is accumulated in the signal holding capacitor 17, so that the signal holding capacitor 17
(C _H ) and the capacitance (C _LC ) of the liquid crystal layer 18 and the potential of the pixel electrode 28 is held for the time determined by the time constant of the discharge resistance. However, the above time is set longer than the field cycle.

During the potential holding time, the potential difference between the pixel electrode 28 and the common electrode film 19 is applied to the liquid crystal layer 18 and the light transmittance of the liquid crystal changes, so that the potential difference is applied to the signal line 15. By controlling with the image signal, the liquid crystal layer 18 is transmitted through the pixel electrode 2 after entering the glass substrate 31.
8 and then again passes through the liquid crystal layer 18 to pass through the glass substrate 3
It becomes possible to modulate the light emitted from 1. Specifically, a plurality of gate lines 13 are sequentially energized with a scanning selection signal, and all the MOS-type FETs 16 whose gate electrodes are connected to the gate lines 13 to which a scanning selection signal is energized are turned on and turned on. For each signal holding capacitor 17 connected to the MOS type FET 16 that has become
Scanning is performed in the horizontal and vertical directions by sequentially writing image signals from No. 5, and incident light (readout light) is modulated in pixel units to obtain reflected light.

By the way, the liquid crystal display element needs to be driven by an alternating current, and this liquid crystal image display device employs a field inversion drive system or a frame inversion drive system.
In the case of the field inversion drive method, the image signal of the same information is inverted in the first field and the second field, is input to the H driver 14, and the liquid crystal layer 18 is driven by the effective value of AC. Therefore, when the field inversion drive system is adopted, in FIG. 9, the output digital image signal a of the signal processing circuit 1 and the data inversion circuit 2 are switched by the switch circuit 3 in FIG.
The output digital image signal c of the switch circuit 3 which switches between the output digital image signal b and the output digital image signal b in the field cycle and is inverted in the unit of field is input to the two offset adding circuits through the D / A converter 4 and the amplifier 5. Offset voltages E1 and E2 are added separately.

Subsequently, the two analog image signals taken out in parallel from the above two offset adding circuits are supplied on the basis of the switching signal from the switch control circuit 6.
A signal d obtained by adding a voltage component corresponding to the threshold voltage of the liquid crystal to the analog image signal component is taken out through the switch circuit 10 that switches in the field cycle, and this image signal d is input to the H driver 14 in the liquid crystal display panel 11. To do.

The image signal input terminal of the liquid crystal display element of the liquid crystal display panel 11 has the above-described configuration, and the analog image signal d passes through the long wiring of the H driver 14 passing through the end face of the panel and further the pixel. The pixel transistors reach the electrodes through long signal lines 15 arranged in the vertical direction of the panel. Therefore, the transmission path of the analog image signal from the image signal input terminal of the liquid crystal display panel 11 to the pixel electrode is very long. As a result, the image input terminal has a very large capacitive load with respect to the image signal (AC component). At the same time, the image signal path in the liquid crystal display panel 11 has only a switch that is turned on / off during the selection period of the H driver 14, which is normally a MOS structure, and therefore has a very small DC load. .

On the other hand, in recent liquid crystal image display devices, the tendency toward higher definition of the displayed image is remarkable, and the number of pixels is greatly increased accordingly. In that case, the driving frequency of the liquid crystal display element naturally increases, and the operating speed of the constituent element is limited, so that the element does not operate in accordance with the frequency of the image signal.
Therefore, the image signal is divided and transferred, and the H driver 14 on the liquid crystal display element side is configured to have a plurality of inputs (multi-phase) as shown in FIG. 11 to reduce the drive frequency.

That is, in the case of the same figure, the divided image signals of SIG1 to SIG4 obtained by dividing the original image signal into four are input to the H driver 14, and the number of bits corresponding to 1/4 of the number of pixels in the horizontal direction. By using the shift register 35 configured as described above, the switch circuits 36 connected to each image signal line are simultaneously on / off controlled in units of four, and the pixel signals of each image signal line are simultaneously written for four pixels. The method is adopted.

According to this method, the driving frequency of the liquid crystal display element can be reduced to 1/4, and the liquid crystal image having a large number of pixels can be obtained as compared with the case where the image signal is inputted by the single-phase signal input system. It can also be applied to a display device.

[0017]

However, the above-mentioned conventional liquid crystal image display device has the following problems in analog processing of image signals.

(1) The capacitors 7a and 7b forming the offset addition circuit used when superimposing DC on the output signal from the amplifier 3 must continue to add DC to the input image signal during one field period. Therefore, a large capacitor having a large capacity is required. Particularly, in a liquid crystal display element having a large number of pixels and inputting by a plurality of divided image signals, it is necessary to prepare large capacitors 7a and 7b having a large capacity, which is twice the number of phases (the number of divisions). is there. Therefore, the drive circuit board area is largely occupied by the capacitors 7a and 7b, and there is a limit in realizing a small projector.

(2) Regarding the symmetry between the non-inverted image signal and the inverted image signal, strict precision is required, but in the above-mentioned conventional liquid crystal image display device, the image signal is analog-processed and then inverted. Since the image signal of the period and the image signal of the non-inversion period are switched by the switch circuit 3, variations in the DC offset occur due to the switching unit of the output signal of the switch circuit 3, and as a result, they are input to the liquid crystal image display panel 11. The DC component may be added to the image signal, and the display quality may be degraded.

(3) In recent liquid crystal display elements, a panel having a plurality of image signal input terminals has become common as the number of pixels has increased. In such an image display panel, it is general to arrange an analog circuit including a D / A converter for each image signal input terminal. However, since the output signal of the D / A converter has a variation in offset voltage of 20 to 30 mV or more, if it is used for image display as it is, a striped pattern corresponding to a plurality of image signals will appear.

As measures against such a problem, for example, it is conceivable to add an offset voltage adjusting circuit or adopt a highly accurate D / A converter. However, the addition of the adjusting circuit increases the circuit scale, The high-precision D / A converter has a problem that it is expensive, and in particular, the liquid crystal display device of recent years has eight or more image input terminals, so that the degree of influence thereof is very large.

Therefore, according to the conventional configuration, it is necessary to apply high-precision circuit elements in order to secure the display accuracy and quality of the image, and the number of parts increases, which increases the manufacturing cost. However, problems such as difficulty in miniaturization occur. In particular, in a liquid crystal image display device for obtaining a high-definition display image with a large number of pixels such as high-definition, the total number of analog circuits becomes extremely large because the number of phases is 8 or more, and each of the above problems It is an important issue to solve the problem.

The present invention has been made in view of the above points,
An object of the present invention is to provide a liquid crystal image display device and a method of driving a liquid crystal display element, which enable high-quality image display with a simpler circuit scale.

Another object of the present invention is a liquid crystal display device having a large number of pixels and a plurality of input terminals, and
A liquid crystal image display device and a liquid crystal display element capable of high-quality image display even when an image signal having a large amplitude and a high frequency is input when the input load of the image signal is small in DC and large in AC. It is to provide a driving method.

Another object of the present invention is to display an inexpensive liquid crystal image with a small circuit scale without using an expensive D / A converter with a small offset voltage or adding an offset correction circuit. An object of the present invention is to provide a device and a method for driving a liquid crystal display element.

[0026]

In order to achieve the above object, the liquid crystal image display device of the first invention uses a liquid crystal display panel in which liquid crystal display elements of an active matrix drive system are arranged in a matrix. In the display device,
A non-inverted digital image signal and an inverted digital image signal obtained by inverting the non-inverted digital image signal are alternately switched at predetermined intervals, and time-series synthesizing means for time-sequentially synthesizing and outputting, At least one of vertical and horizontal AC / DC conversion means for converting the combined digital image signal output from the time-series combining means into an analog image signal and an AC component of the analog image signal output from the D / A conversion means. by adding a DC voltage during a portion of the image blanking period, have a liquid crystal display image signal clamping circuit supplied to the input terminal of the panel, said clamping circuit, D
The analog image signal output from the A / A converter
One end is connected to the amplifier that amplifies the width and the output terminal of the amplifier
And the other end is connected to the image signal input terminal of the liquid crystal display panel.
And the switching cycle of the time series synthesizing means
At the same cycle, the output analog image signal of the amplifier is dropped.
For at least one of the image blanking period of the direct and horizontal
It is turned on only for a part of the period and the DC voltage is
Applied to the connection point between the edge and the image signal input terminal of the liquid crystal display panel
Switch means for
The stage is supplied to the image signal input terminal of the liquid crystal display panel.
With respect to the center potential of the image signal,
The first voltage having a different first threshold and the second voltage having a negative value.
The second voltage with a different threshold value is set as the above DC voltage, and the
The other end of the capacitor and the liquid crystal display panel alternately in the replacement cycle
The image signal input terminal is applied to the connection point .

In analog image signal processing after D / A conversion, in the conventional device, two capacitors are provided on the output side of the D / A converter in order to superimpose two different DC voltages on the analog image signal separately. In the first aspect of the present invention, the signals output from the clamp circuit are switched, while different DC voltages are applied to the output side of the capacitors and they are switched by a switch with a switch at a predetermined cycle. Is supplied to the image signal input terminal of the liquid crystal display panel without being switched.

That is, the present invention focuses on the feature that the load of the image signal input terminal of the liquid crystal display panel is small in terms of direct current, and the AC component when the liquid crystal display element is AC driven is D / A converted. It depends on the output signal of the means and the output performance of the amplifier. On the other hand, with respect to the bias application for the inversion drive, if the load on the image signal input terminal of the liquid crystal display panel with respect to direct current is small, the above-mentioned predetermined period (for example, field period) It is not necessary to apply the DC voltage all the time during the period of, and the DC voltage is applied from the outside during a part of the above-mentioned predetermined period, and the clamp circuit provided in the output side of the D / A conversion means Store the charge in the capacitor,
This charge can hold the DC level throughout the predetermined period. Moreover, the switch of the analog image signal output from the clamp circuit can be eliminated.

[0029]

According to the present invention, the capacitor in the clamp circuit and the image signal input terminal of the liquid crystal display panel are directly connected to each other so that no active element is inserted. Further, in the present invention, since the capacitor is connected in series to the output side of the D / A conversion means via the amplifier, the offset DC variation (voltage value when data 0) of the D / A conversion means can be cut by the capacitor.

[0031]

Regarding the characteristic of the reflectance (transmittance) with respect to the voltage of the liquid crystal, for example, in the case of normally black (the operation mode of the liquid crystal which becomes black when the voltage is 0V), the voltage range below the threshold value of the liquid crystal. Then, the display image remains black. Therefore, it is disadvantageous to consider the number of bits of digital processing, that is, the resolution, to configure the image signal in a state in which the non-inverted and inverted image signals include the threshold voltage. Therefore, in the first invention, the image signal of the liquid crystal display panel is received.
The center potential of the image signal supplied to the signal input terminal,
The first threshold value of the liquid crystal display element having a different first threshold value is different.
Pressure and a second voltage having a negative second threshold value different from each other,
The other end of the capacitor and the liquid crystal display alternate with a predetermined switching cycle.
Applying to the connection point of the image signal input terminal of the display panel
Therefore, the threshold voltage of the liquid crystal display element is included in the DC voltage added to the image signal, and the image signal input to the clamp circuit is a voltage at which the luminance of the liquid crystal display element-light reflection characteristic changes. By setting only the voltage within the range, D
The number of bits of the / A conversion means can be used effectively.

[0033]

In order to achieve the above object, the second invention is a driving method for driving a liquid crystal display element of an active matrix driving system, wherein a non-inverted digital image signal and this non-inverted digital image signal are inverted. A first step of alternately switching the inverted digital image signals obtained by
The second step of converting the composite digital image signal into an analog image signal, and a part of the vertical and horizontal image blanking period of at least one of the AC component of the analog image signal, which is obtained by cutting the DC component of the analog image signal. To
A third step of applying a DC voltage to the liquid crystal display element and supplying the third step to the liquid crystal display element.
Liquid crystal display element with respect to the center potential of the supplied image signal
Positive first value of different first voltage and negative value of
A second voltage different from the second threshold of
As alternating with the switching cycle of the first step
It is characterized in that the liquid crystal display device is switched to and supplied to the liquid crystal display element .

In the present invention, the fact that the load of the image signal input terminal of the liquid crystal display panel is small in terms of direct current is utilized, and a part of a predetermined period (for example, a field period) (vertical and / or horizontal). Since a DC voltage is applied from the outside during a part of the image blanking period), charges are stored in the capacitor in the clamp circuit provided on the output side of the D / A conversion means, and this charge causes a predetermined cycle. The DC level can be maintained during the whole period.

[0036] Also, in the second inventions, the first threshold value and a negative value of a positive value of the liquid crystal display device in a third step
The second step of the first step is a DC voltage, and the first step
LCD display elements are switched alternately in synchronization with the switching cycle of
Since the image signal to which the DC voltage is added can be supplied to the child, only the voltage within the voltage range in which the luminance of the voltage-light reflection characteristic of the liquid crystal display element changes can be applied.
Possible to effectively use the number of bits of the D / A converter used in the second step than.

[0037]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, each embodiment of the liquid crystal image display device of the present invention will be described in detail with reference to FIGS. FIG. 1 shows a block diagram of a first embodiment of a liquid crystal image display device according to the present invention. In the figure, the same components as those in FIG. 9 are designated by the same reference numerals. As shown in FIG. 1, in this embodiment, an analog signal processing circuit between the amplifier 5 and the liquid crystal display panel 11 is provided with a capacitor 41 whose one end is connected to an output terminal of the amplifier 5 and an output of a switch control circuit 40. A switch circuit 42 that is switching-controlled by a switching signal f, and a D connected to the switch circuit 42.
It is characterized in that the clamp circuit is composed of the C power supply 43. Here, the other end of the capacitor 41 is connected to the switch circuit 4
2 is connected to the connection point between the output terminal of H 2 and the input terminal of the H driver 14.

Next, the operation of this embodiment will be described with reference to FIG.
This will be described with reference to the timing chart of FIG. An image signal to be displayed (here, a signal having 0 gradation in the upper part of the image and 255 gradations in the lower part, which is gradually brightened from top to bottom) is digitally output by the signal processing circuit 1 in FIG. The signal is processed into a digital image signal a as shown in FIG. 2A and supplied to the data inverting circuit 2, where it is phase-inverted into an inverted digital image signal b as shown in FIG. 2B. The switch circuit 3 outputs the switching control signal e shown in FIG.
Thus, the digital image signal a output from the signal processing circuit 1 and the inverted digital image signal b output from the data inversion circuit 2 are alternately selected to output the signal c shown in FIG. 2C. The output signal c of the switch circuit 3 in the vertical blanking period is the black data (0 in the non-inverted field, 25 in the inverted field) of the video signal coming next.
5).

The above switching control signal e is actually 60 Hz, for example, and has a waveform which is inverted every 8.3 ms. However, from the switch circuit 3, the image signal waveform of the same information content of one field is not displayed. Inverted and inverted 2
Since it is repeatedly output and written in the liquid crystal element, it is referred to as "inversion for each field" in this specification.

The output signal c of the switch circuit 3 is input to the D / A converter 4, converted into an analog signal having an amplitude of 1 V, and then amplified by the amplifier 3 by an amplitude required for driving the liquid crystal, The amplified signal g having an amplitude of 0 to 4 V shown in FIG.
It is said that The DC component of the amplified signal g is blocked by the DC blocking capacitor 41 having a capacitance value of 1 μF, for example, and only the AC component is output through the capacitor 41.

On the other hand, the switch circuit 42 is turned on only during the vertical blanking period of 8.3 ms period by the switching signal f output from the switch control circuit 40 in synchronization with the switching signal e, and is generated by the DC power source 43. A direct current (DC) voltage of 9V is output through the switch circuit 42. Further, the switch circuit 42 is turned off during the period other than the above blanking period, and is maintained in the high impedance state.

The DC voltage extracted from the switch circuit 42 is charged in the capacitor 41, and a DC offset of -9V is applied to the image input terminal of the liquid crystal display panel 11 until the next field signal comes. . At this time, if the resistance of the liquid crystal display element to direct current is sufficiently large, the wiring on the output side of the capacitor 41 is in a state in which a direct current potential determined by the clamp voltage is applied.

With such a clamp circuit composed of the capacitor 41, the switch circuit 42 and the DC power source 43,
The output signal of the capacitor 41 is obtained by adding a DC voltage of -9V to the AC component of the amplified signal g to form an image signal h having an AC voltage waveform centered on -9V as shown in FIG. , Is input to the image input terminal of the liquid crystal display panel 11. The basic configuration of the liquid crystal display panel 11 is shown in FIG.
It is also assumed that the liquid crystal display elements of the active matrix drive system shown in FIG. 9 are arranged in a matrix.

In an example of actual trial manufacture, the liquid crystal display panel 11
Since the leak current was about 1 μA when -9 VDC was applied, the input resistance was expected to be about 9 MΩ. Therefore, the clamp signal (DC voltage) is charged in the capacitor 41.

As described above, according to this embodiment, D /
Since the image signal is generated as a time-series composite signal of the non-inverted field signal and the inverted field signal before the A converter 4, the number of bits of the D / A converter 4 and the liquid crystal driving are required. Since the amplitude of the amplifier circuit for obtaining the voltage is half the amplitude of the AC component required to drive the liquid crystal, the voltage resistance and consumption of the circuit are high, especially in a liquid crystal image display device with a large number of pixels and a high driving frequency. The same effect as that of the conventional device shown in FIG. 9 can be obtained in that power and component costs can be reduced. In addition to this, in addition to this, the load of the image signal input terminal of the liquid crystal display panel 11 becomes DC. By utilizing the feature of being small, there is an effect peculiar to the present embodiment that the structure of the clamp circuit is simplified and which is not present in the conventional device.

That is, in this embodiment, the clamp circuit is one half of the two circuits of the conventional device, and
In the field period, the switch circuit 42 in the clamp circuit is turned off during periods other than the vertical blanking period of the 8.3 ms period and is maintained in a high impedance state, so that the capacitance value is higher than that of the conventional capacitor. Since the small compact capacitor 41 can be used, the drive circuit can be miniaturized. In addition, the DC offset variation occurs due to the switching unit of the output signal of the switch circuit, and as a result, the DC component is added to the image signal input to the liquid crystal image display panel 11, so that the D / Compared with the conventional liquid crystal image display device having the offset variation removing means of the A converter, it is possible to reduce the capacitors and resistors and realize the miniaturization of the circuit scale.

Further, in this embodiment, the output side of the capacitor 41 for cutting DC and the liquid crystal display panel 1 are used.
Between 1 is a direct connection state, and no active element comes in, so that no offset occurs in the amplifier circuit or analog switch. The above effects are especially small in terms of direct current,
Moreover, it is effective in inputting a high-frequency image signal having a large amplitude of about 4 V, which drives the liquid crystal, to a liquid crystal image display device having a large AC load.

Next, a second embodiment of the present invention will be described. FIG. 3 shows a second example of the liquid crystal image display device according to the present invention.
3 is a block diagram of the embodiment of FIG. In the figure, the same components as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted. As shown in FIG. 3, in this embodiment, instead of the DC power supply 43 of the first embodiment, a level determination circuit 45, a D / A are provided.
A circuit portion including a converter 46 and a DC amplifier 47 is provided.

In the first embodiment, regardless of whether the clamp signal inserted in the vertical blanking period is inverted or non-inverted,
It has been described as a constant DC voltage. However, depending on the voltage-light characteristics of the liquid crystal display element, there are many cases where the threshold value (voltage at which reflectance or transmittance is 0 or maximum) is not 0 V with respect to the driving voltage of 4 V, and the D / A converter 4 is used. There is a case in which the output analog signal of the D / A converter 4 cannot be effectively reflected in the change in the light brightness by directly applying the DC offset to the output analog signal of.

Therefore, in the second embodiment, in consideration of such characteristics of the liquid crystal display element, the output signal of the D / A converter 4 is effectively reflected in the change in light luminance. Specifically, different voltages are applied to the waveform of the clamp pulse applied during the vertical blanking period during the inversion field and the non-inversion field of the output signal of the D / A converter 4.

Next, the operation of this embodiment will be described with reference to FIG.
It will be described together with the timing chart. In this embodiment, the liquid crystal display element having the voltage-light reflection characteristic shown in FIG. 5 is used. In the voltage-light reflection characteristics of FIG. 5, the reflectance remains 0 in the voltage range I from 0V to 1V. On the other hand, in the voltage range II of 1 V to 4 V, the voltage increases and the reflectance increases.
Therefore, even if the voltage is changed in the voltage range I of 0 V to 1 V, it does not contribute to the change in the brightness of the liquid crystal display element.
Setting the A / A converter 4 to operate in the voltage range II of 1V to 4V is more effective than setting the A / A converter 4 to operate in the input amplitude range of 0V to 4V. The bit resolution can be effectively used.

Therefore, in the present embodiment, the applied clamp pulse waveform is set to be different for the inverted field and the non-inverted field, and the clamp pulse of −10 V for the inverted field signal and −8 V for the non-inverted field signal is set. By applying the voltage, the D / A converter 4 becomes 1V.
Is set to operate in a voltage range II from 1 to 4V. That is, two voltage values -8V and -10V different by ± 1V from the center potential -9V of the image signal input to the image input terminal of the liquid crystal display panel are used as the clamp voltage.

That is, based on the switching signal e having a repetition frequency of 60 Hz, which is output from the switch control circuit 40 and shown in FIG. Based on the switching signal e output from the switch control circuit 40, the composite image signal c shown in FIG. The level determination circuit 45 discriminates whether the output signal c of the switch circuit 3 is the inverted field signal period (H level period) or the non-inverted field signal period (L level period) and determines the level to obtain the value D / It is supplied to the A converter 46.

As a result, analog signals of different levels are taken out from the D / A converter 46 depending on the inverted field signal period or the non-inverted field signal period, and further amplified by the DC amplifier 47, as shown in FIG. like,
A signal j of −10 V in the inversion field period and −8 V in the non-inversion field period is taken out and supplied to the switch circuit 42 as a clamp pulse.

On the other hand, the combined image signal c extracted from the switch circuit 3 (note that the signal in the vertical blanking period of this combined image signal c is the black data of the next video signal (0 in the non-inverted field, inverted) Field is 25
5). ) Is converted into a composite image signal of an analog signal by the D / A converter 4 and then amplified by the amplifier 5 to be a composite image signal having an amplitude of 0V to 3V as shown in FIG. It is supplied to 41, where the DC component is cut and only the AC component is taken out, and the DC component output from the switch circuit 42 is added.

The switch circuit 42 is the switch control circuit 4
Repetition frequency 1 shown in FIG.
Based on the switching signal f of 20 Hz, the DC voltage from the DC amplifier 47 of −10 V is selectively output only in the inversion field period and in a part of the vertical blanking period, and in the non-inversion field period, and , -8V DC amplifier 4 only in part of the vertical blanking period
The DC voltage from 7 is selectively output and turned off during periods other than a part of the vertical blanking period to maintain a high impedance state.

This switch circuit 42 and the DC amplifier 4
7, the signal waveform at the connection point P between the capacitor 41 and the switch circuit 42 becomes an AC voltage waveform centered on -9V, as indicated by k in FIG. 4 (F). This AC voltage waveform k will be described in more detail. At the connection point P, the AC component of the output signal g of the amplifier 5 indicated by k1 in FIG. Switching to the vertical blanking period of the inversion field period. At this time, the image data shown in FIG. 4A is 255 (vertical blanking signal of the inverted field), and immediately after that, the image data shown in FIG.
The switch circuit 42 is turned on for a short period until time t2 by the switching signal indicated by f1 in (C).

Here, when the switch circuit 42 is turned on, -10V is supplied from the switch circuit 42 to the connection point P.
The capacitor 41 is charged to a DC voltage of −8V in the immediately preceding non-inverting field period, and the output signal of the amplifier 5 becomes the amplifier output voltage at the time of clamping the non-inverting field. Since there is a potential difference of 3V, immediately after the switch circuit 42 is turned on, the DC potential at the connection point P is -5V as indicated by k2 in FIG. The position decreases toward -10V, and the time t
At (or immediately before) 2, the voltage becomes −10 V as indicated by k3 in FIG. 7F, and this state continues until time t3 when the vertical blanking period ends.

Then, as indicated by k4 in FIG.
The AC component of the output signal g of the amplifier 5 in the inversion field period is extracted at the connection point P, and is switched to the vertical blanking period in the non-inversion field period at time t4, and immediately thereafter, in f2 in FIG. 4C. The switching circuit 42 is turned on for a short period until time t5 by the switching signal shown.

When the switch circuit 42 is turned on, -8V is supplied from the switch circuit 42 to the connection point P to charge the capacitor 41.
1 is charged with a DC voltage of −10V in the immediately preceding inversion field period, and the output signal of the amplifier 5 has a potential difference of 3V with respect to the amplifier output voltage when the inversion field is clamped, so that the switch circuit 42 is turned on. Immediately after that, the DC potential at the connection point P is −13 V as indicated by k5 in FIG. 4 (F), and then the DC potential rises toward −8 V with a certain time constant, and Time t5
(Or immediately before that), it becomes -8V as indicated by k6 in FIG. 6F, and this state continues until time t6 when the vertical blanking period ends. Thereafter, the same operation as above is repeated. In addition, in FIG. 4F, k2, k3, k5, and k6 are shown as a constant potential for convenience, but actually have a certain inclination as described above.

In this way, at the connection point P, the AC component of the output signal g of the amplifier 5 is -8 during the vertical blanking period.
By being clamped to V or -10V, FIG.
As indicated by k in (F), the center potential is -9V, and the peak value is -13V (= -10V-3V) to -5V (= -8V).
Signals up to + 3V) are taken out, and the liquid crystal display panel 11
The image signal is input to the H driver 14 via the image signal input terminal.

In this embodiment, the liquid crystal display device shown in FIG.
In consideration of the voltage-light reflection characteristics shown in, even if the voltage is changed in the voltage range I of 0V to 1V, it does not contribute to the change in the brightness of the liquid crystal display element, and therefore ± 1 with respect to the center potential -9V.
By providing the V offset within the vertical blanking period, the D / A converter 4 performs the D / A conversion operation in the input voltage range (II in FIG. 5) from 1V to 4V that contributes to the luminance change. By setting to, the D / A conversion operation effectively corresponding to the change in the light brightness can be realized without impairing the bit resolution of the D / A converter 4 as compared with the related art.

Next, a third embodiment of the present invention will be described. FIG. 6 shows a third example of the liquid crystal image display device according to the present invention.
3 is a block diagram of the embodiment of FIG. 2, those parts which are the same as those corresponding parts in FIG. 2 are designated by the same reference numerals, and a description thereof will be omitted.

As shown in FIG. 6, this embodiment has four
This is applied to the liquid crystal display panel 11a having the H driver 14a having one image input terminal, and four signal processing units 51, 52, 53, 54 corresponding to the four image input terminals.
Is provided. These signal processing units 51, 52, 5
Reference numerals 3 and 54 have the same configurations as those of the second embodiment shown in FIG. Here, the signal processing units 51, 52, 5
The reference numerals 3 and 54 respectively receive a 4-divided image signal which is divided into 4 in every 4 pixels in the horizontal direction of the screen. The 4-divided image signal is subjected to signal processing and supplied separately to the 4 image signal input terminals of the liquid crystal display panel 11a.

In the configuration according to the present embodiment, the output signal of the D / A converter 4 in the signal processing circuit 51 passes through the amplifier 5 and is directly connected to the capacitor 41.
Even if the DC offset occurs, the output of the capacitor 41 is cut and only the AC component is output. Therefore, although each of the other signal processing circuits 52 to 54 has a D / A converter similar to the D / A converter 4, a D / A converter and an adjusting circuit with high accuracy are added. Therefore, the variation between the signal processing circuits due to the DC offset does not occur in the image signal input to the liquid crystal display panel 11a, and therefore, the striped pattern does not occur in the display image of the liquid crystal display panel 11a, and the high-quality image is obtained. The display can be realized with a low price and a small configuration.

Next, a fourth embodiment of the present invention will be described. This embodiment has basically the same configuration as the block diagram of the second embodiment shown in FIG. 3, but the configuration of the switch control circuit 40 is different. That is, the switch control circuit 40 of this embodiment is characterized in that the switch control signal f shown in FIG. 7E is supplied to the switch circuit 42 to perform clamping in both the horizontal and vertical blanking periods. .

Although the second embodiment has been described as an example in which the clamp signal is inserted in a part of the vertical blanking period, the current discharged from the capacitor 41 shown in FIG. 3 in the field period is large. In this case, it is effective to superimpose the clamp signal even in the horizontal blanking period. Therefore, in the fourth embodiment, the clamp signal is applied to the capacitor 41 not only in the vertical blanking period but also in the horizontal blanking period.

The fourth embodiment will be described with reference to the block diagram of FIG. 3, the timing chart of FIG. 7 and the signal waveform diagram of FIG. The switch circuit 3 shown in FIG. 3 receives the digital image signal a shown in FIG. 7A from the signal processing circuit 1 and the data inverting circuit 2 according to the switching signal e shown in FIG. 7D output from the switch control circuit 40. Figure 7
The inverted digital image signal shown in FIG. 7B is alternately switched every 8.3 ms, and the combined image signal c shown in FIG. This composite image signal c
Is converted into an analog signal by the D / A converter 4 and then amplified by the amplifier 5 to be a composite image signal g having an amplitude of 0V to 3V shown in FIG.

In the timing chart of FIG. 7, for the sake of convenience of illustration, the number of horizontal blanking periods for one field period is three (for example, four horizontal lines). For example, taking the high definition graphics display standard SXGA as an example, the horizontal blanking period of one field period is 1023 (there are 1024 horizontal lines).

As for the inverted / non-inverted switching signal e output from the switch control circuit 40, as shown in FIG. 7D, the switch control signal f shown in FIG. On during blanking period (high level)
Immediately before, the switching between inversion and non-inversion is performed. The output signal j of the DC amplifier 47 is switched between -8V and -10V at the same timing as the inversion / non-inversion switching signal e, as shown in FIG. 7 (F).

As indicated by f0, f1 and f2 in FIG. 7E, the switch control signal f is turned on for a short period immediately after each switching of the composite image signal g and the switching signal e in the vertical blanking period (high). However, unlike the second embodiment, as shown by f3, f4, and f5, it is turned on even during the horizontal blanking period of the composite image signal g. It becomes (it becomes a high level).

The switch control signal f causes the switch circuit 42 to be turned on not only in a part of the vertical blanking period but also in the horizontal blanking period. Therefore, the capacitor 41, the switch circuit 42, and the liquid crystal display panel 11 are turned on. As shown in FIG. 8, the signal waveform at the connection point P with the image signal input terminal is an image signal of an AC voltage waveform centered at -9V. Therefore, this fourth embodiment is similar to the second embodiment.
In the same manner as in the above embodiment, in consideration of the voltage-reflected light characteristic of the liquid crystal display panel 11, an operation can be realized without impairing the bit resolution of the D / A converter 4, and the capacitor 41
Therefore, the desired operation can be effectively performed even when the current discharged in the field period is large.

In the third embodiment, an example in which the liquid crystal display panel 11a has four image signal input terminals is shown, but it goes without saying that the same applies when there are more or less image signal input terminals. Further, in FIG. 6, the switch control circuit 40, the level determination circuit 45, the D / A converter 46, and the DC
The amplifier 47 is independent for each of the signal processing units 51 to 54, but can be shared if the timing and voltage are the same. Further, the above-described clamping operation of the present invention may be performed only during the horizontal blanking period of the image signal.

[0074]

As described above, according to the present invention,
It has various effects as follows.

(1) Utilizing that the load of the image signal input terminal of the liquid crystal display panel is small in terms of direct current, a direct current voltage is applied from the outside during a part of a predetermined period (for example, a field period). , The electric charge is stored in the capacitor in the clamp circuit provided on the output side of the D / A converting means, and this electric charge is used to hold the DC level during the predetermined period. Therefore, the output side of the D / A converting means To the image signal input terminal of the liquid crystal display panel, especially the clamp circuit for DC superposition has only one capacitor, which simplifies the circuit configuration compared with the conventional one.
Since the switch of the analog image signal output from the clamp circuit can be eliminated, the analog switch part D
The C offset can be prevented from occurring and the circuit configuration can be simplified.

(2) Since the capacitor in the clamp circuit and the image signal input terminal of the liquid crystal display panel are directly connected and no active element is inserted, no offset occurs in the amplifier circuit or analog switch.

(3) The voltage corresponding to the threshold value of the liquid crystal is included in the DC voltage added to the image signal, and the image signal input to the clamp circuit is the voltage at which the luminance of the voltage-light reflection characteristic of the liquid crystal display element changes. By setting only the voltage within the range, D / A
Since the number of bits of the conversion means can be effectively used, a high-resolution analog image signal can be obtained by the inexpensive D / A conversion means, and the amplitude of the analog AC signal can be reduced.

(4) By connecting a capacitor in series to the output side of the D / A conversion means via an amplifier, the D / A
Since the offset DC variation (voltage value at the time of data 0) of the conversion means can be cut by the capacitor, it is inexpensive without using an expensive D / A conversion means with a small offset or adding an offset correction circuit. A liquid crystal image display device having a small circuit scale can be configured.

(5) Since a DC offset variation occurs due to the output signal switching unit of the switch circuit, and as a result a DC component is added to the image signal input to the liquid crystal image display panel, a plurality of capacitors are used. Compared with the conventional liquid crystal image display device having the offset variation removing means of the D / A converter, the capacitors and resistors can be reduced, and the circuit scale can be reduced.

(6) From the above features (1) to (5),
The present invention is applied to a liquid crystal display panel in which an image signal input terminal having a large amplitude of about 4V and to which an image signal of a high frequency is input has a small DC load and a large AC load and a plurality of liquid crystal display panels exist. When is applied, a striped pattern does not occur in the displayed image, and high-quality image display can be realized with a low price and a small structure.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a timing chart for explaining the operation of FIG.

FIG. 3 is a block diagram of second and fourth embodiments of the present invention.

FIG. 4 is a timing chart for explaining the operation of the second embodiment of the present invention.

FIG. 5 is a diagram showing an example of applied voltage-reflectance characteristics of a liquid crystal display element used in a second embodiment of the present invention.

FIG. 6 is a block diagram of a third embodiment of the present invention.

FIG. 7 is a timing chart for explaining the operation of the fourth embodiment of the present invention.

FIG. 8 is an example of an image signal waveform input to the liquid crystal display panel in the fourth embodiment of the invention.

FIG. 9 is a circuit configuration diagram of an example of a conventional device.

FIG. 10 is a configuration diagram of an example of a pixel portion of a liquid crystal display element.

FIG. 11 is a configuration diagram of an example of a liquid crystal display element having a plurality of image signal input terminals.

[Explanation of symbols]

1 Signal processing circuit 2 Data inversion circuit 3,42 switch circuit 4,46 D / A converter 5 amplifiers 11, 11a Liquid crystal display panel 12 V driver 14, 14a H driver 41 DC blocking capacitors 43 DC power supply 45 level determination circuit 47 DC amplifier

Continuation of the front page (56) Reference JP-A-10-268258 (JP, A) JP-A-61-69284 (JP, A) JP-A-10-214066 (JP, A) JP-A-9-81090 (JP , A) JP-A-6-110413 (JP, A) JP-A-3-227176 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G09G 3/00-3/38 G02F 1/133 505-580

Claims (2)

(57) [Claims] 1. A liquid crystal image display device using a liquid crystal display panel in which liquid crystal display elements of an active matrix driving system are arranged in a matrix, and a non-inverted digital image signal and this non-inverted digital image signal are obtained by inversion. The inverted digital image signal and the time-series synthesizing means for alternately synthesizing and outputting the inverted digital image signal at predetermined intervals, and the synthetic digital image signal output from the time-series synthesizing means. D / A conversion means for converting into an analog image signal, and a DC voltage added to a part of at least one of vertical and horizontal image blanking periods of the analog image signal output from the D / A conversion means. A clamp circuit for supplying the image signal input terminal of the liquid crystal display panel , wherein the clamp circuit is output from the D / A conversion means.
And an amplifier that amplifies the analog image signal to a predetermined amplitude.
One end is connected to the output terminal of the amplifier and the other end is the liquid crystal display.
Capacitor connected to the image signal input terminal of the display panel
With the same cycle as the switching cycle of the time series synthesizing means,
In addition, the vertical and water of the analog image signal output from the amplifier
Part of the image blanking period for at least one of the flats
It is turned on only when the DC voltage is
At the connection point between the edge and the image signal input terminal of the liquid crystal display panel.
And an image signal input of the liquid crystal display panel.
The center potential of the image signal supplied to the input terminal
The first threshold value of the liquid crystal display element having a different first threshold value is different.
Pressure and a second voltage that differs by a second negative threshold value
The DC voltage is alternately applied in the switching cycle.
The other end of the capacitor and the image signal input terminal of the liquid crystal display panel
A liquid crystal image display device characterized in that it is applied to the connection point of . 2. A driving method for driving a liquid crystal display device of active matrix driving method, a digital image signal of the non-inverting and the non-inverting inverting the digital image signals of the digital image signal obtained by inversion of <br/> Are alternately switched in a predetermined cycle to synthesize and output in time series, a second step of converting the synthesized digital image signal into an analog image signal, and a DC component of the analog image signal. A third step of applying a DC voltage to the cut liquid crystal component of the AC component of the analog image signal in a partial period of at least one of vertical and horizontal image blanking periods to supply the liquid crystal display element , The third step is supplied to the liquid crystal display element.
The positive potential of the liquid crystal display element with respect to the center potential of the image signal
A first voltage having a different first threshold value and a second voltage having a negative value
And a second voltage having a different threshold of
Alternating in synchronization with the switching cycle of the first step
A method for driving a liquid crystal display element, characterized in that the liquid crystal display element is replaced and supplied to the liquid crystal display element.