JP3530665B2 - Digital quadrature detection method, digital quadrature detection device, and ultrasonic diagnostic device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital quadrature detection method, a digital quadrature detection apparatus and an ultrasonic diagnostic apparatus, and more specifically, it is possible to easily change a reference frequency (reference signal frequency in quadrature detection). The present invention relates to a digital quadrature detection method, a digital quadrature detection device, and an ultrasonic diagnostic device.

[0002]

2. Description of the Related Art FIG. 6 is a characteristic diagram showing the relationship between the echo time from the transmission of an ultrasonic pulse to the reception of an ultrasonic echo in an ultrasonic diagnostic apparatus and the center frequency of the spectrum of the ultrasonic echo. As can be seen from FIG. 6, the longer the echo time (that is, the ultrasonic echo from the deeper part of the living body), the lower the spectrum shifts. This is because the attenuation of the high frequency component increases as the depth of the living body increases.

As a conventional method for dealing with this spectrum shift, as shown in FIG.
A dynamic filter method in which the filter characteristic F of the bandpass filter is shifted in accordance with the shift of p, and as shown in FIG. 8, a new in-phase component is obtained by multiplying the in-phase component I and the quadrature component Q after quadrature detection by a rotation matrix. A rotation matrix method is known in which the reference frequency is converted into an I ′ and a quadrature component Q ′ and the reference frequency is equivalently shifted.

In the quadrature detection in the ultrasonic diagnostic apparatus, the echo signal is divided into two and 90
The two in-phase components I and the quadrature component Q are generated by multiplying two reference signals having different phases. The in-phase component I and the quadrature component Q represent Doppler components, and blood flow information can be obtained from them.

Another prior art related to the present invention is:
There is a "digital phase device" disclosed in Japanese Patent Application Laid-Open No. 5-184568 and a "multi-channel digital receiving method and device and an ultrasonic diagnostic apparatus" disclosed in Japanese Patent Application Laid-Open No. 7-303638. The latter describes digital quadrature detection. However, these do not disclose a method for coping with the spectrum shift.

[0006]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a new method and apparatus for coping with spectrum shift based on a novel idea which is completely different from the dynamic filter method and the rotation matrix method. Especially.

[0007]

According to a first aspect of the present invention, according to the present invention, digital data (actual digital data) sampled at every sampling period Ts is input, and an interpolation calculation using a plurality of the actual digital data is performed. The digital data (interpolation digital data) between two consecutive real digital data is calculated, and the time from the interpolation digital data calculated immediately before to the interpolation digital data calculated next is “T
A digital feature in which the interpolation position of the interpolation digital data to be calculated next is controlled so as to be s + ΔT ”, and the calculated interpolation digital data or the interpolation digital data with its sign inverted or“ 0 ”is selected and output. In the digital quadrature detection method according to the first aspect, a cycle of digital data to be output is “Ts + ΔT” with respect to a sampling time Ts of input digital data. Since this is equivalent to changing the reference frequency of, the reference frequency can be easily changed by controlling ΔT.

According to a second aspect, the present invention is a data storage means for storing a plurality of digital data (actual digital data) sampled at every sampling period Ts, and a minimum value "0" to a maximum value "m-1". ”, Which is a cumulative addition unit that cyclically performs cumulative addition until the frequency change parameter n (0
≦ n ≦ m−1) is cumulatively added and a sum i thereof is output, and an interpolation operation using a plurality of real digital data read out from the data storage means is used to perform m between two continuous real digital data. Interpolation calculation means for calculating i-th digital data (interpolated digital data) of the i-th of the divided times (however, when i = 0, it is the earlier time of the two continuous real digital data), A digital quadrature detection device comprising a sign inverting means for inverting the sign of the interpolation digital data, and a switching selecting means for selecting the interpolation digital data, the interpolation digital data with the sign inverted, or "0". I will provide a. In the digital quadrature detector according to the second aspect, the time Ts between two continuous real digital data is m
The interpolated digital data at each time of division is
An interpolation calculation means is provided which can be calculated by interpolation calculation from two or more real digital data including one continuous real digital data. Further, the frequency changing parameter n (0 ≦ n ≦ m
When −1) is given, a cumulative addition means is provided for finding a time such that the time from the interpolation digital data calculated immediately before to the interpolation digital data calculated next is “Ts + n (Ts / m)”. . Then, the calculation of the interpolation digital data at the found time is repeated. Further, the calculated interpolating digital data, the interpolating digital data obtained by inverting the sign of the interpolating digital data, or “0” is selected and output by the switching selecting means. According to this, with respect to the sampling time Ts of the input digital data,
The cycle of the output digital data is "Ts + n (Ts /
m) ”. This is equivalent to changing the reference frequency of quadrature detection, and the reference frequency can be easily changed by controlling the frequency changing parameter n.

[0009] In a third aspect, the present invention provides an ultrasonic diagnostic apparatus including the digital quadrature detection apparatus having the above configuration. In the ultrasonic diagnostic apparatus according to the third aspect, since the digital quadrature detection apparatus according to the second aspect is used, the frequency shift parameter n is controlled to increase as the echo time increases, so that the spectrum shift can be easily performed. Will be able to deal with.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in more detail below with reference to an embodiment shown in the drawings. The present invention is not limited to this. FIG. 1 is a block diagram of an ultrasonic diagnostic apparatus 1 according to an embodiment of the present invention. In this ultrasonic diagnostic apparatus 1, the analog reception signal output from each channel of the probe 2 that receives the ultrasonic echo is
The D converters 31 to 3x convert the digital data D1 to Dx. Next, each of the digital data D1 to Dx is delayed by the delay circuits 41 to 4x to obtain the digital data d1 to dx.
And Next, the digital data d1 to dx are quadrature-detected by the quadrature detection circuits 61 to 6x, and the channel in-phase component I is obtained.
1 to Ix and channel quadrature components Q1 to Qx are extracted. Next, the channel in-phase components I1 to Ix are added to the adding circuit 7I.
In addition, the combined in-phase component I is obtained and the channel quadrature components Q1 to Qx are added in the addition circuit 7Q to obtain the synthesized quadrature component Q. Then, the Doppler image and the color flow mapping image are generated by the DSC 8 from the combined in-phase component I and the combined quadrature component Q, and displayed on the display device 9.
The control circuit 5 determines a delay time for phasing between channels and controls the delay time of the delay circuits 41 to 4x by a control signal. Further, the control circuit 5 changes the frequency changing parameter n so that it becomes longer as the echo time becomes longer, and gives the frequency changing parameter n to the quadrature detection circuits 61 to 6x by a control signal.

As the delay circuits 41 to 4x, a "digital phase device" disclosed in Japanese Patent Laid-Open No. 5-184568 is disclosed.
Can be used.

FIG. 2 is a block diagram of the first channel quadrature detection circuit 61. The timing control circuit 103 sets the sampling cycle of the digital data d1 to dx to Ts,
When the number of divisions for dividing the period Ts is m, and the frequency changing parameter n is given from the control circuit 5,
The multiplexers 513 and 515 are controlled so as to output digital data at a cycle of "Ts + n (Ts / m)". In addition, “n” in the cycle of “Ts + n (Ts / m)”
Is added to the accumulator 104. However, when n = 0, the clear signal CL is output to the accumulator 104. Note that n is any of 0, 1, 2, ..., M-1.

The accumulator 104 cyclically cumulatively adds from the minimum value "0" to the maximum value "m-1", and outputs a sum i. For example, when n = 2 is given from the timing control circuit 103 in a cycle of "Ts + 2 (Ts / m)", 0, 2, 4, 6, 8 are cyclically output as the sum i. Further, for example, when n = 3 is given in the cycle of “Ts + 3 (Ts / m)”, the sum i is 0, 3, 6, 9,
2, 5, 8, 1, 4, 7 are cyclically output. Further, the accumulator 104 sets the sum i = 0 when it receives the clear signal CL.

The coefficient table 105, as shown in FIG. 3, is the i-th (i = 0, 1, ..., M-) of the time when two consecutive digital data d12 and d13 are divided by m.
Interpolation coefficients k1i, k2i, k3i, k4i for calculating the interpolation digital data e1i of 1) from the four digital data d11, d12, d13, d14 by mixed spline interpolation are stored. When the sum i is given from the accumulator 104, the interpolation coefficient k1i corresponding to the sum i,
k2i, k3i, and k4i are assigned to coefficient registers 19, 21, 26, 2
Output to 5. Note that the interpolation coefficients k1i, k when i = 0
2i, k3i, k4i are 0, 1, 0, 0, which means that the digital data d13 at the earlier time of the two consecutive digital data d12 and d13 becomes the interpolated digital data e10 as it is. is doing.

The data register 15 holds the first channel digital data d11. In addition, the data register 15
Shifts the previously held digital data to the data register 16 before holding new digital data. Therefore, the data register 16 holds the digital data d12 at the sampling time that is earlier than the sampling time of the first channel digital data d11 by the sampling time Ts. In addition, the data register 16
Shifts the previously held digital data to the data register 17 before holding new digital data. Therefore, the data register 17 holds the digital data d13 at the sampling time that is earlier than the sampling time of the first channel digital data d12 by the sampling time Ts. In addition, the data register 17
Shifts the previously held digital data to the data register 18 before holding new digital data. Therefore, the data register 18 holds the digital data d14 at the sampling time point before the sampling time Ts of the sampling time of the first channel digital data d13.

The coefficient registers 19, 21, 23 and 25 are
Interpolation coefficient k1i given from the coefficient table 105,
It holds k2i, k3i, and k4i.

The multipliers 20, 22, 24 and 26 have digital data d11, d12, d13 and d14 and coefficient registers 19 and 2 held in the data registers 15, 16, 17 and 18, respectively.
Interpolation coefficients k1i, k2i, k3i held in 1, 23, 25,
k4i is respectively multiplied, and the obtained product is output to the adder 27. The adder 27 adds the products and uses the sum e1i as the interpolated digital data E1.

The interpolation digital data E1 is multiplied by the multiplier 5
12 and the multiplexer 513. The multiplier 512 multiplies the interpolated digital data E1 by “−1” and outputs the interpolated digital data “−E1” whose sign is inverted to the multiplexer 513. The multiplexer 513 selects the interpolated digital data E1 or the interpolated digital data “−E1” or “0” in which the sign is inverted based on the control signal from the control circuit 5, and is instructed by the timing control circuit 103. Output to the multiplexer 515 at the timing. The multiplexer 5
Reference numeral 15 denotes the interpolation digital data E1 selected by the multiplexer 513 based on the control signal from the control circuit 5 or the interpolation digital data “−” whose sign is inverted.
The output of E1 "or" 0 "is switched to either the low-pass filter 516 or the low-pass filter 517, and is output at the timing instructed by the timing control circuit 103.

The low pass filter 516 extracts the base band and outputs it as the first channel in-phase component I1. Further, the low pass filter 517 extracts the base band and outputs it as the first channel quadrature component Q1.

FIG. 4 is an explanatory diagram of the first channel in-phase component I1 and the first channel quadrature component Q1 output when m = 10 and n = 2. First, at the start, i = 0, and the digital data d1a is directly interpolated digital data E1.
And is output as the first channel in-phase component I1. Then, "Ts + 2 (Ts / 1
0) ”, the digital data d1d, d1c, d1b,
Interpolated digital data E1 at the time of i = 2 is calculated from d1a, and this is output as the first channel orthogonal component Q1. Then, after "Ts + 2 (Ts / 10)",
Interpolation digital data E1 at the time of i = 4 is calculated from the digital data d1e, d1d, d1c, d1b, and interpolation digital data "-E1" with the sign thereof inverted is output as the first channel in-phase component I1. Then, "Ts + 2 (T
s / 10) ”, the digital data d1f, d1e,
Interpolated digital data E1 at time i = 6 from d1d and d1c
Is calculated, and the interpolated digital data “−E1” whose sign is inverted is output as the first channel orthogonal component Q1. Then, after "Ts + 2 (Ts / 10)",
From the digital data d1g, d1f, d1e, d1d, the interpolated digital data E1 at the time i = 8 is calculated and output as the first channel in-phase component I1. Then "Ts
+2 (Ts / 10) "time later, digital data d1
Interpolated digital data E1 at the time of i = 0 is calculated from i, d1h, dig, and d1f, which is the first channel quadrature component Q.
It is output as 1. The digital data used at this time is not d1h, dig, d1f, d1e, but d1i, d
1h, dig and d1f. This will be understood from the scale (FIG. 4) showing the output timing and the range of digital data held at that time. Then “Ts +
After 2 (Ts / 10) ", the digital data d1i,
The interpolated digital data E1 at the time of i = 2 is calculated from d1h, dig, and d1f, and the interpolated digital data "-E1" whose sign is inverted is output as the first channel in-phase component I1. The digital data used at this time is also
The same d1i, d1h, dig, and d1f as before. This will also be understood from the scale (FIG. 4) showing the output timing and the range of digital data held at that time.
Thereafter, similarly, the first channel in-phase component I1 and the first channel quadrature component Q are similarly cycled at "Ts + 2 (Ts / 10)".
1 and are sequentially output. This is the sampling period Ts
Digital data of the period 4 {Ts + 2 (Ts / 1
0)} is the result of digital quadrature detection at the reference frequency.

FIG. 5 is an explanatory diagram of the first channel in-phase component I1 and the first channel quadrature component Q1 output when m = 10 and n = 3. First, at the start, i = 0, and the digital data d1a is directly interpolated digital data E1.
And is output as the first channel in-phase component I1. Then, "Ts + 3 (Ts / 1
0) ”, the digital data d1d, d1c, d1b,
Interpolated digital data E1 at the time of i = 3 is calculated from d1a, and this is output as the first channel orthogonal component Q1. Then, after the time of "Ts + 3 (Ts / 10)",
Interpolation digital data E1 at time i = 6 is calculated from the digital data d1e, d1d, d1c, d1b, and interpolated digital data "-E1" whose sign is inverted is output as the first channel in-phase component I1. Then, "Ts + 3 (T
s / 10) ”, the digital data d1f, d1e,
Interpolated digital data E1 at time i = 9 from d1d and d1c
Is calculated, and the interpolated digital data “−E1” whose sign is inverted is output as the first channel orthogonal component Q1. Then, after the time of "Ts + 3 (Ts / 10)",
Interpolated digital data E1 at the time of i = 2 is calculated from the digital data d1h, dig, d1f, d1e, and is output as the first channel in-phase component I1. The digital data used at this time is dig, d1f, d1e, d1d.
Not d1h, dig, d1f, d1e. This will be understood from the scale (FIG. 5) showing the output timing and the range of digital data held at that time.
Then, after a time "Ts + 3 (Ts / 10)", the interpolated digital data E1 at the time of i = 5 is calculated from the digital data d1i, d1h, dig, d1f and is output as the first channel orthogonal component Q1. In the same way,
The first channel in-phase component I1 and the first channel quadrature component Q1 are sequentially output at a cycle of "Ts + 3 (Ts / 10)". This is nothing but the result of digital quadrature detection of the digital data of the sampling period Ts at the reference frequency of the period 4 {Ts + 3 (Ts / 10)}.

The configurations of the quadrature detection circuits 62 to 6x for the other channels are the same as those of the first channel quadrature detection circuit 61.

According to the ultrasonic diagnostic apparatus 1 described above, the reference frequency can be easily changed by changing the frequency changing parameter n. Then, the spectrum shift can be easily dealt with by controlling the frequency changing parameter n to increase as the echo time increases. In addition, it is possible to prevent a problem that folding occurs when the frequency shift is increased as in the conventional rotation matrix method.

If mixed spline interpolation is used as in the above embodiment, interpolation can be performed only with data of four points before and after the interpolation point, which is suitable as a real-time system. However, B spline interpolation, cloud type ruler spline interpolation, or the like may be used.

The "digital phase device" disclosed in Japanese Patent Laid-Open No. 5-184568 used as the delay circuits 41 to 4x has a quadrature detection circuit 61 to 6x as a basic configuration.
Since it is the same as, by devising the interpolation coefficient,
It is also possible that the functions of the delay circuits 41 to 4x are shared by the quadrature detection circuits 61 to 6x and the delay circuits 41 to 4x are omitted.

[0026]

According to the digital quadrature detection method and the digital quadrature detection device of the present invention, the reference frequency of the digital quadrature detection can be finely changed. Further, according to the ultrasonic diagnostic apparatus of the present invention, it becomes possible to deal with spectrum shift by a method different from the conventional method.

[Brief description of drawings]

FIG. 1 is a block diagram of an ultrasonic diagnostic apparatus according to an embodiment of the present invention.

FIG. 2 is a detailed block diagram of a first channel quadrature detection circuit of FIG.

FIG. 3 is an explanatory diagram of interpolation of digital data.

FIG. 4 is an explanatory diagram of a first channel in-phase component I1 and a first channel quadrature component Q1 output when m = 10 and n = 2.

FIG. 5 is an explanatory diagram of a first channel in-phase component I1 and a first channel quadrature component Q1 output when m = 10 and n = 3.

FIG. 6 is an explanatory diagram of spectrum shift.

FIG. 7 is an explanatory diagram of a dynamic filtering method.

FIG. 8 is an explanatory diagram of a rotation matrix method.

[Explanation of symbols]

1 Ultrasonic diagnostic equipment 2 probes 31-3x A / D converter 41 First Channel Delay Circuit 4x xth channel delay circuit 5 control circuit 61 First Channel Quadrature Detection Circuit 6x x-th channel quadrature detection circuit 7I, 7Q adder circuit 8 Digital scan converter 9 Display device 15-18 Data register 19,21,23,25 Coefficient register 20, 22, 24, 26 Multiplier 27 adder 103 Timing control circuit 104 Accumulator 105 coefficient table 512 multiplier 513, 515 multiplexer 516,517 Low-pass filter

─────────────────────────────────────────────────── ─── Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) A61B 8/00-8/15

Claims (3)

(57) [Claims] 1. A number of divisions m for dividing a sampling period Ts and a frequency change parameter n (0 ≦ n ≦ m−1, where n and m are integers) are specified, and a minimum value “0” to a maximum value “m−” are specified. The frequency change parameter n is cumulatively added in the range up to 1 "to calculate the sum i, and the coefficient is used for the interpolation calculation and corresponds to each integer from the minimum value" 0 "to the maximum value" m-1 ". A coefficient corresponding to the sum i is input from among the coefficients, and digital data (actual digital data) sampled at every sampling period Ts is input, and a plurality of the real digital data and the coefficient corresponding to the sum i are input. Of the time when m is divided between two continuous real digital data by the interpolation calculation using (where i = 0, the earlier time of the two continuous real digital data is set. )of Digital data (interpolation digital data) is calculated, interpolation digital data is output at a cycle of "Ts + n (Ts / m)", and the output interpolation digital data or the interpolation digital data with its sign inverted or "0" is selected. A digital quadrature detection method, which is characterized in that 2. Data storage means for storing a plurality of digital data (actual digital data) sampled at every sampling period Ts, and cumulatively cyclically add from a minimum value "0" to a maximum value "m-1". A cumulative addition means, which is a frequency changing parameter n
(0 ≦ n ≦ m−1, where n and m are integers), and a cumulative addition means for cumulatively adding and outputting the sum i, and a coefficient used in the interpolation calculation from the minimum value “0” to the maximum value “m− A coefficient table which stores coefficients corresponding to integers up to 1 ″, outputs the coefficient corresponding to the sum i output by the cumulative addition means, and a plurality of real digital data read from the data storage means The distance between two consecutive real digital data is m
The i-th digital data (interpolated digital data) of the divided time (however, when i = 0, the earlier time of the two continuous real digital data) is calculated, and "Ts + n ( Ts / m) ”, interpolation calculation means for outputting interpolation digital data at a cycle of Ts / m), sign inverting means for inverting the sign of the interpolation digital data, interpolation digital data, or interpolation digital data with the sign inverted, or“ 0 ” A digital quadrature detection device, comprising: a switching selection unit for selecting. 3. An ultrasonic diagnostic apparatus comprising the digital quadrature detection device according to claim 2.