JP3525836B2 - Method for manufacturing high flatness semiconductor wafer and high flatness semiconductor wafer - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a high flatness semiconductor wafer and a high flatness semiconductor wafer capable of obtaining ultra-high flatness capable of coping with a high degree of integration.

[0002]

2. Description of the Related Art As a technique for flattening a semiconductor wafer such as a silicon wafer, a method of mechanically or mechanically chemically polishing a front or back surface to be processed is used such as lapping or polishing. However, LS
Further miniaturization of the wiring width is indispensable with the increase in the density and the number of layers of the wiring such as I, and the higher flatness (ultra-high flatness) of the silicon wafer is required. In the flattening technique using the polishing method, the flatness obtained is limited.

Therefore, in recent years, for example, Japanese Patent Laid-Open No. 11-31 has been proposed.
A technique disclosed in Japanese Patent Application Laid-Open No. 677 and Japanese Patent Laid-Open No. 11-67736, that is, a technique for flattening a surface to be processed by performing local plasma etching has been proposed.
In this type of plasma etching technology, the flatness (in-plane thickness variation) of a silicon wafer is obtained in advance, and then the etching amount of each part is calculated based on that data, and the plasma is etched with the etching amount according to the thickness variation. High flatness can be obtained by etching.

As a flatness measuring device for measuring the thickness distribution of the wafer, the tips of a pair of probes are opposed to each other at a constant interval, a silicon wafer is arranged between the probes, and the capacitance generated between the probes is measured. A capacitance sensor has been used to measure the thickness of a silicon wafer by measuring.

[0005]

However, the above-mentioned conventional flattening technique has the following problems. That is, conventionally, the thickness distribution of the wafer is measured, and the flatness (TT
V or GBIR: the front surface was flattened by plasma processing so as to obtain the difference between the maximum value and the minimum value of the distance from the back surface reference surface, but depending on the device, the reference surface was set for each site on the wafer surface. Surface-referenced flatness (SFQR:
In many cases, the difference between the maximum and minimum height of each site surface on the site best-fit reference surface is required. In the method of processing the surface based on the thickness distribution, the surface standard such as SFQR It was difficult to obtain flatness.

The present invention has been made in view of the above-mentioned problems, and a method of manufacturing a high flatness semiconductor wafer and a high flatness by which a high flatness can be obtained on the basis of the surface of each site by the plasma etching method. An object is to provide a semiconductor wafer.

[0007]

The present invention has the following features to attain the object mentioned above. That is, the present invention
The first method for manufacturing a high flatness semiconductor wafer is a method for manufacturing a high flatness semiconductor wafer in which a surface of a semiconductor wafer is processed by plasma etching as a surface to be processed. And a plasma processing step for locally processing and flattening the surface to be processed by plasma etching while changing an etching amount according to the unevenness measured in the surface to be processed measurement step by plasma etching. In the step, a technique is adopted in which the period of the unevenness is decomposed into a high frequency component and a low frequency component based on a preset boundary frequency, and processing is performed according to only the unevenness of the high frequency component.

In this high flatness semiconductor wafer manufacturing method, in the plasma processing step, the period of the unevenness is decomposed into a high frequency component and a low frequency component based on a preset boundary frequency, and only the unevenness of the high frequency component is dealt with. Since the unevenness of the low frequency component, which is a large swell component, remains unchanged, only the unevenness of the high frequency component that affects the flatness within one site can be flattened. Further, since only the irregularities of the high frequency component are processed, the machining allowance is small and the throughput is high.

According to a second method of manufacturing a high flatness semiconductor wafer of the present invention , in the first method of manufacturing a high flatness semiconductor wafer, the step of measuring a surface to be processed includes forming a spot of laser light on the surface to be processed. A technique of measuring the unevenness by the reflected light that is emitted and reflected is adopted.

In this method of manufacturing a semiconductor wafer with high flatness, in the surface-to-be-processed measuring step, since the surface to be processed is irradiated with a laser beam in a spot shape and the unevenness is measured by reflected light, the unevenness of the surface itself is measured. By directly measuring with a laser beam in the form of minute spots, it is possible to measure irregularities with a much higher accuracy than in the conventional electrostatic capacitance method.

[0011] In the present invention the third high flatness semiconductor wafer manufacturing method is the manufacturing method of the first or second high-flatness semiconductor wafer, the plasma processing step, select the reactive radicals generated by the plasma The technique of performing plasma etching as a main etchant is employed.

In this method of manufacturing a semiconductor wafer with high flatness, in the plasma processing step, plasma etching is performed using reactive radicals generated by plasma as a main etchant. Therefore, among the ions and radicals generated by plasmaization, This is a chemical reaction etching due to radicals, and unlike plasma etching using ions as the main etchant, there is no physical damage, and damageless planarization processing is possible.

[0013] In the present invention the fourth high flatness semiconductor wafer manufacturing method is a method of manufacturing a high flatness semiconductor wafer according to the first to third one of said plasma processing step, the said boundary frequency A technique of determining according to the site size of the work surface is adopted.

In this method of manufacturing a semiconductor wafer with high flatness, the boundary frequency is determined according to the site size of the surface to be processed in the plasma processing step, so that it is possible to perform appropriate flattening corresponding to the site size. It is possible to easily obtain high flatness based on the surface reference such as.

[0015] In high flatness semiconductor Kwai Ha of the present invention, a technique surface is machined is employed by the manufacturing method of high flatness semiconductor wafer according to any one of first to fourth.

Since the surface of this high-flatness semiconductor wafer is processed by the method for producing a high-flatness semiconductor wafer described above, it has a high flatness according to the surface standard such as SFQR and the like, and it is a mirror surface wafer corresponding to high integration. Is suitable as

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a method for manufacturing a high flatness semiconductor wafer and a high flatness semiconductor wafer according to the present invention will be described below with reference to FIGS. 1 to 4.

The high flatness semiconductor wafer manufacturing method of this embodiment is, for example, a method of slicing a silicon wafer from an ingot of single crystal silicon and processing it into a high flatness wafer. First, as shown in FIG. 1, first, a plurality of silicon wafers are each sliced into a predetermined thickness from a silicon ingot by a slicing step S1.

Further, the peripheral edge of the silicon wafer W sliced in the chamfering step S2 is chamfered to form a chamfered surface. Next, the silicon wafer W is lapped by the lapping step S3, and the uneven layer generated by the slicing is removed. This wrapping process S
3 is performed using a known lapping device,
A slurry in which abrasive particles and a working liquid are mixed is put between a lapping plate and a silicon wafer W, and relative movement is performed while applying pressure to both, to perform mechanical polishing.

Next, in the etching step S4, the lapping silicon wafer W is subjected to an etching treatment with an etching solution to remove processing damage due to mechanical polishing (lapping and chamfering). Further, in the polishing step S5, the surface of the etched silicon wafer W is mechanically and chemically polished by a predetermined thickness to be mirror-polished.

This polishing step S5 is performed using a known polishing apparatus. The polishing apparatus performs a mechanochemical polishing while bringing a polishing cloth into contact with the surface of the silicon wafer W and supplying an alkaline polishing liquid.

Next, the unevenness measuring step (processed surface measuring step)
As shown in FIG. 2, the unevenness shape of the surface (processed surface) S of the silicon wafer W polished in S6 is measured by the flatness measuring device 1. This flatness measuring device 1
A non-contact type displacement sensor 2 which is arranged opposite to the surface S of the silicon wafer W and measures unevenness using the laser light L.
And a control unit C for controlling the displacement sensor 2 to move along the surface S and storing the measured unevenness data.

The displacement sensor 2 irradiates the surface S with the laser light L emitted from the built-in semiconductor laser through the movable objective lens in a spot shape, and further reflects the laser light L reflected by the surface S. The concave and convex of the surface S are measured by receiving light by an internal focus detector and moving the movable objective lens based on the received light state, converting the movement into a signal by an operating transformer, and digitally analyzing the change in the signal. Has become. The spot diameter of the laser light L can be set to about several μm to 100 μm.

After measuring the unevenness of the surface S of the silicon wafer W, based on the obtained unevenness data, the surface S is subjected to the plasma processing in the plasma processing step S7 to be flattened. The etching amount of each part at this time is, as shown in FIG. 3, the unevenness data D of the surface S recorded in the control part C.
The unevenness cycle from 0 is divided into high-frequency component unevenness data DH and low-frequency component unevenness data DL based on a preset boundary frequency, and is set in advance only for the high-frequency component unevenness data DH.

The decomposition of the unevenness data D0 is performed by a computer process such as a bandpass filter in the control unit C or another computer, and the unevenness data D of the high frequency component is obtained.
H is extracted. The boundary frequency is determined according to the site size on the surface S, the wafer size, and the like.

In the above plasma processing, the etching gas is converted into plasma by microwaves to generate ions and reactive radicals, and among these, the radicals are locally used as a main etchant (that is, an etchant having more reactive radicals than ions). Is a DCP (Dry Chemical Planarization) method for performing general plasma etching, and the conventional plasma processing for etching using ions as the main etchant is accompanied by physical damage, whereas etching is performed by a chemical reaction by radicals. Therefore, it is a method that enables damageless processing.

In this embodiment, in order to plasma-etch the silicon wafer W, for example, SF6 is used as an etching gas, and as shown in the following reaction formula (1),
This SF6 is decomposed and activated by microwaves to become ions (SFx) and radicals (neutral radicals F ^* ), of which mainly radicals are locally ejected to a predetermined portion on the back surface of the silicon wafer W, As shown in the following reaction formula (2), etching is performed only by a chemical reaction. SF6 → F ^* + SFx + ... (1) F ^* + 4Si → SiF4 (2)

In order to separate the ions SFx and the radicals F ^* and jet the radicals from the jet nozzle 1, as shown in FIG. 4, the ions SFx cannot exist for a long distance with respect to the radicals F ^* . By utilizing the characteristics and separating the plasma generation region M by microwaves from the tip of the injection nozzle 1 to the upstream side, the radical F ^* can be mainly injected. That is, the above DCP method is different from the method of generating high frequency plasma by high frequency power between a silicon wafer and an etching gas.
There is an advantage that the etching gas can be turned into plasma by microwaves at a position apart from the silicon wafer W, and radicals can be selectively used.

The flatness after the plasma processing as described above is uneven at each site (one section when divided into a plurality of chips, etc.) on the surface S such as SFQR, SFLR, SFQD, GFLR, or the like. A reference plane is set from the data by the method of least squares, etc., and the flatness or the like based on the surface reference indicated by the site surface height with respect to this reference plane is evaluated.

As described above, in the present embodiment, in the unevenness measuring step S6, the unevenness of the surface S itself is directly measured by the reflected light which is obtained by irradiating the surface S with the laser light L in a spot shape and reflected. It becomes easy to improve the flatness. Further, in the plasma processing step S7, the cycle of the unevenness is decomposed into the unevenness data DH of the high frequency component and the unevenness data DL of the low frequency component based on the boundary frequency determined according to the site size or the wafer size, and the high frequency component Since the unevenness data DH is processed according to only the unevenness data DH, the unevenness of the low frequency component, which is a large swell component, remains unchanged.
It is possible to appropriately flatten only the unevenness of the high-frequency component that has an influence within one site according to the site size, and obtain a high flatness in SFQR or the like.

Further, since only the concavities and convexities of the high frequency component are processed, the machining allowance due to the processing is small and the throughput is high. Therefore, it becomes possible to manufacture a wafer with high flatness based on a surface standard such as SFQR at low cost. In the plasma processing step S7, plasma etching by radicals is performed on the basis of the data obtained in the unevenness measuring step S6 of the laser light measuring method, so that a wafer having a very high flatness is processed without damage.
It can be manufactured. As described above, the silicon wafer W manufactured according to the present embodiment is an ultra-high flatness wafer having a high flatness in SFQR and the like and capable of handling a high degree of integration.

The present invention also includes the following embodiments. In the above embodiment, the semiconductor wafer is applied to a silicon wafer, but it may be applied to a method for manufacturing another semiconductor wafer, for example, a compound semiconductor wafer (gallium / arsenic wafer, etc.).

[0033]

According to the method of manufacturing a high flatness semiconductor wafer and the high flatness semiconductor wafer of the present invention, in the plasma processing step, a high frequency component and a low frequency component are generated based on a boundary frequency in which the cycle of the irregularities is preset. Decomposed into
Since it is processed according to only the unevenness of the high frequency component, only the unevenness of the high frequency component that affects the flatness of each site can be flattened, and it is possible to support high integration in flatness based on the surface standard such as SFQR. A wafer with a very high flatness can be obtained. Also, since only the high frequency component irregularities are processed, the machining allowance is small, the throughput is improved, and it is possible to manufacture at low cost.

[Brief description of drawings]

FIG. 1 is a flowchart showing a method of manufacturing a high flatness semiconductor wafer and a manufacturing process in one embodiment of the high flatness semiconductor wafer according to the present invention.

FIG. 2 is a schematic configuration diagram showing a flatness measuring device in an unevenness measuring step in one embodiment of the method for manufacturing a high flatness semiconductor wafer and the high flatness semiconductor wafer according to the present invention.

FIG. 3 is an explanatory diagram showing decomposition of frequency components of unevenness data in one embodiment of the method for manufacturing a high flatness semiconductor wafer and the high flatness semiconductor wafer according to the present invention.

FIG. 4 is an explanatory view showing plasma processing by DCP in one embodiment of the method for manufacturing a high flatness semiconductor wafer and the high flatness semiconductor wafer according to the present invention.

[Explanation of symbols]

D0 unevenness data DL Low frequency component unevenness data DH High-frequency component unevenness data L laser light S5 polishing process S6 Concavo-convex measurement process (processed surface measurement process) S7 plasma processing process S Silicon wafer surface W Silicon wafer (semiconductor wafer)

Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/3065

Claims (3)

(57) [Claims] 1. A method of manufacturing a high-flatness semiconductor wafer, wherein a surface of a semiconductor wafer is processed as a surface to be processed by plasma etching, comprising: a surface-to-be-processed step of measuring irregularities of the surface to be processed; And a plasma processing step of locally processing and flattening the surface to be processed while varying the etching amount according to the unevenness measured in the surface to be processed measuring step, wherein the plasma processing step has a cycle of the unevenness. decomposed into high and low frequency components based on the boundary frequency set in advance, when processed in accordance with only the unevenness of the high frequency components together
In the plasma processing step, the boundary frequency is set to the processed object.
It is determined according to the site size of the surface, and the plasma processing step is performed by the plasma generated.
Selectively dissociate reactive radicals and use them as the main etchant
And performing the plasma etching as described above . 2. The method for manufacturing a high-flatness semiconductor wafer according to claim 1, wherein in the step of measuring a surface to be processed, the unevenness is formed by reflected light reflected by irradiating the surface to be processed with laser light in a spot shape. A method of manufacturing a high flatness semiconductor wafer, which comprises measuring. 3. A high flatness semiconductor wafer, the surface of which is processed by the method for producing a high flatness semiconductor wafer according to claim 1.