JP3523102B2 - Semiconductor integrated circuit device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device having an internal circuit that executes a predetermined circuit function or a storage circuit that stores predetermined storage information,
In particular, it prevents the circuit from being analyzed by a third party, imitates the circuit, duplicates it, or leaks stored information.
The present invention relates to a semiconductor integrated circuit device in which tampering is prevented.

[0002]

2. Description of the Related Art In a semiconductor integrated circuit device, a large number of semiconductor elements arranged on a semiconductor substrate are
To protect from the influence of external atmosphere such as stress and light,
Sealed with resin etc., shielded from light, malfunction due to mixing of light and moisture,
Characteristic variations due to stress are prevented. In addition, the circuit component is covered with a protective film such as a silicon oxide film in order to protect it from the external atmosphere.

[0003]

Some circuit components in a semiconductor integrated circuit device require a long time for development, and some have excellent originality, so that they should not be imitated or duplicated by others. Some things are preferable to set. Further, some semiconductor integrated circuit devices have a built-in memory element to store important information, and it is preferable to prevent the information from being leaked or tampered with.

Usually, the semiconductor integrated circuit device is sealed with resin or the like, and it is difficult to analyze the operation of the contents of the memory circuit from the outside. That is, a microcomputer or the like has storage elements (ROM, RAM, flash memory, etc.) built therein. Since these storage elements exchange data via the CPU, the contents of these storage elements are directly It is not output to the outside of the semiconductor integrated circuit device. Therefore, the resin of the semiconductor integrated circuit device is unsealed, and in order to prevent malfunction due to light, the device is operated in the light-shielded state and the information in the memory element is read.

As described above, if the resin of the semiconductor integrated circuit device is unsealed, the information in the memory element can be easily read out, which often leads to duplication, imitation, exploitation of information, and falsification by others. possible.

The present invention has been made in order to solve the above-mentioned conventional problems, and makes it difficult to analyze the operation of the circuit components, and to prevent duplication, imitation, exploitation of information, and falsification by others. A semiconductor integrated circuit device is provided.

[0007]

A semiconductor integrated circuit device according to a first aspect of the present invention is a semiconductor integrated circuit device having an internal circuit for executing a predetermined circuit function, which detects presence or absence of incident light. A photodetector circuit that outputs a detection signal, and in response to a photodetection signal from the photodetector circuit, controls the internal circuit to a normal operation state, and in response to a light non-detection signal from the photodetector circuit, The internal circuit is in an operating state different from the normal operating state (operation stopped state or runaway state of CPU, etc.)
And an operation control circuit for controlling the above.

A semiconductor integrated circuit device according to a second aspect of the present invention is a semiconductor integrated circuit device having a memory circuit storing predetermined memory information, detects the presence or absence of incident light, and outputs a detection signal. And a control circuit that outputs a stored information erase signal for instructing the erase of stored information in the storage circuit in response to a light non-detection signal from the photo detection circuit. To do.

That is, a photodetector circuit for detecting the presence or absence of incident light and outputting a detection signal is built in the semiconductor integrated circuit device, and when the semiconductor integrated circuit device is operated, it is in a state of being irradiated with light. Otherwise, the system is configured so as not to operate, and in a normal use state, the semiconductor integrated circuit device is exposed to light for use. Therefore, in the semiconductor integrated circuit device according to the present invention, light is irradiated only to the sensor portion of the photodetection circuit in a part of the package such as resin that seals and shields the circuit constituent portion. A window is formed in advance, and the light detection circuit can detect the light incident through the window.

On the other hand, normally, when analyzing the circuit configuration,
In order to prevent malfunction due to light by opening a package of resin or the like that protects the circuit components of the semiconductor integrated circuit device, the semiconductor integrated circuit device is shielded to perform an operation analysis.
In this case, the light non-detection signal is output from the photo detection circuit, and the internal circuit enters an operation state different from the normal operation state. Therefore, operation analysis cannot be performed and stored information cannot be read. Further, since the information stored in the memory circuit is erased by the light non-detection signal from the light detection circuit,
This prevents leakage of stored information.

As described above, by incorporating the photodetection circuit in the semiconductor integrated circuit device, it is detected whether or not the semiconductor integrated circuit device is irradiated with light, and thereby it is determined whether or not the semiconductor integrated circuit device is in a normal use state. When not in normal use,
That is, at the time of operation analysis by a third party, the semiconductor integrated circuit device operates by configuring the circuit so that the semiconductor integrated circuit device performs an operation (stop operation, erase operation of stored information, etc.) different from the normal operation. It can be prevented from being analyzed, and imitation, leakage of stored information, etc. can be prevented.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block configuration diagram conceptually showing the configuration of an embodiment of the present invention.

As shown in the figure, the semiconductor integrated circuit device of this embodiment includes a photosensor, and a detection signal 4 (a high-level photodetection signal when an incident light from the outside is detected, a photodetection signal from the outside is detected). When incident light is not detected, the photodetector circuit 1 that outputs a low-level photonon-detection signal, and the supply / stop of supply of the clock signal 5 to the CPU 3 are controlled according to the output signal from the photodetector circuit 1. And an operation control circuit 2 including an AND gate.

In normal use, it is used in a state where it is irradiated with light. Therefore, the photodetector circuit 1 outputs the high-level photodetection signal 4, the clock signal 5 is supplied to the CPU 3 through the AND gate, and the normal operation is executed. On the other hand, at the time of motion analysis by a third party,
As described above, the operation analysis is performed in the light-shielded state. Therefore, the photodetection circuit 1 outputs the low-level photodetection signal 4
Is output and the AND gate is closed, the supply of the clock signal 5 to the CPU3 is stopped, and the CPU3
Stops working.

FIG. 2 is a top view showing the appearance of the package of this embodiment. As shown in the figure, an opening 7 is formed in a part of the package 6 corresponding to a region of the photodetection circuit section 8 where the photosensor is provided. As a result, in normal use, the external light incident on the semiconductor integrated circuit device is incident on the photosensor of the photodetection circuit unit 8 through the opening 7, and the photodetection circuit shown in FIG. 1, the high level photodetection signal 4 is output, and the semiconductor integrated circuit device executes the normal operation.

The specific structure of the photodetector circuit 1 will be described below in detail with reference to FIG.

In the figure, 9 and 10 and 11 are N-channel MOS transistors, 12 is a photosensor (photodiode), 14 is an operational amplifier, 19 is a changeover switch, 21 is a constant current source, and Reference numeral 15 is a reset signal and 18 is a select signal. The photodetector circuit having such a configuration can be easily configured by using, for example, a CMOS image sensor forming technique. Since the CMOS image sensor can be configured by adding only one mask for controlling the threshold voltage of some N-channel MOS transistors to the normal CMOS process, the photodetection circuit can be easily formed on the semiconductor substrate. It is possible. Needless to say, the structure of the photodetector circuit is not limited to that shown in FIG. 3, and it is possible to detect the presence or absence of incident light from the outside and output a predetermined detection signal. Any structure may be used as long as it is one.

As shown in FIG. 3, in the photodetector circuit of this embodiment, the N-channel MOS transistor 9 for setting the initial state of the photosensor 12 and the output of the photosensor 12 are connected to the gate thereof. N-channel MO
When using the S transistor 10 and a plurality of photosensors 12, a select signal 18 for selecting a photosensor to be activated is an N-channel MOS transistor 11 connected to its gate, a constant current source 21, It is composed of an operational amplifier 14 which detects a level change of the node 13. If only one photosensor 12 is provided, the N-channel MOS transistor 11 and the select signal 18 are unnecessary. Also, as mentioned above,
The semiconductor integrated circuit device of this embodiment is packaged by a package 6 having an opening 7 as shown in FIG. 2, and external light incident from the opening 7 is incident on the photosensor unit 12 of the photodetector circuit. The formation position of the opening 7 is set so as to be irradiated. The PN junction portion other than the photo sensor portion 12 is shielded from light by the package.

Next, the operation of the photodetector circuit shown in FIG. 3 will be described.

The reset signal 15 is set to the high level and the potential of the photosensor 12 is set to the high level in advance. Next, with the reset signal 15 set to the high level, the select signal 18 is set to the high level and the changeover switch 1
9 is connected to the node 17 side,
Is set to a reference level (power supply voltage Vdd). Then
After connecting the changeover switch 19 to the node 16 side, the reset signal 15 is set to low level. Select signal 18
When the photosensor 12 selected in 1 is irradiated with light, excited electrons are generated and the output potential of the photosensor 12 (the gate potential of the N-channel MOS transistor 10) decreases. As a result, the on-resistance of N channel MOS transistor 10 increases and the potential of node 13 decreases. On the other hand, when no light is incident on the photo sensor 12, the potential of the node 13 does not decrease. The operational amplifier 14 detects this and outputs a detection signal 20.
Note that the operational amplifier 14 outputs a high-level photodetection signal when a decrease in the potential of the node 13 is detected,
On the other hand, when no decrease in the potential of the node 13 is detected, a low-level optical non-detection signal is output.

In the above embodiment, when there is no light incident from the outside, the supply of the clock signal to the CPU is stopped, and the CPU is put into the operation stop state to make it impossible to read the stored information from the storage circuit. However, the operation analysis can be similarly disabled by setting the CPU to the runaway state instead of the operation stop state.

Further, in place of the configuration for stopping the operation of the CPU, or in combination with the configuration, when the light incident from the outside is not detected, the internal storage circuit (flash memory or the like) is forced. Even if the configuration is such that erasing is performed, it is possible to prevent imitation of a circuit, leakage of stored contents, and the like.

FIG. 4 shows a one-chip microcomputer with a built-in flash memory when no external light is detected.
An example of a configuration in which both the operation stop of the CPU and the forced erase of the flash memory are executed will be shown.

Generally, in a microcomputer, built-in memory (ROM, RAM, flash memory)
Is not directly output to the outside of the LSI. CPU
Data is exchanged via the. Therefore,
If the supply of the clock signal to the CPU is stopped based on the light non-detection signal to stop the operation of the CPU, it becomes difficult to read the data in the built-in memory. Further, if the built-in data is erased by utilizing the erase operation function of the flash memory, the data leakage can be prevented.

[0026]

As described in detail above, according to the present invention, a semiconductor integrated circuit device having an internal circuit for executing a predetermined circuit function or a memory circuit storing predetermined memory information is provided. It is possible to prevent the circuit from being subjected to operation analysis by a third party, and it is possible to prevent the circuit from being imitated, duplicated, or the stored information leaked or tampered with.

[Brief description of drawings]

FIG. 1 is a block configuration diagram conceptually showing the configuration of an embodiment of the present invention.

FIG. 2 is a top view showing the appearance of the package of the same embodiment.

FIG. 3 is a circuit configuration diagram showing a specific configuration of a photodetector circuit in the same embodiment.

FIG. 4 is another embodiment of the present invention, in a one-chip microcomputer with a built-in flash memory, when the external light is not detected, both the operation stop of the CPU and the forced erase of the flash memory are executed. It is a block block diagram which shows one structural example at the time of setting.

[Explanation of symbols]

1 Photodetector circuit 2 Operation control circuit 3 CPU 4 Detection signal 5 clock signals 6 packages 7 openings 8 Photodetector circuit

Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/822 G06F 12/14 320 G06F 15/78 510 H01L 27/04

Claims (2)

(57) [Claims] 1. A semiconductor integrated circuit device having a memory circuit for storing predetermined memory information, wherein reading of the memory information malfunctions in a light receiving state, a light for detecting the presence or absence of incident light and outputting a detection signal. a detection circuit, in response to light non-detection signal from the light detection circuit, and a control circuit for outputting stored information erasing signal for instructing erasing of information stored in the storage circuit, the external light, the light detecting Inject only into the circuit, the memory circuit
It is sealed in the package so that it does not enter the external light.
Outputs a light detection signal that detects incident light and enables normal operation
A semiconductor integrated circuit device characterized by: 2. The semiconductor integrated circuit device according to claim 1, wherein the memory circuit includes a flash memory.