JP3520842B2 - Electro-optical device and electronic equipment using the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electro-optical device in which a semiconductor layer is formed on a substrate, and electronic equipment using the same. In particular, an electro-optical device in which both ends of the gate electrode on the semiconductor layer are extended to the outside of the semiconductor layer in the gate length direction,
And an electronic device using the same.

[0002]

2. Description of the Related Art SOI technology for forming a silicon thin film on an insulating substrate and forming a semiconductor device on the silicon thin film has been widely studied because it has advantages such as high speed operation of elements, low power consumption and high integration. Has been done.

As one of the SOI technologies, there is a technology for manufacturing an SOI substrate by bonding single crystal silicon substrates. This method, which is generally called a bonding method, involves bonding a single crystal silicon substrate and a supporting substrate by utilizing hydrogen bonding force, and then strengthening the bonding strength by heat treatment, and then grinding or polishing the single crystal silicon substrate. Alternatively, a thin film single crystal silicon layer is formed over a supporting substrate by etching. According to this method, since a single crystal silicon substrate is directly thinned, a high-performance device having excellent crystallinity of the silicon thin film can be produced.

Further, as an application of this bonding method, hydrogen ions are implanted into a single crystal silicon substrate, and this is bonded to a supporting substrate, and then a thin film silicon layer is subjected to heat treatment to form a thin film silicon layer into a hydrogen implantation region of the single crystal silicon substrate. (US Pat. No. 5,374,564), or a single crystal silicon layer is epitaxially grown on a silicon substrate having a porous surface, and the silicon substrate is removed after adhering this to a supporting substrate and the porous silicon layer is etched. Method for forming an epitaxial single crystal silicon thin film on a supporting substrate (Japanese Patent Laid-Open No. 4-34641).
8) etc. are known. The SOI substrate by such a bonding method is used for manufacturing various devices like the normal bulk semiconductor substrate. However, as a characteristic different from the conventional bulk substrate, various materials are used for the supporting substrate. Can be mentioned. That is, as well as a normal silicon substrate as a support substrate,
Transparent quartz, a glass substrate, or the like can be used. By forming a single crystal silicon thin film on a transparent substrate, a high performance transistor device using single crystal silicon with excellent crystallinity for devices that require light transparency, such as transmissive liquid crystal display devices. Can be formed.

By the way, a normal MOS on a silicon substrate
FET (Metal Oxide Semiconductor)
tor Field Effect Transist
or), the parasitic MOSFET is prevented from being driven by increasing the impurity concentration below the field oxide film (so-called LOCOS) separating the MOSFET region from the well concentration.

[0006]

By the way, in an electro-optical device such as a liquid crystal device, for example, a transistor element constituting a switching means of a TFT array is completely separated by an oxide insulating film. At that time, a parasitic MOSFET is generated at the end of the semiconductor layer forming the transistor element.
The above structure will be described with reference to FIGS. FIG. 4 is a cross-sectional view in the gate width direction of a TFT that uses a so-called mesa etching method for separating semiconductor layers. Mesa-etched semiconductor layer 1
Then, the gate oxide film 2 is formed. A gate electrode 3 is formed on the gate oxide film 2. In the configuration described above, the electric field is concentrated on the shoulder 40 at the end of the semiconductor layer, which is indicated by the circle in the figure. Therefore, this portion becomes a parasitic MOSFET having a threshold value smaller than the original threshold value. In order to suppress such parasitic MOSFET, conventionally, the impurity concentration of the shoulder 40 at the end of the semiconductor layer has been increased. FIG. 5 shows a so-called LO for separating semiconductor layers.
FIG. 9 is a cross-sectional view in the gate width direction of a TFT using COS isolation. When the gate electrode 3 is formed by gate-oxidizing the semiconductor layer 1 separated by LOCOS, the semiconductor layer end portion 5 indicated by a circle in the figure is formed.
When 0, the film thickness is thin. Therefore, this portion becomes a parasitic MOSFET having a threshold value smaller than the original threshold value. In order to suppress such parasitic MOSFET, conventionally, the impurity concentration of the semiconductor layer end portion 50 has been increased.

As described above, the generation of the parasitic MOSFET at the end portion of the semiconductor layer forming the transistor element can be prevented by increasing the impurity concentration in that portion. In order to create such a region having a high impurity concentration, it is usually necessary to select an implantation region by a photo process. Further, an annealing process is required to activate the implanted impurities. The implanted impurities diffuse during the annealing process. That is, the region where the impurity concentration is increased is determined by two factors: the precision of the photo process and the spread due to the diffusion of impurities. Therefore, it is difficult to accurately create such a region having an increased impurity concentration. Since the region in which the impurity concentration is increased determines the width of the transistor, when such a transistor element is used as a switching element such as liquid crystal, there is a problem in that the element capability varies and display unevenness occurs.

The present invention has been made to solve the above problems, and prevents a transistor element composed of a semiconductor layer covered with an insulating film from malfunctioning due to a parasitic MOSFET, and makes the electrical characteristics of the element uniform. It is an object of the present invention to provide an electro-optical device that can be operated and electronic equipment using the same.

[0009]

In order to solve such a problem, an electro-optical device according to the present invention includes a plurality of scanning lines on a substrate, a plurality of data lines intersecting with the plurality of scanning lines, and each of the scanning lines. An electro-optical device having a line and a transistor connected to each of the data lines, and a pixel electrode connected to the transistor, wherein at least a part of both ends in the gate width direction is formed in the gate electrode forming the transistor. It is characterized in that it is inside the semiconductor region where the transistor is formed, and both ends of the gate electrode are extended to the outside of the semiconductor region where the transistor is formed in the gate length direction.

According to this structure of the present invention, it is possible to prevent generation of a parasitic MOSFET due to the absence of the gate electrode on the end of the channel portion of the semiconductor layer. Further, by extending the end portion of the gate electrode in the gate length direction, it is possible to easily separate it from the source / drain region. Further, since the gate width of the transistor can be established only by etching the gate electrode, it is possible to suppress variations among the transistors to be small.

The electro-optical device of the present invention is characterized in that the semiconductor layer forming the transistor is made of single crystal silicon.

According to such a structure of the present invention, since the semiconductor layer is single crystal silicon, it is possible to manufacture a device having high capability.

The electro-optical device according to the present invention is characterized in that the semiconductor layer forming the transistor is made of polycrystalline silicon.

According to this structure of the present invention, since the semiconductor layer is made of polycrystalline silicon, it is possible to inexpensively manufacture the electro-optical device.

The electro-optical device according to the present invention is characterized in that the substrate is made of an insulating material. According to such a configuration of the present invention, it is possible to use a transparent substrate, and it can be applied to a light transmissive electro-optical device.

The electro-optical device according to the present invention is characterized in that the substrate is a quartz substrate. According to such a configuration of the present invention, by using a quartz substrate, a high temperature process of 1000 ° C. or higher can be applied, and an element with high capability can be produced.

The electro-optical device according to the present invention is characterized in that the substrate is a glass substrate.

According to such a configuration of the present invention, by using the glass substrate, the element can be formed on the substrate having a large area, and the electro-optical device can be manufactured at low cost.

In the electro-optical device of the present invention, a plurality of scanning lines on the substrate, a plurality of data lines intersecting the plurality of scanning lines, a transistor connected to each of the scanning lines and each of the data lines, An electro-optical device having a pixel electrode connected to the transistor, wherein in a gate electrode forming the transistor, at least a part of both ends in a gate width direction is inside a semiconductor region forming the transistor, Both ends of the gate electrode extend in the gate length direction to the outside of the semiconductor region forming the transistor, and at least one of the channel regions of the transistor drawn from both ends in the gate width direction is electrically connected. It is characterized by

According to the structure of the present invention, by electrically connecting the channel regions of the transistors, so-called substrate floating effect can be prevented, and an electro-optical device having a high source-drain breakdown voltage can be manufactured. it can.

The electro-optical device of the present invention is characterized in that the wiring electrically connected to the channel region of the transistor is a capacitance line.

According to such a configuration of the present invention, it is not necessary to newly prepare wiring for electrically connecting the channel region of the transistor, and the light transmission type electro-optical device can have a high aperture ratio and a bright electro-optical device. The device can be manufactured.

An electro-optical device according to the present invention is characterized in that the transistor is a P-channel transistor, and a power supply potential is supplied to the capacitance line electrically connected to the channel region of the P-channel transistor.

According to such a configuration of the present invention, the source-drain breakdown voltage of the P-channel transistor can be increased by supplying the power supply potential to the channel region of the P-channel transistor. Further, since the supplied potential is the power supply potential, it is not necessary to create a new potential, and the circuit configuration can be simplified.

An electro-optical device according to the present invention is characterized in that the transistor is an N-channel transistor, and a ground potential is supplied to the capacitance line electrically connected to the channel region of the N-channel transistor.

According to this structure of the present invention, the source-drain breakdown voltage of the N-channel transistor can be increased by supplying the ground potential to the channel region of the N-channel transistor. Further, since the supplied potential is the ground potential, it is not necessary to create a new potential, and the circuit configuration can be simplified.

The electro-optical device according to the present invention is characterized in that the semiconductor layer forming the transistor is single crystal silicon.

According to such a structure of the present invention, since the semiconductor layer is single crystal silicon, it is possible to produce a device having high capability.

The electro-optical device of the present invention is characterized in that the semiconductor layer forming the transistor is made of polycrystalline silicon.

According to such a configuration of the present invention, since the semiconductor layer is made of polycrystalline silicon, it is possible to inexpensively manufacture the electro-optical device.

The electro-optical device according to the present invention is characterized in that the substrate is made of an insulating material. According to such a configuration of the present invention, it is possible to use a transparent substrate, and it can be applied to a light transmissive electro-optical device.

The electro-optical device according to the present invention is characterized in that the substrate is a quartz substrate. According to such a configuration of the present invention, by using a quartz substrate, a high temperature process of 1000 ° C. or higher can be applied, and an element with high capability can be produced.

The electro-optical device according to the present invention is characterized in that the substrate is a glass substrate. According to such a configuration of the present invention, by using the glass substrate, the element can be formed on the substrate having a large area, and the electro-optical device can be manufactured at low cost.

The electro-optical device of the present invention is formed in the semiconductor layer by sandwiching it between the other substrate and another substrate arranged so as to face the surface of the substrate on which the semiconductor layer is formed. And a liquid crystal driven by the driven transistor element.

The electronic apparatus of the present invention includes a light source, the above-mentioned electro-optical device which receives the light emitted from the light source and modulates the light in accordance with image information, and the light modulated by the electro-optical device. And a projection means for projecting.

[0036]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

(Explanation of Structure of Liquid Crystal Panel Substrate of this Embodiment) FIG. 1 shows a plurality of elements formed in a matrix forming an image forming region of a liquid crystal device as an electro-optical device according to an embodiment of the present invention. Is an equivalent circuit of various elements and wirings in the pixel. In FIG. 1, a plurality of pixels formed in a matrix which configures an image display region of the liquid crystal device according to the present embodiment are pixel electrodes 9a formed in a matrix and transistors for controlling the pixel electrodes 9a. The data line 6a which is composed of the TFT 30 and is supplied with the image signal is electrically connected to the source of the TFT 30. Image signals S1 and S to be written in the data line 6a
2, ..., Sn may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. In addition, the TFT 30
The scanning line 3a is electrically connected to the gate of the scanning line 3a, and the scanning signal G is pulsed to the scanning line 3a at a predetermined timing.
, Gm are applied line-sequentially in this order. The pixel electrode 9a is electrically connected to the drain of the TFT 30, and by closing the switch of the TFT 30, which is a switching element, for a certain period, the image signals S1 and S supplied from the data line 6a.
2, ..., Sn are written at a predetermined timing. The image signals S1, S2, ..., Sn having a predetermined level written in the liquid crystal via the pixel electrode 9a are held for a certain period of time with the counter electrode (described later) formed on the counter substrate (described later). . Here, in order to prevent the held image signal from leaking, the storage capacitor 70 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9a and the counter electrode. This allows
The retention characteristics are further improved, and a liquid crystal device having a high contrast ratio can be realized. In the present embodiment, in particular, in order to form such a storage capacitor 70, the capacitance line 3b whose resistance is reduced by using the same layer as the scanning line or using a conductive light-shielding film is provided as described later. .

FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, light-shielding films, etc. are formed. In FIG. 2, T of the liquid crystal device
A plurality of transparent pixel electrodes 9a (outlined by dotted lines) are provided in a matrix on the FT array substrate, and the data lines 6a are scanned along the vertical and horizontal boundaries of the pixel electrodes 9a. A line 3a and a capacitance line 3b are provided. The data line 6a is electrically connected to the later-described source region of the semiconductor layer 1a through the contact hole 5, and the pixel electrode 9a is electrically connected to the drain region of the semiconductor layer 1a through the contact hole 8. ing. Further, the scanning line 3a is arranged so as to face the channel region of the semiconductor layer 1a, and the scanning line 3a functions as a gate electrode.

The capacitance line 3b is a main line portion extending substantially linearly along the scanning line 3a (that is, the scanning line 3a in plan view).
Along the data line 6a from the intersection of the first region formed along with the data line 6a to the preceding stage side (upward in the drawing) (that is, the data line when viewed in plan). 6a and the 2nd area | region extended along).

Although not shown in the figure, a plurality of first light-shielding films are provided below the region where the semiconductor layer 1a of FIG. 2 is formed. More specifically, each of the first light-shielding films,
TF including the channel region of the semiconductor layer 1a in the pixel portion
The scanning line 3 is provided at a position that covers T as viewed from the TFT array substrate side, and further faces the main line portion of the capacitance line 3b.
The main line portion linearly extends along a, and the protruding portion that protrudes from a position intersecting the data line 6a to the adjacent step side (that is, downward in the drawing) along the data line 6a. The tip of the downward protrusion of each step (pixel row) of the first light-shielding film is overlapped with the tip of the upward protrusion of the capacitance line 3b in the next step below the data line 6a.

FIG. 3 is an enlarged plan view of the TFT shown in FIG. Here, the gate length direction means the data line 6 in FIG.
a is the extending direction, and the gate width direction is a direction orthogonal to the gate length direction. The semiconductor layer 1a is electrically completely separated from other semiconductor layers by the mesa etching method or the LOCOS method. A gate electrode 3 is provided on the semiconductor layer 1a via an insulating film. At least a part of both ends of the gate electrode 3 in the gate width direction is on the semiconductor layer 1a, and does not extend to the outside of the semiconductor layer 1a unlike the gate electrode of a normal TFT. Both ends of the gate electrode 3 extend in the gate length direction and extend to the outside of the semiconductor layer 1a. Further, at least one of the semiconductor layers 1a extending to the outside of the gate electrode 3 in the gate width direction is provided with a contact hole 7 for electrically connecting to the capacitance line 3b. The support base is transparent quartz,
It is desirable to use a glass substrate. The semiconductor layer 1a forming the TFT may be a single crystal silicon layer or a polycrystalline silicon layer. The conductivity type of the TFT of the pixel may be either N type or P type, but when N type is applied, the ground potential is applied to the semiconductor layer 1a through the capacitance line 3b. When applying the P type, a power supply potential is similarly applied to the semiconductor layer 1a. In the TFT having the above structure, the semiconductor layer 1a and the capacitance line 3b are connected, but there is also a structure in which this connection portion is not formed. FIG. 9 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes, etc. of a liquid crystal device having such a modified example are formed, and FIG. TF
It is the top view which expanded the T array part. In that case, since the aperture ratio of the pixel portion can be increased, bright display can be performed.

According to the present embodiment, since the gate electrode is not provided on the end of the channel portion of the semiconductor layer 1a, the parasitic MO is present.
It is possible to prevent the SFET from being generated. Further, by extending the end portion of the gate electrode in the gate length direction,
The source / drain region can be easily separated. Further, since the gate width of the TFT can be established only by etching the gate electrode, it is possible to suppress variations in each TFT to be small. Furthermore, since the potential of the channel portion of the TFT can be fixed, a high source-drain voltage can be used without causing the substrate floating effect.

(Overall Configuration of Liquid Crystal Device) The overall configuration of each embodiment of the liquid crystal device configured as described above will be described with reference to FIGS. 6 and 7. Incidentally, FIG. 6 shows the TFT array substrate 10 with the constituent elements formed thereon and the counter substrate 2
FIG. 7 is a plan view seen from the side of 0, and FIG. 7 is a sectional view taken along line HH ′ of FIG. 6 including the counter substrate 20.

In FIG. 6, a sealing material 52 is provided on the TFT array substrate 10 along the edge thereof,
A second light-shielding film 53, which is a frame made of the same material as or a material different from that of the second light-shielding film 23, is provided in parallel with the inside thereof. The data line driving circuit 101 and the mounting terminals 102 are provided along the one side of the TFT array substrate 10 in the region outside the sealing material 52, and the scanning line driving circuit 104 is provided along the two sides adjacent to the one side. Is provided. It goes without saying that the scanning line driving circuit 104 may be provided on only one side if the delay of the scanning signal supplied to the scanning line 3a does not matter. In addition, the data line drive circuit 1
01 may be arranged on both sides along the side of the screen display area. For example, the odd-numbered data lines 6a supply an image signal from a data line driving circuit arranged along one side of the screen display area, and the even-numbered data lines 6a extend along the opposite side of the screen display area. The image signal may be supplied from the data line driving circuit arranged as described above. In this way, the data line 6a
If the drive circuit is driven in a comb shape, the area occupied by the data line drive circuit can be expanded, so that a complicated circuit can be configured. Further, on the remaining one side of the TFT array substrate 10, a plurality of wirings 105 for connecting the scanning line driving circuits 104 provided on both sides of the screen display area are provided. In addition, at least at one of the corners of the counter substrate 20, a conductive material 106 for electrically connecting the TFT array substrate 10 and the counter substrate 20.
Is provided. Then, as shown in FIG. 7, the counter substrate 20 having substantially the same contour as the sealing material 52 is fixed to the TFT array substrate 10 by the sealing material 52.

On the TFT array substrate 10 of the above liquid crystal device, an inspection circuit or the like for inspecting quality, defects, etc. of the liquid crystal device during manufacture or shipping may be further formed. In addition, the data line driving circuit 101 and the scanning line driving circuit 104
Instead of being provided on the TFT array substrate 10, a driving LSI mounted on, for example, a TAB (tape automated bonding substrate) is provided with an anisotropic conductive film provided on the periphery of the TFT array substrate 10. You may make it connect electrically and mechanically. Further, the side of the counter substrate 20 on which the projection light is incident and the TFT array substrate 10
On the side from which the emitted light is emitted, for example, TN (twisted nematic) mode, STN (super TN)
A polarizing film, a retardation film, a polarizing means, etc. are arranged in a predetermined direction depending on the mode, an operation mode such as a D-STN (dual scan-STN) mode, or a normally white mode / a normally black mode. .

When the liquid crystal device described above is applied to, for example, a color liquid crystal projector (projection type display device), three liquid crystal devices are used as light valves for RGB, and each panel is provided with RGB. The light of each color separated through the dichroic mirror for color separation is incident as projection light. Therefore, in that case, as shown in the above embodiment, the counter substrate 20 is not provided with a color filter. However, an RGB color filter is provided in a predetermined region facing the pixel electrode 9a where the second light-shielding film 23 is not formed, together with its protective film,
It may be formed on the counter substrate 20. If you do this,
The liquid crystal device according to each embodiment can be applied to a color liquid crystal device such as a direct-view type or a reflection type color liquid crystal television other than the liquid crystal projector. Further, microlenses may be formed on the counter substrate 20 so as to correspond to each pixel. By doing so, a bright liquid crystal device can be realized by improving the efficiency of collecting incident light. Furthermore, a dichroic filter that creates RGB colors may be formed by utilizing interference of light by depositing a number of interference layers having different refractive indexes on the counter substrate 20. This counter substrate with a dichroic filter can realize a brighter color liquid crystal device.

In the liquid crystal device according to each of the embodiments described above, incident light is made incident from the counter substrate 20 side as in the conventional case, but since the first light shielding film is provided, T
The incident light may be incident from the FT array substrate 10 side and emitted from the counter substrate 20 side. That is, even when the liquid crystal device is mounted on the liquid crystal projector in this way, it is possible to prevent light from entering the channel region and the LDD region of the semiconductor layer 1a, and it is possible to display a high-quality image. Here, conventionally, in order to prevent reflection on the back surface side of the TFT array substrate 10, AR for antireflection is used.
It was necessary to separately dispose a polarizing means coated with (Anti-reflection) or to attach an AR film. However, in each of the embodiments, the first light-shielding film is formed between the surface of the TFT array substrate 10 and at least the channel region and the LDD region of the semiconductor layer 1a. It is not necessary to use an AR film or a substrate obtained by subjecting the TFT array substrate 10 itself to an AR treatment. Therefore, according to each of the embodiments, the material cost can be reduced, and the yield is not lowered due to dust, scratches, etc. when the polarizing means is attached, which is very advantageous. Further, since the light resistance is excellent, even if the light utilization efficiency is improved by using a bright light source or polarization conversion by the polarization beam splitter, image deterioration such as crosstalk due to light does not occur.

(Electronic Device) As an example of an electronic device using the above liquid crystal device, the configuration of a projection type display device will be described with reference to FIG. In FIG. 8, a projection type display device 1100 is provided with three liquid crystal devices described above, each of which has an RG
The schematic block diagram of the optical system of the projection type liquid crystal device used as B liquid crystal devices 962R, 962G, and 962B is shown. The optical system of the projection display apparatus of this example includes the light source device 9 described above.
20 and a uniform illumination optical system 923 are adopted. Then, the projection display device includes a color separation optical system 924 as a color separation unit that separates the light flux W emitted from the uniform illumination optical system 923 into red (R), green (G), and blue (B). Three light valves 925R, 925G, and 925B as modulation means for modulating the respective color light fluxes R, G, B, and a color synthesis prism 910 as color synthesis means for resynthesizing the modulated color light fluxes are synthesized. Projection lens unit 90 as projection means for enlarging and projecting the light flux on the surface of projection surface 100
6 is provided. Further, a light guide system 927 for guiding the blue light flux B to the corresponding light valve 925B is also provided.

The uniform illumination optical system 923 includes two lens plates 921 and 922 and a reflection mirror 931. The two lens plates 921 and 922 are arranged so as to be orthogonal to each other with the reflection mirror 931 interposed therebetween. Uniform illumination optical system 923
The two lens plates 921 and 922 each include a plurality of rectangular lenses arranged in a matrix. The light flux emitted from the light source device 920 is emitted from the first lens plate 92.
It is divided into a plurality of partial light beams by one rectangular lens.
Then, these partial light fluxes are converted into three light valves 925R and 92R by the rectangular lens of the second lens plate 922.
Superimposed around 5G and 925B. Therefore, by using the uniform illumination optical system 923, even if the light source device 920 has an uneven illuminance distribution in the cross section of the emitted light flux, the three light valves 925R, 925G, and 925B are used.
Can be illuminated with uniform illumination light.

Each color separation optical system 924 comprises a blue-green reflection dichroic mirror 941, a green reflection dichroic mirror 942 and a reflection mirror 943. First, in the blue-green reflective dichroic mirror 941, the blue luminous flux B and the green luminous flux G included in the luminous flux W are reflected at a right angle and head toward the green reflective dichroic mirror 942. The red light flux R passes through this mirror 941, is reflected at a right angle by the rear reflection mirror 943, and is emitted from the emitting portion 944 of the red light flux R to the prism unit 910 side.

Next, the green reflection dichroic mirror 942
, The green light flux G among the blue and green light fluxes B and G reflected by the blue-green reflection dichroic mirror 941
Only the light is reflected at a right angle and is emitted from the emitting portion 945 of the green light flux G to the color combining optical system side. The blue light flux B that has passed through the green reflection dichroic mirror 942 is emitted from the emitting portion 946 of the blue light flux B to the light guide system 927 side. In this example, from the light emitting portion of the light flux W of the uniform illumination optical element to the light emitting portions 944 and 94 of the respective color light fluxes in the color separation optical system 924.
The distances up to 5 and 946 are set to be substantially equal.

The red and green luminous fluxes R of the color separation optical system 924,
Condensing lenses 951 and 952 are arranged on the emission sides of the G emission sections 944 and 945, respectively. Therefore,
The red and green luminous fluxes R and G emitted from the respective emission portions are incident on these condenser lenses 951 and 952 and are collimated.

The red and green luminous fluxes R and G thus collimated enter the light valves 925R and 925G and are modulated, and image information corresponding to each color light is added. That is, these liquid crystal devices are switching-controlled by drive means (not shown) in accordance with image information, whereby the respective color lights passing therethrough are modulated. On the other hand, the blue light flux B is guided to the corresponding light valve 925B via the light guide system 927, and is similarly modulated here according to the image information. The light valve 925 of this example
R, 925G, 925B are liquid crystal lights each further including incident side polarization means 960R, 960G, 960B, emission side polarization means 961R, 961G, 961B, and liquid crystal devices 962R, 962G, 962B arranged between them. It is a valve.

The light guide system 927 is used for the emitting portion 94 of the blue light flux B.
6, a condenser lens 954 disposed on the emission side, an incident side reflection mirror 971, an emission side reflection mirror 972, an intermediate lens 973 disposed between these reflection mirrors, and a front side of the light valve 925B. It is composed of a condenser lens 953. The blue light flux B emitted from the condenser lens 946 passes through the light guide system 927 and the liquid crystal device 962B.
To be modulated. The optical path length of each color luminous flux, that is,
The liquid crystal devices 962R, 962G, 9
As for the distance to 62B, the blue light flux B has the longest distance, and thus the light quantity loss of the blue light flux becomes the largest. However, the light amount loss can be suppressed by interposing the light guide system 927.

Each light valve 925R, 925G, 92
The respective colored light fluxes R, G, and B that have passed through 5B are incident on the color combining prism 910 and are combined here. Then, the light combined by the color combining prism 910 is enlarged and projected on the surface of the projection surface 100 at a predetermined position via the projection lens unit 906.

In this example, the liquid crystal devices 962R, 962G,
Since the 962B is provided with a light-shielding layer below the TFT, the light reflected by the projection optical system in the liquid crystal projector based on the projection light from the liquid crystal devices 962R, 962G, and 962B and when the projection light passes therethrough. Even if the reflected light from the surface of the TFT array substrate or a part of the projected light that passes through the projection optical system after being emitted from another liquid crystal device enters as return light from the TFT array substrate side, It is possible to sufficiently shield the channel of the switching TFT from light.

Therefore, even if a prism unit suitable for miniaturization is used in the projection optical system, each of the liquid crystal devices 962R, 962R, 96
Since it is not necessary to separately arrange a film for preventing return light between the 2G and 962B and the prism unit, or to perform a process for preventing return light on the polarizing means, it is possible to reduce the size and simplify the structure. It is very advantageous.

Further, in the present embodiment, the T
Since the influence of the FT on the channel region can be suppressed, the polarizing means 9 directly subjected to the returning light prevention treatment to the liquid crystal device is used.
The 61R, 961G, and 961B may not be attached.
Therefore, as shown in FIG. 8, the polarization means is formed away from the liquid crystal device, and more specifically, one polarization means 961 is formed.
R, 961G, 961B are attached to the prism unit 910, and the other polarizing means 960R, 960G, 960B.
Can be attached to the condenser lenses 953, 945, and 944. In this way, by attaching the polarizing means to the prism unit or the condenser lens, the heat of the polarizing means is absorbed by the prism unit or the condenser lens, so that the temperature rise of the liquid crystal device can be prevented.

Although not shown in the drawing, an air layer is formed between the liquid crystal device and the polarizing means by forming the liquid crystal device and the polarizing means separately from each other. Therefore, a cooling means is provided and the liquid crystal device and the polarizing means are provided. It is possible to further prevent the temperature rise of the liquid crystal device by blowing air such as cold air between the and, and to prevent malfunction due to the temperature rise of the liquid crystal device.

Although the liquid crystal device has been described in the present embodiment, the present embodiment is not limited to this, and the present embodiment can be applied to an electro-optical device such as electroluminescence or a plasma display.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram of various elements, wirings, and the like provided in a plurality of pixels in a matrix forming an image forming area of a liquid crystal device according to an embodiment of the present invention.

FIG. 2 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which data lines, scanning lines, pixel electrodes and the like are formed in an embodiment of a liquid crystal device.

FIG. 3 is an enlarged plan view of the TFT array section of FIG.

FIG. 4 is a cross-sectional view in the gate width direction of a conventional mesa-etched TFT.

FIG. 5 is a cross-sectional view of a conventional LOCOS-separated TFT in the gate width direction.

FIG. 6 is a plan view of the TFT array substrate in each embodiment of the liquid crystal device, together with the respective components formed thereon, as viewed from the counter substrate side.

7 is a cross-sectional view taken along the line H-H 'of FIG.

FIG. 8 is a configuration diagram of a projection display device which is an example of an electronic apparatus using a liquid crystal device.

FIG. 9 shows a data line, a scanning line, and a liquid crystal device in a modified example.
FIG. 6 is a plan view of a plurality of pixel groups adjacent to each other on a TFT array substrate on which pixel electrodes and the like are formed.

10 is an enlarged plan view of the TFT array section of FIG.

[Explanation of symbols]

1 semiconductor layer 2 Gate insulating film 3 Gate electrode 3a scanning line 3b Capacitance line 5 Source contact 6a signal line 7 Body contact 8 drain contact 9a Pixel electrode 10 Support substrate

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ identification code FI H01L 29/78 612C (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 29/786 G02F 1/13 505 G09F 9 / 00 348 G09F 9/00 360 G09F 9/30 338

Claims (17)

(57) [Claims] 1. A plurality of scanning lines on a substrate, a plurality of data lines intersecting with the plurality of scanning lines, a transistor connected to each of the scanning lines and each of the data lines, and a transistor connected to the transistor. An electro-optical device having a pixel electrode, wherein in the gate electrode forming the transistor,
At least a part of both ends in the gate width direction is inside the semiconductor region forming the transistor, and both ends of the gate electrode are extended to the outside of the semiconductor region forming the transistor in the gate length direction. Electro-optical device characterized by. 2. The electro-optical device according to claim 1, wherein the semiconductor layer forming the transistor is single crystal silicon. 3. The electro-optical device according to claim 1, wherein the semiconductor layer forming the transistor is polycrystalline silicon. 4. The electro-optical device according to claim 1, wherein the substrate is an insulating material. 5. The electro-optical device according to claim 1, wherein the substrate is a quartz substrate. 6. The electro-optical device according to claim 1, wherein the substrate is a glass substrate. 7. A plurality of scan lines on a substrate, a plurality of data lines intersecting the plurality of scan lines, transistors connected to the scan lines and the data lines, and transistors connected to the transistors. An electro-optical device having a pixel electrode, wherein in the gate electrode forming the transistor,
At least a part of both ends in the gate width direction is inside the semiconductor region forming the transistor, and both ends of the gate electrode are extended to the outside of the semiconductor region forming the transistor in the gate length direction, An electro-optical device characterized in that at least one of channel regions of the transistor drawn out from both ends in the width direction is electrically connected. 8. The electro-optical device according to claim 7, wherein the wiring electrically connected to the channel region of the transistor is a capacitance line. 9. The method according to claim 7, wherein the transistor is a P-channel transistor, and a power supply potential is supplied to the capacitance line electrically connected to the channel region of the P-channel transistor. Electro-optical device. 10. The transistor according to claim 7, wherein the transistor is an N-channel transistor, and a ground potential is supplied to the capacitance line electrically connected to the channel region of the N-channel transistor. Electro-optical device. 11. A semiconductor layer forming the transistor is single crystal silicon.
10. The electro-optical device according to item 10. 12. The semiconductor layer forming the transistor is polycrystalline silicon.
10. The electro-optical device according to item 10. 13. The electro-optical device according to claim 7, wherein the substrate is an insulating material. 14. The electro-optical device according to claim 7, wherein the substrate is a quartz substrate. 15. The electro-optical device according to claim 7, wherein the substrate is a glass substrate. 16. Another substrate, which is arranged so as to face the surface of the substrate on which the semiconductor layer is formed, and a transistor element which is sandwiched between these two substrates and is formed in the semiconductor layer. 16. The electro-optical device according to claim 1, further comprising a liquid crystal that is formed. 17. The light source, and the electro-optical device according to claim 16, wherein the light emitted from the light source is incident to perform modulation corresponding to image information, and the light modulated by the electro-optical device is projected. An electronic device comprising: