JP3516152B2 - Synchronization establishing device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronization establishing apparatus for establishing signal synchronization between devices that perform data transmission. 2. Description of the Related Art It is easy to establish synchronization between devices that transmit and receive data if the signal delay between the devices is constant, but the delay varies depending on the connection form between the devices. In such cases, the following measures are required. 1) In order to reduce the amount of change in delay, the connection form such as the length and type of cable is limited. 2) Prepare several patterns of circuits according to the delay so that they can be selected by switches or the like. Here, as an example, FIG. 2 shows a synchronization establishing apparatus according to the above 2). In the figure, (1) is a master device which is a main device of a key telephone device, for example, and (2) is a slave device which is a telephone as its terminal. [0004] The master device (1) will be described.
(3) is a transmission circuit which converts data transmitted from the control circuit (4) into a transmission signal. (5) is a receiving circuit that converts data sent from the slave device (2) into a signal that can be handled by the control circuit (4). (6), (7) and (8) are delay patterns A, B and C for counting the delay time of data transmission between devices. Each of the delay patterns A, B and C is , Three different delay times can be set. Selection of each pattern is performed by a jumper switch (9). Reference numeral (10) denotes a window setting circuit which predicts a timing at which data is to be sent in advance and removes data only during that time to remove noise. The control circuit (4) is configured around a microprocessor, and includes a master device (1).
Take control of the whole. [0005] The slave device (2) will be described.
(11) is a receiving circuit that converts data sent from the master device (1) into a signal that can be handled by the control circuit (12). (13) is a transmission circuit which converts data sent from the control circuit (12) into a transmission signal. Control circuit (1
2) is composed mainly of a microprocessor and controls the entire slave device (2). Next, the operation of the conventional synchronization establishing apparatus configured as described above will be described. As initial processing, first, a delay pattern circuit (for example, a delay pattern A circuit) is set by a jumper switch (9). Next, power on,
The control circuit (4) of the master device (1) reads the delay pattern A circuit (6) set by the jumper switch (9). The control circuit (4) reads the read delay pattern A
A window setting circuit (10) for controlling data reading timing is activated based on the circuit (6). At the time of data transmission, after transmitting the first transmission character, the control circuit (4) resets the counter of the delay pattern A circuit (6) to zero and starts up. When a predetermined time (counter) is exceeded, the delay pattern A circuit (6) sends an interrupt signal to the control circuit (4), and the control circuit (4) receives the interrupt signal.
Transmits the next transmission character. The above operation,
Repeat until all characters have been transmitted. At the time of data reception, when the data can be read, a reception interrupt signal is sent from the reception circuit (5) to the control circuit (4), and the control circuit (4) receiving the reception interrupt signal sends the reception interrupt signal to the reception circuit (5). Read the data from). Note that the slave device (2) does not require any processing related to delay. [0009] As described above, the conventional synchronization establishing devices include: 1) limiting the connection form;
2) Synchronization was established by either of the methods of selecting a circuit with a switch or the like. In the former case,
Since the connection form is limited, a problem such as a limitation in the degree of freedom of installation of the device occurs, and in the latter case, there is a problem that a selection operation using a switch or the like is troublesome and time-consuming. SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and is not limited to a connection form and does not require complicated work. An object of the present invention is to provide a synchronization establishing device capable of establishing synchronization. [0011] Means for Solving the Problems] synchronization establishment apparatus according to the invention consists of a master device for performing mutual data transmission, the slave device that is subordinate to the master device, the master device is powered A delay detection signal transmission circuit for transmitting a delay detection signal for detecting a delay time of data transmission between the respective devices when turned on, and a delay detection signal from the delay detection signal transmission circuit A delay detection circuit for detecting timing until returning to the master device as a response signal via the device; and a time required for the delay detection signal transmission circuit to transmit the delay detection signal and return to the master device. A window setting circuit that controls data read timing based on the data, and the delay detection circuit detects a return timing of the delay detection signal A first control circuit for receiving the interrupt signal and activating the window setting circuit, wherein the slave device detects a delay detection signal transmitted by the delay detection signal transmission circuit. A detection circuit, a response signal transmission circuit for transmitting the delay detection signal detected by the delay detection signal detection circuit to the master device as the response signal, and when the delay detection signal detection circuit detects the delay detection signal. And a second control circuit for activating the response signal sending circuit. According to the synchronization establishing apparatus of the present invention, the delay detection signal transmitted from the delay detection signal transmission circuit of the master device is detected by the delay detection signal detection circuit of the slave device, and the response signal transmission circuit is provided. Sends a response signal to the master device. In the master device, the delay detection circuit detects a required time from when the delay detection signal is sent to when it returns, and controls the timing of data transmission and reception based on the required time. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a control block diagram of a synchronization establishing apparatus showing one embodiment of the present invention. In the figure, (14) is a master device corresponding to a main device of a key telephone device, for example.
(15) is a slave device corresponding to a telephone as the terminal. The master device (14) will be described.
(16) is a transmission circuit which converts data sent from the control circuit (17) as a first control circuit into a transmission signal. (18) is a receiving circuit that converts data sent from the slave device (15) into a signal that can be handled by the control circuit (17). (19) a delay detection signal transmission circuit for transmitting a delay detection signal to detect a delay time of data transmission between the master device (14) and the slave device (15). A signal that can be specified is used as the delay detection signal. For example, in the case of a digital signal, "1
In the case of a bit pattern of “110000” or an analog signal, a specific frequency signal or the like is used. A delay detecting circuit (20) detects a timing from when the delay detecting signal is transmitted from the transmitting circuit (16) to when it returns as a response signal from the slave device (15). Reference numeral (21) denotes a window setting circuit which predicts the timing at which data will come in advance and removes the data only during that time to remove noise. (22) is a real-time clock (RT
C), which counts hours, minutes and seconds. Control circuit (17)
Is composed mainly of a microprocessor and controls the entire master device (14). Next, the slave device (15) will be described. A receiving circuit (23) converts data sent from the master device (14) into a signal that can be handled by a control circuit (24) as a second control circuit. A transmission circuit (25) converts data sent from the control circuit (24) into a transmission signal. (26) a delay detection signal detection circuit for detecting a delay detection signal sent from the master device (14). (27) is a response signal transmission circuit, which is activated and transmits a response signal when a delay detection signal is detected by the delay detection signal detection circuit (26). The response signal is the same as the input delay detection signal. That is, the delay detection signal input from the master device (14) is fed back to the master device (14) as it is. The control circuit (24) is configured around a microprocessor and controls the entire slave device (15). Next, the operation of the synchronization establishing apparatus configured as described above will be described in order of A) initial processing, B) data transmission, and C) data reception. A) On the side of the initial processing master device (14), when the power is turned on, the control circuit (1)
7) activates the delay detection signal transmission circuit (19), transmits the delay detection signal to the slave device (15) via the transmission circuit (16), and transmits the delay detection circuit (20) and the RTC (22). ). On the other hand, the slave device (1
On the 5) side, upon detecting the delay detection signal from the master device (14), the delay detection signal detection circuit (26) sends the delay detection signal to the response signal transmission circuit (27). The response signal transmission circuit (27) uses the transmitted delay detection signal as a response signal as a response signal to the transmission circuit (2).
5) Via master device (14). When detecting the response signal from the slave device (15), the delay detection circuit (20) sends an interrupt signal to the control circuit (17). The control circuit (17) that has received the interrupt signal reads, from the RTC (22), the time required from transmission to reception of the delay detection signal to the slave device (15), and controls data read timing based on the time. Window setting circuit (2
Start 1). At this time, 1 /
Time 2 is the transmission timing. B) At the time of data transmission The master device (14) transmits data from the transmission circuit (16) based on the transmission timing obtained in the above-described initial processing. At this time, no special processing is required on the slave device (15) side. C) When Receiving Data When the master device (14) can read data, a reception interrupt signal is sent from the receiving circuit (18) to the control circuit (17). The control circuit (17) that has received the reception interrupt signal reads data from the reception circuit (18). At this time, no special processing is required on the slave device (15) side. As described above, when data transmission is performed between the master device (14) and the slave device (15), the master device (14) performs an initial process from the master device (14) to the slave device (1).
The delay detection signal transmitted to 5) is transmitted to the master device (14).
Since the delay time is detected by measuring the time before returning, and the timing of data transmission / reception is controlled based on the delay time, the connection form between the master device (14) and the slave device (15) differs. However, it is easy to establish synchronization between these two devices. As described above, according to the present invention, a delay time between devices performing data transmission is measured in advance by transmitting a delay detection signal from a master device to a slave device. Since the data transmission / reception timing is controlled based on the measured delay time, synchronization is easily established without limiting the connection form between devices, and a plurality of delay circuits are prepared. There is an effect that it is possible to provide a synchronization establishing apparatus which does not need to perform complicated operations such as switch switching for pattern selection.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a control block diagram of a synchronization establishing apparatus showing one embodiment of the present invention. FIG. 2 is a control block diagram of a synchronization establishing apparatus showing a conventional example. [Description of Signs] 1,14 Master device 2,15 Slave device 3,13,16,25 Transmission circuit 4,12,17,24 Control circuit 5,11,18,23 Reception circuit 6 Delay pattern A circuit 7 Delay pattern B circuit 8 Delay pattern C circuit 9 Jumper switches 10 and 21 Window setting circuit 19 Delay detection signal transmission circuit 20 Delay detection circuit 22 Real-time clock (RTC) 26 Delay detection signal detection circuit 27 Response signal transmission circuit

Claims (1)

(57) [Claims] [Claim 1] A master device for mutually transmitting data,
A delay detection signal for transmitting a delay detection signal for detecting a delay time of data transmission between the respective devices when the power is turned on. A transmission circuit; a delay detection circuit for detecting a timing until the delay detection signal from the delay detection signal transmission circuit returns to the master device via the slave device as a response signal; and the delay detection signal transmission circuit. A window setting circuit that controls the data reading timing based on a time required from when the delay detection signal is transmitted to when returning to the master device, and the delay detection circuit detects a return timing of the delay detection signal. A first control circuit that receives an interrupt signal at a time and activates the window setting circuit. A delay detection signal detection circuit for detecting the delay detection signal transmitted by the detection signal transmission circuit, and a response signal for transmitting the delay detection signal detected by the delay detection signal detection circuit to the master device as the response signal A synchronization establishment device comprising: a transmission circuit; and a second control circuit that activates the response signal transmission circuit when the delay detection signal detection circuit detects a delay detection signal.