JP3502294B2 - Magnetic recording / reproducing device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic recording / reproducing apparatus, and more particularly to a magnetic recording / reproducing apparatus having a simultaneous reproducing function of reproducing substantially simultaneously with a recording operation.

[0002]

2. Description of the Related Art In a video tape recorder for a broadcasting station, it is often difficult to re-record, and therefore, a simultaneous playback function for playing back and checking the recorded contents at almost the same time during recording is provided for the purpose of preventing recording failure. is necessary. In order to realize this simultaneous reproduction function, an erasing head, a recording head, and a reproducing head, which are arranged in close proximity, and an erasing, recording, and reproducing rotary transformer that transmits a signal to them operate at the same time. Therefore, it is necessary to suppress the crosstalk interference from the erase signal and the recording signal mixed in the weak reproduction signal to a sufficiently low level. In particular, since the erased signal has a larger amplitude than the recorded signal, crosstalk interference is also large.

Further, the erase signal itself is recorded on the tape and mixed in the reproduced signal (residual component of the erase signal).
Causes the error rate to deteriorate.

Therefore, conventionally, the erasing frequency is set on the high frequency side outside the reproduction band and the crosstalk component contained in the reproduction signal is removed by a trap or a low-pass filter.
I have been avoiding interference.

By the way, in order to perform recording with high image quality, the data rate becomes high, and accordingly, the erasing frequency also needs to be shifted to a higher frequency. However, in order to increase the erasing frequency, it is necessary to expand not only the band of the erasing amplifier but also the output dynamic range. This is because the amplitude of the output voltage is required as the frequency rises.
This is because a large current is required to reduce the efficiency of the erase head. Therefore, it is necessary to increase the power supply voltage and current capacity for the erase amplifier in the video tape recorder for broadcasting stations.

Therefore, it is desirable to set the erasing frequency as low as possible within a range that does not adversely affect the reproduced signal.

A case will be described below with reference to the drawings in which the erasing frequency is set to fb / 2 (fb: bit frequency) in a video tape recorder for broadcasting station whose recording encoding method is scrambled interleaved NRZI. To do.

FIG. 6 shows the relationship between the PR4 equalization characteristic, the reproduction amplifier band and the erasing frequency in terms of standardized frequencies. In FIG. 6, the solid line A indicates the PR4 equalization characteristic, the alternate long and short dash line B indicates the reproducing amplifier band, and the erasing frequency is fb /
It is set to 2. As shown in FIG. 6, fb / 2 is P
This is the minimum point (null frequency) of the R4 equalization characteristic, and it becomes possible to completely remove the crosstalk and the residual component of the erased signal.

FIG. 7 is a block diagram of the erase circuit. The erasing circuit has an oscillator circuit configuration, and the erasing amplifier 8 oscillates by being positively fed back by the feedback resistors 10 and 11. The oscillation frequency is adjusted to fb / 2 by the oscillation frequency adjusting capacitor 9 as a capacitance element. That is, in this erasing circuit, the erasing amplifier 8 has a frequency determined by the resonance of the inductance of the path including the erasing rotary transformer 5 to the erasing head 7 and the capacitance of the variable capacitance diode 37 as the oscillation frequency adjusting capacitance element. By oscillating 8, the frequency of the erase current is determined.

The erasing signal (erasing current) output from the erasing amplifier is supplied to the erasing head 7 as the erasing current 6 through the erasing rotary transformer 5.

FIG. 8 is a simplified version of FIG. The frequency of the erasing signal (erasing current) becomes the resonance frequency of the erasing rotary transformer 5, the erasing head 7 and the wiring, and the total inductance 21, the stray capacitance 20, and the oscillation frequency adjusting capacitor 9. The oscillator circuit configuration is
This is because the circuit scale is small, the power supply utilization rate is good, and low power supply voltage and low power consumption are possible.

However, it is generally known that the inductance values of the erasing head 7 and the erasing rotary transformer 5 vary by about ± 10%. Also, the capacitance value of the stray capacitance and the oscillation frequency adjusting capacitor 9 is ± 10%.
There is a degree of variation. Here, the inductance value of the erasing head 7 and the capacitance value of the oscillation frequency adjusting capacitor 9 dominate the determination of the resonance frequency.

The above variations include not only variations in the values of the respective elements but also variations due to changes over time, changes in temperature, and the like.

Therefore, with respect to the erase frequency, the worst case ±
It is necessary to assume a variation of 10%. That is, in FIG. 6, the erase frequency varies from fb / 2 to f1 or f2. When the erasing frequency varies by ± 10%, the erasing crosstalk in the reproducing circuit system and the removal rate of the residual component recorded on the magnetic tape are based on fb / 4.
As shown in, the deterioration occurs from −∞ to −10 dB. This not only makes simultaneous reproduction impossible, but also affects the normal reproduction signal as an in-band residual component, degrading the error rate.

Here, in order to eliminate variations in the erase frequency, a configuration as shown in FIG. 9 can be considered. A clock (bit frequency fb) synchronized with the recording data is input to the frequency dividing circuit 2 via the input terminal 1. Fb / in frequency divider 2
The erasing signal 3 which has become 2 is supplied to the erasing amplifier 4, and its output passes through the erasing rotary transformer 5 and the erasing current 6
Is supplied to the erasing head 7. In this configuration, the frequency variation is eliminated, but the configuration is basically the same as that of the recording amplifier instead of the oscillation configuration, the power supply utilization rate is reduced, and the power consumption is significantly increased.

[0016]

As described above, in order to remove the erase component in the reproducing circuit system by setting the erase frequency to fb / 2, high erase frequency accuracy is required. However, the frequency accuracy cannot be satisfied by the erasing circuit having the resonance circuit configuration, and a general amplifier configuration is disadvantageous in terms of circuit scale, power supply voltage, and power consumption.

Therefore, an object of the present invention is advantageous in circuit scale and power consumption, and the erasing frequency can be accurately set to the minimum point of the reproduction equalization characteristic, which facilitates removal of the erasing component in the reproducing circuit system. It is to provide a magnetic recording / reproducing apparatus capable of performing the same.

[0018]

To achieve this object, a magnetic recording / reproducing apparatus according to claim 1 of the present invention comprises an erasing head for erasing a recording data signal on a magnetic recording medium,
Simultaneously with the erasing operation by the erasing head, the recording head that records a new recording data signal on the magnetic recording medium and the new recording data signal recorded on the magnetic recording medium are simultaneously reproduced.
That a reproducing head, the erase amplifier for supplying an erasing current to the erase head, and a variable capacitance diode, the variable capacitance diode
By controlling the capacitance of the
Variable inductance die with path to erase head
Regenerative equalization of resonance frequency due to capacitance of ode
The resonance frequency is provided by the control means that is set in the vicinity of the minimum point of the characteristic.
The erasing amplifier is oscillated by .

According to this structure, since the control means for controlling the oscillation frequency of the erasing amplifier to be in the vicinity of the minimum point of the reproduction equalization characteristic is provided, even if the resonance structure is advantageous in terms of circuit scale and power consumption. As a result, it is possible to suppress variations in the erase frequency and set the reproduction equalization characteristic minimum point (for example, fb / 2) with high precision, and as a result, it is possible to easily remove the erase component in the reproducing circuit system.

[0020]

Further, since the oscillation frequency of the erasing amplifier is controlled to be in the vicinity of the minimum point of the reproduction equalization characteristic by controlling the capacitance of the variable capacitance diode by voltage, the frequency of the erasing current can be adjusted by voltage control. It can be done easily.

The magnetic recording reproducing apparatus according to claim 2 of the present invention, there is provided a magnetic recording and reproducing apparatus according to claim 1, wherein the control means, the frequency division signal of the clock signal synchronized with the recorded data signal and the erasing amplifier output current Compare the phase with
Phase comparison circuit that outputs a voltage according to the
With a gain adjustment circuit that changes the gain of the output voltage of
The output of the gain adjustment circuit is the capacitance of the variable capacitance diode.
Reproduces the oscillation frequency of the erase amplifier by changing the passitance
It is characterized in that it is near the minimum point of the equalization characteristic .

According to this configuration, since the frequency-divided signal of the clock signal is used as the reference signal for phase comparison,
The circuit configuration is simple because no special reference signal source is required. Other functions are the same as those in claim 1 .

A magnetic recording / reproducing apparatus according to a third aspect of the present invention is the magnetic recording / reproducing apparatus according to the second aspect , in which n erasing heads (n is an integer of 2 or more) correspond to the n erasing heads. Then, the recording head, the reproducing head, the erasing amplifier,
There are n variable capacitance diodes and n phase comparison circuits, respectively, and the phase of the divided signal of the clock signal applied to the n phase comparison circuits is shifted by a fixed amount for each erase head.

According to this configuration, since the phase of the divided signal of the clock signal applied to the n phase comparison circuits is shifted by a fixed amount for each erase head, the crosstalk components corresponding to each erase head cancel each other out. Therefore, crosstalk from the erasing circuit system to the reproducing circuit system can be reduced. Other functions are the same as those in claim 2 .

The magnetic recording reproducing apparatus according to claim 4 of the present invention, there is provided a magnetic recording and reproducing apparatus according to claim 1, wherein the control means, cross the reproduction signal from the output signal of the reproduction equalizer circuit for processing reproduced signals A frequency that extracts the erased frequency component mixed as talk and outputs a voltage according to the extraction result.
Number detection circuit and gain of output voltage of frequency detection circuit
Output of the gain adjustment circuit
To change the capacitance of the variable capacitance diode
The oscillation frequency of the amplifier is set near the minimum point of the reproduction equalization characteristic.
Characterized in that that.

According to this structure, the oscillation frequency of the erase amplifier is changed to the minimum point of the reproduction equalization characteristic by changing the capacitance of the variable capacitance diode according to the frequency of the erase frequency component mixed in the reproduced signal as crosstalk. Since the control is performed so as to be close to each other, even if the minimum value of the reproduction equalization characteristic deviates from fb / 2, the frequency of the erase current can be accurately set to the minimum value of the reproduction equalization characteristic. It is possible to easily remove the erase component in the reproducing circuit system. The operation other than the above is the same as that of claim 1 .

[0028]

[0029]

[0030]

[0031]

[0032]

[0033]

[0034]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to FIGS.

(First Embodiment) FIG. 1 is a block diagram of an erasing circuit in a magnetic recording / reproducing apparatus according to a first embodiment of the present invention. The same numbers are assigned to blocks having the same functions as those of the conventional example shown in FIGS. 7 is different from the conventional example in FIG. 7 in that the oscillation frequency adjusting capacitor (capacitance element) 9 is changed to a variable capacitance diode 37, and a control circuit 101 for the same is newly provided. 7 is similar to the conventional example. . The control circuit 101 controls the oscillation frequency of the erasing amplifier 8 so as to be in the vicinity of the minimum point (fb / 2) of the reproduction equalization characteristic. Specifically, the control means 101 controls the capacitance of the variable capacitance diode 37 by voltage control so that the oscillation frequency of the erase amplifier 8 is close to the minimum point of the reproduction equalization characteristic.

The erasing circuit of FIG. 1 has an oscillation circuit configuration similar to that of FIG. 7, and the erasing amplifier 8 oscillates by being positively fed back by the feedback resistors 10 and 11. The oscillation frequency is adjusted to fb / 2 by the variable capacitance diode 37. The erasing signal passes through the erasing rotary transformer 5 and the erasing head 7
Is supplied as an erase current 39.

The control circuit 101 for controlling the variable capacitance diode 37 will be described in detail. A clock having a frequency fb synchronized with the recording data passes through the input terminal 31 and
It is input to the frequency dividing circuit 32 which divides the frequency into two. The output clock having the frequency fb / 2 of the frequency dividing circuit 32 and the erase signal 38 are input to the phase comparison circuit 33. Here, the clock having the frequency fb / 2 is the reference input signal of the phase comparison circuit 33. The output of the phase comparison circuit 33 is input to a gain adjustment circuit 35 through a low pass filter (LPF) 34 and amplified to a voltage required for controlling the variable capacitance diode 37. As a result, the erase frequency is phase-compared with the recording clock as a reference signal, so that it is set to fb / 2 with high accuracy.

FIG. 2 is a schematic diagram showing the relationship between the erase oscillation frequency, the signal 36 (the output of the gain adjusting circuit 35, that is, the control voltage of the variable capacitance diode) and the capacitance value of the variable capacitance diode 37.

When the oscillation frequency falls below fb / 2, it is detected by the phase comparison circuit 33, the signal 36 (reverse voltage applied to the variable capacitance diode) DC (direct current) value rises, and the capacitance decreases, causing oscillation. The frequency goes up. On the other hand, the oscillation frequency is f
When it exceeds b / 2, it is detected by the phase comparison circuit 33 and the signal 36 (reverse voltage applied to the variable capacitance diode) DC is detected.
The value decreases, the capacity increases, and the oscillation frequency decreases.

As described above, in the conventional example, the oscillation frequency fluctuates due to the variation in the inductance of the erasing head 7 and the erasing rotary transformer 5, but in the present embodiment, the oscillation frequency is always fb due to the feedback. / 2 is maintained. Therefore, the resonance frequency is fb / 2 with a small-scale and low power consumption resonance configuration.
An erasing circuit that is set with high precision has been realized.

As described above, according to this embodiment,
Since the control means 101 for controlling the oscillation frequency of the erasing amplifier 8 so as to be in the vicinity of the minimum point of the reproduction equalization characteristic is provided, the variation of the erasing frequency is suppressed even in the resonance configuration which is advantageous in circuit scale and power consumption. However, it is possible to accurately set the minimum point (for example, fb / 2) of the reproduction equalization characteristic, and as a result, it is possible to easily remove the erase component in the reproduction circuit system.

Further, since the oscillation frequency of the erasing amplifier 8 is controlled to be near the minimum point of the reproduction equalization characteristic by controlling the capacitance of the variable capacitance diode 37 by voltage, the frequency of the erasing current is adjusted by the voltage. It can be easily done by control.

Further, since the frequency-divided signal of the clock signal is used as the reference signal for phase comparison, no special reference signal source is required and the circuit structure is simple.

(Second Embodiment) Next, a second embodiment of the magnetic recording / reproducing apparatus of the present invention will be described.
FIG. 3 is a block diagram of the erase circuit of this embodiment. The blocks having the same functions as those in the embodiment shown in FIG. 1 and the conventional examples shown in FIGS. 7, 8 and 9 are designated by the same reference numerals.

The difference of this embodiment from the first embodiment is that the two erase heads 7 and 90 operate simultaneously, and correspondingly the erase amplifier 84, the feedback resistor 82,
83, the variable capacitance diode 85, the erasing rotary transformer 88, and the control circuit 102 are only provided. Therefore, only the parts added to the first embodiment will be described.

The positional relationship between the two erasing heads 7 and 90 is such that they are adjacent to each other on the rotary cylinder and operate simultaneously. Therefore, since erasing currents of opposite phases flow from two adjacent erasing heads, the crosstalk components leaking to the reproducing head cancel each other out.

In FIG. 3, as in the first embodiment, the erase circuit has an oscillator circuit configuration, and the erase amplifier 84
Is oscillated by being positively fed back by the feedback resistors 82 and 83. The oscillation frequency is f by the variable capacitance diode 85.
Adjusted to b / 2. The erasing signal is supplied as an erasing current 89 to the erasing head 90 through the erasing rotary transformer 88.

The control circuit 102 for controlling the variable capacitance diode 85 will be described. A clock having a frequency fb, which is synchronized with the recording data, is input to a frequency dividing circuit 32 that divides the frequency by half through an input terminal 31. Frequency divider 3
The clock having the frequency fb / 2 of 2 is inverted by the inversion circuit 80, and is input to the phase comparison circuit 81 together with the erase signal 91. Here, the inverted clock of the frequency fb / 2 is the reference input signal of the phase comparison circuit 81. The output of the phase comparison circuit 81 is input to the gain adjustment circuit 87 through the low pass filter 86 and amplified to a voltage required for controlling the variable capacitance diode 85. As a result, the erase frequency is
Since the phases are compared using the recording clock as a reference signal, f
It is accurately set to b / 2.

Next, the description will be made focusing on the relationship between the two systems of erasing currents.

In FIG. 3, the erasing signals 38 and 91 of the erasing heads 7 and 90 operating simultaneously are respectively the phase comparison circuit 3.
3, 81. As described in the first embodiment, the reference input signal of the phase comparison circuit 33 is obtained by dividing the clock having the frequency fb synchronized with the recording data by half the frequency. On the other hand, the reference input signal of the phase comparison circuit 81 is the reference input signal of the phase comparison circuit 33 inverted by the inversion circuit 80.

Therefore, the erase current 89 supplied to the erase head 90 is the erase current 3 supplied to the erase head 7.
Compared with 9, the phase has an inversion relationship. as a result,
Crosstalk from the erasing circuit system to the reproducing circuit system is reduced because the crosstalk components of the erasing heads 7 and 90 cancel each other.

In this embodiment, the erase heads that operate simultaneously are two systems, but even if there are n systems (n is an integer of 2 or more), the reference input signal of the phase comparison circuit for each erase head is used. For example, if the phases are shifted by the same angle, the same effect can be obtained.

(Third Embodiment) Next, a third embodiment of the magnetic recording / reproducing apparatus of the present invention will be described.
The difference between this embodiment and the first and second embodiments is the method of controlling the variable capacitance diode 37.

In the first and second embodiments, the erase frequency is fixed at fb / 2. This is because the minimum point (null point) in the reproduction equalization characteristic of PR4 is always fb /
It is assumed that it is fixed at 2.

However, in the case of a reproduction equalization circuit using an analog element, the delay amount may be adjusted while watching the error rate. In that case, the minimum point of the equalization characteristic is fb / 2.
Does not necessarily mean that Therefore, even in such a case, the oscillation frequency of the erase circuit must be set to the minimum value of the equalization characteristic.

FIG. 4 is a block diagram of the erase circuit of this embodiment. The same numbers are assigned to blocks having the same functions as those of the conventional example shown in FIGS.

The erasing circuit has an oscillator circuit configuration, and the erasing amplifier 8 oscillates by being positively fed back by the feedback resistors 10 and 11. The oscillation frequency is adjusted to the minimum value of the reproduction equalization characteristic by the variable capacitance diode 37. The erase signal is supplied to the erase head 7 as an erase current through the erase rotary transformer 5.

The control circuit 103 for controlling the variable capacitance diode 37 will be described. At the time of simultaneous reproduction in which reproduction is performed simultaneously with the erasing and recording operations, the signal reproduced from the reproducing head 41 is input to the reproducing amplifier 43 via the reproducing rotary transformer 42. At this time, the crosstalk 50 from the erasing system is mixed in the reproduced signal. The frequency characteristic of the output of the reproduction amplifier 43 is adjusted by the reproduction equalization circuit 44 including the delay amount of the delay element so that the error rate becomes the minimum. The output of the reproduction equalization circuit 44 is
It is supplied to the detection circuit 45 and converted into a digital signal.

On the other hand, the output of the reproduction equalization circuit 44 is fb.
Bandpass filter (BPF) with a center frequency of / 2
46. The bandpass filter 46 extracts an erasing frequency component mixed in the reproduced signal as crosstalk. The output of the bandpass filter 46 is supplied to the frequency detection circuit 47 and a DC value corresponding to the erase frequency is output. The output of the frequency detection circuit 47 is supplied to the gain adjustment circuit 49 via the low-pass filter 48 and amplified to a voltage necessary for controlling the variable capacitance diode 37.

The bandpass filter 46 corresponds to an erasing frequency component extracting means for extracting an erasing frequency component mixed as crosstalk in the reproduced signal from the output signal of the reproduction equalization circuit 44 for processing the reproduced signal. . Further, the frequency detection circuit 47 changes the capacitance of the variable capacitance diode in accordance with the frequency of the erase frequency component extracted by the erase frequency component extracting means, so that the oscillation frequency of the erase amplifier becomes close to the minimum point of the reproduction equalization characteristic. It corresponds to the frequency detecting means for controlling as described above.

In this embodiment, the frequency detection circuit 47
For the characteristics of the bandpass filter 46, the center frequency was fb / 2 and the cutoff frequency (-3 dB frequency) was fb / 2 ± 10%. As a result, as for the erasing frequency, the minimum value of the reproduction equalization characteristic is fb /
Even when it deviates from 2, it is set to the minimum value with high accuracy.

Here, when the erase frequency component contained in the reproduced signal is detected and the voltage of the variable capacitance diode 37 is controlled according to the frequency, the erase frequency is reduced and the minimum value of the reproduction equalization characteristic is fb /. Even if it deviates from 2,
The reason why the minimum value can be accurately set will be described. That is, when the erase frequency component included in the reproduced signal is shifted, the voltage (DC) value is output from the frequency detection circuit (which converts the frequency fluctuation into a voltage in the FM demodulation circuit) 47. If the erase frequency rises, the output voltage rises, and if the erase frequency falls, the output voltage falls. Therefore, if the variable capacitance diode 37 is controlled by this output voltage, the erase frequency can be controlled accurately.

As described above, according to this embodiment,
By changing the capacitance of the variable-capacitance diode 37 according to the frequency of the erasing frequency component mixed in the reproduced signal as crosstalk, the oscillation frequency of the erasing amplifier 8 is controlled to be in the vicinity of the minimum point of the reproduction equalization characteristic. Therefore, even if the minimum value of the reproduction equalization characteristic deviates from fb / 2, the frequency of the erase current can be accurately set to the minimum value of the reproduction equalization characteristic, and the erasure in the reproduction circuit system can be performed. The removal of components can be facilitated.

In the first and third embodiments,
Although the erasing head has one system, the same effect can be obtained even with n systems (n is an integer of 2 or more). (Reference Example) Next, a reference example of the magnetic recording / reproducing apparatus will be described.
FIG. 5 is a block diagram of the erase circuit in this reference example . The same numbers are given to the block diagrams of the same functions as in FIG.

The components of this reference example different from those of the third embodiment are that the variable capacitance diode and the phase comparison circuit, LPF, and gain adjusting circuit for controlling it are eliminated, and instead of the variable capacitance diode, a fixed capacitance is used. The point is that an oscillation frequency adjusting capacitor is provided and that the switch circuit 204 is provided. Therefore, only the functions different from those of the third embodiment will be described.

In the present reference example , it is premised that reproduction equalization is performed by digital signal processing, and in addition to normal data rate recording, 1/2 data rate recording and 1/4 data rate recording are possible.

In FIG. 5, as in the third embodiment, the erase circuit has an oscillator circuit configuration, and the erase amplifiers 8 and 84 are positively fed back by the feedback resistors 10 and 11 and the feedback resistors 82 and 83, respectively. Oscillate. The oscillation frequency is adjusted to approximately fb / 2 by the oscillation frequency adjusting capacitors 202 and 203.

A clock having a frequency fb, which is synchronized with the recording data, is input to the frequency dividing circuit 201 which divides the frequency into 1/2 through the input terminal 200. The frequency fb / 2 clock of the frequency dividing circuit 201 passes through the switch circuit 204,
It is input to the erasing amplifier 8 and the inverting circuit 80.

The switch circuit 204 selects the output of the frequency dividing circuit 201 during normal data rate recording according to the control signal supplied from the input terminal 205, and the recording clock during normal data rate recording. Select itself, and when recording at the proper 1/4 data rate,
It is a three-state switch circuit that is controlled so as to have no output.

Frequency fb / 2 inverted by the inverting circuit 80
Is input to the erasing amplifier 84. Erasing amplifiers 8 and 84 whose oscillation frequency is adjusted to approximately fb / 2
Supplies an erase current having a frequency fb / 2 accurately in response to a clock input having a frequency fb / 2. At this time, the phases of the erase current 39 supplied to the erase head 7 and the erase current 89 supplied to the erase head 90 are in an inverse relationship. As a result, the crosstalk from the erasing circuit system to the reproducing circuit system is reduced because the crosstalk components of the erasing heads 7 and 90 cancel each other.

In this reference example , the erase heads that operate simultaneously are two systems, but even if the system is n systems (n is an integer of 2 or more), the input clock of each erase amplifier is deviated by the same angle, for example. Similar effects can be obtained by using different phases.

As described above, according to this reference example , the erase current has a frequency of fb / 2 with a simpler circuit configuration.
In addition, it is possible to set a specific phase relationship, and it is possible to easily remove the erasing component in the reproducing system.

In addition to the normal data rate, 1 /
Even in the case of recording at three data rates of 2 and 1/4, at the normal data rate, the erasing frequency is exactly fb / 2, that is, at the minimum point of the reproduction equalization characteristic at the data rate, and 1/2 data is set. At the time of recording, the erase frequency is set to be exactly the same as that at the normal data rate, that is, outside the band of the reproduction equalization characteristic. Set out of band. Since the erasing amplifier has no input during the 1/4 data rate recording, the erasing frequency is the oscillation frequency of the erasing circuit system itself, that is, a frequency near fb / 2 at the normal data rate. As a result, even when recording at a low data rate, the erasing frequency is maintained in the vicinity of the minimum point of the reproduction equalization characteristic at the normal data rate, that is, outside the band at the low data rate, so the influence on the reproduction circuit system is small, Moreover, it is not necessary to provide a circuit for removing the erased component for each data rate.

In this reference example, it is possible to correct not only the variation in the value of each element but also the variation in the erase frequency due to the variation due to a change with time or a temperature change.

In each of the above-described embodiments and reference examples , the frequency divider circuit halves the frequency, but the frequency division ratio of the frequency divider circuit is not limited to this, and 1 / k (k is 1 An integer greater than or equal to)
But it's okay.

[0076]

According to the magnetic recording / reproducing apparatus of the first aspect of the present invention, since the control means for controlling the oscillation frequency of the erasing amplifier to be in the vicinity of the minimum point of the reproduction equalization characteristic is provided, the circuit scale is provided. And even if the resonance configuration is advantageous in terms of power consumption,
It is possible to suppress variations in the erase frequency and accurately set the minimum point of the reproduction equalization characteristic, and as a result, it is possible to easily remove the erase component in the reproduction circuit system.

Further, since the oscillation frequency of the erase amplifier is controlled to be near the minimum point of the reproduction equalization characteristic by controlling the capacitance of the variable capacitance diode by voltage control, the frequency of the erase current can be adjusted by voltage control. Ru can be easily performed.

According to the magnetic recording / reproducing apparatus of the second aspect of the present invention, since the frequency-divided signal of the clock signal is used as the reference signal for phase comparison, no special reference signal source is required and the circuit configuration is It's easy. The other effects are the same as in claim 1 .

According to the third aspect of the magnetic recording / reproducing apparatus of the present invention, the phase of the divided signal of the clock signal applied to the n phase comparison circuits is shifted by a fixed amount for each erasing head. Since the crosstalk components corresponding to the heads cancel each other out, crosstalk from the erasing circuit system to the reproducing circuit system can be reduced. The other effects are the same as those in claim 2 .

According to the magnetic recording / reproducing apparatus of the fourth aspect of the present invention, the capacitance of the erasing amplifier is changed by changing the capacitance of the variable capacitance diode according to the frequency of the erasing frequency component mixed in the reproduced signal as crosstalk. Since the oscillation frequency is controlled so as to be in the vicinity of the minimum point of the reproduction equalization characteristic, even if the minimum value of the reproduction equalization characteristic deviates from fb / 2, the frequency of the erase current is minimized. The value can be accurately set, and removal of the erased component in the reproducing circuit system can be facilitated. The effects other than the above are the same as those in claim 1 .

[0081]

[0082]

[0083]

[Brief description of drawings]

FIG. 1 is a block diagram of an erasing circuit of a magnetic recording / reproducing apparatus according to a first embodiment of the present invention.

FIG. 2 is a schematic diagram showing the relationship between the erase oscillation frequency, the control voltage of the variable capacitance diode 37, and the capacitance value of the variable capacitance diode 37 according to the first embodiment of the present invention.

FIG. 3 is a block diagram of an erasing circuit of a magnetic recording / reproducing apparatus according to a second embodiment of the present invention.

FIG. 4 is a block diagram of an erasing circuit of a magnetic recording / reproducing apparatus according to a third embodiment of the present invention.

5 is a block diagram of the erase circuit of the reference example of magnetic recording and reproducing apparatus.

FIG. 6 is a schematic diagram showing a relationship between a PR4 equalization characteristic, a reproduction amplifier band, and an erasing frequency as a normalized frequency.

FIG. 7 is a block diagram of an erasing circuit of a conventional magnetic recording / reproducing apparatus.

FIG. 8 is a simplified schematic diagram of a block diagram of an erasing circuit of a conventional magnetic recording / reproducing apparatus.

FIG. 9 is a block diagram of another erasing circuit of the conventional magnetic recording / reproducing apparatus.

[Explanation of symbols]

5,88 Erase rotary transformer 7,90 Erase head 8,84 Erase amplifier 37,85 Variable capacitance diode 32 frequency divider 33,81 Phase comparison circuit 34,86,48 low pass filter 35, 49, 87 Gain adjustment circuit 41 Playhead 42 Rotary transformer for playback 43 playback amplifier 44 Playback equalization circuit 45 detection circuit 46 bandpass filter 47 Frequency detection circuit 50 Crosstalk 80 Inversion circuit 101-103 control circuit

Continuation of the front page (56) Reference JP-A-5-36004 (JP, A) JP-A-6-131616 (JP, A) JP-A-2-294904 (JP, A) JP-A-60-1609 (JP , A) JP-A-3-116503 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G11B 5/00-5/024

Claims (4)

(57) [Claims] 1. An erasing head for erasing a recording data signal on a magnetic recording medium, a recording head for recording a new recording data signal on the magnetic recording medium at the same time as an erasing operation by the erasing head, and on the magnetic recording medium. A reproducing head for simultaneously reproducing a new recording data signal recorded on the recording head, an erasing amplifier supplying an erasing current to the erasing head, and a variable capacitor.
Quantity diode and the capacitor of the variable capacitance diode
The voltage from the erase amplifier to erase the erase signal.
Inductance of the path to the head and the variable capacitance die
Regenerative equalization of resonance frequency due to capacitance of ode
And a control means for setting the characteristic in the vicinity of the minimum point,
Magnetization characterized in that the erase amplifier is oscillated at a wave number.
Qi recording and reproducing device. 2. The control means is synchronized with the recording data signal.
Position of divided signal of clock signal and output current of erase amplifier
Phase comparison that compares phases and outputs a voltage according to the comparison result
Circuit and the output voltage gain of the phase comparator circuit
And a gain adjustment circuit, and the output of the gain adjustment circuit
Before changing the capacitance of the varactor diode with
The oscillation frequency of the erase amplifier is near the minimum point of the reproduction equalization characteristic.
Magnetic recording and reproducing apparatus according to claim 1, characterized in that a. 3. N erase heads (n is an integer of 2 or more)
Yes, recording head and playback corresponding to n erase heads
Head, erase amplifier, variable capacitance diode and phase ratio
There are n comparator circuits each, and in addition to the n phase comparator circuits,
The phase of the divided signal of the clock signal is
The magnetic recording / reproducing apparatus according to claim 2, wherein the magnetic recording / reproducing apparatus is shifted by a fixed amount . 4. The reproduction means for processing the reproduction signal.
Crosstalk from the output signal of the equalization circuit to the playback signal
Then, the erased frequency components mixed in are extracted and
A frequency detection circuit that outputs a corresponding voltage, and the frequency detection circuit
With a gain adjustment circuit that changes the gain of the output voltage of the output circuit
The output of the gain adjustment circuit is equipped with a variable capacitance diode.
Oscillation of the erase amplifier by changing the capacitance of the erase
It is characterized in that the frequency is in the vicinity of the minimum point of the reproduction equalization characteristic.
The magnetic recording / reproducing apparatus according to claim 1 .