JP3501660B2 - Signal processing device and signal processing method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing apparatus and a signal processing method for discriminating a vertical synchronizing signal and a horizontal synchronizing signal which are also used as a single signal (hereinafter referred to as a synchronizing signal).

[0002]

2. Description of the Related Art Conventionally, in a laser beam printer (hereinafter referred to as a printer) that prints print data from a host device, signals for outputting a print image to a printer engine have a vertical direction and a horizontal direction, respectively. Two other timing signals, that is, a vertical synchronizing signal and a horizontal synchronizing signal are provided, and timing is taken by the two signals to output a print image to the printer encoder.

[0003]

However, in recent years,
Along with the cost reduction of the printer, one vertical signal and a horizontal signal used for controlling the image output to the printer engine are commonly used as one signal (hereinafter referred to as a synchronization signal).

When controlling the printer engine, the vertical synchronizing signal and the horizontal synchronizing signal are also used as the same single signal. Therefore, the synchronizing signal is "whether it is the vertical synchronizing signal of the print page", or , "Is it a horizontal synchronization signal of the print line?", But there is a problem that the control process becomes complicated.

Therefore, an object of the present invention is to provide an inexpensive signal processing device capable of easily and surely determining whether the synchronizing signal is a vertical synchronizing signal for a print page or a horizontal synchronizing signal for a print line. Another object is to provide a signal processing method.

[0006]

The present invention is an apparatus for discriminating between a vertical synchronizing signal and a horizontal synchronizing signal, which are used for output control of image data and are also used as the same synchronizing signal, in a predetermined page. When the time from the end of the output of the image data of the predetermined horizontal line to the output of the synchronization signal of the next horizontal line on the page is defined as the first time, the first time exceeding the first time is set. Measuring means for measuring up to time 2; excess detecting means for detecting an excess signal indicating that the time measured by the measuring means exceeds the first time; and output immediately after detecting the excess signal. The synchronization signal to be generated as a vertical synchronization signal for the next page,
A signal processing device is configured.

Further, the present invention is an apparatus for controlling output of image data by using a synchronization signal, the signal processing apparatus, storage means for storing the image data in page units, and the signal processing apparatus. An image forming apparatus is configured by including an image forming unit that outputs image data from the storage unit at a predetermined timing to form an image based on the output vertical synchronizing signal and horizontal synchronizing signal.

Further, the present invention is a method of discriminating between a vertical synchronizing signal and a horizontal synchronizing signal which are used for output control of image data and which are also used as the same synchronizing signal. A second time exceeding the first time, where the time from the end of outputting the image data of the direction line to the output of the synchronization signal of the next horizontal line on the page is the first time. A measurement step of measuring up to, a excess detection step of detecting an excess signal indicating that the measured time exceeds the first time, and a synchronization signal output immediately after detecting the excess signal, A signal processing method is provided by including a determination step of determining the vertical synchronization signal of the next page.

The present invention is also a method for controlling output of image data by using a synchronizing signal, wherein the step of storing the image data in a storage unit in page units and the vertical processing determined by the signal processing method. An image forming method is provided by including an image forming step of outputting image data from the storage means at a predetermined timing to form an image based on the synchronizing signal and the horizontal synchronizing signal.

The present invention also provides a computer,
A medium for recording a program for discriminating between a vertical synchronizing signal and a horizontal synchronizing signal which are also used as the same synchronizing signal, wherein the control program causes a computer to display image data of a predetermined horizontal line on a predetermined page. When the time from the end of the output of until the synchronization signal of the next horizontal line on the page is output is the first time, the second time exceeding the first time is measured, Determination by detecting an excess signal indicating that the time to be measured exceeds the first time, and determining a synchronization signal output immediately after detecting the excess signal as a vertical synchronization signal on the next page. A medium recording a control program is provided.

The present invention also provides a computer,
A medium recording a program for controlling output of image data using a synchronization signal, the control program causing a computer to store the image data in a storage unit in page units, and recording the determination control program. A recording medium in which an image forming control program is recorded is provided by outputting image data from the storage means at a predetermined timing to form an image based on a vertical synchronizing signal and a horizontal synchronizing signal determined by the medium. .

Here, the image forming means can output image data at a predetermined timing to perform printing.

Printing can be performed by an electrophotographic method using a photoconductor and an ink jet method using ink.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings.

(First Example) First, a first embodiment of the present invention will be described with reference to FIGS. 1 and 2.

The present invention can be applied to, for example, a control device for controlling output of print data to a printer engine in a laser beam printer for printing print data transferred from a host device.

FIG. 1 shows an example of the configuration of an image signal output control unit included in the control device in the printer.

In this example, the bitmap data is developed in the memory based on the print data, the data developed in the memory is output as an image signal to the printer engine by DMA transfer, and printing is performed on a predetermined paper. explain. The image signal output control unit controls the timing of image output to the printer engine.

In FIG. 1, reference numeral 101 is a synchronizing signal from the printer engine, which is a signal for both vertical and horizontal synchronizations. A sync signal detection circuit 102 outputs a sequence start signal 103 when the sync signal 101 is detected.

Reference numeral 104 is a left margin register capable of setting a left margin value of a print image, 105 is an image width register capable of setting an output width of the print image, and 106 is a lineover value register capable of setting a lineover value described later. is there.

Reference numeral 107 denotes the left margin register 10.
4, a selection circuit for selecting any one of the values set in the image width register 105 and the lineover value register 106.

Reference numeral 108 is a video clock for outputting the printer to the printer engine, 109 is a counter for counting the value of the video clock 108, and 110 is the count value.

Reference numeral 111 is a comparator, which has a count value 110.
And the value selected by the selection circuit 107 are compared, and when they are equal, a coincidence signal 112 is output.

Reference numeral 113 is a line sequence control circuit, which receives the sync signal 101 and the coincidence signal 112, and outputs the left margin mid-range signal 114 until the first coincidence signal 112 is detected after the sync signal 101 is inputted. After the first match signal 112 is detected, the image output signal 115 is output until the second match signal 112 is detected. After the second match signal 112 is detected, the line end signal 116 is output. When the third coincidence signal 112 is detected after the synchronization signal 101 is input, the line sequence control circuit 113 outputs the lineover signal 117.

The left margin middle signal 114, the image output middle signal 115, and the line end signal 116 are selected by the selection circuit 10.
Input to 7. The selection circuit 107 causes the left margin register 104 and the image width register 1 according to these signals.
05, it is determined which value of the lineover value register 106 is selected.

Reference numeral 118 denotes a sync signal output end detection circuit, which outputs a sequence clear signal 119 to the sync signal detection circuit 102 when the lineover signal 117 is detected. 120 is a counter clear control circuit,
The synchronization signal 101, the coincidence signal 112, and the sequence clear signal 119 are input and the output of the clear signal 121 is controlled to the counter 109.

Here, the above-mentioned lineover value will be described with reference to FIG.

FIG. 2 is a diagram showing an example of the output timing of the image signal 202 with respect to the synchronization signal 201 of the printer engine in this printer.

The time from the fall of the sync signal 201 to the fall of the next sync signal 201 is defined as the sync signal cycle (A), and the period from the fall of the sync signal 201 to the start of output of the print image signal of the print line concerned. The time is taken as the left margin (B), and the width where the bitmap data of the print line is DMA output is taken as the image width (C).

When printing is performed, the print image is sequentially output to the printer engine line by line in response to the synchronizing signal 201 at the timing shown in the figure. When the output of the predetermined number of print lines of the print page to the engine is completed, the printer engine stops the output of the synchronization signal 201. Then, when printing of the next page is started,
A sync signal (D) corresponding to the vertical sync signal of the next page is output.

The object of the present invention is to detect the synchronizing signal 201 at the timing (D) as a vertical synchronizing signal.

At the timing (E) at which the sync signal is output as the horizontal sync signal, the sync signal is not output from the printer engine, and the sync signal (D) output beyond the lineover time shown in (F) is output. It must be detected as a vertical sync signal.

A value obtained by dividing the time obtained by adding the error time of the synchronization signal period (A) to the lineover time in FIG. 2 by the image clock period of the printer should be set in the lineover value register 106 in FIG. It is a value.

(Image Output Control) Next, the operation of the printer will be described with reference to FIGS. 1 and 2.

When the bitmap of the print page is completed in the memory and the printer engine is activated, the printer engine starts the activation and outputs the synchronization signal 101 corresponding to the vertical synchronization signal of the print page.

The sync signal detection circuit 102 is provided with a sync signal 10
When the input of 1 is detected, the sequence start signal 10
3 is output. The printer detects the timing at which the sequence start signal 103 is output as the vertical synchronization signal of the print page, and the sequence start signal 103 is detected.
After that, the bitmap data is output at the timing described below, and the printing is executed.

The sequence start signal 103 is the sequence clear signal 1 from the sync signal output end detection circuit 118.
It is continuously output until 19 is input to the synchronization signal detection circuit 102.

On the other hand, the sync signal 1 corresponding to the vertical sync signal
When 01 is output, the counter clear control circuit 120
Outputs a clear signal 121. Upon receiving the clear signal 121, the counter 109 sets its count value 110 to 0 and starts counting the video clock 108.

Further, the line sequence control circuit 113
Outputs the mid-left margin signal 114 when the synchronization signal 101 is input. Since the left margin mid-signal 114 is input to the selection circuit 107, the value of the left margin register 104 is selected and given to the comparator 111. In the left margin register 104, the value of the number of video clocks corresponding to the left margin (B) in FIG. 2 is set.

After the synchronization signal 101 is input, the counter 109 counts the video clock 108,
The count value 110 is the left margin register 104.
When the value becomes equal to, the comparator 111 outputs the coincidence signal 112. When the first match signal 112 after the synchronization signal 101 is input is detected by the line sequence control circuit 113, the image output in-progress signal 115 is started,
The signal 114 during left margin is not output. When the image outputting signal 115 is output, the DMA output of the bitmap data on the memory to the printer engine is started.

The selection circuit 107 receives the image output signal 115 and receives the image width register 105.
Value is selected and given to the comparator 111. In the image width register 105, the number of video clocks corresponding to the image width (C) in FIG. 2 is set. When the coincidence signal 112 is input to the counter clear control circuit 120, the counter 109
The clear signal 121 is output to the count value 11
0 becomes 0.

When the count of the video clock during image output is started and the count value 110 becomes equal to the value of the image width register 105, the comparator 111 outputs the coincidence signal 1
12 is output. The second coincidence signal 112 after the synchronization signal 101 is input is the line sequence control circuit 113.
When it is detected at, the line end signal 116 is started to be output, and the image outputting signal 115 is not output.
When the line end signal 116 is output, the output of the print line to the printer engine is stopped.

In addition, the selection circuit 107 receives the input of the line end signal 116, selects the value of the lineover value register 106, and supplies it to the comparator 111. The above-mentioned value is set in the lineover value register 106. The coincidence signal 112 is the counter clear control circuit 1
When input to 20, the clear signal 121 is output to the counter 109, and the count value 110 becomes 0 again. Then, the counter 109 restarts the video clock 1
Start counting 08.

The printer engine outputs the sync signal 1 at every sync signal period (A) shown in FIG. 2 until it finishes outputting the sync signal 101 for the number of print lines in the sub-scanning direction of the print page.
01 is output.

Therefore, when the non-output print line of the print page follows the next line, the counter 109 outputs the video clock 1 after the line end signal 116 is output.
08 is counted, but before the count value 110 and the set value of the line-over value register 106 become equal, the sync signal 101 corresponding to the horizontal sync signal of the next print line is output from the printer engine.

Then, the clear signal 121 is output to the counter 109 and the count value 110 becomes 0, so that the line sequence control circuit 113 receives the synchronization signal 101 of the previous line for the third time and outputs the coincidence signal 1
12 is never detected and the lineover signal 11
7 is not output either. Then, the series of operations described above is repeatedly performed at every synchronization signal period (A) time shown in FIG. 2 while the printer engine is outputting the synchronization signal 101.

The above series of operations are repeated to sequentially execute the DMA output of the bitmap data, and when the output for the predetermined number of print lines in the sub-scanning direction of the print page is completed, in other words, for the number of print lines. When printing is completed, the printer engine stops outputting the synchronization signal 101.

That is, at the timing (E) shown in FIG. 2, the synchronization signal 101 is not output, and when there is a next print page, the synchronization signal corresponding to the vertical synchronization signal of the next page after the timing (E). 101 is output.

Final line print image signal (G) shown in FIG.
When the output of 1 is finished and the line end signal 116 in the series of operations described above is started to be output, the count value 110 of the counter 109 becomes 0, and the counting of the video clock 108 is started.

Since the synchronization signal 101 is not output at the timing of (E) shown in FIG. 2, the count value 110 is not cleared and the count operation proceeds and the value of the lineover value register 106 becomes equal. The comparator 111 outputs the coincidence signal 112. The coincidence signal 112 is the third coincidence signal 112 after the synchronization signal 101 for the final line print image signal in FIG. 2 is input.

As described above, when the line sequence control circuit 113 detects the third coincidence signal 112 after the synchronizing signal 101 is input, the lineover signal 117 is detected.
Is output to the synchronization signal output end detection circuit 118.
Upon receiving the line-over signal 117, the synchronization signal output end detection circuit 118 outputs to the synchronization signal detection circuit 102 a sequence clear signal 119 indicating that the output of the predetermined number of print lines in the sub-scanning direction of the print page has been completed. Output. The synchronization signal detection circuit 102 receives the sequence clear signal 119 and terminates the output of the sequence start signal 103 which has been continuously output.
In response to this, the printer shifts to the printing process for the next page.

When the bitmap of the next page is expanded on the memory and terminated, and the printer engine is activated, the printer engine starts activation and outputs the synchronization signal 101 corresponding to the vertical synchronization signal of the next page. (D of FIG. 2) The synchronization signal detection circuit 102 outputs the sequence start signal 103 when the input of the synchronization signal 101 is detected.

This printer has a sequence start signal 1
The timing at which 03 is output is detected as the vertical synchronization signal for the next page, and after the output of sequence start number 103, the output of the bitmap data for the next page is started, and the series of operations described above is repeated to print the next page. I do.

As described above, in this example, the image signal output control unit includes the synchronization signal detection circuit 102 and the counter 10.
9, lineover value register 106, selection circuit 10
7, comparator 111, line sequence control circuit 113,
Since the synchronization signal output end detection circuit 118 is provided, whether the synchronization signal in which the vertical synchronization signal and the horizontal synchronization signal are shared by the same signal is the vertical synchronization signal of the print page or the print line Whether or not it is a horizontal synchronizing signal can be detected easily and surely with a simple circuit configuration, and thus it is possible to output bitmap data to the printer engine at a predetermined timing and execute printing.

(Second Example) Next, a second embodiment of the present invention will be described with reference to FIGS. The description of the same parts as those in the first embodiment described above will be omitted and the same reference numerals will be given.

FIG. 3 shows a configuration example of the image signal output control section in this example.

Also in this example, the printer expands the bitmap data in the memory based on the print data, outputs the expanded data in the memory to the printer engine as an image signal by DMA transfer, and prints it on a predetermined paper. A case will be described. The image signal output control unit controls the timing of image output to the printer engine.

Reference numeral 301 is a synchronizing signal from the printer engine, which is a signal for both vertical and horizontal synchronizations. Thirty
Reference numeral 2 denotes a sync signal detection circuit, which outputs a sequence start signal 303 when the sync signal 301 is detected.

Reference numeral 304 is a left margin register capable of setting the left margin value of the print image, 305 is an image width register capable of setting the output width of the print image, and 306 is a lineover value register capable of setting a lineover value described later. is there.

The lineover value in this example is obtained by dividing the lineover time shown in FIG. 2 plus the error time of the synchronization signal period (A) by the CPU clock period of the printer, and the lineover value shown in FIG. The lineover value is set in the value register 306.

Reference numeral 307 denotes the left margin register 30.
4. Of the values set in the image width register 305,
It is a selection circuit for selecting any one. Reference numeral 308 is a video clock for outputting the printer to the printer engine. A video clock counter 309 counts the value of the video clock 308. 310 is the count value (V count value). Reference numeral 311 is a comparator, which compares the V count value 310 with the value selected by the selection circuit 307, and outputs a coincidence signal 312 when both are equal.

A line sequence control circuit 313 receives the sync signal 301 and the coincidence signal 312, and outputs the mid-left margin signal 314 until the first coincidence signal 312 is detected after the sync signal 301 is inputted. After the first match signal 312 is detected, the image output signal 315 is output until the second match signal 312 is detected. After the second match signal 312 is detected, the line end signal 316 is output. Left margin middle signal 31
4. The image output signal 315 is input to the selection circuit 307, and the selection circuit 307 determines which of the left margin register 304 and the image width register 305 is selected by these signals.

A CPU clock counter clear control circuit 317 releases the C clear signal 318 when the line end signal 316 is input. 319 is a CPU clock of the CPU in the printer. 320 is a CPU
A CPU clock counter that counts a clock 319. 321 is the C count value 3 which is the count value
21. CPU clock counter clear control circuit 3
17 is C until the line end signal 316 is input.
The CPU clock counter 32 by the clear signal 318
The C count value 321 of 0 is set to 0.

322 is a lineover value comparator,
The value of the lineover value register 306 is compared with the C count value, and when they are equal, the lineover signal 32
3 is output. A sync signal output end detection circuit 324 outputs a sequence clear signal 325 to the sync signal detection circuit 302 when the lineover signal 323 is detected. A video clock counter clear control circuit 326 receives the sync signal 301, the coincidence signal 312, and the sequence clear signal 325, and controls the output of the V clear signal 327 to the video clock counter 309.

(Image Output Control) Next, the operation of the printer will be described with reference to FIGS. 3 and 2.

When the bitmap of the print page is completed in the memory and the printer engine is activated, the printer engine starts activation and outputs the synchronization signal 301 corresponding to the vertical synchronization signal of the print page.

The sync signal detection circuit 302 is provided with a sync signal 30.
When the input of 1 is detected, the sequence start signal 30
3 is output. The printer detects the timing at which the sequence start signal 303 is output as the vertical synchronization signal of the print page, and the sequence start signal 303
After that, the bitmap data is output at the timing described below, and the printing is executed.

The sequence start signal 303 is the sequence clear signal 3 from the sync signal output end detection circuit 324.
It is continuously output until 25 is input to the synchronization signal detection circuit 302.

On the other hand, the sync signal 3 corresponding to the vertical sync signal
When 01 is output, the video clock counter clear control circuit 326 outputs the V clear signal 327. Upon receiving the V clear signal 327, the video clock counter 309 sets the V count value 310 to 0 and starts counting the video clock 308.

Further, the line sequence control circuit 313
Outputs the mid-left margin signal 314 when the synchronization signal 301 is input. Since the left margin mid-range signal 314 is input to the selection circuit 307, the value of the left margin register 304 is selected and given to the comparator 311.
A value of the number of video clocks for the left margin (B) shown in FIG. 2 is set in the left margin register 304.

After the synchronization signal 301 is input, the counter 309 counts the video clock 308,
The V count value 310 is the left margin register 30.
4 becomes equal to the value of 4, the comparator 311 outputs the coincidence signal 312.
Is output. When the first coincidence signal 312 is detected by the line sequence control circuit 313 after the synchronization signal 301 is input, the image output in-progress signal 315 is started and the left margin in-progress signal 314 is not output.
When the image output signal 315 is output, the DMA output of the bitmap data on the memory to the printer engine is started.

The selection circuit 307 receives the image output signal 315 and receives the image width register 305.
Value is selected and given to the comparator 311. The number of video clocks for the image width (C) shown in FIG. 2 is set in the image width register 305. When the coincidence signal 312 is input to the video clock counter clear control circuit 326, the V clear signal 32 is sent to the video clock counter 309.
7 is output, and the V count value 310 becomes 0. Then, start counting the video clock during image output,
When the V count value 310 becomes equal to the value of the image width register 305, the comparator 311 outputs the coincidence signal 312.

When the second coincidence signal 312 is detected by the line sequence control circuit 313 after the synchronizing signal 301 is input, the line end signal 316 is started to be output and the image outputting signal 315 is not output. When the line end signal 316 is output, the output of the print line to the printer engine is stopped.

Further, the CPU clock counter clear control circuit 317 receives the input of the line end signal 316, releases the C clear signal 318, and permits the CPU clock counter 320 to count the CPU clock 319. The CPU clock counter 320 is a CPU
The clock 319 starts counting.

The printer engine outputs the sync signal 3 at every sync signal period (A) shown in FIG. 2 until it finishes outputting the sync signals 301 for the number of print lines in the sub-scanning direction of the print page.
01 is output.

Therefore, when the non-output print line of the print page follows the next line, the CPU clock counter 3
20 is C after the line end signal 316 is output.
The PU clock 319 is counted, but before the C count value 321 and the setting value of the line-over value register 306 become equal, a sync signal 301 corresponding to the horizontal sync signal of the next print line is output from the printer engine. It

Then, the CPU clock counter control circuit 317 outputs the C clear signal 318 to the CPU clock counter 320, and the C count value 321 becomes 0. Therefore, in the line over value comparator 322, the synchronization of the previous line is performed. The lineover signal 32 is input from the input of the signal 301 to the input of the synchronization signal 301 of the next line.
2 is never output. Then, the series of operations described above is repeatedly performed at every synchronization signal period (A) time in FIG. 2 while the printer engine is outputting the synchronization signal 301.

The above series of operations are repeated, the DMA output of the bitmap data is sequentially executed, and when the output for the predetermined number of print lines in the sub-scanning direction of the print page is completed, in other words, for the number of print lines. When printing is completed, the printer engine stops outputting the synchronization signal 301.

That is, when the synchronization signal 301 is not output at the timing of (E) shown in FIG. 2 and there is a next print page, the synchronization signal 301 corresponding to the vertical synchronization signal of the next page after the timing of (E). Is output.

When the output of the final line print image signal (G) in FIG. 2 is completed and the line end signal 316 in the series of operations described above is started, the C count value 321 of the CPU clock counter 320 becomes zero. , C
The counting of the PU clock 319 is started.

As described above, since the synchronizing signal 301 is not output at the timing (E) shown in FIG. 2, the C count value 320 is not cleared and the count operation proceeds.
C count value 321 and lineover value register 306
Becomes equal to the value of, and the lineover value comparator 322 outputs the lineover signal 323. Upon receiving the line-over signal 323, the synchronization signal output end detection circuit 324 outputs to the synchronization signal detection circuit 302 a sequence clear signal 325 indicating that the output for the predetermined number of print lines in the sub-scanning direction of the print page is completed. Output. The synchronization signal detection circuit 302 uses the sequence clear signal 3
By inputting 25, the output of the sequence start signal 303 which has been continuously output is ended. In response to this,
The printer shifts to the printing process of the next page.

When the bitmap of the next page is expanded on the memory and terminated, and the printer engine is started, the printer engine starts the startup and outputs the synchronizing signal 301 corresponding to the vertical synchronizing signal of the next page. Shown in Figure 2 (D)
The synchronization signal detection circuit 302 outputs the sequence start signal 303 when the input of the synchronization signal 301 is detected.

This printer uses the sequence start signal 3
03 is detected as the vertical synchronization signal of the next page, and after the output of the sequence start signal 303, the output of the bitmap data of the next page is started,
The series of operations described above is repeated to print the next page.

As described above, in this example, the image signal output control unit is provided with the lineover value register 306, CP.
U clock counter clear control circuit 317, CPU clock counter 320, lineover value comparator 322,
Since the synchronization signal output end detection circuit 324 is provided, whether the synchronization signal in which the vertical synchronization signal and the horizontal synchronization signal are the same is also the vertical synchronization signal of the print page or the print line Whether or not it is a horizontal synchronization signal can be detected easily and surely with a simple circuit configuration, whereby it becomes possible to output bitmap data to the printer engine at a predetermined timing and execute printing.

In each of the above examples, the case where the control device according to the present invention is applied to a laser printer has been described. However, the present invention is not limited to this, and can be easily applied to an ink jet printer, a copying machine, a facsimile and the like. Is.

Further, the present invention can be applied to a system composed of a plurality of devices (eg, host computer, interface device, reader, printer, etc.)
It may be applied to a device including one device (for example, a copying machine or a facsimile device).

Further, it goes without saying that the present invention can be applied to the case where it is achieved by supplying a program to a system or an apparatus. Then, a storage medium storing a program represented by software for achieving the present invention is supplied to a system or apparatus, and the computer (or CPU or M of the system or apparatus).
The effect of the present invention can also be enjoyed by the PU) reading and executing the program code stored in the storage medium.

In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiments, and the storage medium storing the program code constitutes the present invention.

A storage medium for supplying the program code is, for example, a floppy disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a CD.
-R, magnetic tape, non-volatile memory card, ROM
(Mask ROM, flash EEPROM, etc.) can be used.

Moreover, not only the functions of the above-described embodiments are realized by executing the program code read by the computer, but also the OS (operating system) running on the computer based on the instructions of the program code. It is needless to say that this also includes a case where the above) performs a part or all of the actual processing and the processing realizes the functions of the above-described embodiments.

Furthermore, after the program code read from the storage medium is written in the memory provided in the function expansion port inserted in the computer or the function expansion unit connected to the computer, based on the instruction of the program code, It goes without saying that a case where the CPU or the like included in the function expansion board or the function expansion unit performs some or all of the actual processing and the processing realizes the functions of the above-described embodiments is also included.

[0092]

As described above, according to the present invention,
In a control device in which a vertical synchronizing signal and a horizontal synchronizing signal for outputting an image to a printer engine are combined into one signal, a printer engine having a print image width of a predetermined horizontal line on a predetermined print page (2) Second time that exceeds the first time (T) from the end of image output to the output of a sync signal corresponding to the horizontal sync signal of the print page
Is counted using a predetermined clock, and the first
Since the synchronizing signal output at the timing exceeding the time (T) of (1) is detected as the vertical synchronizing signal, the detected synchronizing signal is not the vertical synchronizing signal of the print page or the horizontal synchronizing signal of the print line. It can be easily and surely discriminated by a simple circuit configuration.

Further, according to the present invention, even when the above control device is incorporated in a printer or the like, it is determined whether the synchronizing signal is the vertical synchronizing signal of the print page or the horizontal synchronizing signal of the print line, It is possible to output the bitmap data to the printer engine at a predetermined timing and execute printing.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating a configuration example of a control device for a printer that is a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing an example of an output timing of an image signal with respect to a synchronization signal.

FIG. 3 is a block diagram showing a configuration example of a control device for a printer which is a second embodiment of the present invention.

[Explanation of symbols]

101 sync signal 102 Sync signal detection circuit 103 Sequence start signal 104 Left margin register 105 Image width register 106 Lineover value register 107 selection circuit 108 video clock 109 counter 110 count value 111 comparator 112 coincidence signal 113 line sequence control circuit 114 Left margin medium signal 115 Image output signal 116 line end signal 117 lineover signal 118 Sync signal output end detection circuit 119 Sequence clear signal 120 counter clear control circuit 121 Clear signal 201 Sync signal 202 image signal 301 Sync signal 302 sync signal detection circuit 303 Sequence start signal 304 Left Margin Register 305 Image width register 306 Lineover value register 307 selection circuit 308 video clock 309 video clock counter 310 V count value 311 comparator 312 coincidence signal 313 line sequence control circuit 314 Left margin medium signal 315 Image output signal 316 Line end signal 317 CPU clock counter clear control circuit 318 C clear signal 319 CPU clock 320 CPU clock counter 321 C count value 322 Lineover value comparator 323 lineover signal 324 Sync signal detection circuit 325 Sequence clear signal 326 Video clock counter clear control circuit 327 V clear signal A Sync signal cycle B left margin C image width D Next page Sync signal equivalent to vertical sync signal E Timing of horizontal sync signal output F lineover time G Final line print image signal

Front page continuation (58) Fields surveyed (Int.Cl. ⁷ , DB name) B41J 2/01 B41J 2/32-2/325 B41J 2/44-2/455 B41J 2/505-2/515 B41J 5 / 30 B41J 29/38 H04N 1/40 H04N 5/10

Claims (13)

(57) [Claims] 1. A device for discriminating a vertical synchronizing signal and a horizontal synchronizing signal, which are used for output control of image data and which are also used as the same synchronizing signal, and which are image data of a predetermined horizontal line on a predetermined page. The time from the end of the output to the output of the synchronization signal of the next horizontal line on the page is the first
And the excess signal indicating that the time measured by the measuring means exceeds the first time, and the measuring means measures up to the second time exceeding the first time. Excess detection means, a synchronization signal output immediately after detecting the excess signal,
A signal processing device comprising: a determination unit that determines the vertical synchronization signal of the next page. 2. A device for controlling output of image data using a synchronization signal, the signal processing device according to claim 1, storage means for storing the image data in page units, and the signal processing device. An image forming apparatus comprising: an image forming unit that outputs image data from the storage unit at a predetermined timing to form an image based on the output vertical synchronizing signal and horizontal synchronizing signal. 3. The image forming apparatus according to claim 2, wherein the image forming unit is a printing unit that outputs and prints image data at a predetermined timing. 4. The image forming apparatus according to claim 3, wherein the printing unit performs electrophotographic printing using a photoconductor. 5. The image forming apparatus according to claim 3, wherein the printing unit prints by an inkjet method using ink. 6. A method for discriminating between a vertical synchronizing signal and a horizontal synchronizing signal which are used for output control of image data and which are also used as the same synchronizing signal, the image data of a predetermined horizontal line on a predetermined page. The time from the end of the output to the output of the synchronization signal of the next horizontal line on the page is the first
Measurement step of measuring up to a second time exceeding the first time, and an excess detection step of detecting an excess signal indicating that the measured time exceeds the first time. And a synchronization signal output immediately after detecting the excess signal,
A signal processing method comprising: a determination step of determining the vertical synchronization signal of the next page. 7. A method for controlling the output of image data using a synchronization signal, comprising the step of storing the image data in a storage unit in page units, and the vertical determined by the signal processing method according to claim 6. An image forming method comprising: an image forming step of outputting image data from the storage means at a predetermined timing to form an image based on a synchronizing signal and a horizontal synchronizing signal. 8. The image forming method according to claim 7, wherein the image forming step is a printing step of outputting and printing image data at a predetermined timing. 9. The image forming method according to claim 8, wherein in the printing step, electrophotographic printing is performed using a photoconductor. 10. The image forming method according to claim 8, wherein in the printing step, printing is performed by an inkjet method using ink. 11. A medium having a program recorded thereon for causing a computer to discriminate between a vertical synchronizing signal and a horizontal synchronizing signal which are also used as the same synchronizing signal, wherein the control program is stored in a computer in a predetermined page. The time from the end of outputting the image data of a predetermined horizontal line to the output of the synchronizing signal of the next horizontal line on the page is first
When the time is set to, a second time that exceeds the first time is measured, an excess signal indicating that the time to be measured exceeds the first time is detected, and the excess signal is detected. A medium on which a discrimination control program is recorded, which discriminates a synchronization signal to be output immediately after the vertical synchronization signal of the next page. 12. A medium for recording a program for controlling output of image data by a computer using a synchronization signal, the control program causing the computer to store the image data in page units in a storage means. The image data is output from the storage means at a predetermined timing based on the vertical synchronizing signal and the horizontal synchronizing signal discriminated by the medium in which the discrimination control program according to claim 11 is recorded to form an image. A recording medium having an image forming control program recorded therein. 13. The image data is output and printed at the predetermined timing.
A recording medium on which the described image forming control program is recorded.