JP3481896B2 - Constant voltage circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant voltage circuit, and more particularly to a constant voltage circuit in which a constant current source circuit having a current mirror circuit and a diode clamp circuit are connected.

[0002]

2. Description of the Related Art A constant voltage circuit is required to supply a stable output voltage while maintaining a constant voltage value. However, the stability may be impaired due to environmental factors such as the outside air temperature, electrical characteristics of the forming material of the semiconductor element forming the constant voltage circuit, and the like. Various improvements have been made by the circuit configuration and the like in order to suppress the influence of the electrical characteristics of the semiconductor element, particularly the temperature characteristics, and obtain a stable output voltage.

An example of a conventional constant voltage circuit that suppresses the influence of the external temperature and supplies a stable output voltage will be described with reference to FIGS. 4 and 5. As shown in FIG. 4, the conventional constant voltage circuit includes a bandgap regulator circuit (BGR circuit) 100 as a reference voltage source and a positive phase input 21.
0 is the AMP200 connected to the output of the BGR circuit 100
And an n-channel MOS whose gate is connected to the output of the AMP 200 and whose drain is connected to the power supply voltage.
It is composed of a transistor No1 and voltage dividing resistors R3 and R4.

Here, the BGR circuit 100 has a reference current source 110 and an output stage 120, and the reference current source 110 is
MOS transistor P1 forming a current mirror circuit
And P2, and a MOS that constitutes another current mirror circuit
Transistors N1 and N2 and diodes D1 and D2
And a resistor R1, and the output stage 120 is configured to have a MOS transistor P3, a resistor R2, and a diode D3.

With such a configuration, the output voltage Vout of the constant voltage circuit is determined as follows. First, BGR
The output voltage BGR_REF of the circuit 100 has a Boltzmann constant of k, an absolute temperature of T, an electron charge amount of q, and a junction area A of the diodes D1 and D2 of A (D
1) and A (D2), the forward voltage of the diode D3 is V
If F, then BGR_REF = (R2 / R1) * (kT / q) * logn {A (D2) / A (D1)} + VF (D3) ... (1).

To obtain the low voltage output VoutL from this output voltage BGR_REF, as shown in FIG. 4, by connecting the Vout terminal between the voltage dividing resistors R3 and R4, VoutL = {R4 / (R3 + R4) } · BGR_REF (2) can be obtained as the voltage value calculated.

On the other hand, in order to obtain the high voltage output VoutH,
As shown in FIG. 5, between the voltage dividing resistors R3 and R4 and AMP2.
By connecting the output terminal Vout between the source of the MOS transistor No1 connected to the output terminal of the AMP200 and the resistor R3, VoutH = {(R3 + R4) / R4}. It can be obtained as a voltage value calculated using BGR_REF (3).

As described above, the feedback amplification characteristic of the AMP 200 is used to focus the fluctuating voltage to a constant value, so that a constant output voltage can be supplied without being affected by the external temperature.

Further, another example of the prior art capable of supplying a stable substrate potential without being influenced by the external environment temperature or the like is disclosed in Japanese Patent Application Laid-Open No. 8-272467 as a substrate potential generating circuit.

In the substrate potential generation circuit disclosed in this publication, as shown in FIG. 6, the output current of the constant current source 330 composed of the gate potential control circuit 310 and the p channel MOS transistor 320 is the p channel MOS transistor. 311 subthreshold swing value and resistance 3
It is determined by the value of 12. In addition, the ring oscillator circuit 40
The signal out1 for controlling the operation of 0 is the n-channel MOS transistors 301, 302, 3 in which the output current flows.
Switching is performed at a predetermined potential corresponding to the sum of the threshold values of 03.

The output current does not depend on the power supply voltage,
Since it increases in proportion to the temperature, the predetermined potential does not depend on the power supply voltage, and the temperature characteristics of the output current value and the threshold value cancel each other, so that the temperature dependency is small. Therefore, it is possible to control the substrate potential in a stable manner, which is unlikely to be affected by changes in external operating conditions.

[0012]

However, in the conventional constant voltage circuit using the BGR circuit as shown in FIG. 4, since the AMP 200 and the voltage dividing resistors R3 and R4 are used, the layout occupying area becomes large. .

In the substrate potential generation circuit disclosed in Japanese Patent Laid-Open No. 8-272467, the output voltage out1 of the substrate potential level detection circuit 300 is not a constant voltage output,
It functions as switching between "H" and "L". That is, by connecting the MOS transistors 302 and 303 to determine the drain-source voltage of the MOS transistor 301, the MOS transistor 30
When the substrate potential VBB applied to the source of 3 changes,
The voltage between the drain and source of the MOS transistor 301 is changed to turn on or turn off the MOS transistor 301.
FF.

Therefore, since the MOS transistor 301 and the like have a switching function and the purpose is to transmit the output signal out1 to the ring oscillation circuit 400,
Regarding the change in the amount of electric current due to the change in temperature, it has not been particularly improved.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a constant voltage circuit which reduces the layout occupation area and supplies a stable output voltage independent of temperature.

The sense amplifier circuit of the semiconductor memory device described in JP-A-6-36570 detects a current flowing through a data line using a differential amplifier, and uses an n-channel MOS transistor in the sense amplifier to detect the current. The configuration is such that a change in current is converted into a change in voltage. But,
In the sense amplifier circuit of the semiconductor memory device described in this publication, it is not assumed that the change in the current is accompanied by the change in the external temperature. Therefore, the structure and circuit configuration of the electronic device do not correspond to the temperature change, so that the above object cannot be achieved.

[0017]

Order to A for the problems] The achievement of this object, according to the constant-voltage circuit according to the first aspect of the present invention, p Ji
Channel MOS transistor type current mirror circuit, n
A channel MOS transistor type current mirror circuit;
It is a constant voltage circuit that has a diode clamp circuit.
When the source is connected to the power input terminal of the constant voltage circuit,
In both cases, the gate is p-channel MOS transistor type
Output side p-channel connected to the output node of the front-mirror circuit
Output of drain MOS transistor, drain and gate
Side p-channel MOS transistor drain and constant voltage
It is connected to the output terminal of the circuit and the source is a constant voltage.
Output side n-channel MOS connected to the GND terminal of the circuit
An output stage having a transistor and an n-channel M at one end
N transistor of the OS transistor type current mirror circuit
Resistance connected to the drain of the channel MOS transistor
And one end is connected to the GND terminal and the other end is n
The first connected to the drain of the channel MOS transistor
One clamp diode and one end connected to GND terminal
And the other end of the resistor is connected to the other end of the resistor.
A diode clamp circuit having a lamp diode and
With p-channel MOS transistor type current mirror
Circuit has a first p-channel source connected to the power input terminal.
Channel MOS transistor and source is power input terminal
And a gate and drain of the first p
Second connected to the gate of channel MOS transistor
P-channel MOS transistor of
Changes based on temperature characteristics of channel MOS transistor
Output side n-channel MOS transistor drain
Output side p-channel MOS transistor according to the current between sources
The current flowing between the source and drain of the transistor changes
Such as gate width, junction area, resistance value
Output side p-channel MOS transistors, first and second
As a configuration with two clamp diodes and resistors
It

As described above, in the constant current circuit having the current mirror circuit and the diode clamp circuit, the output side p-channel MOS formed by the gate width set based on the temperature characteristic of the output side n-channel MOS transistor.
If a transistor is connected, the current flowing between the source and drain of the p-channel MOS transistor on the output side changes in accordance with the current between the drain and source of the n-channel MOS transistor on the output side, which changes based on the temperature characteristics. Therefore, the current signal to the n-channel MOS transistor becomes constant and the output-side n-channel M
It is possible to supply a stable output voltage without being affected by the temperature characteristic peculiar to the OS transistor. Also,
Since the p-channel MOS transistor is used to stabilize the output voltage, the area occupied by the layout can be reduced as compared with the conventional constant voltage circuit.

According to claim 2, the p channel MO
S-transistor current mirror circuit and n-channel M
OS transistor type current mirror circuit and diode
A constant voltage circuit having a clamp circuit, wherein the source is
It is connected to the power input terminal of the constant voltage circuit and
Is a p-channel MOS transistor type current mirror circuit
Output p-channel MOS transistor connected to the output node of the path
Transistor, drain and gate are p-channel on output side
Drain of MOS transistor and output terminal of constant voltage circuit
It is connected to the child and the source is GND of the constant voltage circuit.
Output n-channel MOS transistor connected to terminal
And an output stage having and an n-channel MOS transistor at one end
N-channel MOS transistor included in a star-shaped current mirror circuit
The resistor connected to the drain of the transistor and one end is GN
It is connected to the D terminal and the other end is an n-channel MOS
First clamper connected to the drain of the transistor
With the iodine and one end connected to the GND terminal,
A second clamp diode with the other end connected to the other end of the resistor.
And a diode clamp circuit having
The channel MOS transistor type current mirror circuit
First p-channel MOS connected to the power input terminal
When the transistor and the source are connected to the power input terminal
Both have a p-channel MOS with a first gate and drain
A second p-channel M connected to the gate of the transistor
N-channel MOS transistor with OS transistor
The star-type current mirror circuit has a p-channel whose source is the first
Connected to the drain of the MOS transistor
The drain was connected to the first clamp diode
The first n-channel MOS transistor and the source are second
Connected to the drain of the p-channel MOS transistor
And the gate is the first n-channel MOS transistor
Connected to the gate and source of the
Second n-channel MOS transistor connected to one end
Of the n-channel MOS transistor on the output side
Output n-channel MOS that changes based on temperature characteristics
Output according to the current between the drain and source of the transistor.
Source-drain of power side p-channel MOS transistor
Output side n-channel MOS is changed by changing the current flowing between
Make the voltage between the gate and drain of the transistor constant
Such as gate width, junction area, resistance value
Each output p-channel MOS preparative transistor, the first and
As a configuration with two clamp diodes and resistors
It

As described above, based on the temperature characteristics of the output n-channel MOS transistor, the output p-channel M
If the size of the gate width of the OS transistor with respect to the second p-channel MOS transistor is set, and the output side p-channel MOS transistor formed by the set value is used to form a circuit, the change in external temperature It is possible to obtain a constant voltage without being affected by.

According to claim 3, a p channel MO
S-transistor current mirror circuit and n-channel M
Constant current having OS transistor type current mirror circuit
This is a voltage circuit, and the source is the power input terminal of the constant voltage circuit.
When connected, the gate is a p-channel MOS transistor.
Connected to the output node of a distor-type current mirror circuit
Output side p-channel MOS transistor, drain and
Drain of the output side p-channel MOS transistor
And the output terminal of the constant voltage circuit, and
Output side connected to the GND terminal of the constant voltage circuit.
An output stage having a channel MOS transistor and one end
n-channel MOS transistor type current mirror circuit
Connected to the drain of the n-channel MOS transistor
And a resistor having the other end connected to the GND terminal, p
Channel MOS transistor type current mirror circuit
First p-channel M whose source is connected to the power input terminal
The OS transistor and the source are connected to the power input terminal
And the gate and drain are the first p-channel M
A second p-channel connected to the gate of the OS transistor
Output n-channel MO
Output side that changes based on the temperature characteristics of the S transistor
Between drain and source of n-channel MOS transistor
Output side p-channel MOS transistor
Output side by changing the current flowing between the source and drain
Between gate and drain of n-channel MOS transistor
Set the gate width or resistance value that keeps the voltage constant on the output side.
p-channel MOS transistor, n-channel MOS transistor
N-channel MOS transistor of transistor type current mirror circuit
It has a resistor and a resistor.

According to claim 4, a p channel MO
S-transistor current mirror circuit and n-channel M
Constant current having OS transistor type current mirror circuit
This is a voltage circuit, and the source is the power input terminal of the constant voltage circuit.
When connected, the gate is a p-channel MOS transistor.
Connected to the output node of a distor-type current mirror circuit
Output side p-channel MOS transistor, drain and
Drain of the output side p-channel MOS transistor
And the output terminal of the constant voltage circuit, and
Output side connected to the GND terminal of the constant voltage circuit.
An output stage having a channel MOS transistor and one end
A p-channel MO with a resistor connected to the GND terminal.
The source of the S-transistor current mirror circuit is the power supply
First p-channel MOS transistor connected to input terminal
And the source is connected to the power input terminal,
First p-channel MOS transistor with gate and drain
Second p-channel MOS transistor connected to the gate of the star
And an n-channel MOS transistor type
The rent-mirror circuit is a p-channel MOS whose source is the first
Drain connected to the drain of the transistor
The first n-channel MOS transistor connected to the GND terminal
The transistor and the source are the second p-channel MOS transistors.
It is connected to the drain of the transistor and the gate is first
To the gate and source of the n-channel MOS transistor of
Second connected to the drain and connected to the other end of the resistor
N-channel MOS transistor of
Changes based on temperature characteristics of channel MOS transistor
Output side n-channel MOS transistor drain
Output side p-channel MOS transistor according to the current between sources
Change the current flowing between the source and drain of the transistor
The gate of the output n-channel MOS transistor
Gate width or resistance value that keeps the voltage between rains constant
The output side p-channel MOS transistor, the first and the second
Configuration with two n-channel MOS transistors and resistors
There is.

As described above, even in the constant voltage circuit in which the diode clamp circuit is omitted and the operating voltage of the entire circuit is lowered by the forward voltage VF of the diode, the output p
Channel MOS transistor and output n-channel MO
If the S-transistor is connected, a stable output voltage without temperature dependence can be obtained.

Further, the gate widths of the first and second n-channel MOS transistors are determined based on the temperature characteristics of the output n-channel MOS transistor, and the first and second formed by the determined values. N channel M
By configuring the circuit with an OS transistor or the like, a constant voltage can be output without being affected by a change in external temperature.

[0025]

[0026]

[0027]

[0028]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. First Embodiment First, a first embodiment of the constant voltage circuit of the present invention will be described with reference to FIG. This figure is a circuit configuration diagram of the constant voltage circuit of the present embodiment.

As shown in the figure, the constant voltage circuit of this embodiment is composed of a constant current source circuit 10 and an output stage 20. Here, the constant current source circuit 10 is a p-channel MOST.
A first p-channel MOS transistor P1 and a second p-channel MOS transistor forming the r-type current mirror circuit 11
A transistor P2, a first n-channel MOS transistor N1 and a second n-channel MOS transistor N2 constituting the n-channel MOSTr type current mirror circuit 12, a first diode D1 and a second diode D2 for clamping, And a resistor R1.

The source of the MOS transistor P1 is connected to the power supply input terminal 1. Further, the MOS transistor P2 has a source connected to the power supply input terminal 1, and a drain and a gate connected to the gate of the MOS transistor P1. The drain and gate of the MOS transistor N1 are connected to the drain of the MOS transistor P1. Further, the MOS transistor N2 is
The drain is connected to the drain and gate of the MOS transistor P2, and the gate is connected to the gate of the MOS transistor N1.

The diode D1 has an anode connected to the source of the MOS transistor N1 and a cathode connected to the GND terminal. The diode D2 has an anode connected to the resistor R1 and a cathode connected to the GND terminal, and the resistor R1
The other one is connected to the source of the MOS transistor N2.

On the other hand, the output stage 20 has a p-channel M on the output side.
It has an OS transistor P3 and an output n-channel MOS transistor N3. MOS transistor P3
Is a gate whose output node 4 of the constant current source circuit 10 is M.
The drain of the OS transistor P2 is connected to the output terminal Vout (output terminal 3).
The gate and drain of the MOS transistor N3 are connected to the output terminal Vout, and the source is connected to the GND terminal.

MOS transistor N in this embodiment
The relationship between the temperature characteristic of No. 3 and the output voltage Vout can be obtained as follows. First, the gate length and gate width of each MOS transistor are set. The gate length and the gate width of the MOS transistors P1 and P2 are the same size. The gate lengths of the MOS transistors P2 and P3 are the same size, and the gate width of P3 with respect to P2 is a multiple of m times. Further, the MOS transistors N1 and N2 have the same gate width and gate length.

An MO designed based on such settings
In a constant voltage circuit composed of S transistors, M
Current Io between the drain and source of the OS transistor P2
(Hereinafter, abbreviated as Io) is (k · T at 300K)
/ Q) ≈ 26 mV T, electron charge amount q, diode D1 junction area A (D1), diode D
When the junction area of 2 is A (D2), Io = (1 / R1). (KT / q) .logn {A (D2) / A (D1)} (4)

Therefore, the current I1 between the drain and source of the MOS transistor N3 (hereinafter abbreviated as I1).
Can be obtained by I1 = m · Io = m · (1 / R1) · (kT / q) · logn {A (D2) / A (D1)} (5)

The temperature characteristic at this time is   ΔI1 / ΔT = m · (1 / R1) · (k / q) · logn {A (D2) / A (D 1)}-m · (1 / R1) 2 · (ΔR / ΔT) · (kT / q) · logn {A (D 2) / A (D1)} (6) Can be calculated by

The output voltage Vout (hereinafter abbreviated as Vout) of the constant voltage circuit according to the present embodiment is a gate-source voltage (hereinafter abbreviated as VGS (N3)) when the drain-gate of the MOS transistor N3 is short-circuited. .), The conductivity coefficient (product of mobility and oxide film capacity) is β,
If the gate width of the MOS transistor N3 is W, the gate length of the MOS transistor N3 is L, and the threshold voltage of the MOS transistor N3 is VT, then Vout = VGS (N3) = [(2 · I1) / {β · (W / L )}] 0.5+ VT (7)

Here, in the equation (7), both the threshold voltage VT and the conductivity coefficient β determined by the process have negative temperature dependence. Therefore, the gate width W and the gate length L in the equation (7), the multiple m of the gate width in the equation (6), and the resistance value R1 are set so that the temperature characteristics of the output voltage Vout and ΔI1 / ΔT match. By determining the junction areas A (D1) and A (D2) of the diodes D1 and D2, respectively, a constant voltage circuit having no temperature dependence can be realized.

Next, the relationship between the temperature characteristics of the MOS transistor N3 and the output voltage Vout will be described using specific numerical values with reference to FIG. FIG. 2 is a correlation graph showing the temperature characteristic measurement results of the drain-source current (hereinafter abbreviated as IDS) with respect to VGS when the MOS transistor N3 is formed with a gate length L of 10 μm and a gate width W of 10 μm. Is.

In the figure, for example, Vout = VGS
It can be read that the value of IDS at (N3) = 0.8 V is IDS (25 ° C.) = 4.2 μA and IDS (125 ° C.) = 5.6 μA at external temperatures of 25 ° C. and 125 ° C., respectively.

The temperature characteristic is   ΔIDS / ΔT = (5.6 μA-4.2 μA) / (125 ° C.-25 ° C.) ≈14 nA / ° C (8) Is.

Here, for example, the multiple m of the gate width is 7,
The resistance R1 is 100 KΩ, and the junction areas A (D1) and A (D2) of the diodes D1 and D2 are 1 respectively.
Assuming that the circuit is composed of electronic elements set to 0 μm 2 and 100 μmm 2, ΔI1 / ΔT = ΔIDS / ΔT = 14 nA / ° C. from equation (6) (9) Becomes

Therefore, Vout = VGS (N3) =
A constant voltage source that does not depend on temperature can be realized at 0.8V.

Next, for example, Vout = VGS (N3)
Reading the value of IDS for = 5V from Figure 2, IDS = (25 ° C) = 720 µA IDS = (125 ° C) = 672 µA.

The temperature characteristic is   ΔIDS / ΔT = (672 μA-720 μA) / (125 ° C.-25 ° C.) ≈-4 80 nA / ° C (10) Is.

Here, for example, the resistance R1 is + 4000p.
It is formed by diffusion resistance of pm / ° C, and the multiple m of the gate width is 1
0, the resistance value R1 is 250Ω, and the junction areas A (D1) and A (D2) of the diodes D1 and D2 are 10μ.
If mm2 and 20 μmm2, ΔI1 / ΔT = ΔIDS / ΔT = −480 nA / ° C. (11) can be obtained from the equation (6).

Therefore, Vout = VGS (N3) =
A constant voltage source that does not have a constant temperature dependence is realized at 5V. As described above, a constant voltage output circuit that does not depend on temperature can be obtained over a wide range of output voltages.

[Second Embodiment] Next, a constant voltage circuit according to a second embodiment of the present invention will be described with reference to FIG.
FIG. 3 is a circuit configuration diagram showing the configuration of the constant voltage circuit of this embodiment. The present embodiment is a modified embodiment of the first embodiment, and the diodes D1 and D are different from the first embodiment.
The difference is that 2 is omitted. Other configurations are similar to those of the first embodiment. Therefore, in FIG. 3, the same components as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 3, the constant voltage circuit of this embodiment is different from the first embodiment in that the diodes D1 and D are provided.
The difference is that the diode clamp circuit constituted by 2 is not connected. That is, the source of the MOS transistor N1 is directly connected to the GND terminal 2, and
Only the resistor R1 is connected between the source of N2 and the GND terminal 2. The constant current source circuit having such a circuit configuration is used in the weak inversion region for the MOS transistors N1 and N2.

In the constant voltage circuit of this embodiment, the MOS
The drain-source current Io of the transistor P2 is expressed by Io = (1 / R1). (KT / q) .logn {W (N2) / W (N1)} (12). The following is the same as in the first embodiment.

Therefore, in this embodiment, in addition to the multiple m of the gate width and the resistance value R1, the MOS transistor N
The gate widths W (N1) and W (N2) of 1 and N2 are set to M
By setting according to the temperature characteristics of the OS transistor N3, a constant voltage output can be obtained.

Thus, the diodes D1 and D2 are omitted and the operating voltage of the entire circuit is set to the forward voltage V of the diode.
Even in the constant voltage circuit that is lowered by F, by connecting the MOS transistors P3 and N3, it is possible to output a constant voltage without being affected by changes in the external temperature.

[0053]

As described above in detail, according to the constant voltage circuit of the present invention, a constant current circuit having a current mirror circuit and a diode clamp circuit is used, which is based on the temperature characteristic of the output side n-channel MOS transistor. Connected to the output side p-channel MOS transistor formed by the set gate width, and the drain side of the output side n-channel MOS transistor which changes according to the temperature characteristics.
By changing the current flowing between the source and drain of the p-channel MOS transistor on the output side according to the current between the sources, a stable output voltage can be supplied without being affected by the temperature characteristic peculiar to the n-channel MOS transistor. be able to. In addition, by using the p-channel MOS transistor for stabilization, the area occupied by the layout can be reduced as compared with the conventional constant voltage circuit.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing a configuration of a constant voltage circuit according to a first embodiment of the present invention.

FIG. 2 is a characteristic graph showing temperature characteristics when the drain and gate of an n-channel MOS transistor are short-circuited.

FIG. 3 is a circuit configuration diagram showing a configuration of a constant voltage circuit according to a second embodiment of the present invention.

FIG. 4 is a circuit configuration diagram showing a conventional constant voltage circuit.

FIG. 5 is a circuit configuration diagram showing another conventional constant voltage circuit.

FIG. 6 is a circuit configuration diagram showing a conventional constant voltage circuit described in Japanese Patent Laid-Open No. 8-272467.

[Explanation of symbols]

1 Power Input Terminal 2 GND Terminal 3 Output Terminal 4 Output Node 10 Constant Current Source Circuit 11 p Channel MOSTr Type Current Mirror Circuit 12 n Channel MOSTr Type Current Mirror Circuit 13 Diode Clamp Circuit 20 Output Stage 100 Bandgap Regulator Circuit (BGR Circuit) 110 Reference Current Source 120 Output Stage 200 Oscillation Circuit 210 Positive Phase Input 220 Negative Phase Input 300 Substrate Potential Level Detection Circuits 301, 302, 303 n Channel MOS Transistor 310 Gate Potential Control Circuit 311 p Channel MOS Transistor 312 Resistor 320 p Channel MOS Transistor 330 constant current source 400 ring oscillator circuit 500 charge pump circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) G05F 1/00-7/00

Claims (4)

(57) [Claims] 1.P-channel MOS transistor type curren
Mirror circuit and n-channel MOS transistor type
Having a front mirror circuit and a diode clamp circuit
A constant voltage circuit, When the source is connected to the power input terminal of the constant voltage circuit
Both have the gates of the p-channel MOS transistor type.
Output side p connected to the output node of the current mirror circuit
Channel MOS transistor, drain and gate
The drain and p-channel MOS transistor of the output side
And the output terminal of the constant voltage circuit, and
Output connected to the GND terminal of the constant voltage circuit
an output stage having an n-channel MOS transistor, One end is the n-channel MOS transistor type current transistor
Of n-channel MOS transistor included in error circuit
A resistor connected to the in, One end is connected to the GND terminal and the other end is in front
Connected to the drain of n-channel MOS transistor
And the first clamp diode with one end connected to the GND terminal.
And the other end is connected to the other end of the resistor.
Diode clamp with second clamp diode
Circuit and The p-channel MOS transistor type current mirror circuit
Is a first p-channel whose source is connected to the power input terminal.
The MOS transistor and the source are the power input terminals
And the gate and drain are connected to the first
Connected to the gate of a p-channel MOS transistor
A second p-channel MOS transistor, For the temperature characteristic of the output side n-channel MOS transistor
The output side n-channel MOS transistor which changes based on
Output according to the current between the drain and source of the transistor
Between source and drain of side p-channel MOS transistor
Width and junction where the current flowing through the gate changes
Area and resistance value are the output side p-channel MO
S transistor, the first and second clamp diodes
De, said resistance had A constant voltage circuit characterized in that 2. P-channel MOS transistor type curren
Tmirror circuit, n Channel MOS transistor type
Having a front mirror circuit and a diode clamp circuit
A constant voltage circuit, When the source is connected to the power input terminal of the constant voltage circuit
In both cases, the gate is of the p-channel MOS transistor type.
Output side p connected to the output node of the current mirror circuit
Channel MOS transistor, drain and gate
The drain and p-channel MOS transistor of the output side
And the output terminal of the constant voltage circuit, and
Output connected to the GND terminal of the constant voltage circuit
an output stage having an n-channel MOS transistor, One end is the n-channel MOS transistor type current transistor
Of n-channel MOS transistor included in error circuit
A resistor connected to the in, One end is connected to the GND terminal and the other end is in front
Connected to the drain of n-channel MOS transistor
And the first clamp diode with one end connected to the GND terminal.
And the other end is connected to the other end of the resistor.
Diode clamp with second clamp diode
Circuit and The p-channel MOS transistor type current mirror circuit
Is a first p-channel whose source is connected to the power input terminal.
The MOS transistor and the source are the power input terminals
And the gate and drain are connected to the first
Connected to the gate of a p-channel MOS transistor
A second p-channel MOS transistor, The n-channel MOS transistor type current mirror circuit
The source is the first p-channel MOS transistor
Connected to the drain of the
First n-channel connected to one clamp diode
MOS transistor and source is the second p-channel
While connected to the drain of the MOS transistor,
The gate is the gate of the first n-channel MOS transistor.
Connected to the gate and source, and the drain of the resistor is
Second n-channel MOS transistor connected to one end
Has and For the temperature characteristic of the output side n-channel MOS transistor
The output side n-channel MOS transistor which changes based on
Output according to the current between the drain and source of the transistor
Between source and drain of side p-channel MOS transistor
The current flowing through The output n-channel MO is changed.
Keep the voltage between the gate and drain of the S transistor constant.
The gate width, junction area, and resistance value
The output side p-channel MOS transistor, the
First and second clamp diode, said resistor had
A constant voltage circuit characterized in that 3. P-channel MOS transistor type curren
Mirror circuit and n-channel MOS transistor type
A constant voltage circuit having a front mirror circuit, When the source is connected to the power input terminal of the constant voltage circuit
In both cases, the gate is of the p-channel MOS transistor type.
Output side p connected to the output node of the current mirror circuit
Channel MOS transistor, drain and gate
The drain and p-channel MOS transistor of the output side
And the output terminal of the constant voltage circuit, and
Output connected to the GND terminal of the constant voltage circuit
an output stage having an n-channel MOS transistor, One end is the n-channel MOS transistor type current transistor
Of n-channel MOS transistor included in error circuit
Connected to the IN terminal and the other end to the GND terminal.
Equipped with The p-channel MOS transistor type current mirror circuit
Is a first p-channel whose source is connected to the power input terminal.
The MOS transistor and the source are the power input terminals
And the gate and drain are connected to the first
Connected to the gate of a p-channel MOS transistor
A second p-channel MOS transistor, For the temperature characteristic of the output side n-channel MOS transistor
The output side n-channel MOS transistor which changes based on
Output according to the current between the drain and source of the transistor
Between source and drain of side p-channel MOS transistor
The current flowing through the output side n-channel MO
Keep the voltage between the gate and drain of the S transistor constant.
The gate width or resistance value that
MOS transistor, n-channel MOS transistor
N-channel MOS transistor of a current mirror circuit
I had the resistance A constant voltage circuit characterized in that 4. P-channel MOS transistor type curren
Mirror circuit and n-channel MOS transistor type
A constant voltage circuit having a front mirror circuit, When the source is connected to the power input terminal of the constant voltage circuit
In both cases, the gate is of the p-channel MOS transistor type.
Output side p connected to the output node of the current mirror circuit
Channel MOS transistor, drain and gate
The drain and p-channel MOS transistor of the output side
And the output terminal of the constant voltage circuit, and
Output connected to the GND terminal of the constant voltage circuit
an output stage having an n-channel MOS transistor, A resistor having one end connected to the GND terminal, The p-channel MOS transistor type current mirror circuit
Is a first p-channel whose source is connected to the power input terminal.
The MOS transistor and the source are the power input terminals
And the gate and drain are connected to the first
Connected to the gate of a p-channel MOS transistor
A second p-channel MOS transistor, The n-channel MOS transistor type current mirror circuit
The source is the first p-channel MOS transistor
Is connected to the drain of the
First n-channel MOS transistor connected to ND terminal
And the source is the second p-channel MOS transistor
Connected to the drain of the transistor and the gate is
Gate and source of one n-channel MOS transistor
And the drain is connected to the other end of the resistor.
And a second n-channel MOS transistor, For the temperature characteristic of the output side n-channel MOS transistor
The output side n-channel MOS transistor which changes based on
Output according to the current between the drain and source of the transistor
Between source and drain of side p-channel MOS transistor
The current flowing through the output side n-channel MO
Keep the voltage between the gate and drain of the S transistor constant.
The gate width or resistance value that
MOS transistor, the first and second n-channel M
OS transistor, with the resistor did Characterized by
Constant voltage circuit.