JP3480184B2 - Image processing device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus such as a digital copying machine, a facsimile apparatus, a printer apparatus, or a multi-function machine integrating these functions.

[0002]

2. Description of the Related Art Conventionally, as an image processing apparatus, for example, one disclosed in Japanese Patent Application Laid-Open No. 5-38865,
When the same output image is to be obtained in multiple copies by temporarily storing and accumulating the image data in the device, it is possible to eliminate the need to repeatedly input the image data and improve the efficiency of image output. Are known. Such an image processing device is generally adapted to store and store image data in a secondary storage device such as a hard disk device (hereinafter referred to as a store). However, the processing speed of the secondary storage device is lower than that of other processing units in the device.

Therefore, for example, in Japanese Unexamined Patent Publication No. 7-244727, a buffer memory (so-called page memory) including a semiconductor memory or the like is provided in order to buffer a difference in processing speed.
An apparatus having is disclosed. In this device, after the input image data is temporarily stored in the buffer memory, the image data is transferred to the secondary storage device and stored in this secondary storage device, thereby improving the throughput. There is. Furthermore, for example, Japanese Patent Laid-Open No. 5-2823
Japanese Patent Laid-Open Publication No. 2 (1994) discloses a method of compressing image data to reduce the amount of data stored in a secondary storage device.
It is disclosed that the apparent throughput of the secondary storage device is improved.

[0004]

By the way, in the image processing apparatus having the above-mentioned buffer memory, the buffer memory is managed by performing the synchronous processing for each page of the image data. That is, while one page of image data is input, the transfer of the image data to the secondary storage device is completed, and while one page of image data is output, the image data is transferred from the secondary storage device. If the extraction of is not completed, there will be a waiting time until the next page is input or output. Therefore, in this image processing apparatus, a large capacity buffer memory must be provided in order to improve the efficiency of image output even when processing a large amount of image data.

On the other hand, in the image processing apparatus for performing the above-described data compression processing, since the data amount of the image data is reduced, a large-capacity buffer memory is not required, but the image after compression is generally used. The data size of data (hereinafter referred to as compressed image data) becomes variable. Therefore, depending on the image data before compression, it is not always guaranteed that the data rate will match the data transfer capability of the secondary storage device.

For example, in a digital copying machine, A4
16 dots / mm for black-and-white originals of (210 mm x 297 mm) size
When read at the resolution of, the amount of image data per A4 size sheet is 16 megabytes (MB). If you want to output this image data onto recording paper at a speed of 1 sheet per second, use JPEG (Joint Photographic Experts Grou
If the p) method is used for compression at an average compression rate of 1/8, compressed image data can be retrieved from the secondary storage device at a data transfer rate of 2 MB / sec.

However, in a variable length compression method such as the JPEG method, it is not guaranteed that the image data is compressed at an average compression rate of 1/8. When an A4 size black and white original is compressed, the original is compressed. Image drawn on (content)
It is known that the data amount of one compressed image data becomes 2 MB or less and that of another compressed image data becomes larger than 2 MB. This tendency is
The compression method is not limited to the G method.
The same applies when the (Modified Huffman) method, MR (Modified READ) method, or MMR (Modified Modified READ) method is used.

Therefore, the secondary storage device has a capacity of 4-5 MB /
Assuming that it has sec data transfer capability, if the amount of data after compression exceeds 5 MB per A4 size, this digital copying machine will compress data from the secondary storage device within the specified time. Since the image data cannot be taken out, the image of the page cannot be formed and is output as a blank sheet. Further, when the output is performed by the electrostatic recording method, the drum is kept waiting for the rotation.

That is, in the conventional image processing apparatus, the data size of the compressed image data becomes variable even if the data compression processing is performed, which may hinder the improvement of the efficiency of image output.

Therefore, the present invention does not require a large capacity and efficiently manages the buffer memory,
An object of the present invention is to provide an image processing device capable of improving the throughput of the secondary storage device and efficiently outputting an image even if the data size of the compressed image data after the data compression process is variable. And

[0011]

SUMMARY OF THE INVENTION The present invention is an image processing apparatus devised to achieve the above object, and input means for inputting image data, and image data input by the input means are compressed. Compression means, buffer means for temporarily holding the compressed image data compressed by the compression means, receiving and storing the compressed image data held by the buffer means, and storing and storing the compressed image data in the buffer means A storage / accumulation means for transmitting the compressed image data held by the buffer means to a state before compression, and an output means for outputting the image data decompressed by the decompression means. A monitoring means for detecting the data amount of the compressed image data received by the buffer means from the compression means; When the stored data amount is larger than the set value, a part of the compressed image data received by the buffer means from the compression means is used as a residual section, and the residual section is expanded without being stored in the storage storage section. Data retaining means for holding the data in the buffer means until it is sent to the means.

According to the image processing apparatus having the above structure, when the buffer means receives the compressed image data compressed by the compression means, the monitoring means detects the data amount of the compressed image data. At this time, if the amount of data detected by the monitoring means is larger than the preset value, the data residual means uses a part of the compressed image data received from the compression means by the buffer means as a residual part, The unit is held in the buffer unit until being sent to the decompression unit without being stored in the storage unit. For example, the data size of the compressed image data compressed by the compression means has a variable length, and the buffer image exceeds the data transfer capability between the buffer means and the storage / storage means in the compressed image data received from the compression means. If there is a size, the data leaving means uses a part of the compressed image data as the leaving part. Therefore, between the buffer means and the storage / accumulation means, the compressed image data that is the remaining portion is not transmitted and received, and the compressed image data other than the remaining portion is transmitted and received. No data will be exchanged.

[0013]

DETAILED DESCRIPTION OF THE INVENTION An image processing apparatus according to the present invention will be described below with reference to the drawings. However, here
A case where the present invention is applied to a digital copying machine will be described as an example. As shown in FIG. 1, the image processing apparatus according to the present embodiment has a scanner 1, a compression unit 2, and a buffer memory 3.
The secondary storage device 4, the decompression unit 5, the printer 6, the address control unit 7, and the controller 8 are provided.

The scanner 1 optically reads image data from an image drawn on a document and inputs the image data, and functions as an input unit in the present invention. The compression unit 2 performs a data compression process on the image data input by the scanner 1 by a variable length compression method such as the JPEG method, and functions as a compression unit in the present invention.

The buffer memory 3 is, for example, a RAM (Rand
It is composed of a semiconductor memory such as an om access memory) and temporarily holds the compressed image data compressed by the compression unit 2, and functions as a buffer means in the present invention. However, the buffer memory 3 is conceptually divided into a plurality of areas (hereinafter referred to as section blocks) that are equally divided, and the section blocks are used to hold compressed image data. There is. Note that different addresses are assigned to these divided blocks.

The secondary storage device 4 is composed of, for example, a hard disk device, and exchanges compressed image data with the buffer memory 3 by using a divided block as a unit and a predetermined transfer rate (for example, 4 to 5 MB / sec). Hereinafter, referred to as a standard transfer rate). That is,
The secondary storage device 4 receives the compressed image data held in the buffer memory 3 from the buffer memory 3, stores the compressed image data, and further sends the stored compressed image data to be output by the printer 6 to the buffer memory 3. Then, it is held again. That is, the secondary storage device 4
Which functions as a memory storage unit in the present invention. It is assumed that the size of the partitioned blocks exchanged with the buffer memory 3 is equal to the sector size of the secondary storage device 4 or set to an integral multiple thereof.

The decompression unit 5 decompresses the compressed image data held in the buffer memory 3 to a state before compression, and functions as decompression means in the present invention. The printer 6 and the image data decompressed by the decompression unit 5 are output as a visible image on a medium such as a recording sheet and function as an output unit in the present invention.

The address controller 7 controls transfer of compressed image data and management of addresses between the buffer memory 3 and the secondary storage device 4. Therefore, as shown in FIG. 2, the address control unit 7 includes a data bus 11 for transmitting compressed image data, an address bus 12 for transmitting information about an address of the compressed image data to be transferred, and an address bus 12 on the address bus 12. The address decoder 13 that decodes the address specified by the address decoder 13, the transfer controller 14 that controls the transfer of the compressed image data between the buffer memory 3 and the secondary storage device 4 according to the decoding by the address decoder 13, and the address decoder 13. An interface control unit 15 that controls an interface to the secondary storage device 4 according to an instruction from the transfer control unit 14 and an address conversion unit 20 that converts an address are provided.

Here, the address conversion section 20 in the address control section 7 will be described in detail. As shown in FIG. 3, the address conversion unit 20 includes a comparator 21, an input address selector 22, a bus buffer 23, an address conversion memory 24, a conversion address selector 25, and control signals for controlling the operations of these units. And a decoder 26.

The comparator 21 compares the set address set in the comparator 21 with the address specified on the address bus 12, and when they match, the controller 8 sends a data amount monitoring signal. Is output to. As the set address in the comparator 21, addresses indicating the boundaries of the divided blocks are sequentially set according to an instruction from the controller 8.

The input address selector 22 is controlled by the control signal decoder 26, and the address conversion memory 2
The address to be input to 4 is selected. The bus buffer 23 is connected to the data bus 11, and is connected to the address translation memory 24 and the translation address selector 25 via the memory data bus 27.

The address translation memory 24 is, for example, SRA.
It consists of M (Static Random Access Memory),
It functions as an address converter that performs address conversion under the control of the control signal decoder 26. In this address translation memory 24, the data on the data bus 11 is transferred via the bus buffer 23 to the address translation memory 24.
By writing to, the address translation contents are set. The address translation memory 24
Since its function is theoretically equivalent to the decoder, S
For example, PAL (Programm
able Array Logic), FPGA (Field Programmable A)
rray Logic), a gate array, or other logic circuit.

The translated address selector 25 is for controlling address translation and non-translation. Since the address translation unit 20 includes the translation address selector 25, it is possible to control address translation and non-translation. Therefore, it is effective when it is desired to invalidate the address translation, for example, when debugging the system.

The address conversion unit 20 configured as described above
Then, when the compressed image data is transferred between the buffer memory 3 and the secondary storage device 4, the address assigned to the divided block, which is the transfer unit, is converted as necessary. ing. For the address conversion, for example, when the compressed image data held in a plurality of divided blocks is transferred between the buffer memory 3 and the secondary storage device 4, the addresses of these divided blocks are converted into continuous addresses. Alternatively, there is a conversion for converting the address of the remaining part described later into a continuous address. That is, the address translation unit 20 has a function as a translation unit in the present invention.

In FIG. 1, the controller 8 controls the entire image processing apparatus. further,
When the data amount monitoring signal is output from the comparator 21, the controller 8 measures the time of the output interval, that is, the time required for the buffer memory 3 to receive the compressed image data for one divided block, and the measured value thereof. Therefore, the input data rate is detected as the data amount of the compressed image data received by the buffer memory 3 per hour. The input data rate is obtained by dividing the data capacity of the divided block by the time value of the output interval of the data amount monitoring signal, and is calculated by the controller 8 for each divided block. That is, the controller 8 functions as the monitoring means in the present invention.

In addition, when the controller 8 detects the input data rate, it detects the input data rate,
For example, when the detected input data rate is higher than the reference transfer rate in comparison with the reference transfer rate in the secondary storage device 4, a part of the compressed image data received by the buffer memory 3 from the compression section 2 is used as a remaining section, The remaining section is not stored in the secondary storage device 4, but is held in the buffer memory 3 until it is sent to the decompression section 5. That is, the controller 8 also has a function as a data leaving means in the present invention.

The comparison between the input data rate and the reference transfer rate by the controller 8 is performed with a predetermined number of divided blocks as one unit. The predetermined number may be a single number or a plurality, or may be a set of divided blocks corresponding to one page of the document. When the number of divided blocks to be compared is plural, the average value of the input data rates of the divided blocks may be calculated and compared with the reference transfer rate.

The remaining section is determined by the controller 8 with the compressed image data held in the divided blocks as one unit. For example, in the controller 8, when the number of divided blocks to be compared is plural, the input data rates of the divided blocks are set so that the average value of the input data rates of these divided blocks becomes smaller than the reference transfer rate. The remaining part is determined in order from the segmented block holding the high compressed image data, that is, the compressed image data having a low compression rate in the compression unit 2. Further, for example, when the number of divided blocks to be compared is one page of the original, the compressed image data in the divided block corresponding to the head portion of the one page is set as the remaining portion. In addition,
It goes without saying that only one of them may be the remaining portion.

Next, an operation example of the image processing apparatus configured as above will be described. In this image processing device,
For example, in the case of outputting a plurality of image data read from an original in one reading, the following first
~ Perform the processing operation of the fourth step.

First, as a first step, when the scanner 1 continuously reads image data from a document in accordance with an instruction from the controller 8, the compression unit 2 compresses the read image data, and the compressed image data is compressed. The compressed image data is sent to the buffer memory 3. And the buffer memory 3
Holds the sent compressed image data temporarily. As the second step, the transfer controller 1 of the address controller 7
Reference numeral 4 retrieves the compressed image data held in the buffer memory 3 from the buffer memory 3, transfers it to the secondary storage device 4 via the interface controller 15, and stores it continuously in the secondary storage device 4. Let

Subsequently, when the reading of all the image data to be read by the scanner 1 is completed, as a third step, the transfer control unit 14 of the address control unit 7 stores the compressed image data stored in the secondary storage device 4. The data is sequentially taken out and held in the buffer memory 3 again. In the fourth step, the decompression unit 5 decompresses the compressed image data held in the buffer memory 3, and the decompressed image data is output by the printer 6 as a visible image.

The third step and the fourth step are repeated until the output of the number of copies requested by the operator is completed. By performing such processing operations,
In this image processing device, output images of a plurality of copies can be obtained by reading once.

Next, the characteristic processing operation in the above-mentioned first to fourth steps in this image processing apparatus will be described in detail. However, before the first to fourth steps are started, the address translation memory 24 has a translation table in the address translation memory 24, that is, the address translation memory 24 so that the empty area on the buffer memory 3 can be linearly accessed. The address input to is the controller 8
Is set in the comparator 21, and further, in the comparator 21,
It is assumed that the set address is set by the controller 8.

In the first step, the buffer memory 3 sequentially holds the compressed image data. At this time, the comparator 21
Then, the set address set in the comparator 21 and the write address to the buffer memory 3 are compared, and if they match, a data amount monitoring signal is output to the controller 8. When the data amount monitoring signal is output from the comparator 21, the controller 8 recognizes the data amount monitoring signal as an interrupt signal, stops the time counting operation at the time when the data amount monitoring signal is output, and measures the time. Store the value in the work area. Then, the controller 8
The set address of the comparator 21 is updated to the new address on the divided block boundary, and a new timing operation is started. This timing operation is repeated until the first step ends.

That is, as shown in FIG. 4, when the compressed image data is held in the buffer memory 3, the controller 8 holds the compressed image data for each divided block for each divided block in the buffer memory 3. The time required to do so is measured, and the input data rate for each divided block is detected from the measured value. This is because the speed at which the scanner 1 reads the image data from the document is constant,
This is because if the compression rate in the compression unit 2 is low, the amount of compressed image data received per unit time will increase.
As a result, the relationship between the amount of compressed image data received from the compression unit 2 by the buffer memory 3 and the time required for reception can be known.

In the second step, transfer of the compressed image data in the buffer memory 3 to the secondary storage device 4 is started. However, before starting the transfer of the compressed image data, the controller 8 compares the input data rate (the average value when the predetermined number is plural) of a predetermined number of divided blocks in the buffer memory 3 with the reference transfer rate, and inputs the data. It is determined whether the data rate is higher than the reference transfer rate. And
When the input data rate is higher than the reference transfer rate, the controller 8 subsequently determines the partitioned block to be the remaining part.

Here, the determination of the remaining portion by the controller 8 will be described with a specific example. FIG. 5 is an explanatory diagram of a specific example of data arrangement in the buffer memory 3. For example, it is assumed that the compressed image data is held in the buffer memory 3 in the state of being divided into the divided blocks a to g as shown in FIG. 5A by the first step.

At this time, when it is determined that the result is larger than the reference transfer rate in the determination process of the input data rate of the divided blocks a to g, the controller 8
It is determined that each of the divided blocks a, d, and e is a remaining part. Since the divided block a corresponds to the head portion of one page of image data, it is determined as the remaining portion and is left in the expectation of the effect as the cache in the third step. Is.

Further, the partitioned blocks d and e are determined as the remaining portion because the input data rate is large among the partitioned blocks a to g, and control of the transfer rate to the secondary storage device 4, that is, It is left for the purpose of guaranteeing the operation of the third step. That is, when the average value of the input data rates of the divided blocks a to g is larger than the reference transfer rate, the controller 8 makes the average value of the input data rates of the divided blocks other than the remaining part less than the reference transfer rate. Up to these divided blocks a to g
Among them, the remaining part is determined in order from the block having the highest input data rate.

As a result, the average value of the input data rates of the divided blocks b, c, f, g other than the remaining part is
Below the standard transfer rate. The buffer memory 3 after the input data rate determination processing of the divided blocks a to g is as shown in FIG.
As shown in (b), it is divided into a remaining section and a secondary storage section.

Partitioned blocks a to g in the buffer memory 3
Is divided into a remaining section and a secondary storage section, the address conversion section 20 subsequently assigns each of the divided blocks a to g before the second step of storing the secondary storage apparatus 4 is started. Address conversion is performed on the other hand. Due to this address conversion, the divided blocks a to g are arranged as shown in FIG. That is, the divided blocks b, c, f, g to be stored in the secondary storage device 4 are arranged at consecutive addresses by the address conversion by the address conversion unit 20, and the divided blocks b, c, f, g are secondary. The transfer to the storage device 4 can be performed by issuing the command to the transfer control unit 14 once.

However, here, the divided blocks b, c,
Although f and g have been described as being stored in continuous areas on the secondary storage device 4, they can be realized in other cases, that is, even when they are stored in non-continuous areas. Further, although it has been described that the divided blocks b, c, f, and g are transferred by issuing a command once, for example, the secondary storage device 4 is a SCSI (Small Computer System Interf).
ace) If the overhead is small and a plurality of commands can be issued by a tagged queuing command as in a magnetic disk device, the partitioned blocks b and c and the partitioned blocks f and g may be issued as separate commands. .

According to the second step, the partitioned block b,
When c, f, and g are transferred to the secondary storage device 4, the buffer memory 3 holds the divided blocks a, d, and e that are the remaining portions, as shown in FIG. . In this state, in the buffer memory 3, an area other than the area where the remaining portion is held, that is, an unused area is used for new processing. This unused area is the address conversion unit 2
Since it is made a continuous area by the address conversion by 0, it is used extremely effectively when the area in the buffer memory 3 is reused.

In the second step, the remaining part is not stored in the secondary storage device 4. However, in the data compression processing such as JPEG, a portion having a high data rate is locally generated. Since there is a possibility that a portion with a low data rate locally occurs in the storage device, the remaining portion is stored in the secondary storage device 4 by utilizing the margin in data transfer generated in the portion with a low data rate. May be.

In the third step, the above-mentioned second
The process performed in the step is reversed. That is, the partitioned blocks b, c, f, and g that are continuously stored in the secondary storage device 4 are collectively fetched from the secondary storage device 4 by issuing a command once, and are stored in the buffer memory. Held at 3. The inside of the buffer memory 3 at this time is as shown in FIG.

When the divided blocks b, c, f, g are held in the buffer memory 3, the controller 8 resets the address translation memory 24 of the address translation unit 20 in the fourth step, and the first step The partition block layout in the later buffer memory is reproduced. This is done by the control software of the controller 8. When the address translation memory 24 is reset, the divided blocks are arranged in the buffer memory as shown in FIG. 5B.

After that, the fourth step is executed, and the decompression unit 5 receives the partitioned blocks a to g in the buffer memory 3 and decompresses them. Then, the printer 6 outputs the image data decompressed by the decompression unit 5 as a visible image. However, in the fourth step, by setting the address translation memory 24, the buffer memory 3 is expanded to the decompression unit 5.
It is also possible to continuously take out the compressed image data to be sent to a plurality of discontinuous divided blocks, instead of the continuous divided blocks as shown in FIG. In this case, even if the blocks are discontinuous,
It can be taken out from the buffer memory 3 at high speed.

As described above, in the image processing apparatus according to the present embodiment, when the input data rate of the compressed image data held in the buffer memory 3 is higher than the reference transfer rate, the controller 8 controls the compressed image data out of the compressed image data. A part of the remaining part is used as the remaining part, and the remaining part is not stored in the secondary storage device 4 but held in the buffer memory 3 until it is sent to the decompression part 5. Therefore, in this image processing device, when the compressed image data is taken out from the secondary storage device 4, it becomes possible to take out the compressed image data within a prescribed time, and there is no need to output a blank sheet or wait for the drum to circulate. It never happens.

That is, in this image processing apparatus, even if the data size of the compressed image data is variable, the data rate of the compressed image data exchanged between the buffer memory 3 and the secondary storage device 4 is the secondary. It is guaranteed that the data transfer capacity of the storage device 4 is commensurate. Further, even when processing a large amount of image data, since the compression unit 2 compresses the image data, the buffer memory 3 does not need to have a large capacity. Therefore, in this image processing device, it is possible to eliminate the one factor that hinders the improvement of the image output efficiency and improve the apparent throughput of the secondary storage device 4, resulting in efficient image output. can do.

Further, in the image processing apparatus of this embodiment,
The controller 8 uses the segmented block holding the compressed image data having a high input data rate, that is, the compressed image data having a low compression rate in the compression unit 2, as the remaining portion. Therefore, it is possible to make the data rate between the buffer memory 3 and the secondary storage device 4 commensurate with the data transfer capability of the secondary storage device 4, without leaving many divided blocks as the remaining portion. The data transfer rate can be controlled effectively and efficiently.

Further, in the image processing apparatus of this embodiment, the controller 8 uses the compressed image data in the divided block corresponding to the head portion of one page of the image data as the remaining portion. This utilizes a characteristic peculiar to a device, such as a digital copying machine, in which compressed image data stored in the secondary storage device 4 is taken out and output immediately after the completion of the storage, The buffer memory 3 has a function as a cache memory. As a result, this image processing device enables rapid extraction of compressed image data,
As a result, efficient image output can be realized.

Further, in the image processing apparatus of this embodiment,
When the address conversion unit 20 transfers the compressed image data between the buffer memory 3 and the secondary storage device 4, the address conversion is performed for the address assigned to the divided block which is the transfer unit. . Therefore, when the compressed image data is held in the buffer memory 3, it is possible to continuously use the divided blocks in the buffer memory 3 excluding the remaining portion, so that the area in the buffer memory 3 can be effectively used. It can be used, and the overhead for managing the data holding area in the buffer memory 3 can be reduced. Further, when the partitioned blocks excluding the remaining portion are transferred to the secondary storage device 4 for storage, these partitioned blocks can be continuously accessed, so that they can be stored in the secondary storage device 4 at high speed. Can be made. Further, similarly to this, the removal from the secondary storage device 4 can be performed at high speed.

Next, another embodiment of the image processing apparatus according to the present invention will be described. As shown in FIG. 6, the image processing apparatus according to the present embodiment is provided with a dual port buffer memory 9 instead of the buffer memory 3 according to the above-described embodiments.

The dual port buffer memory 9 is a semiconductor memory having a random access port (D terminal in the drawing) and a serial data port (SD terminal in the drawing). These random access port and serial data port are It is possible to transfer data independently and in parallel. In the dual port buffer memory 9, serial data is transmitted and received to and from the interface control unit 15, and the input / output timing of serial data is controlled by the serial clock output from the transfer control unit 14. It is like this.

As the dual port buffer memory 9, for example, there is an image memory generally known as a dual port video memory. Further, in the image processing apparatus including the dual port buffer memory 9, it is desirable to set the size of the divided block to a common multiple of the sector size of the secondary storage device 4 and the serial data port transfer size of the dual port buffer memory 9.

In the image processing apparatus provided with such a dual port buffer memory 9, since the dual port buffer memory 9 has a random access port and a serial data port, that is, a plurality of access ports that enable parallel access, Holding the compressed image data in the first step, transferring the compressed image data to the secondary storage device 4 in the second step, and extracting the compressed image data from the secondary storage device 4 in the third step and The compressed image data in step 4 can be sent to the decompression unit 5 in parallel.

That is, in this image processing apparatus, the first step and the second step, and the third step and the fourth step can be performed in parallel, so that the throughput of the secondary storage device 4 can be increased. It is possible to further improve, and as a result, efficient image output can be realized.

In the above embodiment, the case where the present invention is applied to a digital copying machine has been described as an example, but the present invention is not limited to this. For example,
When the present invention is applied to a printer device, an interface for connecting to a personal computer or the like may be provided as an input means.

[0059]

As described above, according to the image processing apparatus of the present invention, a part of the compressed image data in the buffer means is used as the remaining portion based on the detection result of the monitoring means, and the remaining portion is used. Is stored in the buffer means without being stored in the storage means. Therefore, in this image processing device, even when processing a large amount of image data, since the compression means compresses the image data, it is not necessary to make the buffer means large in capacity.
Furthermore, even if the data size of the compressed image data after compression is variable, the data rate of the compressed image data exchanged between the buffer means and the storage / accumulation means matches the data transfer capability of the storage / accumulation means. Can be As a result, it is possible to eliminate the one factor that hinders the improvement in the efficiency of image output and improve the throughput in the storage / accumulation unit, and as a result, it is possible to realize efficient image output.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of an example of an embodiment of an image processing apparatus according to the present invention.

FIG. 2 is a block diagram showing a detailed configuration of an address control unit in the image processing apparatus of FIG.

FIG. 3 is a block diagram showing a detailed configuration of an address conversion unit in the address control unit of FIG.

FIG. 4 is an explanatory diagram showing a specific example of an input data rate detected by the image processing apparatus of FIG.

5A to 5D are explanatory diagrams showing divided blocks in a buffer memory in the image processing apparatus of FIG.
FIG. 4 is an explanatory diagram showing a specific example thereof.

FIG. 6 is a block diagram showing a schematic configuration of another embodiment of the image processing apparatus according to the present invention.

[Explanation of symbols]

1 scanner 2 Compressor 3 buffer memory 4 Secondary storage 5 Extension section 6 printer 8 controller 20 Address converter

Claims (5)

(57) [Claims] 1. Input means for inputting image data, compression means for compressing the image data input by the input means, buffer means for temporarily holding the compressed image data compressed by the compression means, and The storage means stores the compressed image data held by the buffer means, stores and stores the compressed image data, sends the stored and stored compressed image data to the buffer means, and holds the compressed image data again, and the compressed image data held by the buffer means. An image processing apparatus comprising: a decompression unit for decompressing to a state before compression, and an output unit for outputting the image data decompressed by the decompression unit, wherein the buffer unit detects the data amount of the compressed image data received from the compression unit. And a buffer means for compressing the data when the amount of data detected by the monitoring means is larger than a set value. A part of the compressed image data received from the stage is used as a residual part, and the residual part is held in the buffer means until being sent to the decompressing means without being stored in the storage means. An image processing apparatus, characterized by being provided with. 2. The data leaving means is characterized in that, of the compressed image data received by the buffer means, a portion having a low compression rate by the compressing means is used as the leaving portion. The image processing device described. 3. The image data storing means, when image data is input page by page by the input means,
The image processing apparatus according to claim 1, wherein compressed image data corresponding to a leading portion of a page portion is used as the remaining portion. 4. The buffer means has a plurality of areas equally divided, each area is provided with a different address from each other, and the compressed image data which is the remaining part by the data remaining means is the plurality of areas. 4. The image processing according to claim 1, 2 or 3, further comprising conversion means for converting an address assigned to each area when the area is held in a part of the areas. apparatus. 5. The buffer means has a plurality of access ports that enable parallel access to the buffer means.
Alternatively, the image processing device according to item 4.