JP3473411B2 - Substrate carrier and chip bonding method using substrate carrier - Google Patents

Substrate carrier and chip bonding method using substrate carrier

Info

Publication number
JP3473411B2
JP3473411B2 JP17104898A JP17104898A JP3473411B2 JP 3473411 B2 JP3473411 B2 JP 3473411B2 JP 17104898 A JP17104898 A JP 17104898A JP 17104898 A JP17104898 A JP 17104898A JP 3473411 B2 JP3473411 B2 JP 3473411B2
Authority
JP
Japan
Prior art keywords
substrate
carrier
chip
package
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP17104898A
Other languages
Japanese (ja)
Other versions
JP2000012612A (en
Inventor
健一 大竹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP17104898A priority Critical patent/JP3473411B2/en
Publication of JP2000012612A publication Critical patent/JP2000012612A/en
Application granted granted Critical
Publication of JP3473411B2 publication Critical patent/JP3473411B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • H01L2924/15155Shape the die mounting substrate comprising a recess for hosting the device the shape of the recess being other than a cuboid
    • H01L2924/15156Side view

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、下面に電極が突設
された基板を保持する基板用キャリアおよびこの基板用
キャリアを用いたチップのボンディング方法に関するも
のである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate carrier for holding a substrate having an electrode protruding from the lower surface thereof, and a chip bonding method using the substrate carrier.

【0002】[0002]

【従来の技術】半導体チップが実装される基板の種類と
して、SAW(Sound Acoustic Wav
e)フィルタパッケージなどのように、下面に薄い金電
極が突設されたものがある。このSAWフィルタパッケ
ージは小型でしかも個片で取扱われるため、製造工程中
でのハンドリングが難しく、専用のキャリアで保持され
た状態で搬送やチップのボンディングなどの作業が行わ
れる。以下、従来のSAWフィルタパッケージ用キャリ
アおよびこのキャリアを用いたチップのボンディングに
ついて図面を参照して説明する。図5(a)は従来のS
AWフィルタパッケージ用キャリアの平面図、図5
(b)は同SAWフィルタパッケージ用キャリアの断面
図である。
2. Description of the Related Art SAW (Sound Acoustic Wave) is a type of substrate on which a semiconductor chip is mounted.
e) There is a package such as a filter package having a thin gold electrode protruding from the lower surface. Since this SAW filter package is small and handled individually, it is difficult to handle during the manufacturing process, and operations such as transportation and chip bonding are performed while being held by a dedicated carrier. A conventional SAW filter package carrier and chip bonding using this carrier will be described below with reference to the drawings. FIG. 5A shows a conventional S
Plan view of carrier for AW filter package, FIG.
(B) is sectional drawing of the same carrier for SAW filter packages.

【0003】図5(a),(b)において、金属の板部
材であるキャリア1には、SAWフィルタパッケージ2
の外形寸法に対応した凹部1aが設けられており、凹部
1a内にはSAWパッケージ2が装着されている。SA
Wパッケージ2の上面には、チップ搭載用の凹部が形成
され、下面には4隅に外部接続用の電極2aが形成され
ている。SAWパッケージ2にチップを実装する工程で
は、SAWパッケージ2はキャリア1に装着された状態
で搬送され、チップの実装が行われる。実装時には、凹
部1aの底面に設けられた吸引孔3を介して真空吸引す
ることにより、SAWパッケージ2はキャリア1に固定
される。
In FIGS. 5A and 5B, a SAW filter package 2 is attached to a carrier 1 which is a metal plate member.
The concave portion 1a corresponding to the external dimensions of the SAW package 2 is mounted in the concave portion 1a. SA
Recesses for mounting a chip are formed on the upper surface of the W package 2, and electrodes 2a for external connection are formed on four corners of the lower surface. In the step of mounting the chip on the SAW package 2, the SAW package 2 is transported while being mounted on the carrier 1 to mount the chip. At the time of mounting, the SAW package 2 is fixed to the carrier 1 by vacuum suction through a suction hole 3 provided on the bottom surface of the recess 1a.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、図5
(b)に示すように、吸引孔3は電極2aがあるためS
AWパッケージ2の下面に密着した状態とはならず、真
空吸引時にはリークが発生してSAWパッケージ2を安
定して保持することが困難であった。そしてこのリーク
に抗して大量の空気を吸引していたため、この空気によ
って熱圧着時の熱が奪われ、良好な熱圧着に必要とされ
る加熱パターンに従った正確な熱圧着温度の管理が困難
であった。
However, as shown in FIG.
As shown in (b), since the suction hole 3 has the electrode 2a, S
The AW package 2 did not come into close contact with the lower surface of the AW package 2, and a leak occurred during vacuum suction, making it difficult to stably hold the SAW package 2. And since a large amount of air was sucked against this leak, the heat at the time of thermocompression bonding was taken away by this air, and accurate thermocompression bonding temperature management according to the heating pattern required for good thermocompression bonding was achieved. It was difficult.

【0005】またSAWパッケージ2の下面の電極2a
の高さはばらついているため、実装面の水平度は保障さ
れておらず、チップを実装面に押圧して超音波振動によ
り圧着する際に、均一な押圧を行うことが困難であっ
た。このように、従来のSAWパッケージ用のキャリア
を用いたチップの実装には、熱圧着温度や押圧時の精度
を良好に維持することが難しく、安定した品質でボンデ
ィングを行うことが困難であるという問題点があった。
The electrode 2a on the lower surface of the SAW package 2
Since the heights of the chips vary, the levelness of the mounting surface is not guaranteed, and it is difficult to perform uniform pressing when the chip is pressed against the mounting surface and pressure-bonded by ultrasonic vibration. As described above, in mounting a chip using a conventional carrier for a SAW package, it is difficult to maintain good thermocompression bonding temperature and accuracy during pressing, and it is difficult to perform bonding with stable quality. There was a problem.

【0006】そこで本発明は、安定したボンディング品
質を確保することができる基板用キャリアおよび基板用
キャリアを用いたチップのボンディング方法を提供する
ことを目的とする。
Therefore, an object of the present invention is to provide a substrate carrier capable of ensuring stable bonding quality and a chip bonding method using the substrate carrier.

【0007】[0007]

【課題を解決するための手段】請求項1記載の基板用キ
ャリアは、下面に電極が突設された基板を保持する基板
用キャリアであって、前記電極に対応して孔部が形成さ
れた下部プレートと、前記基板の側面を弾性的にクラン
プするクランプ手段を備えた上部プレートより成り、前
記基板が前記上部プレートにクランプされた状態で前記
電極は前記孔部に嵌合し、かつ前記基板の下面は前記孔
部で囲まれた平面に当接して下受けされている。
A carrier for a substrate according to claim 1 is a carrier for a substrate which holds a substrate having an electrode protruding from a lower surface thereof, wherein a hole is formed corresponding to the electrode. A lower plate; and an upper plate having a clamp means for elastically clamping the side surface of the substrate, wherein the electrode fits in the hole while the substrate is clamped by the upper plate, and the substrate The lower surface of the is abutted against the plane surrounded by the hole and is received underneath.

【0008】請求項2記載のチップのボンディング方法
は、下面に電極が突設された基板にチップをボンディン
グするチップのボンディング方法であって、前記電極に
対応して孔部が形成された下部プレートと、前記基板の
側面を弾性的にクランプするクランプ手段を備えた上部
プレートより成る基板用キャリアに前記基板を保持さ
せ、前記電極を前記孔部内に嵌合させかつ前記基板の下
面は前記孔部で囲まれた平面に当接して下受けされた状
態で、前記チップを基板に搭載してボンディングヘッド
によりこのチップを押圧しながら超音波振動を付与する
とともに、前記下受けされた面を介して前記基板を加熱
するようにした。
According to a second aspect of the present invention, there is provided a chip bonding method for bonding a chip to a substrate having an electrode protruding from a lower surface thereof, the lower plate having a hole corresponding to the electrode. And holding the substrate in a substrate carrier comprising an upper plate having a clamping means for elastically clamping the side surface of the substrate, fitting the electrodes into the holes, and the lower surface of the substrate having the holes. In a state of being abutted against a plane surrounded by, the chip is mounted on a substrate and ultrasonic vibration is applied while pressing the chip with a bonding head, and through the surface received a The substrate was heated.

【0009】各請求項記載の発明によれば、電極に対応
して孔部が形成された下部プレートと基板の側面を弾性
的にクランプするクランプ手段を備えた上部プレートよ
り成る基板用キャリアを用いることにより、基板の水平
度を確保するとともに加熱の効率を向上させ、安定した
ボンディング品質を確保することができる。
According to the invention described in each claim, a carrier for a substrate is used, which comprises a lower plate having holes formed corresponding to electrodes and an upper plate provided with a clamping means for elastically clamping the side surface of the substrate. As a result, the levelness of the substrate can be secured, the heating efficiency can be improved, and stable bonding quality can be secured.

【0010】[0010]

【発明の実施の形態】次に図面を参照して本発明の実施
の形態を説明する。図1は本発明の一実施の形態のキャ
リアの斜視図、図2(a),(b)は同キャリアの平面
図、図3(a),(b),(c)、図4は同ボンディン
グ方法の工程説明図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. 1 is a perspective view of a carrier according to an embodiment of the present invention, FIGS. 2 (a) and 2 (b) are plan views of the carrier, FIGS. 3 (a), 3 (b) and 3 (c), and FIG. 4 are the same. It is process explanatory drawing of a bonding method.

【0011】まず、図1、図2を参照してSAWパッケ
ージ用のキャリアについて説明する。図1において、キ
ャリア10は下部プレート11、上部プレート12の2
枚のプレートを重ね合せ、スポット溶接などにより接合
して成る。キャリア10は図1に示すようにSAWパッ
ケージ2を装着して保持するためのものであり、下部プ
レート11にはSAWパッケージ2の下面に形成された
金の電極2aの配置に対応して複数の孔部11aが設け
られている(図2(b)参照)。
First, a carrier for a SAW package will be described with reference to FIGS. In FIG. 1, the carrier 10 includes a lower plate 11 and an upper plate 12.
It is made by stacking plates and joining them by spot welding. The carrier 10 is for mounting and holding the SAW package 2 as shown in FIG. 1, and the lower plate 11 has a plurality of electrodes corresponding to the arrangement of the gold electrodes 2 a formed on the lower surface of the SAW package 2. A hole 11a is provided (see FIG. 2 (b)).

【0012】図2(a)に示すように、上部プレート1
2には矩形の開口部12aが設けられている。開口部1
2aを対角方向に横切ってブリッジ部13が設けられて
おり、SAWパッケージ2を保持した状態では、ブリッ
ジ部13の中央の張出部14に設けられた切欠部14a
と、開口部12aの2辺の縁部a,bの間でSAWパッ
ケージ2を挟み込んでクランプする。以下、このクラン
プ方法について説明する。
As shown in FIG. 2A, the upper plate 1
2 has a rectangular opening 12a. Opening 1
A bridge portion 13 is provided diagonally across 2a, and in a state where the SAW package 2 is held, a cutout portion 14a provided in a central overhang portion 14 of the bridge portion 13 is provided.
And the SAW package 2 is clamped by sandwiching the SAW package 2 between the two edges a and b of the opening 12a. Hereinafter, this clamping method will be described.

【0013】ブリッジ部13のピン孔15にピンを挿入
して矢印c方向に移動させると、ブリッジ部13は弾性
変形して矢印c方向に変位する。この状態でSAWパッ
ケージを切欠部14aと前記の2辺の縁部a,bの間に
載置し、その後ピンをピン孔15から取外すことによ
り、ブリッジ部13は矢印c方向と反対側に戻り、これ
によりSAWパッケージ2は上部プレート12に弾性的
にクランプされて保持される。すなわち、開口部12
a、ブリッジ部13、切欠部14aはSAWパッケージ
2を弾性的にクランプするクランプ手段となっている。
SAWパッケージ2がクランプされた状態では、電極2
aは孔部11a内に嵌合し、SAWパッケージ2の下面
は下部プレート11の孔部11aで囲まれた平面に当接
して下受けされている。
When a pin is inserted into the pin hole 15 of the bridge portion 13 and moved in the arrow c direction, the bridge portion 13 is elastically deformed and displaced in the arrow c direction. In this state, the SAW package is placed between the notch 14a and the edges a and b on the two sides, and then the pin is removed from the pin hole 15, so that the bridge portion 13 returns to the direction opposite to the arrow c direction. As a result, the SAW package 2 is elastically clamped and held by the upper plate 12. That is, the opening 12
The a, the bridge portion 13, and the cutout portion 14a serve as a clamping means for elastically clamping the SAW package 2.
When the SAW package 2 is clamped, the electrode 2
a is fitted in the hole 11a, and the lower surface of the SAW package 2 is abutted against and received by the plane surrounded by the hole 11a of the lower plate 11.

【0014】次に図3、図4を参照して、キャリア10
を用いたチップのボンディング方法について説明する。
このボンディング方法は、キャリア10に保持されたS
AWパッケージ2にチップを超音波熱圧着するものであ
る。まず図3(a)に示すように、ピン孔15内にピン
17を挿入し矢印方向にわずかに移動させた状態で、S
AWパッケージ2をキャリア10に装着する。これによ
り、SAWパッケージ2は下部プレート11上に載置さ
れて電極2aは孔部11の内に嵌合し、SAWパッケー
ジ2の下面は下部プレート11の上面で下受けされる。
そしてピン17を抜き取ることにより、ブリッジ部13
は矢印方向に戻り、これによりSAWパッケージ2はキ
ャリア10にクランプされて保持される。
Next, referring to FIGS. 3 and 4, the carrier 10
A chip bonding method using is explained.
This bonding method uses the S held on the carrier 10.
The chip is ultrasonically thermocompression bonded to the AW package 2. First, as shown in FIG. 3A, with the pin 17 inserted in the pin hole 15 and slightly moved in the direction of the arrow, S
The AW package 2 is mounted on the carrier 10. As a result, the SAW package 2 is placed on the lower plate 11, the electrodes 2a are fitted in the holes 11, and the lower surface of the SAW package 2 is received by the upper surface of the lower plate 11.
Then, by removing the pin 17, the bridge portion 13
Returns in the direction of the arrow, whereby the SAW package 2 is clamped and held by the carrier 10.

【0015】次に、SAWパッケージ2を保持したキャ
リア10はチップボンディング工程に送られる。図3
(c)に示すように、キャリア10はヒータ22が装備
されたステージ18上に載置され、ボンディングヘッド
19に保持され、バンプ21(図4)を有するチップ2
0がSAWパッケージ2上にボンディングされる。この
ボンディング工程においては、図4に示すようにボンデ
ィングヘッド19によってチップ20をSAWパッケー
ジ2に対して押圧するとともに、図外の超音波振動子に
よりチップ20に超音波振動を付与する。
Next, the carrier 10 holding the SAW package 2 is sent to the chip bonding process. Figure 3
As shown in (c), the carrier 10 is mounted on a stage 18 equipped with a heater 22, is held by a bonding head 19, and has a chip 21 having bumps 21 (FIG. 4).
0 is bonded onto the SAW package 2. In this bonding step, the chip 20 is pressed against the SAW package 2 by the bonding head 19 as shown in FIG. 4, and ultrasonic vibration is applied to the chip 20 by an ultrasonic vibrator (not shown).

【0016】これと同時に、ステージ18のヒータ22
を発熱させることにより、キャリア10の下部プレート
11の下受け部11bを介して、SAWパッケージ2の
下面に熱を伝達し、チップ20のバンプ21とSAWパ
ッケージ2との接合部を加熱する。この超音波振動付与
と加熱を所定時間継続することにより、チップ20はS
AWパッケージ2にボンディングされる。
At the same time, the heater 22 of the stage 18
The heat is transferred to the lower surface of the SAW package 2 via the lower receiving portion 11b of the lower plate 11 of the carrier 10 to heat the bonding portion between the bump 21 of the chip 20 and the SAW package 2. By continuing the application of this ultrasonic vibration and the heating for a predetermined time, the chip 20 becomes S
Bonded to the AW package 2.

【0017】このとき、SAWパッケージ2は下部プレ
ート11の下受け部11bによって下受けされているた
め、電極2aの高さのばらつきに無関係に精度よく水平
に保持され、したがってバンプ21はSAWパッケージ
2に均一に接触して押圧され、良好な接合品質が確保さ
れる。また、ステージ18からの熱は下受け部11bを
介して効率よく接合部に伝達されるため加熱効率に優れ
ており、したがって接合部の昇温・冷却時の応答性が優
れているため所定の加熱パターンを精度よく維持して、
良好な接合品質を得ることができる。
At this time, since the SAW package 2 is under-supported by the lower receiving portion 11b of the lower plate 11, the SAW package 2 is accurately held horizontally regardless of variations in the height of the electrodes 2a, and therefore the bumps 21 are held in the SAW package 2. It is uniformly contacted with and pressed against, and good bonding quality is secured. Further, the heat from the stage 18 is efficiently transferred to the joint through the lower receiving portion 11b, and thus the heating efficiency is excellent. Therefore, the responsiveness at the time of temperature rise / cooling of the joint is excellent, so that the predetermined temperature is maintained. Maintain the heating pattern accurately,
Good joining quality can be obtained.

【0018】[0018]

【発明の効果】本発明によれば、電極に対応して孔部が
形成された下部プレートと基板の側面を弾性的にクラン
プするクランプ手段を備えた上部プレートより成る基板
用キャリアに基板を保持させるようにしたので、チップ
のボンディング時に基板の水平度を確保することができ
るとともに、加熱の効率を向上させて所定の加熱パター
ンを精度よく維持することができ、したがって安定した
ボンディング品質を確保することができる。
According to the present invention, the substrate is held on the substrate carrier which is composed of the lower plate having the holes formed corresponding to the electrodes and the upper plate having the clamping means for elastically clamping the side surface of the substrate. As a result, the levelness of the substrate can be ensured during chip bonding, and the heating efficiency can be improved to maintain a predetermined heating pattern with high accuracy, thus ensuring stable bonding quality. be able to.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施の形態のキャリアの斜視図FIG. 1 is a perspective view of a carrier according to an embodiment of the present invention.

【図2】(a)本発明の一実施の形態のキャリアの平面
図 (b)本発明の一実施の形態のキャリアの平面図
FIG. 2A is a plan view of a carrier according to an embodiment of the present invention. FIG. 2B is a plan view of a carrier according to an embodiment of the present invention.

【図3】(a)本発明の一実施の形態のボンディング方
法の工程説明図 (b)本発明の一実施の形態のボンディング方法の工程
説明図 (c)本発明の一実施の形態のボンディング方法の工程
説明図
3A is a process explanatory diagram of a bonding method according to an embodiment of the present invention; FIG. 3B is a process explanatory diagram of a bonding method according to an embodiment of the present invention; and FIG. 3C is a bonding process according to an embodiment of the present invention. Illustration of process steps

【図4】本発明の一実施の形態のボンディング方法の工
程説明図
FIG. 4 is a process explanatory diagram of a bonding method according to an embodiment of the present invention.

【図5】(a)従来のSAWフィルタパッケージ用キャ
リアの平面図 (b)従来のSAWフィルタパッケージ用キャリアの断
面図
5A is a plan view of a conventional SAW filter package carrier, and FIG. 5B is a cross-sectional view of a conventional SAW filter package carrier.

【符号の説明】[Explanation of symbols]

2 SAWパッケージ 2a 電極 10 キャリア 11 下部プレート 11a 孔部 12 上部プレート 13 ブリッジ部 19 ボンディングヘッド 20 チップ 2 SAW package 2a electrode 10 careers 11 Lower plate 11a hole 12 Upper plate 13 Bridge section 19 Bonding head 20 chips

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 21/60 H01L 21/50 H01L 21/52 H01L 21/68 ─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 21/60 H01L 21/50 H01L 21/52 H01L 21/68

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】下面に電極が突設された基板を保持する基
板用キャリアであって、前記電極に対応して孔部が形成
された下部プレートと、前記基板の側面を弾性的にクラ
ンプするクランプ手段を備えた上部プレートより成り、
前記基板が前記上部プレートにクランプされた状態で前
記電極は前記孔部に嵌合し、かつ前記基板の下面は前記
孔部で囲まれた平面に当接して下受けされていることを
特徴とする基板用キャリア。
1. A substrate carrier for holding a substrate having an electrode protruding from a lower surface thereof, wherein a lower plate having a hole corresponding to the electrode and a side surface of the substrate are elastically clamped. Consisting of an upper plate with clamping means,
The electrode is fitted in the hole while the substrate is clamped to the upper plate, and the lower surface of the substrate is in contact with a flat surface surrounded by the hole to be supported. A carrier for substrates.
【請求項2】下面に電極が突設された基板にチップをボ
ンディングするチップのボンディング方法であって、前
記電極に対応して孔部が形成された下部プレートと、前
記基板の側面を弾性的にクランプするクランプ手段を備
えた上部プレートより成る基板用キャリアに前記基板を
保持させ、前記電極を前記孔部内に嵌合させかつ前記基
板の下面は前記孔部で囲まれた平面に当接して下受けさ
れた状態で、前記チップを基板に搭載してボンディング
ヘッドによりこのチップを押圧しながら超音波振動を付
与するとともに、前記下受けされた面を介して前記基板
を加熱することを特徴とするチップのボンディング方
法。
2. A chip bonding method for bonding a chip to a substrate having an electrode protruding from a lower surface thereof, wherein a lower plate having a hole corresponding to the electrode and a side surface of the substrate are elastic. The substrate is held by a substrate carrier including an upper plate having a clamp means for clamping the electrode, the electrode is fitted in the hole, and the lower surface of the substrate is in contact with a plane surrounded by the hole. In a state of being subbed, the chip is mounted on a substrate, ultrasonic vibration is applied while pressing the chip by a bonding head, and the substrate is heated via the subbed surface. Chip bonding method.
JP17104898A 1998-06-18 1998-06-18 Substrate carrier and chip bonding method using substrate carrier Expired - Fee Related JP3473411B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17104898A JP3473411B2 (en) 1998-06-18 1998-06-18 Substrate carrier and chip bonding method using substrate carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17104898A JP3473411B2 (en) 1998-06-18 1998-06-18 Substrate carrier and chip bonding method using substrate carrier

Publications (2)

Publication Number Publication Date
JP2000012612A JP2000012612A (en) 2000-01-14
JP3473411B2 true JP3473411B2 (en) 2003-12-02

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3473411B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4671258B2 (en) * 2001-07-02 2011-04-13 株式会社アロン社 Substrate transportation jig and manufacturing method thereof
JP2007035978A (en) * 2005-07-28 2007-02-08 Citizen Miyota Co Ltd Positioning jig

Also Published As

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