JP3470481B2 - Power circuit - Google Patents
Power circuitInfo
- Publication number
- JP3470481B2 JP3470481B2 JP34418095A JP34418095A JP3470481B2 JP 3470481 B2 JP3470481 B2 JP 3470481B2 JP 34418095 A JP34418095 A JP 34418095A JP 34418095 A JP34418095 A JP 34418095A JP 3470481 B2 JP3470481 B2 JP 3470481B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- power supply
- input
- circuit
- supply circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【０００１】[0001]
【発明の属する技術分野】本発明はメモリ等の半導体集
積回路の試験装置等において用いられる電源回路に係わ
り、特に、並列駆動に好適な電源回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit used in a tester for a semiconductor integrated circuit such as a memory, and more particularly to a power supply circuit suitable for parallel driving.
【０００２】[0002]
【従来の技術】従来、半導体集積回路試験装置において
は、集積回路（デバイス）の各端子へ規定の電圧を印加
するため、各デバイス毎に個別に専用電源を用いてい
た。しかし、半導体デバイスの高集積化に伴い、大きな
供給電流を必要とするデバイスが登場してきた。この場
合、個別の電源を単純に並列に接続して使用すると、電
源回路側の電流バランスが崩れる問題がある。そこで、
ダイオードを出力端に接続する方法が用いられた。図５
は、この方法によって２個の電源回路を並列接続した場
合を示す。この図において、抵抗Ｒ1、Ｒ2、Ｒ3、演算
増幅器ＯＰ1、ＯＰ2が第１の電源回路９を構成し、抵抗
Ｒ4、Ｒ5、Ｒ6、演算増幅器ＯＰ3、ＯＰ4が第２の電源
回路１０を構成している。また、Ｖinは出力電圧を指定
する信号である。この回路においては、電源回路９，１
０の各出力端に各々ダイオードＤ１，Ｄ２が接続され、
そして、ダイオードＤ１，Ｄ２の出力端が共通接続され
て、１つの電源回路として使用される。2. Description of the Related Art Conventionally, in a semiconductor integrated circuit tester, a dedicated power source is used individually for each device in order to apply a prescribed voltage to each terminal of the integrated circuit (device). However, with the high integration of semiconductor devices, devices that require a large supply current have appeared. In this case, if individual power supplies are simply connected in parallel and used, there is a problem that the current balance on the power supply circuit side is lost. Therefore,
The method of connecting the diode to the output was used. Figure 5
Shows the case where two power supply circuits are connected in parallel by this method. In this figure, resistors R1, R2, R3 and operational amplifiers OP1, OP2 constitute a first power supply circuit 9, and resistors R4, R5, R6 and operational amplifiers OP3, OP4 constitute a second power supply circuit 10. There is. Vin is a signal that specifies the output voltage. In this circuit, the power supply circuits 9 and 1
The diodes D1 and D2 are connected to the output terminals of 0,
The output terminals of the diodes D1 and D2 are commonly connected and used as one power supply circuit.
【０００３】[0003]
【発明が解決しようとする課題】ところで、このように
ダイオードによってバランスをとった場合でも、ダイオ
ードのバラツキ分の出力電圧誤差が生じる等の不具合が
ある。また、デバイスの消費電流を直読出来ないため各
電源の電流値を測定し、総和を求めなければならない不
便さもある。本発明はこのような事情を考慮してなされ
たもので、並列駆動した場合においても各回路の電流バ
ランスがくずれることなく、しかも、上述したダイオー
ドによる誤差あるいは電流値を測定する際の不便さを除
去することができる並列駆動用の電源回路を提供するこ
とを目的とする。By the way, even when the diodes are used for balancing as described above, there is a problem that an output voltage error corresponding to the variation of the diodes occurs. In addition, since the current consumption of the device cannot be directly read, there is the inconvenience of measuring the current value of each power supply and obtaining the sum. The present invention has been made in consideration of such circumstances, and the current balance of each circuit is not lost even when they are driven in parallel, and the inconvenience in measuring the error or the current value due to the above-mentioned diode is eliminated. An object is to provide a power supply circuit for parallel driving which can be eliminated.
【０００４】[0004]
【課題を解決するための手段】図１は、請求項１に記載
の並列駆動用の電源回路の構成を示すブロック図であ
る。この図において、ＩＮ１は出力電圧を指示する信号
が入力される第１の制御端子、ＩＮ２は出力電流を指示
する信号が入力される第２の制御端子、１は入力切換回
路、２は演算増幅器、３は演算増幅器２の出力電流を測
定する電流測定回路である。入力切換回路１は、信号Ｖ
Ｆ／ＩＦに応じて演算増幅器２の入力回路を切り換え
る。すなわち、ある場合は制御端子ＩＮ１の信号を演算
増幅器２の入力端へ印加するとともに、出力端子Ｖout
の信号を演算増幅器２の入力端へ帰還する。この場合、
図１の回路が定電圧電源回路として動作する。また、あ
る場合は、制御端子ＩＮ２の信号を演算増幅器２の入力
端へ印加するとともに、電流測定回路３の出力を演算増
幅器２の入力端へ帰還する。この場合、図１の回路が定
電流電源回路として動作する。FIG. 1 is a block diagram showing the configuration of a power supply circuit for parallel driving according to a first aspect of the present invention. In this figure, IN1 is a first control terminal to which a signal instructing an output voltage is input, IN2 is a second control terminal to which a signal instructing an output current is input, 1 is an input switching circuit, and 2 is an operational amplifier. Reference numeral 3 is a current measuring circuit for measuring the output current of the operational amplifier 2. The input switching circuit 1 uses the signal V
The input circuit of the operational amplifier 2 is switched according to F / IF. That is, in some cases, the signal at the control terminal IN1 is applied to the input terminal of the operational amplifier 2 and at the same time the output terminal Vout is output.
Signal is fed back to the input terminal of the operational amplifier 2. in this case,
The circuit of FIG. 1 operates as a constant voltage power supply circuit. In some cases, the signal of the control terminal IN2 is applied to the input terminal of the operational amplifier 2 and the output of the current measuring circuit 3 is fed back to the input terminal of the operational amplifier 2. In this case, the circuit of FIG. 1 operates as a constant current power supply circuit.
【０００５】図２は、請求項２に記載の電源回路の一構
成例を示す回路図である。この回路は、２個の請求項１
に記載の電源回路４−１、４−２を設け、第１の電源回
路４−１の第１の制御端子ＩＮ１へ出力電圧を指定する
信号Ｖinを印加し、同電源回路４−１の入力切換回路に
よって、第１の制御端子ＩＮ１の信号および出力端子Ｖ
outの信号を演算増幅器２の入力端へ入力し、電源回路
４−１の電流測定回路２の出力を第２の電源回路４−２
の第２の制御端子ＩＮ２へ印加する。また、第２の電源
回路の入力切換回路によって、第２の制御端子の信号お
よび第２の帰還手段の出力を各々演算増幅器２の入力端
へ入力し、そして第１、第２の電源回路の出力端子を共
通接続する。すなわち、図２の回路は、電源回路４−１
が定電圧電源回路、電源回路４−２が定電流電源回路と
して動作する。この場合、電源回路４−２には、常時、
電源回路４−１の電流値に応じた電流が流れる。FIG. 2 is a circuit diagram showing a configuration example of a power supply circuit according to a second aspect. This circuit has two claim 1
The power supply circuits 4-1 and 4-2 described in 1 above are provided, and the signal Vin for designating the output voltage is applied to the first control terminal IN1 of the first power supply circuit 4-1 to input the power supply circuit 4-1. By the switching circuit, the signal of the first control terminal IN1 and the output terminal V
The output signal is input to the input terminal of the operational amplifier 2, and the output of the current measuring circuit 2 of the power supply circuit 4-1 is input to the second power supply circuit 4-2.
Is applied to the second control terminal IN2. Further, the input switching circuit of the second power supply circuit inputs the signal of the second control terminal and the output of the second feedback means to the input terminals of the operational amplifiers 2, respectively, and the first and second power supply circuits Connect output terminals in common. That is, the circuit of FIG.
Is a constant voltage power supply circuit, and the power supply circuit 4-2 is a constant current power supply circuit. In this case, the power supply circuit 4-2 is always
A current corresponding to the current value of the power supply circuit 4-1 flows.
【０００６】[0006]
【発明の実施の形態】以下、図面を参照して本発明の実
施の形態について説明する。図３は本発明の第１の実施
形態による電源回路の構成を示すブロック図である。こ
の図において、ＩＮ１は出力電圧を指定する信号が印加
される制御端子、Ｂ１はバッファアンプ、Ｒ1は抵抗、
Ｌ１はスイッチ（アナログスイッチまたはフォトモス
等）である。また、ＩＮ２は出力電流を指定する信号が
印加される制御端子、Ｒ２は抵抗、Ｃ１はコンデンサ、
Ｂ２はバッファアンプ、Ｒ３は抵抗、Ｌ２はスイッチで
ある。そして、上述した各部品によって入力切換回路が
構成されている。また、ＯＰ１は演算増幅器であり、そ
の反転入力端にスイッチＬ１，Ｌ２が接続され、非反転
入力端が接地されている。Ｂ３は演算増幅器ＯＰ１の出
力を電流増幅する電流バッファである。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 3 is a block diagram showing the configuration of the power supply circuit according to the first embodiment of the present invention. In this figure, IN1 is a control terminal to which a signal designating an output voltage is applied, B1 is a buffer amplifier, R1 is a resistor,
L1 is a switch (analog switch, photomoss, etc.). IN2 is a control terminal to which a signal designating the output current is applied, R2 is a resistor, C1 is a capacitor,
B2 is a buffer amplifier, R3 is a resistor, and L2 is a switch. An input switching circuit is composed of the above-mentioned components. OP1 is an operational amplifier, the switches L1 and L2 are connected to its inverting input terminal, and its non-inverting input terminal is grounded. B3 is a current buffer that current-amplifies the output of the operational amplifier OP1.
【０００７】Ｒ７〜Ｒ１２は抵抗、ＯＰ３〜ＯＰ５は演
算増幅器であり、これらの部品によって、電流測定回路
が構成されている。ここで、抵抗Ｒ７は電流検出用抵
抗、ＯＰ３は抵抗Ｒ７の一端の電圧を増幅する演算増幅
器、ＯＰ４は抵抗Ｒ７の他端の電圧を増幅する演算増幅
器、ＯＰ５は演算増幅器ＯＰ３、ＯＰ４の各出力の差を
検出する演算増幅器であり、この演算増幅器ＯＰ５の出
力が出力端Ｖoutの出力電流に対応する値となる。Ｒ１
３、Ｒ１４は抵抗、ＯＰ６は演算増幅器ＯＰ５の出力を
増幅する演算増幅器であり、この演算増幅器ＯＰ６の出
力が端子ＩＭ１へ供給される。Ｒ５は抵抗であり、この
抵抗Ｒ５を介して演算増幅器ＯＰ５の出力（電流測定回
路の出力）が演算増幅器ＯＰ１の反転入力端へ帰還され
る。また、Ｒ４、Ｒ６は抵抗、ＯＰ２はバッファ増幅器
として使用されている演算増幅器であり、これらの抵抗
Ｒ４、Ｒ６、演算増幅器ＯＰ２によって出力端Ｖoutの
電圧を演算増幅器ＯＰ１の反転入力端へ帰還する帰還回
路が構成されている。R7 to R12 are resistors and OP3 to OP5 are operational amplifiers, and these parts constitute a current measuring circuit. Here, the resistor R7 is a current detection resistor, OP3 is an operational amplifier that amplifies the voltage at one end of the resistor R7, OP4 is an operational amplifier that amplifies the voltage at the other end of the resistor R7, and OP5 is each output of the operational amplifiers OP3 and OP4. Of the operational amplifier OP5, and the output of the operational amplifier OP5 has a value corresponding to the output current of the output terminal Vout. R1
3, R14 are resistors, OP6 is an operational amplifier for amplifying the output of the operational amplifier OP5, and the output of this operational amplifier OP6 is supplied to the terminal IM1. R5 is a resistor, and the output of the operational amplifier OP5 (output of the current measuring circuit) is fed back to the inverting input terminal of the operational amplifier OP1 via the resistor R5. In addition, R4 and R6 are resistors, OP2 is an operational amplifier used as a buffer amplifier, and the resistors R4, R6 and operational amplifier OP2 feed back the voltage of the output terminal Vout to the inverting input terminal of the operational amplifier OP1. The circuit is configured.
【０００８】以上が図３の上半部に示された電源回路５
の構成である。図３の下半部に示された電源回路６も全
く同様に構成されている。そして、使用時においては、
電源回路５の端子ＩＭ１と電源回路６の制御端子ＩＮ４
が接続され、電源回路５，６の各出力端Ｖoutが共通接
続される。また、外部からの制御信号によって、スイッ
チＬ１〜Ｌ４が次のように設定される。
Ｌ１−オン、Ｌ２−オフ、Ｌ３−オフ、Ｌ４−オン
そして、制御端子ＩＮ１へ出力電圧を指定する信号Ｖin
が印加され、共通接続された出力端Ｖoutの電圧が負荷
へ供給される。The above is the power supply circuit 5 shown in the upper half of FIG.
It is the structure of. The power supply circuit 6 shown in the lower half of FIG. 3 has the same structure. And, at the time of use,
Terminal IM1 of power supply circuit 5 and control terminal IN4 of power supply circuit 6
And the output terminals Vout of the power supply circuits 5 and 6 are commonly connected. Further, the switches L1 to L4 are set as follows by a control signal from the outside. L1-on, L2-off, L3-off, L4-on, and a signal Vin that specifies the output voltage to the control terminal IN1.
Is applied, and the voltage of the commonly connected output terminal Vout is supplied to the load.
【０００９】次に、上述した電源回路の動作を説明す
る。まず、使用時においてスイッチＬ１がオン状態にあ
ることから、制御端子ＩＮ１の信号がバッファＢ１、抵
抗Ｒ１、スイッチＬ１を介して演算増幅器ＯＰ１の反転
入力端へ供給され、また、出力端Ｖoutの電圧が抵抗Ｒ
６、演算増幅器ＯＰ２、抵抗Ｒ１、スイッチＬ１を介し
て同反転入力端へ供給される。これにより、演算増幅器
ＯＰ１の出力電圧が信号Ｖinに対応する一定電圧とな
る。また、出力端Ｖoutの出力電流が演算増幅器ＯＰ３
〜ＯＰ５による電流測定回路によって検出され、演算増
幅器ＯＰ６によって増幅され、電源回路６の制御端子Ｉ
Ｎ４へ供給される。ここで、スイッチＬ４がオン、Ｌ３
がオフとなっていることから、制御端子ＩＮ４の信号が
抵抗Ｒ１６、バッファＢ５、抵抗Ｒ１７、スイッチＬ４
を介して演算増幅器ＯＰ８の反転入力端へ印加され、ま
た、抵抗Ｒ２１〜Ｒ２６および演算増幅器ＯＰ９、ＯＰ
１０、ＯＰ１１による電流測定回路の出力が抵抗１９、
スイッチＬ４を介して同反転入力端へ帰還される。これ
により、電源回路６が定電流回路として動作し、その出
力電流が制御端子ＩＮ４の信号によって決まる値とな
る。そして、制御端子ＩＮ４へは電源回路５の出力電流
を示す信号が印加されることから、電源回路６の出力電
流が電源回路５の出力電流と同一になる。Next, the operation of the above power supply circuit will be described. First, since the switch L1 is in the ON state at the time of use, the signal of the control terminal IN1 is supplied to the inverting input terminal of the operational amplifier OP1 via the buffer B1, the resistor R1, and the switch L1, and the voltage of the output terminal Vout is supplied. Is resistance R
6, through the operational amplifier OP2, the resistor R1, and the switch L1 to the inverting input terminal. As a result, the output voltage of the operational amplifier OP1 becomes a constant voltage corresponding to the signal Vin. The output current of the output terminal Vout is the operational amplifier OP3.
~ OP5 detected by the current measurement circuit, amplified by the operational amplifier OP6, the control terminal I of the power supply circuit 6
It is supplied to N4. Here, switch L4 is on, L3
Is off, the signal of the control terminal IN4 is the resistor R16, the buffer B5, the resistor R17, and the switch L4.
Applied to the inverting input terminal of the operational amplifier OP8 via the resistors R21 to R26 and the operational amplifiers OP9, OP.
10, the output of the current measurement circuit by OP11 is resistor 19,
It is fed back to the same inverting input terminal through the switch L4. As a result, the power supply circuit 6 operates as a constant current circuit, and its output current has a value determined by the signal at the control terminal IN4. Then, since the signal indicating the output current of the power supply circuit 5 is applied to the control terminal IN4, the output current of the power supply circuit 6 becomes the same as the output current of the power supply circuit 5.
【００１０】なお、図３に示す回路は、同一構成による
電源回路５，６を並列接続して構成したものであるが、
電源回路５または６単独でも勿論使用することができ
る。この場合、スイッチＬ１，Ｌ２のオン／オフに基づ
き定電圧回路、あるいは定電流回路として動作させるこ
とができる。また、電源回路５と同一の回路を３個以上
並列に接続することも可能である。この場合、第１の電
源回路のみを定電圧回路として動作させ、他の電源回路
はいずれも定電流回路として動作させる。また、第１の
電源回路の端子ＩＭ１と第２以降の電源回路の制御端子
ＩＮ２とを各々接続し、また、全電源回路の出力端Ｖou
tを共通接続する。The circuit shown in FIG. 3 is configured by connecting power supply circuits 5 and 6 of the same structure in parallel.
Of course, the power supply circuit 5 or 6 can be used alone. In this case, it can be operated as a constant voltage circuit or a constant current circuit based on ON / OFF of the switches L1 and L2. It is also possible to connect three or more circuits that are the same as the power supply circuit 5 in parallel. In this case, only the first power supply circuit operates as a constant voltage circuit, and the other power supply circuits operate as constant current circuits. Further, the terminal IM1 of the first power supply circuit and the control terminal IN2 of the second and subsequent power supply circuits are respectively connected, and the output terminal Vou of all the power supply circuits is connected.
Connect t together.
【００１１】次に、図４はこの発明の第２の実施形態を
示す図である。この図に示す電源回路７は、演算増幅器
ＯＰ１を非反転増幅器として使用している点が図３の電
源回路５と異なっている。この電源回路７を定電圧電源
回路として使用する場合は、スイッチＬ１，Ｌ２をオ
ン、スイッチＬ３，Ｌ４をオフとし、また、定電流電源
回路として使用する場合は、スイッチＬ１，Ｌ２をオ
フ、スイッチＬ３，Ｌ４をオンとする。また、電源回路
８は電源回路７と同一構成である。そして、電源回路
７，８を並列接続する場合は、電源回路７の端子ＩＭと
電源回路８の端子ＩＮ４とを接続し、電源回路７，８の
各出力端Ｖoutを共通接続する。また、スイッチＬ１，
Ｌ２，Ｌ７，Ｌ８をオン、スイッチＬ３，Ｌ４，Ｌ５，
Ｌ６をオフとする。そして、電源回路７の制御端子ＩＮ
１へ出力電圧を指示する信号Ｖinを印加する。図４に示
す回路は図３に示す回路に比較し、入力／帰還抵抗に高
精度抵抗を使用しなくてすむので、安価に構成できる
が、発振しやすい欠点がある。Next, FIG. 4 is a diagram showing a second embodiment of the present invention. The power supply circuit 7 shown in this figure differs from the power supply circuit 5 of FIG. 3 in that the operational amplifier OP1 is used as a non-inverting amplifier. When the power supply circuit 7 is used as a constant voltage power supply circuit, the switches L1 and L2 are turned on and the switches L3 and L4 are turned off. When it is used as a constant current power supply circuit, the switches L1 and L2 are turned off and the switch is turned on. L3 and L4 are turned on. The power supply circuit 8 has the same configuration as the power supply circuit 7. When the power supply circuits 7 and 8 are connected in parallel, the terminal IM of the power supply circuit 7 and the terminal IN4 of the power supply circuit 8 are connected, and the output terminals Vout of the power supply circuits 7 and 8 are commonly connected. In addition, the switch L1,
L2, L7, L8 are turned on, switches L3, L4, L5
Turn off L6. Then, the control terminal IN of the power supply circuit 7
A signal Vin for instructing the output voltage is applied to 1. Compared to the circuit shown in FIG. 3, the circuit shown in FIG. 4 does not require the use of high-precision resistors as the input / feedback resistors, and thus can be constructed at a low cost, but has a drawback that it easily oscillates.
【００１２】[0012]
【発明の効果】以上説明したように、この発明によれ
ば、複数の電源回路を並列駆動した場合において、単独
駆動の場合の精度を落とすことなく、各電源回路の出力
電流のバランスをとることができる。また、並列駆動し
た場合に各電源回路の出力電流が一定の比率となるの
で、負荷電流を１つの電源回路の出力電流から容易に知
ることができる。As described above, according to the present invention, when a plurality of power supply circuits are driven in parallel, the output current of each power supply circuit can be balanced without degrading the accuracy in the case of independent driving. You can Further, since the output currents of the respective power supply circuits have a constant ratio when driven in parallel, the load current can be easily known from the output current of one power supply circuit.
【図１】 請求項１記載の発明の構成を説明するための
ブロック図である。FIG. 1 is a block diagram for explaining the configuration of the invention according to claim 1.
【図２】 請求項２記載の発明の構成を説明するための
ブロック図である。FIG. 2 is a block diagram for explaining the configuration of the invention according to claim 2.
【図３】 この発明の第１の実施形態を示すブロック図
である。FIG. 3 is a block diagram showing a first embodiment of the present invention.
【図４】 この発明の第２の実施形態を示すブロック図
である。FIG. 4 is a block diagram showing a second embodiment of the present invention.
【図５】 従来の並列駆動用電源回路の構成を示すブロ
ック図である。FIG. 5 is a block diagram showing a configuration of a conventional parallel driving power supply circuit.
１…入力切換回路、２…演算増幅器、３…電流測定回
路、４、４−１、４−２、５〜８…電源回路、ＩＮ１〜
ＩＮ４…制御端子、ＯＰ１〜ＯＰ１２…演算増幅器、Ｌ
１〜Ｌ８…スイッチ。DESCRIPTION OF SYMBOLS 1 ... Input switching circuit, 2 ... Operational amplifier, 3 ... Current measurement circuit, 4, 4-1, 4-2, 5-8 ... Power supply circuit, IN1-
IN4 ... control terminal, OP1 to OP12 ... operational amplifier, L
1 to L8 ... switch.
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) G05F 1/00 G05F 1/56 H02J 1/10 H02M 1/00 ─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. 7 , DB name) G05F 1/00 G05F 1/56 H02J 1/10 H02M 1/00
Claims (2)
１の制御端子を備えた第１の入力回路と、 出力電流を指示する信号が入力される第２の制御端子を
備えた第２の入力回路と、入力端に入力された信号を増幅して出力する 増幅手段
と、 前記増幅手段の出力電流を検出する電流検出手段と、 前記増幅手段の出力電圧を入力信号とすると共に、出力
端が第１の入力回路の出力端に接続された第１の帰還手
段と、 前記電流検出手段の検出出力を入力信号とすると共に、
出力端が第２の入力回路の出力端に接続された第２の帰
還手段と、 前記第１の入力回路の出力および前記第１の帰還手段の
出力を前記増幅手段の入力端に入力するか、あるいは前
記第２の入力回路の出力および前記第２の帰還手段の出
力を前記増幅手段の入力端へ入力するかを切り換える切
換手段と、 を具備してなる並列駆動用の電源回路。And 1. A first input circuit to which a signal for instructing the output voltage with a first control terminal is input, the second control terminal to which a signal is input to instruct the output current
A second input circuit provided, an amplifying unit that amplifies and outputs a signal input to an input terminal, a current detecting unit that detects an output current of the amplifying unit, and an output voltage of the amplifying unit as an input signal. And output
A first feedback means whose end is connected to the output end of the first input circuit; and a detection output of the current detection means as an input signal,
A second feedback means whose output end is connected to the output end of the second input circuit; and whether the output of the first input circuit and the output of the first feedback means are input to the input end of the amplification means . Or switching means for switching between inputting the output of the second input circuit and the output of the second feedback means to the input end of the amplifying means. Power supply circuit for parallel drive.
信号を印加し、 前記第１の電源回路の前記切換手段を、前記第１の制御
端子の信号および第１の帰還手段の出力が各々増幅手段
の入力端へ印加されるように設定し、 前記第１の電源回路の前記電流検出手段の出力を第２〜
第ｎの電源回路の第２の制御端子へ印加し、 前記第２〜第ｎの電源回路の前記切換手段を、第２の制
御端子の信号および第２の帰還手段の出力が各々増幅手
段の入力端へ印加されるように設定し、 前記第１〜第ｎの電源回路の出力端子を共通接続してな
る電源回路。2. The n power supply circuits according to claim 1 are provided, a signal for instructing an output voltage is applied to a first control terminal of the first power supply circuit, and the switching means of the first power supply circuit. Is set so that the signal of the first control terminal and the output of the first feedback means are respectively applied to the input terminals of the amplification means, and the output of the current detection means of the first power supply circuit is set to the second ~
The voltage of the second control terminal and the output of the second feedback means of the switching means of the second to nth power supply circuits are respectively applied to the second control terminal of the nth power supply circuit of the amplification means. A power supply circuit which is set so as to be applied to an input terminal, and which has output terminals of the first to nth power supply circuits commonly connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34418095A JP3470481B2 (en) | 1995-12-28 | 1995-12-28 | Power circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP34418095A JP3470481B2 (en) | 1995-12-28 | 1995-12-28 | Power circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09185421A JPH09185421A (en) | 1997-07-15 |
| JP3470481B2 true JP3470481B2 (en) | 2003-11-25 |
Family
ID=18367253
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP34418095A Expired - Lifetime JP3470481B2 (en) | 1995-12-28 | 1995-12-28 | Power circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3470481B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7123493B2 (en) * | 2004-08-10 | 2006-10-17 | Advantest Corporation | Power source apparatus |
| JP5009820B2 (en) * | 2008-01-18 | 2012-08-22 | アズビル株式会社 | Signal output circuit |
-
1995
- 1995-12-28 JP JP34418095A patent/JP3470481B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH09185421A (en) | 1997-07-15 |
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