JP3469597B2 - Decoding device for block transform code - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a block conversion code decoding device for compressing a data amount by dividing a digital image signal into small blocks and processing each block.
In particular, the present invention relates to a decoding device that can satisfactorily correct important words when the important words are errors.

[0002]

2. Description of the Related Art When a digital video signal is recorded on a recording medium such as a magnetic tape, the amount of information is large. Therefore, in order to achieve a transmission rate at which recording / reproduction can be performed, the digital video signal is encoded by high efficiency encoding. Is usually compressed. For high-efficiency coding, a digital video signal is divided into a large number of small blocks, and ADRC and DCT (Discrete Cosine Tr
ansform) etc. are known. ADRC is disclosed in Japanese Patent Application Laid-Open No. 61-144989, for example.
This is a high-efficiency coding in which a dynamic range defined by the maximum value and the minimum value of a plurality of pixels included in a dimensional block is obtained, and the coding adapted to this dynamic range is performed.

The coded output obtained by block transform coding is not of equal importance. In ADRC, unless the dynamic range information is known on the reproducing side, all pixels in the block cannot be decoded. Therefore, the dynamic range information detected for each block is more important than the code signal for each pixel. high. The importance degree of high coding output referred to as the important word.

[0004]

In a digital VTR using ADRC, even if an important word is in error, its value is used to decode all encoded outputs, or a block in which the important word is in error is an error block. As a result, the error block was corrected by the surrounding decoded data. In any process, the block in which the important word is an error is
There is a problem that the distortion of the restored image is noticeable due to the block-shaped distortion.

Therefore, it has been proposed to estimate the error of this important word based on the spatial correlation between the peripheral block and the block of interest, for example, by the method of least squares. This estimation method may have low estimation accuracy in the case of a picture in which a block includes a sharp edge.
Also, a method of estimating an important word by using boundary data adjacent to a target block of a peripheral block has been proposed. However, if the level distribution of the block of interest is convex or concave, the accuracy of estimation also deteriorates. DC
There is a similar problem regarding the estimation of important words when using T.

Therefore, an object of the present invention is to prepare a modification circuit for two types of important words and select a decoding result using the output of the modification circuit with higher accuracy, so that when the important word is an error. Another object of the present invention is to provide a block transform code decoding device capable of suppressing deterioration of a restored image.

[0007]

According to the present invention, pixel data in a block composed of a plurality of pixels spatially adjacent to each other is normalized by a minimum value or a maximum value, and the normalized value is adapted to a dynamic range. Te generated by the block coding to be quantized, high importance for decoding top
The maximum, minimum, and dynamic range
And key words is over data, in the decoding device of block transform coding to decode the pixel data from the transmission data including the relatively insignificant pixel data, Oyo important word of the transmitted data
And error detection means for detecting the presence or absence of an error of the fine pixel data, respectively, important words in the case of error, around Bro
Multiple decoded values close to the block of interest in
And recovery <br/> No. value other than error pixel data detected by the error detection means, the encoding value of a plurality of pixel data in the target block
And the error pixel data detected by the error detection means
A first error correction means for estimating a key word by a least squares method using coded values other than, and a plurality of blocks adjacent to a block of interest in a peripheral block when the key word is an error.
Error value detected by error detection means that is the decoded value of
The second error correction means for estimating the important word from the level of the decoded value other than the raw data and the overlap from the first error correction means
A first detection unit for detecting a correlation between a plurality of decoded values of a peripheral portion in the target block decoded by the key word and a plurality of decoded values adjacent to the target block in the peripheral block ; a plurality of decoding values of the peripheral portion of the decoded target block by key words from the error concealment unit, peripheral Bro
Second detection means for detecting the correlation between the target block in the clock and a plurality of adjacent decoded values, and the detection outputs of the first and second detection means are supplied, and it is detected that the correlation is stronger. It is a decoding device for a block conversion code, which comprises a means for selecting the other decoded value.

[0008]

A first important word estimating and ADRC circuit and a second important word estimating and ADRC decoding circuit are provided, and peripheral portions of respective decoded values are compared with boundary decoded values of peripheral blocks, Detect continuity between. The decoded value on the side that maintains more continuity is selected.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the decoding device according to the present invention will be described below. In FIG. 1, 1 is an input terminal.
The data reproduced from the magnetic tape is supplied to the input terminal 1. Reference numeral 2 is a reproduction circuit and an error correction circuit. The circuit 2 includes a channel code decoding circuit, TB
A reproduction circuit including C (time axis correction) and the like, and an error correction circuit for error detection and error correction are included. The output signals (reproduced data and error flag) of the reproduction circuit and error correction circuit 2 are supplied to the ADRC decoding circuit 3. The error flag has information on the presence / absence of an error regarding each of DR, MIN, and pixel data. For example, it is "1" when there is an error and "0" when there is no error. The transmission path of the error flag is indicated by a broken line in the figure.

The ADRC decoding circuit 3 performs ADRC decoding on a block in which an important word (that is, the dynamic range DR and the minimum value MIN) is not in error.
Dynamic range DR or minimum value M, which is an important word
If IN is an error block, it is not decoded and the encoded data is output as it is to the subsequent stage. ADR
The output signal of the C decoding circuit 3 is supplied to the memories 4 and 7, the important word estimation and ADRC decoding circuits 5 and 6.

In this embodiment , the effective area of one frame is divided into blocks each having a size of (4 × 4) pixels. The ADRC encoder provided on the recording side detects the dynamic range DR and the minimum value MIN of each block,
The video data from which the minimum value has been removed is requantized in the quantization step. In the case of 4-bit fixed length ADRC,
The quantization step Δ can be obtained by setting the dynamic range DR to 1/16. With this quantization step Δ,
The video data from which the minimum value has been removed is divided, and the value obtained by converting the quotient into an integer is used as the code signal.

In ADRC decoding, a coded value x is calculated for each block.
The decoded value Li of each pixel is formed from i. This decrypted value Li
Is expressed by the following equation. Li = [(DR / 2 ⁴ ) × xi + MIN] = [Δ × xi + MIN] where xi is a coded value, Δ is a quantization step width, []
Is the Gaussian symbol. For example, the operation in [] of the above equation is R
The decoding circuit has a configuration realized by OM and performing addition of the minimum value MIN.

The memory 4 stores the result decoded by the ADRC decoding circuit 3 and the error flag for the block of interest whose important word is not an error. The memory 7 stores the decoded value and error flag of the peripheral block of the target block. In FIG. 2, x1 to x16 are coded values of the target block, and boundary data y1 to y16 exist in the peripheral blocks of the target block. Boundary data y1 to y16
Is the value decoded as described above for the blocks above, below, to the left and to the right of the block of interest.

The important word estimation and ADRC decoding circuit 5 is
These encoded data xi and boundary data y1 to y16
Is used to estimate important words by the method of least squares, and the estimated important words are decoded. The important word estimation and ADRC decoding circuit 6 regards the boundary data y1 to y16 as the decoded values of the target block, estimates the important word, and performs decoding with the estimated important word. In the estimation of these two important words, the error data indicated by the error flag is not used in order to prevent the estimation accuracy from deteriorating.

The estimation of important words by the method of least squares will be described. FIG. 2 shows a block of interest BL0 and blocks BL1 to BL4 around it. The block size is (4 × 4), for example. The block of interest BL0 is a block to be decoded from now on, and the coded value of each pixel therein is shown by x1 to x16. Decoded values of four pixels near the boundary of the adjacent block BL1 on the upper side of the block of interest BL0 are indicated by y'1 to y'4. Decoded values of four pixels near the boundary of the adjacent block BL3 on the left side of the block of interest BL0 are indicated by y'5 to y'8. Similarly, the decoded values of the pixels near the boundaries of the lower and right adjacent blocks are indicated by y'9 to y'16, respectively.

First, when both the dynamic range DR and the minimum value MIN are in error, Σxy = x1y'1 + x2y'2 + x3y'3 + x4y
'4 + ... + x16y'16 Σx = x1 + x2 + x3 + x4 + x1 + x5 + x9 + x
13 + x13 + x14 + x15 + x16 + x4 + x8 + x12 + x16 Σy = y′1 + y′2 + y′3 + ... + y′16 Σx ² = x ₁ ² + x ₂ ² + x ₃ ² + ... + x ₁₆ ² Quantization step width Δ is Δ = (16Σxy−Σx · Σy ) / (16Σx ² − (Σx) ² ) MIN = (Σy−Σx · Δ) / 16

Next, when an error occurs only in the dynamic range DR, Δ = (Σy-16 · MIN) / Σx Further, when an error occurs only in the minimum value MIN, MIN = (Σy−Σx · Δ) / 16

ADRC decoding is performed on the block of interest using the important word estimated as described above. Since the estimation by the least square method is a statistical method, a relatively large error occurs depending on the pattern. In order to improve the accuracy of estimation, as described above, in addition to excluding the error sample from the calculation target, adaptive processing is performed. That is, another important word estimation and ADRC decoding circuit 6 is provided. This circuit 6 is used when an important word is an error.
Utilizing the fact that the peripheral data adjacent to the block of interest has a strong spatial correlation with the block of interest, the important word of the block of interest is estimated from the peripheral data, and the estimated important word is ADR.
C decoding is performed.

The important word estimation and ADRC decoding circuit 6 is
Maximum value (= max {y 'of peripheral data y'1 to y'16
1-y'16}) and its minimum value (= min {y'1-y
'16}) is detected. When forming these maximum and minimum values, the error data in the peripheral data is excluded by referring to the error flag.

The decoded output of the block in which the important word is not an error is supplied from the memory 4 to the selection circuit 8, and the decoded output using the important word estimated by the method of least squares is supplied from the circuit 5 to the selection circuit 8 and the peripheral data. The decoding output using the important word estimated from the maximum value and the minimum value of is supplied from the circuit 6 to the selection circuit 8.

The selection circuit 8 is controlled by the error flag from the memory 4 and the select signal SL from the comparison circuit 12. If the key word of the block of interest is not an error, the decoded data from the memory 4, that is, the decoding result of the ADRC decoding circuit 3 is selected and led to the output terminal 9. When the important word is in error, the output of the important word estimation and ADRC decoding circuit 5 or 6 is selected. The output on the side where the block continuity is better maintained is selected. In this embodiment, this selection control is performed by checking the sum of the absolute values of the differences between the decoded values of the circuits 5 and 6 and the decoded values of the peripheral blocks (boundary data).

Keyword estimation and A using least squares
The decoded value from the DRC decoding circuit 5 is supplied to the difference generation circuit 10. Keyword estimation and A using surrounding decoded values
The decoded value from the DRC decoding circuit 6 is supplied to the difference generation circuit 11. These difference generation circuits 10 and 11 include
Boundary data of decoded values of peripheral blocks are also supplied. That is, the decoded values of the pixels near the boundary of the peripheral block and the error flags thereof are commonly supplied from the memory 7 to the difference generation circuits 10 and 11.

The difference generation circuit 10 will be described with reference to FIG. Decoded values (boundary data) of peripheral blocks in FIG. 2 are supplied from the memory 7 as y'1 to y'16. The coded values x1 to x16 in the block of interest BL0 are decoded by the important word estimation and ADRC decoding circuit 5, and the corresponding decoded values y1 to y16 are obtained. The difference generation circuit 10
The sum S1 of the absolute values of the difference values is formed as follows.
() * Means an absolute value.

[0024]   S1 = (y'1-y1) * + (y'2-y2) * + (y'3-y3) * + (y '4-y4) * + (y'5-y1) * + (y'6-y5) * + (y'7-y9) * + (Y'8-y13) * + (y'9-y13) * + (y'10-y14) * + (y'11 -Y15) ** + (y'12-y16) ** + (y'13-y4) ** + (y'14-y8) ** (Y'15-y12) * + (y'16-y16) *

The difference generation circuit 11 forms the sum S2 of the absolute values of the difference values regarding the boundary data, similarly to the difference generation circuit 10 described above. These difference generation circuits 10 and 1
The output signals S1 and S2 of 1 are supplied to the comparison circuit 12. The comparison circuit 12 uses the sum of absolute values S1 and S2.
And generate a control signal (select signal) SL based on the comparison result.

If S1≤S2, select signal S
L is set to, for example, “0”, and the selection circuit 8 selects the output of the important word estimation and ADRC decoding circuit 5. S1>
If S2, the select signal SL is set to "1", for example, and the selection circuit 8 selects the output of the important word estimation and ADRC decoding circuit 6. The comparison circuit 12 compares the decoded value using the estimated important word with the decoded value of the surrounding blocks, and when the difference is small, determines that the continuity of the block boundary is maintained. Then, the decoding result on the side where the continuity of the block boundaries is maintained is adopted. Output terminal 9 of the selection circuit 8
Although not shown, a correction circuit and a block decomposition circuit for interpolating error pixel data are connected to.

[0027]

As described above, according to the present invention, it is possible to prevent occurrence of a discontinuous boundary between blocks due to a large error in an image after restoration for a block having an important word as an error. That is, in the estimation by the least square method, the estimation error is likely to be large when estimating the key word of the block including a sharp edge or the like.
On the other hand, in the estimation using the maximum value and the minimum value of the decoded values of the peripheral blocks, the estimation error is likely to be large when the target block has a convex or concave shape. The present invention looks at the decoding result and keeps the continuity of the boundary of the block,
Since the decoded value is selected, the continuity of the block boundary can be surely maintained. According to the present invention, in the case of a digital VTR, not only the image quality during normal reproduction but also the deterioration in image quality during variable speed reproduction can be suppressed.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a schematic diagram for explaining data used for important word estimation processing.

[Explanation of symbols]

3 ADRC decoding circuit 5, 6 Key word estimation and ADRC decoding circuit 8 selection circuit 10, 11 Difference generation circuit 12 Comparison circuit

Claims (2)

(57) [Claims] 1. A block coding in which pixel data in a block composed of a plurality of pixels spatially adjacent to each other is normalized by a minimum value or a maximum value, and the normalized value is quantized in accordance with a dynamic range. Maximum, minimum and dynamism generated by
In the decoding device of the block conversion code which decodes each pixel data from the transmission data including the important word which is the two data in the range and the pixel data which is relatively unimportant, the important word of the transmission data and the pixel data Yes error
Error detecting means for detecting each of the nothing , and when the above-mentioned important word is an error, it is a plurality of decoded values close to the target block in the peripheral block
A decoding value of the non-error pixel data detected by means, there the encoding values of a plurality of pixel data in the target block
Error pixel data detected by the error detection means
The least squares method using the coding value of the external, the important
A first error correction means for estimating a word , and a plurality of decoded values adjacent to the block of interest in a peripheral block when the important word is an error
A second error correction means for estimating the important word from the level of the decoded value other than the error pixel data detected by the detection means; and a block in the block of interest decoded by the important word from the first error correction means. Multiple decoded values in the peripheral part and the above
First detection means for detecting the correlation between the block of interest in the peripheral block and a plurality of adjacent decoded values, and the periphery of the block of interest decoded by the important word from the second error correction means Multiple decrypted values of the part and above
Second detection means for detecting a correlation between the target block in the peripheral block and a plurality of decoded values adjacent thereto, and detection outputs of the first and second detection means are supplied,
A decoding device for a block conversion code, comprising: a means for selecting a decoded value which is detected to have a stronger correlation. 2. The first and second detecting means are the decoded value of a peripheral portion in the block of interest and the upper value in the peripheral block .
2. The block conversion code decoding device according to claim 1, wherein the absolute value of each difference between the target block and the adjacent decoded value is calculated, and the sum of the absolute values of the differences is calculated.