JP3465657B2 - Field emission type electron source and manufacturing method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission electron source adapted to emit an electron beam by field emission and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, there is a so-called Spindt type electrode disclosed in US Pat. No. 3,665,241 as a field emission type electron source. This Spindt-type electrode has a substrate on which a large number of minute triangular pyramid-shaped emitter chips are arranged, and a gate layer which has a radiation hole for exposing the tip of the emitter chip and which is arranged insulated from the emitter chip. By applying a high voltage with the emitter tip serving as a negative electrode with respect to the gate layer in vacuum, an electron beam is emitted from the tip of the emitter tip through the emission hole.

However, the Spindt-type electrode has a complicated manufacturing process, and it is difficult to form a large number of triangular pyramid-shaped emitter chips with high precision. For example, when the Spindt-type electrode is applied to a planar light emitting device or a display, the area becomes large. There was a problem that it was difficult. In addition, since the electric field is concentrated on the tip of the emitter tip in the Spindt-type electrode, when the vacuum degree around the tip of the emitter tip is low and residual gas exists, the residual gas becomes positive ions due to the emitted electrons. Since the positive ions are ionized and collide with the tip of the emitter tip, the tip of the emitter tip is damaged (for example, by ion bombardment) and the current density and efficiency of the emitted electrons become unstable, There is a problem that the life of the chip is shortened. Therefore, the Spindt-type electrode needs to be used in a high vacuum (about 10 ⁻⁵ Pa to about 10 ⁻⁶ Pa) in order to prevent the occurrence of this kind of problem, resulting in high cost and troublesome handling. There was a problem.

In order to improve this kind of problem, MIM
(Metal Insulator Metal) method and MOS (Metal Oxid)
A field emission electron source of the e Semiconductor) type has been proposed. The former is a plane-type field emission electron source having a laminated structure of metal-insulating film-metal and the latter metal-oxide film-semiconductor. However, in order to increase the electron emission efficiency (in order to emit many electrons) in this type of field emission electron source, it is necessary to reduce the thickness of the insulating film and the oxide film. If the thickness of the insulating film or the oxide film is too thin, there is a risk of causing dielectric breakdown when a voltage is applied between the upper and lower electrodes of the laminated structure. There is a problem that the electron emission efficiency (drawing efficiency) cannot be made so high because there is a restriction on thinning of the insulating film and the oxide film.

Further, in recent years, Japanese Patent Laid-Open No. 8-250766.
As disclosed in the publication, a single crystal semiconductor substrate such as a silicon substrate is used, and one surface of the semiconductor substrate is anodized to form a porous semiconductor layer (porous silicon layer). A field emission electron source (semiconductor cold electron emission device) has been proposed in which a metal thin film is formed on a high quality semiconductor layer and a voltage is applied between the semiconductor substrate and the metal thin film to emit electrons. .

However, the above-mentioned Japanese Patent Laid-Open No. 8-2507
In the field emission electron source described in Japanese Patent Publication No. 66, since the substrate is limited to the semiconductor substrate, it is difficult to increase the area and reduce the cost. In addition, JP-A-8-25076
In the field emission type electron source described in Japanese Patent Laid-Open No. 6-36, so-called popping phenomenon is likely to occur at the time of electron emission, and unevenness in the amount of emitted electrons is likely to occur. Therefore, when applied to a flat light emitting device, a display, etc., uneven light emission occurs. There is.

Therefore, a porous polycrystalline semiconductor layer (for example,
Rapid thermal oxidation (RT) of porous polycrystalline silicon layer)
Field emission electron source in which a strong electric field drift layer in which electrons injected from the conductive substrate drift between the conductive substrate and the metal thin film (surface electrode) is formed by rapid thermal oxidation by the O) technique. Have been proposed (for example,
See Japanese Patent Nos. 2966842 and 2987140). In this field emission electron source 10 ', for example, as shown in FIG. 8, a strong electric field drift layer 6 made of an oxidized porous polycrystalline silicon layer is formed on the main surface side of an n-type silicon substrate 1 which is a conductive substrate. The surface electrode 7 made of a metal thin film is formed on the strong electric field drift layer 6, and the ohmic electrode 2 is formed on the back surface of the n-type silicon substrate 1.

A field emission type electron source 10 'having the structure shown in FIG.
Then, the surface electrode 7 is arranged in a vacuum, and the collector electrode 21 is arranged so as to face the surface electrode 7 as shown in FIG. 9, and the surface electrode 7 is positively connected to the n-type silicon substrate 1 (ohmic electrode 2). By applying a DC voltage Vps as a positive electrode and a DC voltage Vc with the collector electrode 21 as a positive electrode with respect to the surface electrode 7, electrons injected from the n-type silicon substrate 1 drift in the strong electric field drift layer 6 The electrons are emitted through the electrode 7 (note that the alternate long and short dash line in FIG. 9 indicates the flow of electrons e ⁻ emitted through the surface electrode 7). Therefore, it is desirable to use a material having a small work function for the surface electrode 7. Here, the current flowing between the surface electrode 7 and the ohmic electrode 2 is referred to as a diode current Ips, and the collector electrode 21 and the surface electrode 7
The current flowing between and is called the emission electron current Ie, and the emission electron current Ie with respect to the diode current Ips is large (Ie /
The larger Ips), the higher the electron emission efficiency. In this field emission electron source 10 ', the DC voltage Vps applied between the surface electrode 7 and the ohmic electrode 2 is 10 to 20V.
Electrons can be emitted even at a low voltage.

In the field emission type electron source 10 ', the vacuum degree dependence of the electron emission characteristic is small, and the popping phenomenon does not occur during electron emission, and electrons can be emitted stably with high electron emission efficiency. Here, as shown in FIG. 10, the strong electric field drift layer 6 has at least columnar polycrystalline silicon 51 (grains), a thin silicon oxide film 52 formed on the surface of the polycrystalline silicon 51, and the polycrystalline silicon 51. A nanometer-order microcrystalline silicon layer 63 interposed between 51 and a silicon oxide film 64 which is an insulating film formed on the surface of the microcrystalline silicon layer 63 and having a film thickness smaller than the crystal grain size of the microcrystalline silicon layer 63. It is considered to be composed of That is, in the strong electric field drift layer 6, it is considered that the surface of each grain is made porous and the crystalline state is maintained in the central portion of each grain. Therefore, most of the electric field applied to the strong electric field drift layer 6 is applied to the silicon oxide film 64, so that the injected electrons are accelerated by the strong electric field applied to the silicon oxide film 64 and are directed toward the surface between the polycrystalline silicon 51. The drift in the direction of arrow A in FIG. 10 (toward the upward direction in FIG. 10) makes it possible to improve the electron emission efficiency. The electrons that have reached the surface of the strong electric field drift layer 6 are considered to be hot electrons, and easily tunnel through the surface electrode 7 and are emitted into a vacuum. The thickness of the surface electrode 7 is set to about 10 nm to 15 nm.

If, instead of the semiconductor substrate such as the n-type silicon substrate 1 as the conductive substrate, a substrate having a conductive layer made of, for example, an ITO film formed on an insulating substrate such as a glass substrate is used, The area of the source can be increased and the cost can be reduced.

FIG. 11 shows a field emission electron source 10 "using a conductive substrate composed of an insulating substrate 11 made of a glass substrate and a conductive layer 8 made of an ITO film formed on the insulating substrate 11. That is, in this field emission electron source 10 ″, as shown in FIG. 11, a conductive layer 8 made of, for example, an ITO film is formed on an insulating substrate 11, and a strong electric field drift is formed on the conductive layer 8. The layer 6 is formed, and the surface electrode 7 made of a metal thin film is formed on the strong electric field drift layer 6. Here, the strong electric field drift layer 6 is obtained by depositing a non-doped polycrystalline silicon layer on the conductive layer 8, making the polycrystalline silicon layer porous by anodizing, and further oxidizing or oxidizing by a rapid heating method. It is formed by nitriding.

In this field emission electron source 10 ", the surface electrode 7 is arranged in a vacuum, and a collector electrode 21 is arranged so as to face the surface electrode 7 as shown in FIG. By applying a DC voltage Vps as a positive electrode to 8 and applying a DC voltage Vc as a positive electrode to the surface electrode 7 by using the collector electrode 21 as a positive electrode, electrons injected from the conductive layer 8 cause the strong electric field drift layer 6 to flow. And is emitted through the surface electrode 7 (note that the dashed line in FIG. 12 shows the flow of the electrons e ⁻ emitted through the surface electrode 7. Here, the surface electrode 7 and the conductive layer 8)
Is called a diode current Ips, and a current flowing between the collector electrode 21 and the surface electrode 7 is called an emission electron current Ie. ), The higher the electron emission efficiency. The field emission electron source 10 ″ can emit electrons even when the DC voltage Vps applied between the surface electrode 7 and the conductive layer 8 is as low as about 10 to 20V.

By the way, in the field emission type electron source 10 "utilizing the insulating substrate 11, the strong electric field drift layer 6 is used.
Is formed by depositing a non-doped polycrystalline silicon layer on the conductive layer 8, making the polycrystalline silicon layer porous by anodic oxidation, and further oxidizing by a rapid heating method. Since the oxidation temperature at this time is relatively high (in the temperature range of 800 ° C. to 900 ° C.), it is unavoidable to use expensive quartz glass as the insulating substrate 11, which limits the increase in area and cost. there were. As means for solving this kind of problem (that is, means for lowering the temperature of the process), for example, a method of oxidizing the porous polycrystalline silicon layer, such as an acid method, or at least oxygen and ozone A method of irradiating with ultraviolet rays to oxidize in a gas atmosphere containing one of them can be considered. Thus, a method of oxidizing the porous polycrystalline silicon layer with an acid, or a method of oxidizing the porous polycrystalline silicon layer by irradiating it with ultraviolet rays in a gas atmosphere containing at least one of oxygen and ozone is used. By adopting
As the insulating substrate 11, it is possible to use a glass substrate (for example, a non-alkali glass substrate, a low alkali glass substrate, a soda lime glass substrate, etc.) that has a lower heat resistance temperature than a quartz glass substrate and is cheaper than a quartz glass substrate. It will be possible.

The field emission type electron sources 10 ',
In 10 ″, the entire non-doped polycrystalline silicon layer is made porous, but a part may be made porous.

[0015]

However, in the field emission electron source 10 ″ utilizing the insulating substrate 11 described above, a non-doped polycrystalline silicon layer is deposited on the conductive layer 8 made of the ITO film in the manufacturing process. In doing so, a high resistance amorphous silicon layer is formed in the vicinity of the interface with the conductive layer 8, and the conductive layer 8 and the strong electric field drift layer 6 are formed.
And the conductive layer 8 in the strong electric field drift layer 6
A high-resistance amorphous silicon layer remains near the interface with. Therefore, a voltage drop occurs in the amorphous silicon layer when the diode current Ips described above flows, and the voltage applied to the strong electric field drift layer 6 decreases, so that a desired emission electron current (emission current) Ie is obtained. Therefore, there is a problem in that the DC voltage Vps for this purpose becomes high and the electron emission efficiency is lowered. Further, there is a problem in that the amorphous silicon layer generates heat due to the voltage drop in the amorphous silicon layer and the thermal stability is impaired. Furthermore, since there is a Schottky barrier between the conductive layer 8 and the amorphous silicon layer, there is a problem that a voltage drop occurs at the Schottky barrier.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a field emission type electron source having high electron emission efficiency and high thermal stability, and a method for manufacturing the same. .

[0017]

In order to achieve the above-mentioned object, the invention of claim 1 forms a substrate, a conductive layer formed on one surface of the substrate, and a surface side of the conductive layer. No
An undoped semiconductor layer , a strong electric field drift layer formed of an oxidized or nitrided porous semiconductor layer formed on the non-doped semiconductor layer, and a surface electrode formed on the strong electric field drift layer. a field emission electron source electrons injected from the electrically conductive layer is emitted through the drift surface electrode strong electric field drift layer by applying a voltage as a positive electrode with respect to the layer, the conductive layer and the
A semi-structure consisting of a low-resistance semiconductor between the non-doped semiconductor layer
It is characterized by interposing a conductor crystal layer, and by forming a low-resistance semiconductor crystal layer on the conductive layer, the Schottky barrier due to the conductive layer is more effective than before. It becomes thinner and current can flow by tunneling, the voltage drop at the Schottky barrier can be made smaller, and the electron emission efficiency is higher and higher than in the case where a high resistance amorphous semiconductor layer is formed on the conductive layer. Higher thermal stability.

According to a second aspect of the invention, in the first aspect of the invention, since the silicide layer is provided between the conductive layer and the semiconductor crystal layer, the height of the Schottky barrier can be lowered. It is also possible to prevent the diffusion of the constituent elements of the conductive layer from the conductive layer to the semiconductor crystal layer, it is possible to suppress alloying due to diffusion, thermal stability is more improves.

[0019] The invention of claim 3 is the invention of claim 1 or claim 2, said semiconductor crystal layers have different semiconductor layers respectively resistance multilayer structure stacked in the thickness direction, the conductive Since the semiconductor layer closer to the layer has a smaller resistance, the electron emission efficiency is improved.

According to a fourth aspect of the present invention, in the first or second aspect of the present invention, the semiconductor crystal layer is a layer whose resistance continuously changes in a thickness direction, and the semiconductor crystal layer is closer to the conductive layer. Since the resistance is small, the electron emission efficiency is improved.

According to a fifth aspect of the present invention, a substrate, a conductive layer formed on one surface of the substrate, and a surface side of the conductive layer are formed.
Non-doped semiconductor layer and on the non-doped semiconductor layer
And a surface electrode formed on the strong electric field drift layer, and a voltage is applied with the surface electrode as a positive electrode with respect to the conductive layer. As a result, electrons injected from the conductive layer drift in the strong electric field drift layer and are emitted through the surface electrode .
A silicide layer between the layer and the non-doped semiconductor layer.
The non-doped semiconductor layer is formed on the conductive layer via the silicide layer, so that the high-resistance amorphous semiconductor layer is formed on the conductive layer. Compared with the case, the height of the Schottky barrier is lower, the electron emission efficiency is higher and the thermal stability is higher, and the conductive layer and the non-doped semiconductor are higher.
Since the silicide layer is interposed between the layer and the layer , diffusion from the conductive layer to the non-doped semiconductor layer can be prevented, alloying due to diffusion can be suppressed, and thermal stability is further improved. improves.

According to a sixth aspect of the present invention, in the first to fifth aspects of the present invention, the strong electric field drift layer is a columnar semiconductor crystal arrayed substantially orthogonal to the main surface of the substrate, In the strong electric field drift layer, injection is performed from the conductive layer, since it is composed of a nanometer-order semiconductor microcrystal intervening in The generated electrons are accelerated and drifted by the electric field applied to the insulating film without colliding with the semiconductor microcrystal, and the heat generated in the strong electric field drift layer is radiated through the columnar semiconductor crystal. Electrons can be emitted with high efficiency without causing the popping phenomenon.

According to a seventh aspect of the present invention, in the first to sixth aspects of the invention, since the semiconductor is a polycrystalline semiconductor, it is easy to increase the area.

According to an eighth aspect of the present invention, in the first to seventh aspects of the invention, since the semiconductor is made of silicon, a silicon process can be used.

According to a ninth aspect of the invention, in the first to eighth aspects of the invention, the conductive layer is made of a metal, so that the resistance of the conductive layer can be easily reduced.

The invention of claim 10 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on the substrate, and an amorphous semiconductor layer is formed on the conductive layer. A semiconductor crystal layer is formed by heating and crystallizing the amorphous semiconductor layer, and then, on the semiconductor crystal layer.
To form a non-doped semi-conductor layer, then, after forming the porous semiconductor layer by porous part of the non-doped semi <br/> conductor layer, by oxidizing or nitriding the porous semiconductor layer A strong electric field drift layer is formed, and a surface electrode is formed on the strong electric field drift layer. Since this semiconductor crystal layer is formed, field emission has higher electron emission efficiency and higher thermal stability than a field emission electron source in which a high-resistance amorphous semiconductor layer is formed on a conductive layer. A type electron source can be provided.

The invention of claim 11 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on the substrate, and an amorphous semiconductor layer is formed on the conductive layer. A semiconductor crystal layer is formed by heating and crystallizing the amorphous semiconductor layer by thermal annealing, and thereafter,
A non-doped semi-conductor layer is formed on the semiconductor crystal layer, then at <br/>, after a portion of the non-doped semi-conductor layer to form a porous semiconductor layer by porous, the porous crystalline semiconductor A strong electric field drift layer is formed by oxidizing or nitriding the layer, and a surface electrode is formed on the strong electric field drift layer. An amorphous semiconductor layer is formed on a conductive layer and the amorphous semiconductor layer is thermally annealed. Since a low-resistance semiconductor crystal layer is formed by heating and crystallization at, the electron emission efficiency is higher than that of a field emission electron source in which a high-resistance amorphous semiconductor layer is formed on a conductive layer. It is possible to provide a field emission type electron source having high temperature and high thermal stability.

A twelfth aspect of the present invention is the method for manufacturing a field emission electron source according to the first aspect, wherein a conductive layer is formed on a substrate, and an amorphous semiconductor layer is formed on the conductive layer. the amorphous semiconductor layer of the semiconductor crystal layer is formed by crystallization by heating by laser annealing, thereafter, the non-doped semi-conductor layer is formed on the semiconductor crystal layer, Ide following <br/>, undoped semiconductors layers after forming the porous semi-conductor layer by partially made porous, a strong electric field drift layer is formed, strong surface electrode to the electric field drift layer by oxidizing or nitriding the porous semiconductor layer formation The amorphous semiconductor layer is formed on the conductive layer, and the amorphous semiconductor layer is heated by laser annealing to be crystallized to form a low-resistance semiconductor crystal layer. Compared to field emission electron source amorphous semiconductor layer having a high resistance is formed on the sexual layer, high and thermal stability is electron emission efficiency can be provided a high field emission electron source.

The invention of claim 13 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on the substrate, and an amorphous semiconductor layer is formed on the conductive layer. A semiconductor crystal layer is formed by crystallizing the amorphous semiconductor layer by heat treatment using hydrogen, and thereafter,
A non-doped semi-conductor layer is formed on the semiconductor crystal layer, in then <br/>, after forming the porous semiconductor layer by a portion of the non-doped semi-conductor layer is porous, the porous semiconductor layer A strong electric field drift layer is formed by oxidation or nitriding, and a surface electrode is formed on the strong electric field drift layer. An amorphous semiconductor layer is formed on a conductive layer and hydrogen is used for the amorphous semiconductor layer. Since a low resistance semiconductor crystal layer is formed by crystallization by heat treatment, the electron emission efficiency is higher than that of a field emission electron source in which a high resistance amorphous semiconductor layer is formed on a conductive layer. Further, it is possible to provide a field emission type electron source having high thermal stability.

A fourteenth aspect of the present invention is the method for manufacturing a field emission type electron source according to the first aspect, wherein a conductive layer is formed on a substrate, and an amorphous semiconductor layer is formed on the conductive layer. The amorphous semiconductor layer is irradiated with hydrogen plasma to be crystallized to form a semiconductor crystal layer, and thereafter,
A non-doped semi-conductor layer is formed on the semiconductor crystal layer, in then <br/>, after forming the porous semiconductor layer by a portion of the non-doped semi-conductor layer is porous, the porous semiconductor layer A strong electric field drift layer is formed by oxidation or nitriding, and a surface electrode is formed on the strong electric field drift layer. An amorphous semiconductor layer is formed on a conductive layer and the amorphous semiconductor layer is irradiated with hydrogen plasma. Since the low-resistance semiconductor crystal layer is formed by crystallization, the electron emission efficiency is higher than that of the field emission electron source in which the high-resistance amorphous semiconductor layer is formed on the conductive layer. A field emission electron source having high thermal stability can be provided.

A fifteenth aspect of the present invention is the method for manufacturing a field emission electron source according to the first aspect, wherein a conductive layer is formed on a substrate, and an amorphous semiconductor layer is formed on the conductive layer. the amorphous semiconductor layer is irradiated with hydrogen ions to form a semiconductor crystal layer by crystallization, after which the non-doped semi-conductor layer is formed on the semiconductor crystal layer, then,
Some of the non-doped semi-conductor layer of the porous semiconductor layer is formed by porous, to form a strong electric field drift layer by oxidizing or nitriding the porous semiconductor layer, strong surface electrode to the electric field drift layer To form
Since the amorphous semiconductor layer is formed on the conductive layer, and the amorphous semiconductor layer is irradiated with hydrogen ions to be crystallized to form a low-resistance semiconductor crystal layer, a high-resistance amorphous semiconductor is formed on the conductive layer. It is possible to provide a field emission type electron source having higher electron emission efficiency and higher thermal stability than a field emission type electron source in which a layer is formed.

According to a sixteenth aspect of the invention, in the invention of the first to fifteenth aspects, the amorphous semiconductor layer is
Since it is made of a low-resistance amorphous semiconductor doped with impurities, the resistance of the amorphous semiconductor layer can be controlled with good controllability, and as a result, the resistance of the low-resistance semiconductor crystal layer can be controlled with low resistance.

The invention of claim 17 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate and a semiconductor crystal layer doped with impurities is formed on the conductive layer. after forming, the non-doped semi-conductor layer is formed on the semiconductor crystal layer, then, after forming the porous semiconductor layer by porous part of the non-doped semi-conductor layer, oxidizing the porous semiconductor layer or A strong electric field drift layer is formed by nitriding, and a surface electrode is formed on the strong electric field drift layer.Because a low-resistance semiconductor crystal layer with an impurity added is formed on the conductive layer, It is possible to provide a field emission electron source having high electron emission efficiency and high thermal stability as compared with a field emission electron source in which a high resistance amorphous semiconductor layer is formed on a conductive layer.

The invention of claim 18 is the method of manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, and the conductive layer is doped with impurities to have a low resistance. depositing a more composed semiconductor crystal layer, then a non-doped semi-conductor layer is formed on the semiconductor crystal layer, then, Bruno
After forming the porous semiconductor layer by porous part of Ndopu semi conductor layer to form a strong electric field drift layer by oxidizing or nitriding the porous semiconductor layer, the surface of the strong electric field drift layer Since a semiconductor crystal layer made of a low-resistance semiconductor doped with impurities is deposited on the conductive layer, it is characterized by forming an electrode, so that an electric field in which a high-resistance amorphous semiconductor layer is formed on the conductive layer. It is possible to provide a field emission type electron source having higher electron emission efficiency and higher thermal stability than a radiation type electron source.

The invention of claim 19 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on the substrate and a crystalline semiconductor layer is formed on the conductive layer. and, wherein the semiconductor crystal layer is formed by ion implantation into the semiconductor layer, then a non-doped semi <br/> conductive layer is formed on a semiconductor crystal layer, then, the porous part of the non-doped semi-conductor layer After forming a porous semiconductor layer by
A strong electric field drift layer is formed by oxidizing or nitriding the porous semiconductor layer, and a surface electrode is formed on the strong electric field drift layer. A crystalline semiconductor layer is formed on the conductive layer. , A low-resistance semiconductor crystal layer is formed by implanting ions into the semiconductor layer,
It is possible to provide a field emission electron source having higher electron emission efficiency and higher thermal stability than a field emission electron source in which a high resistance amorphous semiconductor layer is formed on a conductive layer.

The invention of claim 20 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on the substrate, and a crystalline semiconductor layer is formed on the conductive layer. Then, a semiconductor crystal layer is formed by diffusing impurities into the semiconductor layer, and then non-doped on the semiconductor crystal layer.
The semi-conductor layer is formed, then, after forming the porous semiconductor layer by porous part <br/> of undoped semi-conductor layer, a strong electric field by oxidizing or nitriding the porous semiconductor layer A drift layer is formed, and a surface electrode is formed on the strong electric field drift layer. A semiconductor layer having crystallinity is formed on the conductive layer, and impurities are diffused into the semiconductor layer to reduce the resistance. Since the semiconductor crystal layer is formed, the electron emission efficiency is higher and the thermal stability is higher than that of the field emission electron source in which the high resistance amorphous semiconductor layer is formed on the conductive layer. An electron source can be provided.

The invention of claim 21 is the invention of claims 10 to 20, said semiconductor formation or after the strong electric field after the formation of the crystal layer or after formation of the non-doped semi-conductor layer or the porous semiconductor layer Since the heat treatment is performed at least once after the formation of the drift layer or after the formation of the surface electrode, the Schottky barrier formed between the conductive layer and the semiconductor crystal layer can be reduced or removed, and the electron emission efficiency is high. A field emission electron source having high thermal stability can be provided.

[0038]

BEST MODE FOR CARRYING OUT THE INVENTION (Embodiment 1) As shown in FIG. 1, a field emission electron source 10 of the present embodiment has a surface of an insulating substrate 11 made of a glass substrate (for example, a non-alkali glass substrate). A conductive layer 8 made of tungsten is formed thereon, an n-type polycrystalline silicon layer 9 serving as a semiconductor crystal layer is formed on the conductive layer 8, and a non-doped polycrystalline silicon layer is formed on the n-type polycrystalline silicon layer 9. 3 is formed, a strong electric field drift layer 6 made of an oxidized porous polycrystalline silicon layer is formed on the polycrystalline silicon layer 3, and a surface electrode 7 is formed on the strong electric field drift layer 6 .

In the field emission type electron source 10 of the present embodiment, the amorphous silicon layer is not formed on the conductive layer 8 and the low resistance n-type polycrystalline silicon layer 9 is formed. It is characterized in that the strong electric field drift layer 6 is formed on the main surface side of 9.

In this embodiment, however, since the n-type polycrystalline silicon layer 9 which is a semiconductor crystal layer having a low resistance is formed on the conductive layer 8, a high resistance is provided on the conductive layer 8 as in the conventional case. The Schottky barrier resulting from the conductive layer 8 becomes thinner and the current can be lengthened by tunneling, and the voltage drop at the Schottky barrier can be reduced as compared with the case where the amorphous silicon layer is formed. As compared with the case where a high-resistance amorphous semiconductor layer is formed on the conductive layer 8, the electron emission efficiency is higher and the thermal stability is higher.

In the present embodiment, the conductive layer 8 is made of tungsten (W) which is a metal. However, the material of the conductive layer 8 is not limited to tungsten, and instead of tungsten, Copper (Cu), aluminum (Al), nickel (Ni), molybdenum (Mo),
Chromium (Cr), platinum (Pt), titanium (Ti), cobalt (Co), zirconium (Zr), tantalum (T
a), hafnium (Hf), palladium (Pd), vanadium (V), niobium (Nb), manganese (Mn), iron (Fe), ruthenium (Ru), osmium (Os),
Iridium (Ir), gold (Au), silver (Ag), silicon (Si), or the like may be used, and a plurality of kinds of these materials may be selected and laminated, or these materials may be stacked. Plural kinds of them may be alloyed and deposited.
The conductive layer 8 is made of ITO, SnO ₂ , ZnO.
A metal oxide (transparent electrode) such as the above may be used, a metal material listed up to W and Si in the above metal oxide may be appropriately selected and laminated, or an alloy of the above metal material may be added to the above metal oxide. You may make it laminate | stack a film | membrane.

Hereinafter, the field emission electron source 10 of this embodiment will be described.
The manufacturing method will be described with reference to FIG.

First, one surface of the insulating substrate 11 (see FIG.
A conductive layer 8 made of tungsten is deposited on the upper surface in (a) by, for example, a sputtering method, and an n-type amorphous silicon layer is deposited on the conductive layer 8 by doping a n-type impurity by a plasma CVD method or the like. After that, the n-type polycrystalline silicon layer 9 is formed by heating and crystallizing the n-type amorphous silicon layer, whereby a structure as shown in FIG. 2A is obtained.
The n-type polycrystalline silicon layer 9 may be formed by depositing an n-type amorphous silicon layer and then heating and crystallizing the n-type amorphous silicon layer by thermal annealing. May be formed by heating and crystallizing the n-type amorphous silicon layer by laser annealing after depositing, or by heating the n-type amorphous silicon layer with hydrogen after depositing the n-type amorphous silicon layer. It may be formed by crystallization by treatment, or may be formed by depositing an n-type amorphous silicon layer and then crystallizing the n-type amorphous silicon layer by irradiation with hydrogen plasma. After depositing the amorphous silicon layer, the n-type amorphous silicon layer is bonded by hydrogen ion irradiation. It may be formed by reduction. Further, instead of depositing the n-type amorphous silicon layer, an n-type low resistance n-type impurity doped on the conductive layer 8 is added.
The polycrystalline silicon layer 9 may be directly deposited, or a non-doped polycrystalline silicon layer may be deposited on the conductive layer 8 under such a deposition condition that an amorphous silicon layer is not formed. The n-type polycrystal silicon layer 9 may be formed by ion-implanting impurities into the non-doped polycrystal silicon layer, or the non-doped polycrystal silicon layer is deposited under the deposition condition such that the amorphous silicon layer is not formed on the conductive layer 8. The n-type polycrystalline silicon layer 9 may be formed later by diffusing impurities into the polycrystalline silicon layer.

After forming the n-type polycrystalline silicon layer 9, a non-doped polycrystalline silicon layer 3 having a predetermined film thickness (for example, 1.5 μm) is formed by, for example, the plasma CVD method. A structure as shown is obtained.
Here, since the non-doped polycrystalline silicon layer 3 is deposited by the plasma CVD method, it can be formed by a low temperature process of 600 ° C. or lower (100 ° C. to 600 ° C.). The method for forming the non-doped polycrystalline silicon layer 3 is not limited to the plasma CVD method, and may be formed by a catalytic CVD method, and the catalytic CVD method can also be formed by a low temperature process of 600 ° C. or lower.

After the non-doped polycrystalline silicon layer 3 is formed, an anodizing tank containing an electrolytic solution consisting of a mixed solution of 55 wt% hydrogen fluoride aqueous solution and ethanol at a ratio of about 1: 1 is used. Using the platinum electrode (not shown) as the negative electrode and the conductive layer 8 as the positive electrode, the polycrystalline silicon layer 3 is anodized under predetermined conditions while irradiating light to make the polycrystalline silicon layer 3 porous to a predetermined depth. By doing so, the porous polycrystalline silicon layer 4 is formed and the structure shown in FIG. 2C is obtained. Here, in this embodiment,
As conditions for the anodizing treatment, the optical power with which the surface of the polycrystalline silicon layer 3 is irradiated and the current density are constant during the anodizing treatment, but the conditions may be changed as appropriate (for example, the current density). May be changed). In the present embodiment, Ru have <br/> part of the polycrystalline silicon layer 3 porous.

After the above-mentioned anodizing treatment is completed, the electrolytic solution is removed from the anodizing bath, and an acid (for example, about 10% dilute nitric acid, about 10% dilute sulfuric acid) is newly added to the anodizing bath.
Then, by using this acid-containing anodizing treatment tank, a platinum electrode (not shown) is used as a negative electrode and the conductive layer 8 is used as a positive electrode, and a constant current is passed to make porous polycrystal. The strong electric field drift layer 6 is formed by oxidizing the silicon layer 4, and the structure shown in FIG. 2D is obtained.

After the strong electric field drift layer 6 is formed, a surface electrode 7 made of a conductive thin film (for example, a gold thin film) is formed on the strong electric field drift layer 6 by, for example, vapor deposition. A field emission type electron source 10 having the structure shown is obtained. In this embodiment, the thickness of the surface electrode 7 is set to 1
Although the thickness is set to 5 nm, the thickness is not particularly limited, and may be any thickness as long as the electrons passing through the strong electric field drift layer 6 can tunnel. Further, in the present embodiment, the conductive thin film to be the surface electrode 7 is formed by vapor deposition,
The method of forming the conductive thin film is not limited to vapor deposition, and for example, a sputtering method may be used.

Therefore, according to the above-mentioned manufacturing method, the field emission type electron source 1 having high electron emission efficiency and high thermal stability.
0 can be provided. In addition, the polycrystalline silicon layer 3
Is formed by a low temperature process such as a plasma CVD method, the porous polycrystalline silicon layer 4 is oxidized by an acid, and the surface electrode 7 is formed by an evaporation method, a sputtering method, or the like. Since the n-type polycrystalline silicon layer 9 can also be formed at a relatively low temperature, the field emission electron source 10 can be manufactured by a low temperature process of 600 ° C. or lower. Therefore, as the insulating substrate 11, a non-alkali glass substrate, which is cheaper than a quartz glass substrate, can be used, the cost can be reduced, and the area can be further increased. Depending on the formation temperature of the silicon layer 3, it is possible to use a glass substrate having a lower heat resistance temperature than a non-alkali glass substrate such as a low alkali glass substrate or a soda lime glass substrate.

The field emission type electron source 10 manufactured by the above-mentioned manufacturing method is disclosed in Japanese Patent Nos. 2966842 and 2964.
Similar to the field emission electron source disclosed in Japanese Patent No. 987140, the vacuum degree dependence of electron emission characteristics is small, and a popping phenomenon does not occur during electron emission, and electrons can be emitted stably. Therefore, as in the conventional example, the strong electric field drift layer 6 has at least the columnar polycrystalline silicon 51 (grain) and the polycrystalline silicon 5 as shown in FIG.
1. A thin silicon oxide film 52 formed on the surface of No. 1, a microcrystalline silicon layer 63 of nanometer order interposed between the polycrystalline silicon 51, and a crystal of the microcrystalline silicon layer 63 formed on the surface of the microcrystalline silicon layer 63. It is considered to be composed of the silicon oxide film 64 which is an insulating film having a film thickness smaller than the grain size. That is, in the strong electric field drift layer 6, it is considered that the surface of each grain is made porous and the crystalline state is maintained in the central portion of each grain.

By the way, in the above-mentioned manufacturing method, the porous polycrystalline silicon layer 4 is oxidized by an acid. However, it is desirable to be able to oxidize in the temperature range of 100 ° C to 600 ° C. This temperature may be higher than 600 ° C., but the insulating substrate 11
10 from the point of using an inexpensive glass substrate as
It is desirable to be able to oxidize in the temperature range of 0 ° C to 600 ° C. However, when a silicon substrate or a quartz glass substrate is used as the substrate, the porous polycrystalline silicon layer 4 may be oxidized by a rapid heating method (eg, RTO method).

The basic operation of the field emission electron source 10 of this embodiment is the same as that of the conventional structure shown in FIG. 12. For example, as shown in FIG. 3, the surface electrode 7 is placed in a vacuum and the surface electrode 7 is arranged. A collector electrode 21 is disposed so as to face the surface electrode 7, and the surface electrode 7 is used as a positive electrode with respect to the conductive layer 8 to form a DC voltage Vps.
By applying a DC voltage Vc with the collector electrode 21 as a positive electrode with respect to the surface electrode 7,
The electrons injected from the conductive layer 8 drift in the strong electric field drift layer 6 and are emitted through the surface electrode 7 (see FIG.
An alternate long and short dash line indicates an electron e ⁻ emitted through the surface electrode 7.
Shows the flow of). Here, the current flowing between the surface electrode 7 and the conductive layer 8 is referred to as a diode current Ips, the current flowing between the collector electrode 21 and the surface electrode 7 is referred to as an emission electron current Ie, and the emission for the diode current Ips is performed. The electron emission amount increases as the electron current Ie increases (Ie / Ips increases). Also in the field emission electron source 10 of the present embodiment, as in the conventional configuration, electrons can be emitted even if the DC voltage Vps applied between the surface electrode 7 and the conductive layer 8 is a low voltage of about 10 to 20V. Can be released.

In this embodiment, the strong electric field drift layer 6 is made of oxidized porous polycrystalline silicon. However, the strong electric field drift layer 6 is nitrided of porous polycrystalline silicon or other oxidized or nitrided porous polycrystalline silicon. It may be composed of a porous polycrystalline semiconductor layer. Further, the n-type polycrystalline silicon layer 9 has a multilayer structure in which n-type polycrystalline silicon layers having different resistances (impurity concentrations) are laminated in the thickness direction, and the resistance is smaller as the n-type polycrystalline silicon layer is closer to the conductive layer 8. The n-type polycrystalline silicon layer 9 may be formed as follows.
May be a layer in which the resistance (impurity concentration) continuously changes in the thickness direction and the resistance becomes smaller as the resistance approaches the conductive layer 8. Although the n-type polycrystalline silicon layer 9 is used as the low-resistance semiconductor crystal layer in the present embodiment, a p-type polycrystalline silicon layer may be used instead of the n-type polycrystalline silicon layer 9.

After the formation of the n-type polycrystalline silicon layer 9 as a semiconductor crystal layer, the formation of the polycrystalline silicon layer 3 as a crystalline semiconductor layer, the formation of the porous polycrystalline silicon layer 4, or the formation of the strong electric field drift layer 6. By performing heat treatment (600 ° C. or less) at least once after formation or after formation of the surface electrode 7, the Schottky barrier formed by the conductive layer 8 and the n-type polycrystalline silicon layer 9 can be reduced or removed. It is possible to provide the field emission type electron source 10 having high electron emission efficiency and high thermal stability.

(Embodiment 2) The field emission type electron source according to the present embodiment has substantially the same basic structure as that of Embodiment 1, and uses a p-type silicon substrate 12 as a substrate as shown in FIG. It is characterized in that the conductive layer 8 is formed of an n-type silicon layer. That is, in the present embodiment, since the p-type silicon substrate 12 is used instead of the insulating substrate 11 in the first embodiment, the conductive layer 8 can be formed by the n-type silicon layer, and the conductive layer 8 and The n-type polycrystalline silicon layer 9 can be lattice-matched. The same components as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

The field emission type electron source 10 of the present embodiment also has high electron emission efficiency and high thermal stability as in the first embodiment.

The field emission electron source 10 of this embodiment is used.
The manufacturing method is substantially the same as the manufacturing method described in the first embodiment, and only the method of forming the conductive layer 8 is different. In this embodiment, since the p-type silicon substrate 12 is used as the substrate, the conductive layer 8 may be formed by, for example, an epitaxial growth method, ion implantation, diffusion or the like.

(Embodiment 3) As shown in FIG. 5, the field emission electron source 10 of the present embodiment has a structure in which tungsten is formed on one surface of an insulating substrate 11 made of a glass substrate (for example, a non-alkali glass substrate). Is formed, a silicide layer 19 made of WSi ₂ is formed on the conductive layer 8, an undoped polycrystalline silicon layer 3 is formed on the silicide layer 19, and a polycrystalline silicon layer 3 is formed on the polycrystalline silicon layer 3. The strong electric field drift layer 6 formed of the oxidized porous polycrystalline silicon is formed.
The surface electrode 7 is formed on top .

In the field emission electron source 10 of this embodiment, the silicide layer 19 is formed on the conductive layer 8, and the strong electric field drift layer 6 is formed on the main surface side of the silicide layer 19. There are features.

In this embodiment, however, since the low resistance silicide layer 19 is formed on the conductive layer 8, a high resistance amorphous silicon layer is formed on the conductive layer 8 as in the conventional case. The height of the Schottky barrier generated at the interface can be made lower than that in the case where it is present, the current value flowing in the strong electric field drift layer 6 becomes large (that is, the above-mentioned diode current Ips becomes large), and electron emission occurs. As the efficiency increases, the calorific value decreases and the thermal stability increases. In addition, the silicide layer 19 is formed on the conductive layer 8.
Is formed, it is possible to prevent the constituent elements of the conductive layer 8 from diffusing from the conductive layer 8 to the polycrystalline silicon layer 3 and the strong electric field drift layer 6, so that the thermal stability is further improved. To do. Here, there is almost no Schottky barrier between the conductive layer 8 and the silicide layer 19, and there is a Schottky barrier between the silicide layer 19 and the polycrystalline silicon layer 3. Is lower than the Schottky barrier formed between the conductive layer 8 and the polycrystalline silicon layer 3 when the silicide layer 19 is not provided, so that the voltage drop in the Schottky barrier can be reduced. .

In the present embodiment, the conductive layer 8 is made of tungsten (W), which is a metal, but the material of the conductive layer 8 is not limited to tungsten, and instead of tungsten, Copper (Cu), aluminum (Al), nickel (Ni), molybdenum (Mo),
Chromium (Cr), platinum (Pt), titanium (Ti), cobalt (Co), zirconium (Zr), tantalum (T
a), hafnium (Hf), palladium (Pd), vanadium (V), niobium (Nb), manganese (Mn), iron (Fe), ruthenium (Ru), rhodium (Rh), rhenium (Re), osmium ( Os), iridium (I
r), gold (Au), silver (Ag), silicon (Si), or the like may be used, or a plurality of kinds of these materials may be selected and laminated. Plural types may be alloyed and deposited. Further, as the conductive layer 8, a metal oxide (transparent electrode) such as ITO, SnO ₂ , ZnO or the like may be used, and the metal materials listed in the above metal oxides up to W and Si are appropriately selected. Then, they may be laminated, or an alloy film of the above metal material may be laminated on the above metal oxide.

Hereinafter, the field emission electron source 10 of this embodiment will be described.
The manufacturing method will be described with reference to FIG.

First, one surface of the insulating substrate 11 (see FIG. 6).
By depositing a conductive layer 8 made of tungsten on the upper surface in (a) by, for example, a sputtering method, and forming a silicide layer 19 made of WSi ₂ on the conductive layer 8 by, for example, a sputtering method. 6
A structure as shown in (a) is obtained.

After the silicide layer 19 is formed, a non-doped polycrystalline silicon layer 3 having a predetermined thickness (for example, 1.5 μm) is formed by, for example, the plasma CVD method, so that the structure as shown in FIG. 6B is obtained. Is obtained. Here, since the non-doped polycrystalline silicon layer 3 is deposited by the plasma CVD method, it is 600 ° C. or less (10
The film can be formed by a low temperature process of 0 ° C to 600 ° C. The method for forming the non-doped polycrystalline silicon layer 3 is not limited to the plasma CVD method, and may be formed by a catalytic CVD method, and the catalytic CVD method can also be formed by a low temperature process of 600 ° C. or lower. The silicide layer 1
9 is formed, the metal element of the silicide layer 19 acts catalytically during the deposition of the polycrystalline silicon layer 3,
By lowering the crystallization temperature, crystallization can be promoted and the amorphous silicon layer can be reduced, so that the crystallized polycrystalline silicon layer 3 can be formed in the silicide layer 19 and the voltage at the interface can be reduced. The amount of descent can be reduced.

After the non-doped polycrystalline silicon layer 3 is formed, an anodizing treatment tank containing an electrolytic solution made of a mixed solution of 55 wt% hydrogen fluoride aqueous solution and ethanol at a ratio of about 1: 1 is used. Using the platinum electrode (not shown) as the negative electrode and the conductive layer 8 as the positive electrode, the polycrystalline silicon layer 3 is anodized under predetermined conditions while irradiating light to make the polycrystalline silicon layer 3 porous to a predetermined depth. By doing so, the porous polycrystalline silicon layer 4 is formed, and the structure shown in FIG. 6C is obtained. Here, in this embodiment,
As conditions for the anodizing treatment, the optical power with which the surface of the polycrystalline silicon layer 3 is irradiated and the current density are constant during the anodizing treatment, but the conditions may be changed as appropriate (for example, the current density). May be changed). In the present embodiment, Ru have <br/> part of the polycrystalline silicon layer 3 porous.

After the above-mentioned anodizing treatment is completed, the electrolytic solution is removed from the anodizing bath and a new acid (for example, about 10% dilute nitric acid, about 10% dilute sulfuric acid,
Then, by using this acid-containing anodizing treatment tank, a platinum electrode (not shown) is used as a negative electrode and the conductive layer 8 is used as a positive electrode, and a constant current is passed to make porous polycrystal. The strong electric field drift layer 6 is formed by oxidizing the silicon layer 4, and the structure shown in FIG. 6D is obtained.

After forming the strong electric field drift layer 6, a surface electrode 7 made of a conductive thin film (for example, a gold thin film) is formed on the strong electric field drift layer 6 by, for example, vapor deposition, so that FIG. A field emission type electron source 10 having the structure shown is obtained. In this embodiment, the thickness of the surface electrode 7 is set to 1
Although the thickness is set to 5 nm, the thickness is not particularly limited, and may be any thickness as long as the electrons passing through the strong electric field drift layer 6 can tunnel. Further, in the present embodiment, the conductive thin film to be the surface electrode 7 is formed by vapor deposition,
The method of forming the conductive thin film is not limited to vapor deposition, and for example, a sputtering method may be used.

However, according to the above-mentioned manufacturing method, the field emission type electron source 1 having high electron emission efficiency and high thermal stability.
0 can be provided. In addition, the polycrystalline silicon layer 3
Is formed by a low temperature process such as a plasma CVD method, the porous polycrystalline silicon layer 4 is oxidized by an acid, and the surface electrode 7 is formed by an evaporation method, a sputtering method, or the like. Since the silicide layer 19 can also be formed at a relatively low temperature, the field emission electron source 10 can be manufactured by a low temperature process of 600 ° C. or lower.
Therefore, as the insulating substrate 11, a non-alkali glass substrate, which is cheaper than a quartz glass substrate, can be used, the cost can be reduced, and the area can be further increased. Depending on the formation temperature of the silicon layer 3, it is possible to use a glass substrate having a lower heat resistance temperature than a non-alkali glass substrate such as a low alkali glass substrate or a soda lime glass substrate.

Further, the field emission type electron source 10 manufactured by the above manufacturing method is disclosed in Japanese Patent No. 2966842 and Japanese Patent No. 2966.
Similar to the field emission electron source disclosed in Japanese Patent No. 987140, the vacuum degree dependence of electron emission characteristics is small, and a popping phenomenon does not occur during electron emission, and electrons can be emitted stably. Therefore, as in the conventional example, the strong electric field drift layer 6 has at least the columnar polycrystalline silicon 51 (grain) and the polycrystalline silicon 5 as shown in FIG.
1. A thin silicon oxide film 52 formed on the surface of No. 1, a microcrystalline silicon layer 63 of nanometer order interposed between the polycrystalline silicon 51, and a crystal of the microcrystalline silicon layer 63 formed on the surface of the microcrystalline silicon layer 63. It is considered to be composed of the silicon oxide film 64 which is an insulating film having a film thickness smaller than the grain size. That is, in the strong electric field drift layer 6, it is considered that the surface of each grain is made porous and the crystalline state is maintained in the central portion of each grain.

In the manufacturing method described above, the porous polycrystalline silicon layer 4 is oxidized by an acid. However, the porous polycrystalline silicon layer 4 is irradiated with ultraviolet rays in a gas atmosphere containing at least one of oxygen and ozone to be oxidized. However, it is desirable to be able to oxidize in the temperature range of 100 ° C to 600 ° C. This temperature may be higher than 600 ° C., but the insulating substrate 11
10 from the point of using an inexpensive glass substrate as
It is desirable to be able to oxidize in the temperature range of 0 ° C to 600 ° C. However, when a silicon substrate or a quartz glass substrate is used as the substrate, the porous polycrystalline silicon layer 4 may be oxidized by the rapid heating method (for example, the RTO method) to form the strong electric field drift layer 6. .

The basic operation of the field emission type electron source 10 of this embodiment is the same as that of the conventional structure shown in FIG. 12, in which electrons injected from the conductive layer 8 drift in the strong electric field drift layer 6 and the surface electrode 7 is formed. Also in the field emission electron source 10 of the present embodiment, the DC voltage Vps applied between the surface electrode 7 and the conductive layer 8 is a low voltage of about 10 to 20 V, as in the conventional configuration. Also, it is possible to emit electrons.

In the present embodiment, the strong electric field drift layer 6 is made of oxidized porous polycrystalline silicon, but the strong electric field drift layer 6 is nitrided of porous polycrystalline silicon or other oxidized or nitrided porous polycrystalline silicon. It may be composed of a porous polycrystalline semiconductor layer. In addition, the silicide layer 19
Is not limited to WSi ₂ , but may include metal elements and S
Any intermetallic compound with i may be used, and as the metal element,
In addition to W, Ti, V, Cr, Mn, Fe, Co, Ni,
Zr, Nb, Mo, Ru, Rh, Pd, Hf, Ta,
W, Re, Os, Ir, Pt, or the like may be used, and the silicide layer 19 may have a multilayer structure of a silicide film.

(Embodiment 4) The field emission type electron source 10 of this embodiment has substantially the same basic structure as that of the embodiment 3, and is a low resistance semiconductor crystal layer on the silicide layer 19 as shown in FIG. The difference is that the n-type polycrystalline silicon layer 9 is formed and the polycrystalline silicon layer 3 is formed on the n-type polycrystalline silicon layer 9. The same components as those of the third embodiment are designated by the same reference numerals and the description thereof will be omitted.

Also in the field emission type electron source 10 of this embodiment, as in the case of the third embodiment, the electron emission efficiency is high and the thermal stability is high. Further, since the field emission electron source 10 of the present embodiment has a structure in which the silicide layer 19 is provided between the conductive layer 8 and the n-type polycrystalline silicon layer 9 in the structure of the first embodiment, the conductivity is improved. Diffusion of constituent elements of the conductive layer 8 from the layer 8 to the n-type polycrystalline silicon layer 9 can be prevented, and the crystallinity of the n-type polycrystalline silicon layer 9 can be improved.

The field emission electron source 10 of this embodiment is used.
The manufacturing method is substantially the same as the manufacturing method described in the third embodiment, and only the step of forming the n-type polycrystalline silicon layer 9 is increased. As the method for forming the n-type polycrystalline silicon layer 9, any one of the formation methods described in the first embodiment may be adopted. Further, a p-type polycrystalline silicon layer may be used instead of the n-type polycrystalline silicon layer 9.

By the way, in each of the above-mentioned embodiments, the glass substrate is used as the insulating substrate 11 which is the substrate, but the insulating substrate 11 is not limited to the glass substrate, and for example, an insulating film ( A substrate on which an oxide film such as SiO _x or AlO _x or a nitride film such as SiN _x , BN or AlN _x is formed, or a substrate on which an insulating film (such as an oxide film or a nitride film) is formed on a metallic substrate is used. May be.

[0076]

According to the invention of claim 1, a substrate, a conductive layer formed on one surface of the substrate, and a conductive layer formed on the surface side of the conductive layer.
Formed non-doped semiconductor layer and the non-doped semiconductor layer
A strong electric field drift layer formed of an oxidized or nitrided porous semiconductor layer formed above and a surface electrode formed on the strong electric field drift layer are applied, and a voltage is applied with the surface electrode as a positive electrode with respect to the conductive layer. a field emission electron source electrons injected from the electrically conductive layer is emitted through the drift surface electrode strong electric field drift layer by, the conductive
Of low resistance between the conductive layer and the non-doped semiconductor layer
Since a semiconductor crystal layer made of silicon is interposed between the semiconductor layer and the low-resistance semiconductor crystal layer is formed on the conductive layer, the Schottky barrier caused by the conductive layer becomes thinner than that in the conventional tunneling. Current can be lengthened, the voltage drop at the Schottky barrier can be reduced, and the electron emission efficiency and thermal efficiency are higher than those in the case where a high resistance amorphous semiconductor layer is formed on the conductive layer. It has the effect of increasing the stability.

According to a second aspect of the invention, in the first aspect of the invention, since the silicide layer is provided between the conductive layer and the semiconductor crystal layer, the height of the Schottky barrier can be lowered. It is also possible to prevent the diffusion of the constituent elements of the conductive layer from the conductive layer to the semiconductor crystal layer, it is possible to suppress alloying due to diffusion, thermal stability is more It has the effect of improving.

[0078] The invention of claim 3 is the invention of claim 1 or claim 2, said semiconductor crystal layers have different semiconductor layers respectively resistance multilayer structure stacked in the thickness direction, the conductive The closer the semiconductor layer is to the layer, the smaller the resistance, and therefore the effect is that the electron emission efficiency is improved.

According to a fourth aspect of the present invention, in the first or second aspect of the invention, the semiconductor crystal layer is a layer in which the resistance continuously changes in the thickness direction, and the closer to the conductive layer, the closer Since the resistance is small, there is an effect that the electron emission efficiency is improved.

According to a fifth aspect of the present invention, a substrate, a conductive layer formed on one surface of the substrate, and a surface side of the conductive layer are formed.
Non-doped semiconductor layer and on the non-doped semiconductor layer
And a surface electrode formed on the strong electric field drift layer, and a voltage is applied with the surface electrode as a positive electrode with respect to the conductive layer. As a result, electrons injected from the conductive layer drift in the strong electric field drift layer and are emitted through the surface electrode .
A silicide layer between the layer and the non-doped semiconductor layer.
Since the non-doped semiconductor layer is formed on the conductive layer via the silicide layer, it is possible to make a shot compared to the case where the high resistance amorphous semiconductor layer is formed on the conductive layer. the height of Kibaria is reduced, the electron emission efficiency is high and thermal stability is high, and since the silicide layer is interposed between the conductive layer and the undoped semiconductor layer, said from the conductive layer Nondo
It is possible to prevent diffusion into the semiconductor layer , suppress alloying due to diffusion, etc., and to improve thermal stability.

According to a sixth aspect of the present invention, in the first to fifth aspects of the present invention, the strong electric field drift layer is a columnar semiconductor crystal lined up substantially orthogonally to the main surface of the substrate, and between the semiconductor crystals. In the strong electric field drift layer, injection is performed from the conductive layer, since it is composed of a nanometer-order semiconductor microcrystal intervening in the above and an insulating film formed on the surface of the semiconductor microcrystal and having a thickness smaller than the crystal grain size of the semiconductor microcrystal The generated electrons are accelerated and drifted by the electric field applied to the insulating film without colliding with the semiconductor microcrystal, and the heat generated in the strong electric field drift layer is radiated through the columnar semiconductor crystal. There is an effect that electrons can be emitted with high efficiency without causing the popping phenomenon.

According to a seventh aspect of the invention, in the first to sixth aspects of the invention, since the semiconductor is made of a polycrystalline semiconductor, it has an effect of easily increasing the area.

According to the invention of claim 8, in the invention of claims 1 to 7, the semiconductor is made of silicon, so that there is an effect that a silicon process can be used.

According to a ninth aspect of the invention, in the first to eighth aspects of the invention, the conductive layer is made of a metal, and therefore, the resistance of the conductive layer can be easily lowered.

A tenth aspect of the present invention is the method for manufacturing a field emission electron source according to the first aspect, wherein a conductive layer is formed on a substrate and an amorphous semiconductor layer is formed on the conductive layer. A semiconductor crystal layer is formed by heating and crystallizing the amorphous semiconductor layer, and then, on the semiconductor crystal layer.
To form a non-doped semi-conductor layer, then, after forming the porous semiconductor layer by porous part of the non-doped semi <br/> conductor layer, by oxidizing or nitriding the porous semiconductor layer Since the strong electric field drift layer is formed and the surface electrode is formed on the strong electric field drift layer, a low resistance semiconductor crystal is formed by forming an amorphous semiconductor layer on the conductive layer and heating and crystallizing the amorphous semiconductor layer. Since the layer is formed, the field emission electron source has higher electron emission efficiency and higher thermal stability than a field emission electron source in which a high resistance amorphous semiconductor layer is formed on a conductive layer. Can be provided.

The invention of claim 11 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on the substrate, and an amorphous semiconductor layer is formed on the conductive layer. A semiconductor crystal layer is formed by heating and crystallizing the amorphous semiconductor layer by thermal annealing, and thereafter,
A non-doped semi-conductor layer is formed on the semiconductor crystal layer, then at <br/>, after a portion of the non-doped semi-conductor layer to form a porous semiconductor layer by porous, the porous crystalline semiconductor A strong electric field drift layer is formed by oxidizing or nitriding the layer, and a surface electrode is formed on the strong electric field drift layer. Therefore, an amorphous semiconductor layer is formed on the conductive layer and the amorphous semiconductor layer is heated by thermal annealing. Since a low-resistance semiconductor crystal layer is formed by crystallization,
Effect of providing a field emission electron source having high electron emission efficiency and high thermal stability as compared with a field emission electron source in which a high resistance amorphous semiconductor layer is formed on a conductive layer There is.

A twelfth aspect of the present invention is the method for manufacturing a field emission electron source according to the first aspect, wherein a conductive layer is formed on a substrate, and an amorphous semiconductor layer is formed on the conductive layer. the amorphous semiconductor layer of the semiconductor crystal layer is formed by crystallization by heating by laser annealing, thereafter, the non-doped semi-conductor layer is formed on the semiconductor crystal layer, Ide following <br/>, undoped semiconductors layers after forming the porous semi-conductor layer by partially made porous, a strong electric field drift layer is formed, strong surface electrode to the electric field drift layer by oxidizing or nitriding the porous semiconductor layer formation Because
Since the amorphous semiconductor layer is formed on the conductive layer and the amorphous semiconductor layer is heated by laser annealing to be crystallized to form a low-resistance semiconductor crystal layer,
Effect of providing a field emission electron source having high electron emission efficiency and high thermal stability as compared with a field emission electron source in which a high resistance amorphous semiconductor layer is formed on a conductive layer There is.

The invention of claim 13 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on the substrate, and an amorphous semiconductor layer is formed on the conductive layer. A semiconductor crystal layer is formed by crystallizing the amorphous semiconductor layer by heat treatment using hydrogen, and thereafter,
A non-doped semi-conductor layer is formed on the semiconductor crystal layer, in then <br/>, after forming the porous semiconductor layer by a portion of the non-doped semi-conductor layer is porous, the porous semiconductor layer A strong electric field drift layer is formed by oxidization or nitriding, and a surface electrode is formed on the strong electric field drift layer. Since the low resistance semiconductor crystal layer is formed by crystallization, the electron emission efficiency is higher and the thermal efficiency is higher than that of the field emission electron source in which the high resistance amorphous semiconductor layer is formed on the conductive layer. It is possible to provide a field emission type electron source having high stability.

A fourteenth aspect of the present invention is the method for manufacturing a field emission electron source according to the first aspect, wherein a conductive layer is formed on a substrate, and an amorphous semiconductor layer is formed on the conductive layer. The amorphous semiconductor layer is irradiated with hydrogen plasma to be crystallized to form a semiconductor crystal layer, and thereafter,
A non-doped semi-conductor layer is formed on the semiconductor crystal layer, in then <br/>, after forming the porous semiconductor layer by a portion of the non-doped semi-conductor layer is porous, the porous semiconductor layer A strong electric field drift layer is formed by oxidization or nitriding, and a surface electrode is formed on the strong electric field drift layer. As a result, the low-resistance semiconductor crystal layer is formed, so that the electron emission efficiency and thermal efficiency are higher than those of the field emission electron source in which the high-resistance amorphous semiconductor layer is formed on the conductive layer. There is an effect that a field emission type electron source with high stability can be provided.

A fifteenth aspect of the present invention is the method for manufacturing a field emission electron source according to the first aspect, wherein a conductive layer is formed on a substrate, and an amorphous semiconductor layer is formed on the conductive layer. the amorphous semiconductor layer is irradiated with hydrogen ions to form a semiconductor crystal layer by crystallization, after which the non-doped semi-conductor layer is formed on the semiconductor crystal layer, then,
Some of the non-doped semi-conductor layer of the porous semiconductor layer is formed by porous, to form a strong electric field drift layer by oxidizing or nitriding the porous semiconductor layer, strong surface electrode to the electric field drift layer Therefore, since the amorphous semiconductor layer is formed on the conductive layer and the amorphous semiconductor layer is irradiated with hydrogen ions to be crystallized to form a low-resistance semiconductor crystal layer, the amorphous semiconductor layer is formed on the conductive layer. As compared with the field emission type electron source in which the amorphous semiconductor layer having high resistance is formed, it is possible to provide the field emission type electron source having high electron emission efficiency and high thermal stability.

According to a sixteenth aspect of the invention, in the invention of the first to fifteenth aspects, the amorphous semiconductor layer is
Since it is made of a low-resistance amorphous semiconductor doped with impurities, the resistance of the amorphous semiconductor layer can be controlled with good controllability, and as a result, the resistance of the low-resistance semiconductor crystal layer can be controlled with low resistance.

The invention of claim 17 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, and a semiconductor crystal layer to which an impurity is added is formed on the conductive layer. after forming, the non-doped semi-conductor layer is formed on the semiconductor crystal layer, then, after forming the porous semiconductor layer by porous part of the non-doped semi-conductor layer, oxidizing the porous semiconductor layer or Since the strong electric field drift layer is formed by nitriding and the surface electrode is formed on the strong electric field drift layer, a low-resistance semiconductor crystal layer doped with impurities is formed on the conductive layer. As compared with a field emission electron source having a high resistance amorphous semiconductor layer formed thereon, it is possible to provide a field emission electron source having high electron emission efficiency and high thermal stability.

An eighteenth aspect of the present invention is a method for manufacturing a field emission electron source according to the first aspect, wherein a conductive layer is formed on a substrate, and an impurity is doped on the conductive layer to form a low resistance semiconductor. depositing a more composed semiconductor crystal layer, then a non-doped semi-conductor layer is formed on the semiconductor crystal layer, then, Bruno
After forming the porous semiconductor layer by porous part of Ndopu semi conductor layer to form a strong electric field drift layer by oxidizing or nitriding the porous semiconductor layer, the surface of the strong electric field drift layer Since the electrodes are formed, a semiconductor crystal layer made of a low-resistance semiconductor doped with impurities is deposited on the conductive layer, and therefore, a field emission electron having a high-resistance amorphous semiconductor layer formed on the conductive layer. There is an effect that it is possible to provide a field emission type electron source having higher electron emission efficiency and higher thermal stability than the source.

The invention of claim 19 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on the substrate, and a crystalline semiconductor layer is formed on the conductive layer. and, wherein the semiconductor crystal layer is formed by ion implantation into the semiconductor layer, then a non-doped semi <br/> conductive layer is formed on a semiconductor crystal layer, then, the porous part of the non-doped semi-conductor layer After forming a porous semiconductor layer by
Since the strong electric field drift layer is formed by oxidizing or nitriding the porous semiconductor layer and the surface electrode is formed on the strong electric field drift layer, the semiconductor layer having crystallinity is formed on the conductive layer. Since a low-resistance semiconductor crystal layer is formed by performing ion implantation into the layer, the electron emission efficiency is higher than that of a field emission electron source in which a high-resistance amorphous semiconductor layer is formed on a conductive layer. Further, there is an effect that a field emission type electron source having high thermal stability can be provided.

The invention of claim 20 is the method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate and a semiconductor layer having crystallinity is formed on the conductive layer. Then, a semiconductor crystal layer is formed by diffusing impurities into the semiconductor layer, and then non-doped on the semiconductor crystal layer.
The semi-conductor layer is formed, then, after forming the porous semiconductor layer by porous part <br/> of undoped semi-conductor layer, a strong electric field by oxidizing or nitriding the porous semiconductor layer The drift layer is formed, and the surface electrode is formed on the strong electric field drift layer. Therefore, a semiconductor layer having crystallinity is formed on the conductive layer, and impurities are diffused into the semiconductor layer to form a low-resistance semiconductor crystal layer. Therefore, as compared with the field emission type electron source in which the high resistance amorphous semiconductor layer is formed on the conductive layer, the field emission type electron source with high electron emission efficiency and high thermal stability is formed. There is an effect that it can be provided.

[0096] The invention of claim 21 is the invention of claims 10 to 20, said semiconductor formation or after the strong electric field after the formation of the crystal layer or after formation of the non-doped semi-conductor layer or the porous semiconductor layer Since the heat treatment is performed at least once after the formation of the drift layer or after the formation of the surface electrode, the Schottky barrier formed between the conductive layer and the semiconductor crystal layer can be reduced or removed, and the electron emission efficiency is high. There is an effect that it is possible to provide a field emission type electron source having high thermal stability.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing a first embodiment.

FIG. 2 is a cross-sectional view of main steps for explaining the above manufacturing method.

FIG. 3 is an explanatory diagram of a characteristic measurement principle of the above.

FIG. 4 is a schematic cross-sectional view showing a second embodiment.

FIG. 5 is a schematic sectional view showing a third embodiment.

FIG. 6 is an explanatory diagram of a characteristic measurement principle of the above.

FIG. 7 is a schematic cross-sectional view showing a fourth embodiment.

FIG. 8 is a schematic cross-sectional view showing a conventional example.

FIG. 9 is an explanatory diagram of a characteristic measurement principle of the above.

FIG. 10 is an explanatory diagram of an electron emission mechanism of the above.

FIG. 11 is a schematic cross-sectional view showing another conventional example.

FIG. 12 is an explanatory diagram of a characteristic measurement principle of the above.

[Explanation of symbols]

3 Polycrystalline silicon layer 6 Strong electric field drift layer 7 Surface electrode 8 Conductive layer 9 n-type polycrystalline silicon layer 10 Field emission electron source 11 Insulating substrate

Continuation of front page (56) Reference JP-A-9-259795 (JP, A) JP-A-11-67063 (JP, A) JP-A-11-329213 (JP, A) JP-A-6-60795 (JP , A) JP-A-10-149984 (JP, A) JP-A-7-262908 (JP, A) Patent 2966842 (JP, B2) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01J 1 / 312 H01J 9/02 H01J 29/04 H01J 31/12

Claims (21)

(57) [Claims] 1. A substrate, a conductive layer formed on one surface of the substrate, and a non-doped layer formed on the surface side of the conductive layer.
A semiconductor layer , a strong electric field drift layer formed of an oxidized or nitrided porous semiconductor layer formed on the non-doped semiconductor layer, and a surface electrode formed on the strong electric field drift layer, the surface electrode being a conductive layer. a field emission electron source is emitted through the drift surface electrode electrons strong electric field drift layer injected from the conductive layer by applying a voltage as a positive electrode against, the conductive layer and the Nondo
Semiconductor crystal consisting of low-resistance semiconductor between the semiconductor layer
A field emission type electron source characterized in that a layer is interposed . 2. The field emission type electron source according to claim 1, wherein a silicide layer is provided between the conductive layer and the semiconductor crystal layer. Wherein said semiconductor crystal layer, the claims semiconductor layers having different resistors having a multi-layer structure laminated in the thickness direction, and wherein the resistance as the semiconductor layer closer to the conductive layer is small The field emission type electron source according to claim 1 or 2. 4. The semiconductor crystal layer is a layer in which the resistance continuously changes in the thickness direction, and the resistance becomes smaller as it gets closer to the conductive layer. Field emission electron source. 5. A substrate, a conductive layer formed on one surface of the substrate, and a non-doped layer formed on the surface side of the conductive layer.
A semiconductor layer , a strong electric field drift layer formed of an oxidized or nitrided porous semiconductor layer formed on the non-doped semiconductor layer, and a surface electrode formed on the strong electric field drift layer, the surface electrode being a conductive layer. voltage electricity that will be released through the drift surface electrode electrons strong electric field drift layer injected from the conductive layer by applying as a positive electrode against
A field emission electron source, comprising the conductive layer and the non-doped
A field-emission electron source characterized in that a silicide layer is interposed between the semiconductor layer and the semiconductor layer . 6. The strong electric field drift layer comprises columnar semiconductor crystals arranged substantially orthogonal to the main surface of the substrate, nanometer-order semiconductor microcrystals interposed between the semiconductor crystals, and the surface of the semiconductor microcrystal. 6. The field emission electron source according to claim 1, wherein the field emission electron source is formed of an insulating film having a film thickness smaller than the crystal grain size of the semiconductor microcrystal. 7. The field emission electron source according to claim 1, wherein the semiconductor is made of a polycrystalline semiconductor. 8. The field emission electron source according to claim 1, wherein the semiconductor is made of silicon. 9. The field emission electron source according to claim 1, wherein the conductive layer is made of metal. 10. The method of manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on the substrate, an amorphous semiconductor layer is formed on the conductive layer, and then the amorphous semiconductor layer is formed. heating to form a semiconductor crystal layer by crystallization, after which the non-doped semiconductive <br/> layer formed on the semiconductor crystal layer, then, to porous portions of the non-doped semi-conductor layer After forming a porous semiconductor layer by the method, a strong electric field drift layer is formed by oxidizing or nitriding the porous semiconductor layer, and a surface electrode is formed on the strong electric field drift layer. Source manufacturing method. 11. The method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, an amorphous semiconductor layer is formed on the conductive layer, and then the amorphous semiconductor layer is formed. A semiconductor crystal layer is formed by heating and crystallizing by thermal annealing, and then on the semiconductor crystal layer .
Forming a non-doped semi-conductor layer, then, after forming the porous semiconductor layer by porous part of the non-doped semiconducting <br/> layer is oxidized or nitrided crystal semiconductor layer of the porous A strong field drift layer is formed thereby, and a surface electrode is formed on the strong field drift layer. 12. The method of manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, an amorphous semiconductor layer is formed on the conductive layer, and then the amorphous semiconductor layer is formed. the semiconductor crystal layer is formed by crystallization by heating by laser annealing, thereafter, the non-doped semi-conductor layer is formed on the semiconductor crystal layer, then non-doped
After forming the porous semi-conductor layer by a portion of the semi-conductor layer made porous to form a strong electric field drift layer by oxidizing or nitriding the porous semiconductor layer, the surface of the strong electric field drift layer A method of manufacturing a field emission electron source, which comprises forming an electrode. 13. The method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, an amorphous semiconductor layer is formed on the conductive layer, and then the amorphous semiconductor layer is formed. A semiconductor crystal layer is formed by crystallization by heat treatment using hydrogen, and then on the semiconductor crystal layer .
Forming a non-doped semi-conductor layer, then, after forming the porous semiconductor layer by porous part of the non-doped semiconducting <br/> layer by oxidizing or nitriding the porous semiconductor layer A method of manufacturing a field emission electron source, which comprises forming a strong electric field drift layer and forming a surface electrode on the strong electric field drift layer. 14. The method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, an amorphous semiconductor layer is formed on the conductive layer, and the amorphous semiconductor layer is formed on the amorphous semiconductor layer. A semiconductor crystal layer is formed by crystallizing by irradiating with hydrogen plasma, and then on the semiconductor crystal layer .
Forming a non-doped semi-conductor layer, then, after forming the porous semiconductor layer by porous part of the non-doped semiconducting <br/> layer by oxidizing or nitriding the porous semiconductor layer A method of manufacturing a field emission electron source, which comprises forming a strong electric field drift layer and forming a surface electrode on the strong electric field drift layer. 15. The method for manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, an amorphous semiconductor layer is formed on the conductive layer, and the amorphous semiconductor layer is formed on the amorphous semiconductor layer. the semiconductor crystal layer is formed by crystallization by irradiation with hydrogen ions, then Bruno to the semiconductor crystal layer
Forming a Ndopu semi conductor layer, then forming a strong electric field drift layer by a portion of the non-doped semi-conductor layer of the porous semiconductor layer is formed by porous, oxidized or nitrided porous semiconductor layer And forming a surface electrode on the strong electric field drift layer, a method for manufacturing a field emission electron source. 16. The method for manufacturing a field emission electron source according to claim 10, wherein the amorphous semiconductor layer is made of a low-resistance amorphous semiconductor doped with impurities. 17. The method of manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, and an impurity-doped semiconductor crystal layer is formed on the conductive layer, and then a semiconductor is formed. a non-doped semi-conductor layer is formed on the crystal layer and then, Bruno
After forming the porous semiconductor layer by porous part of Ndopu semi conductor layer to form a strong electric field drift layer by oxidizing or nitriding the porous semiconductor layer, the surface of the strong electric field drift layer A method of manufacturing a field emission electron source, which comprises forming an electrode. 18. The method for manufacturing a field emission electron source according to claim 1, wherein the semiconductor crystal layer is formed of a low-resistance semiconductor in which a conductive layer is formed on a substrate and impurities are doped on the conductive layer. the deposited, then non the semiconductor crystal layer
Forming a doped semi-conductor layer, then non-doped semi-conductor layer
Forming a porous semiconductor layer by making a part of the porous semiconductor layer porous, and then oxidizing or nitriding the porous semiconductor layer to form a strong electric field drift layer, and forming a surface electrode on the strong electric field drift layer. A method of manufacturing a field emission electron source, comprising: 19. The method of manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, and a crystalline semiconductor layer is formed on the conductive layer. in the semiconductor crystal layer is formed by ion implantation, then a non-doped semi-conductor layer is formed on the semiconductor crystal layer, the following <br/> Ide, a portion of the non-doped semi-conductor layer by porous A field emission electron source characterized by forming a porous semiconductor layer, forming a strong electric field drift layer by oxidizing or nitriding the porous semiconductor layer, and forming a surface electrode on the strong electric field drift layer. Manufacturing method. 20. The method of manufacturing a field emission electron source according to claim 1, wherein a conductive layer is formed on a substrate, and a semiconductor layer having crystallinity is formed on the conductive layer. in the semiconductor crystal layer is formed by diffusing the impurity, then a non-doped semi-conductor layer is formed on the semiconductor crystal layer,
Then, after forming the porous semiconductor layer by porous part of the non-doped semi-conductor layer to form a strong electric field drift layer by oxidizing or nitriding the porous semiconductor layer, the strong electric field drift layer A method of manufacturing a field emission electron source, which comprises forming a surface electrode on the surface. 21. After or on the formation of the semiconductor crystal layer
Claims 10 to, characterized in that performing at least one heat treatment after serial non-doped semi-conductor layer formed or after the porous semiconductor layer formation or after the strong electric field drift layer formed or after the surface electrode formation 21. The method for manufacturing a field emission electron source according to any one of 20.