JP2001210229A - Method of manufacturing electric field emission type electron source - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing an electric field emission type electron source having a high electron emission efficiency and a high thermal stability. SOLUTION: A non-doped polycrystalline silicon layer 3 is formed on a sacrifice substrate 13 and a conductive layer 8 made from tungsten is deposited on the polycrystalline silicon layer 3 for example, by sputtering method. Thereafter, the conductive layer 8 and an insulation substrate 11 are laminated together (Fig. 1 (a)). The sacrifice substrate 13 is removed and unnecessary amorphous silicon layer which is a part of the polycrystalline silicon layer 3 is removed (Fig. 1 (b)). The polycrystalline silicon layer 3 is changed to a porous structure by an anode oxidation treatment so that a porous polycrystalline silicon layer 4 is formed (Fig. 1 (c)). As is oxidized, a strong electric field drift layer 6 is formed by oxidation of the porous polycrystalline silicon layer 4 and then a surface electrode 7 is formed on the strong electric field drift layer 6 (Fig. 1 (d)).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a field emission type electron source which emits an electron beam by field emission.

[0002]

2. Description of the Related Art Conventionally, as a field emission type electron source, there is a so-called Spindt electrode disclosed in, for example, US Pat. No. 3,665,241. This Spindt-type electrode has a substrate on which a number of minute triangular pyramid-shaped emitter chips are arranged, a gate layer having a radiation hole for exposing the tip of the emitter chip, and being arranged insulated from the emitter chip. And applying a high voltage with the emitter tip as a negative electrode to the gate layer in a vacuum to emit an electron beam from the tip of the emitter tip through a radiation hole.

However, the Spindt-type electrode has a complicated manufacturing process, and it is difficult to accurately form a large number of triangular pyramid-shaped emitter chips. For example, the Spindt-type electrode has a large area when applied to a flat light emitting device or a display. There was a problem that was difficult. In the Spindt-type electrode, the electric field is concentrated at the tip of the emitter tip, so if the degree of vacuum around the tip of the emitter tip is low and residual gas is present, the emitted gas turns the residual gas into positive ions. Since the ions are ionized and the positive ions collide with the tip of the emitter tip, the tip of the emitter tip is damaged (for example, damage due to ion bombardment), and the current density and efficiency of emitted electrons become unstable. There is a problem that the life of the chip is shortened. Therefore, the Spindt-type electrode needs to be used in a high vacuum (about 10 ^-5 Pa to about 10 ^-6 Pa) in order to prevent such a problem from occurring, which increases the cost and complicates handling. There was a problem.

In order to improve this kind of problem, MIM
(Metal Insulator Metal) method and MOS (Metal Oxid
e Semiconductor) type field emission electron sources have been proposed. The former is a flat field emission type electron source having a metal-insulating film-metal structure, and the latter is a metal-oxide film-semiconductor stacked structure. However, in order to increase the emission efficiency of electrons in this type of field emission type electron source (to emit many electrons), it is necessary to reduce the thickness of the insulating film and the oxide film. If the thickness of the insulating film or the oxide film is too thin, dielectric breakdown may occur when a voltage is applied between the upper and lower electrodes of the laminated structure. Since the thickness of the insulating film or the oxide film is limited, the electron emission efficiency (drawing efficiency) cannot be increased.

In recent years, Japanese Patent Application Laid-Open No. 8-250766
As disclosed in Japanese Patent Application Laid-Open Publication No. H10-209, a porous semiconductor layer (porous silicon layer) is formed by using a single crystal semiconductor substrate such as a silicon substrate and anodizing one surface of the semiconductor substrate. A field emission electron source (semiconductor cold electron emission element) has been proposed in which a metal thin film is formed on a porous semiconductor layer, and a voltage is applied between the semiconductor substrate and the metal thin film to emit electrons. .

[0006] However, the above-mentioned Japanese Patent Application Laid-Open No. Hei 8-2507 has been disclosed.
In the field emission electron source described in Japanese Patent Publication No. 66, since the substrate is limited to a semiconductor substrate, there is a problem that it is difficult to increase the area and reduce the cost. In addition, Japanese Patent Application Laid-Open No. 8-25076
In the field emission type electron source described in Japanese Patent Application Publication No. 6 (1995) -76, a so-called popping phenomenon easily occurs during electron emission, and the amount of emitted electrons tends to be uneven. There is.

Therefore, a porous polycrystalline semiconductor layer (for example,
Rapid thermal oxidation (RT) of the polycrystalline silicon layer
O) A field emission electron source having a strong electric field drift layer formed between a conductive substrate and a metal thin film (surface electrode) by rapid thermal oxidation to drift electrons injected from the conductive substrate. Has been proposed (for example,
See Japanese Patent No. 2968642 and Japanese Patent No. 2987140). In the field emission type electron source 10 ′, for example, as shown in FIG. 6, a strong electric field drift layer 6 made of an oxidized porous polycrystalline silicon layer is formed on the main surface side of an n-type silicon substrate 1 serving as a conductive substrate. The surface electrode 7 made of a metal thin film is formed on the strong electric field drift layer 6, and the ohmic electrode 2 is formed on the back surface of the n-type silicon substrate 1.

A field emission type electron source 10 'having the structure shown in FIG.
In FIG. 7, the surface electrode 7 is disposed in a vacuum, and the collector electrode 21 is disposed opposite to the surface electrode 7 as shown in FIG. 7, and the surface electrode 7 is connected to the n-type silicon substrate 1 (the ohmic electrode 2) with the positive electrode. As a result, the electrons injected from the n-type silicon substrate 1 drifts through the strong electric field drift layer 6 to apply the DC voltage Vps to the collector electrode 21 and the surface electrode 7 as a positive electrode. The electrons are emitted through the electrode 7 (the dashed line in FIG. 7 indicates the flow of the electrons e ⁻ emitted through the surface electrode 7). Therefore, it is desirable to use a material having a small work function as the surface electrode 7. Here, the current flowing between the surface electrode 7 and the ohmic electrode 2 is called a diode current Ips, and the collector electrode 21 and the surface electrode 7
Is called an emission electron current Ie, and the emission electron current Ie with respect to the diode current Ips is large (Ie /
The larger the value of Ips, the higher the electron emission efficiency. In this field emission type electron source 10 ′, the DC voltage Vps applied between the surface electrode 7 and the ohmic electrode 2 is 10 to 20 V
Electrons can be emitted even at a low voltage.

In the field emission type electron source 10 ', the electron emission characteristics have a small dependence on the degree of vacuum and the electrons can be stably emitted with a high electron emission efficiency without generating a popping phenomenon during electron emission. Here, as shown in FIG. 8, the strong electric field drift layer 6 includes at least columnar polycrystalline silicon 51 (grain), a thin silicon oxide film 52 formed on the surface of the polycrystalline silicon 51, and a polycrystalline silicon 51. A microcrystalline silicon layer 63 of nanometer order interposed between the microcrystalline silicon layers 51; and a silicon oxide film 64 formed on the surface of the microcrystalline silicon layer 63 and being an insulating film having a thickness smaller than the crystal grain size of the microcrystalline silicon layer 63. It is considered to be composed of That is, in the strong electric field drift layer 6, it is considered that the surface of each grain is porous and the crystalline state is maintained in the central portion of each grain. Therefore, most of the electric field applied to the strong electric field drift layer 6 is applied to the silicon oxide film 64, and the injected electrons are accelerated by the strong electric field applied to the silicon oxide film 64 to move between the polycrystalline silicons 51 toward the surface. Since the electron beam drifts in the direction of arrow A in FIG. 8 (upward in FIG. 8), the electron emission efficiency can be improved. The electrons reaching the surface of the strong electric field drift layer 6 are considered to be hot electrons, and are easily tunneled through the surface electrode 7 and discharged into a vacuum. The thickness of the surface electrode 7 is 10 nm to 1 nm.
It is set to about 5 nm.

By the way, instead of a semiconductor substrate such as the n-type silicon substrate 1 as the conductive substrate, if a substrate having a conductive layer made of, for example, an ITO film formed on an insulating substrate such as a glass substrate, is used, The area of the source can be increased and the cost can be reduced.

FIG. 9 shows an insulating substrate 1 made of a glass substrate.
1 shows a field emission type electron source 10 ″ using a conductive substrate composed of a conductive layer 8 made of an ITO film formed on the insulating substrate 11;
In the case of 0 ″, as shown in FIG. 9, a conductive layer 8 made of, for example, an ITO film is formed on an insulating substrate 11, a strong electric field drift layer 6 is formed on the conductive layer 8, and a strong electric field drift layer 6 is formed.
A surface electrode 7 made of a metal thin film is formed thereon. Here, the strong electric field drift layer 6 is formed by depositing a non-doped polycrystalline silicon layer on the conductive layer 8, making the polycrystalline silicon layer porous by anodizing treatment, and further oxidizing or growing by a rapid heating method. It is formed by nitriding.

In this field emission type electron source 10 ", the surface electrode 7 is disposed in a vacuum and a collector electrode 21 is disposed opposite the surface electrode 7 as shown in FIG. By applying a DC voltage Vps as a positive electrode to the surface electrode 8 and applying a DC voltage Vc to the surface electrode 7 as a positive electrode, electrons injected from the conductive layer 8 can be applied to the strong electric field drift layer 6. (The dashed line in FIG. 10 indicates the flow of electrons e ⁻ emitted through the surface electrode 7.) Here, the surface electrode 7 and the conductive layer 8
The current flowing between the collector electrode 21 and the surface electrode 7 is called an emission electron current Ie, and the emission electron current Ie with respect to the diode current Ips is large (Ie / Ips is large). ) Increases the electron emission efficiency. In this field emission type electron source 10 ″, electrons can be emitted even when the DC voltage Vps applied between the surface electrode 7 and the conductive layer 8 is as low as about 10 to 20V.

In the field emission type electron source 10 ″ using the insulating substrate 11, the strong electric field drift layer 6 is used.
Is formed by depositing a non-doped polycrystalline silicon layer on the conductive layer 8, making the polycrystalline silicon layer porous by anodizing treatment, and further oxidizing it by a rapid heating method. Since the oxidation temperature at this time is relatively high (a temperature range from 800 ° C. to 900 ° C.), expensive quartz glass must be used as the insulating substrate 11, and a problem that a large area and low cost are limited. there were. Means for solving this kind of inconvenience (that is, means for lowering the temperature of the process) include, for example, a method of oxidizing a porous polycrystalline silicon layer, a method of oxidizing with an acid, and a method of oxidizing at least oxygen and ozone. A method of oxidizing by irradiating ultraviolet rays in a gas atmosphere containing one of them is conceivable. Such a method of oxidizing the porous polycrystalline silicon layer with an acid or a method of irradiating the porous polycrystalline silicon layer with ultraviolet rays in a gas atmosphere containing at least one of oxygen and ozone is used. By adopting,
As the insulating substrate 11, a glass substrate (for example, an alkali-free glass substrate, a low-alkali glass substrate, a soda lime glass substrate, or the like) whose heat-resistant temperature is lower than that of a quartz glass substrate and whose price is lower than that of a quartz glass substrate can be used. It becomes possible.

The above-mentioned field emission electron sources 10 ', 10',
In 10 ", the entire non-doped polycrystalline silicon layer is made porous, but a part thereof may be made porous.

[0015]

However, in the field emission type electron source 10 "utilizing the insulating substrate 11, the non-doped polycrystalline silicon layer is deposited on the conductive layer 8 made of the ITO film in the manufacturing process. At this time, a high-resistance amorphous silicon layer is formed near the interface with the conductive layer 8, and the conductive layer 8 and the strong electric field drift layer 6 are formed.
Or the conductive layer 8 in the strong electric field drift layer 6
A high-resistance amorphous silicon layer remains near the interface with. For this reason, when the above-described diode current Ips flows, a voltage drop occurs in the amorphous silicon layer and the voltage applied to the strong electric field drift layer 6 decreases, so that a desired emission electron current (emission current) Ie is obtained. The DC voltage Vps increases, and the electron emission efficiency decreases. In addition, there is a disadvantage that the voltage drop in the amorphous silicon layer generates heat in the amorphous silicon layer, thereby impairing the thermal stability. Further, since there is a Schottky barrier between the conductive layer 8 and the amorphous silicon layer, there is a problem that a voltage drop occurs in the Schottky barrier.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method of manufacturing a field emission electron source having high electron emission efficiency and high thermal stability.

[0017]

In order to achieve the above object, the present invention provides a substrate, a conductive layer formed on a main surface side of the substrate, and a conductive layer formed on a surface side of the conductive layer. A strong electric field drift layer comprising a oxidized or nitrided porous crystalline semiconductor layer, and a surface electrode formed on the strong electric field drift layer, and applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. A method for manufacturing a field emission type electron source in which electrons injected from a conductive layer drifts through a strong electric field drift layer and is emitted through a surface electrode, comprising: Forming a,
Forming the conductive layer on one surface side of the semiconductor layer, and bonding the conductive layer and the substrate,
A step of removing the sacrificial substrate and an unnecessary layer that is a part of the semiconductor layer; and forming a porous crystalline semiconductor layer by making the crystalline semiconductor layer that is the semiconductor layer from which the unnecessary layer is removed porous. Forming, forming the strong electric field drift layer by oxidizing or nitriding the porous crystalline semiconductor layer, and forming a surface electrode on the strong electric field drift layer. Since an unnecessary layer which is a part of the semiconductor layer is removed, an amorphous semiconductor layer is not formed in the strong electric field drift layer, and a conventional high resistance amorphous semiconductor layer is formed on the conductive layer. Compared with the field emission type electron source, the voltage applied to the amorphous semiconductor layer can be eliminated and the voltage applied to the strong electric field drift layer becomes higher, so that the electron emission efficiency can be improved. High and it can be thermal stability to provide a high field emission electron source.

A second aspect of the present invention comprises a substrate, a conductive layer formed on the main surface side of the substrate, and an oxidized or nitrided porous crystalline semiconductor layer formed on the surface side of the conductive layer. It has a strong electric field drift layer and a surface electrode formed on the strong electric field drift layer, and electrons injected from the conductive layer are applied by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. A method for producing a field emission electron source wherein the layer drifts and is emitted through a surface electrode,
A step of forming a semiconductor layer on the main surface side of a sacrificial substrate that is another crystal substrate, the step of forming the conductive layer on one surface side of the semiconductor layer, and forming the conductive layer and the substrate. Bonding, and removing the sacrificial substrate,
A step of forming a porous crystalline semiconductor layer by making the crystalline semiconductor layer, which is the semiconductor layer, porous after the sacrificial layer is removed, and oxidizing or nitriding the porous crystalline semiconductor layer to form the crystalline semiconductor layer. Forming a strong electric field drift layer and a step of forming a surface electrode on the strong electric field drift layer, wherein the amorphous semiconductor layer is not formed in the strong electric field drift layer, and the conductive layer Compared to a conventional field emission type electron source having a high-resistance amorphous semiconductor layer formed on it, the voltage applied to the strong electric field drift layer can be reduced by eliminating the voltage drop in the conventional amorphous semiconductor layer. As a result, a field emission electron source having high electron emission efficiency and high thermal stability can be provided.

According to a third aspect of the present invention, in the first or second aspect of the present invention, the one surface of the semiconductor layer is provided between the step of forming the semiconductor layer and the step of forming the conductive layer. Forming a low-resistance semiconductor layer having a lower resistance than the semiconductor layer, so that a field-emission electron source in which a low-resistance semiconductor layer is provided between the conductive layer and the strong electric field drift layer is provided. The Schottky barrier caused by the conductive layer can be thinned, a current flows through tunneling, and a voltage drop across the Schottky barrier is reduced. As a result, field emission type electrons having higher electron emission efficiency Sources can be provided.

According to a fourth aspect of the present invention, in the third aspect of the invention, the step of forming the low-resistance semiconductor layer includes laminating a layer whose resistance decreases with increasing distance from the semiconductor layer on the one surface side of the semiconductor layer. Accordingly, the resistance of the low-resistance semiconductor layer gradually decreases as it approaches the conductive layer, and as a result, a field emission electron source with higher electron emission efficiency can be provided.

According to a fifth aspect of the present invention, in the third aspect of the invention, the step of forming the low-resistance semiconductor layer is such that the resistance changes continuously in the thickness direction and decreases as the distance from the semiconductor layer increases. Since the low-resistance semiconductor layer is formed at a low resistance, the resistance of the low-resistance semiconductor layer decreases continuously as it approaches the conductive layer, and as a result, a field emission electron source with higher electron emission efficiency can be provided. .

According to a sixth aspect of the present invention, in the third aspect of the present invention, the step of forming the low-resistance semiconductor layer adjusts the resistance of the low-resistance semiconductor layer by doping with an impurity. The resistance of the semiconductor layer can be appropriately controlled.

According to a seventh aspect of the present invention, in the third aspect, the step of forming the low-resistance semiconductor layer comprises introducing a doping gas during the deposition of the low-resistance semiconductor layer. Since the resistance of the layer is adjusted, the resistance of the low-resistance semiconductor layer can be adjusted by controlling the amount of the doping gas.

According to an eighth aspect of the present invention, in the third to fifth aspects, the step of forming the low-resistance semiconductor layer adjusts the resistance of the low-resistance semiconductor layer by ion implantation. The resistance of the low-resistance semiconductor layer can be adjusted under the conditions.

According to a ninth aspect of the present invention, in the third aspect, the step of forming the low-resistance semiconductor layer adjusts the resistance of the low-resistance semiconductor layer by diffusion of impurities. Thus, the resistance of the low-resistance semiconductor layer can be adjusted.

According to a tenth aspect of the present invention, in the first to ninth aspects of the present invention, after the formation of the semiconductor layer, after the formation of the conductive layer, after the removal of the sacrificial substrate, or the porous crystalline semiconductor layer, After the formation of the strong electric field drift layer or the formation of the surface electrode, at least one heat treatment is performed, so that the Schottky barrier generated between the conductive layer and the semiconductor can be reduced or eliminated. Thus, a field emission type electron source having higher electron emission efficiency and being thermally stable can be provided.

According to an eleventh aspect of the present invention, in the first to tenth aspects, the step of forming the strong electric field drift layer is such that the strong electric field drift layer is arranged substantially perpendicular to the main surface of the substrate. A semiconductor crystal having a columnar shape, a semiconductor microcrystal of nanometer order interposed between the semiconductor crystals, and an insulating film formed on the surface of the semiconductor microcrystal and having a thickness smaller than the crystal grain size of the semiconductor microcrystal. In the strong electric field drift layer, electrons injected from the conductive layer are accelerated and drift by the electric field applied to the insulating film without colliding with the semiconductor microcrystals. Can provide a field emission type electron source in which heat generated in the step is dissipated through the columnar semiconductor crystal, so that electrons can be emitted with high efficiency without generating a popping phenomenon during electron emission. Emission electron source is obtained.

According to a twelfth aspect of the present invention, in the first to eleventh aspects of the present invention, since the semiconductor is made of a polycrystalline semiconductor, it is easy to increase the area of the field emission electron source.

According to a thirteenth aspect of the present invention, in the first to twelfth aspects, since the semiconductor is made of silicon, a silicon process can be used.

[0030]

(Embodiment 1) In this embodiment,
A method for manufacturing the field emission electron source 10 having the configuration shown in FIG. 2 will be described with reference to FIG.

As shown in FIG. 2, the field emission type electron source 10 of the present embodiment comprises a conductive layer 8 made of tungsten on one surface of an insulating substrate 11 made of a glass substrate (for example, an alkali-free glass substrate). Is formed, a strong electric field drift layer 6 made of oxidized porous polycrystalline silicon is formed on the conductive layer 8, and a surface electrode 7 is formed on the strong electric field drift layer 6. Note that a non-doped polycrystalline silicon layer may be provided between the conductive layer 8 and the strong electric field drift layer 6.

The basic operation of the field emission type electron source 10 is the same as that of the conventional structure shown in FIG. 9, and the surface electrode 7 is disposed in a vacuum and is opposed to the surface electrode 7 as shown in FIG. A collector electrode 21 is disposed, and a DC voltage Vps is applied with the surface electrode 7 as a positive electrode to the conductive layer 8, and a DC voltage Vc is applied with the collector electrode 21 as a positive electrode with respect to the surface electrode 7. The electrons injected from the conductive layer 8 drift in the strong electric field drift layer 6 and are emitted through the surface electrode 7 (the dashed line in FIG. 3 indicates the flow of electrons e ⁻ emitted through the surface electrode 7).
Here, a current flowing between the surface electrode 7 and the conductive layer 8 is referred to as a diode current Ips, and a current flowing between the collector electrode 21 and the surface electrode 7 is referred to as an emission electron current Ie. The electron emission amount increases as the electron current Ie increases (Ie / Ips increases). In the field emission type electron source 10 according to the present embodiment, as in the above-described conventional configuration, even when the DC voltage Vps applied between the surface electrode 7 and the conductive layer 8 is set to a low voltage of about Can be released.

In the field emission type electron source 10 of the present embodiment, an amorphous silicon layer is not formed on the conductive layer 8 by employing a manufacturing method described later (the amorphous silicon layer is formed in the strong electric field drift layer 6). Is not formed), so that a voltage drop in the conventional amorphous semiconductor layer can be eliminated as compared with the conventional field emission type electron source 10 ″ in which a high-resistance amorphous silicon layer is formed on the conductive layer 8. As a result, the voltage applied to the strong electric field drift layer 6 increases, so that the value of the current flowing through the strong electric field drift layer 6 increases (that is, the above-described diode current Ips increases), and the electron emission efficiency increases. In addition, the calorific value is reduced and the thermal stability is increased.

In the present embodiment, the conductive layer 8 is made of tungsten (W) which is a metal. However, the material of the conductive layer 8 is not limited to tungsten. Copper (Cu), aluminum (Al), nickel (Ni), molybdenum (Mo),
Chromium (Cr), platinum (Pt), titanium (Ti), cobalt (Co), zirconium (Zr), tantalum (T
a), hafnium (Hf), palladium (Pd), vanadium (V), niobium (Nb), manganese (Mn), iron (Fe), ruthenium (Ru), rhodium (Rh), rhenium (Re), osmium ( Os), iridium (I
r), gold (Au), silver (Ag), silicon (Si), etc., or a plurality of these materials may be selected and laminated, or any of these materials may be used. A plurality of types may be alloyed and deposited. Further, as the conductive layer 8, a metal oxide (transparent electrode) such as ITO, SnO ₂ , or ZnO may be used, or a metal material listed in the above metal oxide from W to Si may be appropriately selected. Alternatively, an alloy film of the metal material may be stacked on the metal oxide.

Hereinafter, the field emission type electron source 10 of this embodiment will be described.
Will be described with reference to FIG. In this manufacturing method, a sacrificial substrate 13 made of a glass substrate (for example, a non-alkali glass substrate) is used separately from the insulating substrate 11.

First, one surface of the sacrificial substrate 13 (FIG. 1A)
A non-doped polycrystalline silicon layer 3 having a predetermined thickness (for example, 1.5 μm)
D method (however, an amorphous silicon layer 3b is formed on the one surface of the sacrificial substrate 13 in the initial stage of the deposition of the polycrystalline silicon layer 3), and then tungsten is formed on the polycrystalline silicon layer 3. The conductive layer 8 is deposited by, for example, a sputtering method, and then the conductive layer 8 and the insulating substrate 11 are bonded to each other (that is, the sacrificial substrate 13 and the insulating substrate 11 are By bonding together with the conductive layer 8 interposed therebetween, a structure as shown in FIG. 1A is obtained. Here, the non-doped polycrystalline silicon layer 3
Is deposited by a plasma CVD method,
The film can be formed by a low-temperature process of 100 ° C. or lower (100 ° C. to 600 ° C.). Note that the method of forming the non-doped polycrystalline silicon layer 3 is not limited to the plasma CVD method, and the catalyst CV
It may be formed by the D method, or 600 ° C. by the catalytic CVD method.
The film can be formed by the following low-temperature process.

After bonding the conductive layer 8 and the insulating substrate 11, the sacrificial substrate 13 is removed, and the unnecessary amorphous silicon layer 3 b which is a part of the polycrystalline silicon layer 3 is wetted. By removing by etching or the like, a structure as shown in FIG. 1B is obtained. 1 (b) and FIG. 1 (a) are shown upside down.

After removing the unnecessary amorphous silicon layer 3b, an anodizing tank containing an electrolytic solution comprising a mixture of a 55 wt% aqueous solution of hydrogen fluoride and ethanol in a ratio of about 1: 1 is used. Using a platinum electrode (not shown) as a negative electrode and the conductive layer 8 as a positive electrode, the polycrystalline silicon layer 3 is anodized under predetermined conditions while irradiating the polycrystalline silicon layer 3 with light to make the polycrystalline silicon layer 3 porous to a predetermined depth. By doing so, a porous polycrystalline silicon layer 4 is formed, and a structure as shown in FIG. 1C is obtained. Here, in the present embodiment, as the conditions of the anodic oxidation treatment, the light power applied to the surface of the polycrystalline silicon layer 3 is constant and the current density is constant during the anodic oxidation treatment, but these conditions are appropriately changed. (For example, the current density may be changed). In this embodiment, the entire polycrystalline silicon layer 3 is made porous, but a part of the polycrystalline silicon layer 3 may be made porous.

After the above-mentioned anodizing treatment is completed, the electrolytic solution is removed from the anodizing treatment tank, and an acid (for example, about 10% diluted nitric acid, about 10% diluted sulfuric acid,
Aqua regia, etc.), and then using a anodic oxidation treatment tank containing the acid, a platinum electrode (not shown) as a negative electrode and the conductive layer 8 as a positive electrode, and a constant current is applied to make the porous polycrystal. A strong electric field drift layer 6 is formed by oxidizing the silicon layer 4, and then a surface electrode 7 made of a conductive thin film (for example, a gold thin film) is formed on the strong electric field drift layer 6 by, for example, vapor deposition. The field emission type electron source 10 having the structure shown in FIG. In the present embodiment, the thickness of the surface electrode 7 is set to 15 nm. However, the thickness is not particularly limited, and may be any thickness as long as electrons passing through the strong electric field drift layer 6 can tunnel. In the present embodiment, the conductive thin film to be the surface electrode 7 is formed by vapor deposition. However, the method of forming the conductive thin film is not limited to vapor deposition, and for example, a sputtering method may be used.

However, according to the above-described manufacturing method, the unnecessary layer (amorphous silicon layer 3b) which is a part of the polycrystalline silicon layer 3 as the semiconductor layer is removed. Layer is not formed, compared to the conventional field emission type electron source 10 ″ in which a high resistance amorphous silicon layer is formed on the conductive layer 8.
A voltage drop applied to the strong electric field drift layer 6 can be increased by eliminating the voltage drop in the amorphous semiconductor layer as in the conventional case, so that the field emission type electron source has high electron emission efficiency and high thermal stability. 10 can be provided. In addition, the polycrystalline silicon layer 3 is formed by a low-temperature process such as a plasma CVD method, the porous polycrystalline silicon layer 4 is oxidized by an acid, and the surface electrode 7 is formed by a vapor deposition method, a sputtering method, or the like. Since the film is formed, the field emission type electron source 10 can be manufactured by a low-temperature process of 600 ° C. or lower. Therefore, a non-alkali glass substrate, which is less expensive than a quartz glass substrate, can be used as the insulating substrate 11, which can reduce the cost and can further increase the area, and can further increase the polycrystalline structure. Depending on the temperature at which the silicon layer 3 is formed, a glass substrate having a lower heat-resistant temperature than a non-alkali glass substrate such as a low alkali glass substrate or a soda lime glass substrate can be used.

The field emission electron source 10 manufactured by the above-described manufacturing method is disclosed in Japanese Patent No. 2968642 and Japanese Patent No.
Similarly to the field emission type electron source disclosed in Japanese Patent No. 987140, the electron emission characteristics have a small dependence on the degree of vacuum and can stably emit electrons without generating a popping phenomenon during electron emission. Therefore, as shown in FIG. 8, the strong electric field drift layer 6 includes at least a columnar polycrystalline silicon 51 (grain) and a polycrystalline silicon 51 as shown in FIG.
A thin silicon oxide film 52 formed on the surface of the substrate, a microcrystalline silicon layer 63 of nanometer order interposed between the polycrystalline silicon 51, and crystal grains of the microcrystalline silicon layer 63 formed on the surface of the microcrystalline silicon layer 63. It is considered to be composed of a silicon oxide film 64 which is an insulating film having a thickness smaller than the diameter. That is, in the strong electric field drift layer 6, it is considered that the surface of each grain is porous and the crystalline state is maintained in the central portion of each grain.

In the above-described manufacturing method, the porous polycrystalline silicon layer 4 is oxidized with an acid. For example, the porous polycrystalline silicon layer 4 is oxidized by irradiating ultraviolet rays in a gas atmosphere containing at least one of oxygen and ozone. It is desirable that oxidation can be performed in a temperature range of 100 ° C. to 600 ° C. This temperature may be higher than 600 ° C.
In terms of using an inexpensive glass substrate,
It is desirable that oxidation can be performed in a temperature range of 0 ° C. to 600 ° C.

In this embodiment, the strong electric field drift layer 6 is made of oxidized porous polycrystalline silicon. However, the strong electric field drift layer 6 is made of nitrided porous polycrystalline silicon or other oxidized or polycrystalline silicon. It may be constituted by a nitrided porous polycrystalline semiconductor layer.

In the above-described manufacturing method, after the formation of the polycrystalline silicon layer 3 as a semiconductor layer, after the formation of the conductive layer 8, after the removal of the sacrificial substrate 13, after the formation of the porous polycrystalline silicon layer 4, or Electric field drift layer 6
After forming the surface electrode 7 or after forming the surface electrode 7,
By performing the heat treatment twice (600 ° C. or less), the Schottky barrier generated between the conductive layer 8 and the polycrystalline silicon layer 3 can be reduced or eliminated, and the electron emission efficiency is higher and the thermal stability is higher. The field emission type electron source 10 can be provided.

(Embodiment 2) In this embodiment, FIG.
A method of manufacturing the field emission electron source 10 having the configuration shown in FIG. 4D will be described with reference to FIG.

As shown in FIG. 4D, the field emission type electron source 10 of this embodiment has a conductive substrate made of tungsten on one surface of an insulating substrate 11 made of a glass substrate (for example, an alkali-free glass substrate). A conductive layer 8 is formed, an n-type polycrystalline silicon layer 9 as a low-resistance semiconductor layer is formed on the conductive layer 8, and a strong electric field composed of oxidized porous polycrystalline silicon is formed on the n-type polycrystalline silicon layer 9. The drift layer 6 is formed,
The surface electrode 7 is formed on the strong electric field drift layer 6.
In short, the configuration of the field emission type electron source 10 of the present embodiment is substantially the same as that of the first embodiment, and the n-type polycrystalline silicon layer 9 is provided between the conductive layer 8 and the strong electric field drift layer 6. The basic operation is the same as that of the first embodiment. Therefore, also in the field emission type electron source 10 of the present embodiment, electrons can be emitted even when the DC voltage Vps applied between the surface electrode 7 and the conductive layer 8 is as low as about 10 to 20 V. The low-resistance semiconductor layer is not limited to the n-type polycrystalline silicon layer 9, but may be a p-type polycrystalline silicon layer.

In the field emission type electron source 10 of this embodiment, an amorphous silicon layer is not formed on the conductive layer 8 by adopting a manufacturing method described later (the amorphous silicon layer is formed in the strong electric field drift layer 6). Therefore, the value of the current flowing through the strong electric field drift layer 6 is larger than that of the conventional field emission type electron source 10 ″ in which a high-resistance amorphous silicon layer is formed on the conductive layer 8 (that is, not formed). , The above-described diode current Ips increases),
As the electron emission efficiency increases, the calorific value decreases and the thermal stability increases. Further, since the n-type polycrystalline silicon layer 9 is provided between the conductive layer 8 and the strong electric field drift layer 6, the electron emission efficiency can be higher than in the first embodiment. The material of the conductive layer 8 according to the first embodiment
It goes without saying that the materials listed in the above can be used. Further, the n-type polycrystalline silicon layer 9 may be configured as a multilayer structure in which layers having different resistances (impurity concentrations) are stacked in the thickness direction, so that a layer closer to the conductive layer 8 has a lower resistance. The n-type polycrystalline silicon layer 9 may be a layer in which the resistance (impurity concentration) continuously changes in the thickness direction, and the resistance decreases as approaching the conductive layer 8.

Hereinafter, the field emission type electron source 10 of this embodiment will be described.
Will be described with reference to FIG. In this manufacturing method, a sacrificial substrate 13 made of a glass substrate (for example, a non-alkali glass substrate) is used separately from the insulating substrate 11.

First, one surface of the sacrificial substrate 13 (FIG. 4A)
A non-doped polycrystalline silicon layer 3 having a predetermined thickness (for example, 1.5 μm)
D method (however, an amorphous silicon layer 3b is formed on the one surface of the sacrificial substrate 13 in the initial stage of the deposition of the polycrystalline silicon layer 3), and then n is formed on the polycrystalline silicon layer 3. A polycrystalline silicon layer 9 is formed by a plasma CVD method or the like, a conductive layer 8 made of tungsten is deposited by, for example, a sputtering method, and then the conductive layer 8 and the insulating substrate 11 are bonded to each other (that is, By bonding the sacrificial substrate 13 and the insulating substrate 11 together with the polycrystalline silicon layer 3, the n-type polycrystalline silicon layer 9 and the conductive layer 8 interposed therebetween, a structure as shown in FIG. can get. Here, since the non-doped polycrystalline silicon layer 3 and the n-type polycrystalline silicon layer 9 are deposited by the plasma CVD method, they can be formed by a low-temperature process of 600 ° C. or less (100 ° C. to 600 ° C.). The resistance of the n-type polycrystalline silicon layer 9 can be adjusted by controlling the amount of doping gas during deposition. The method of forming the non-doped polycrystalline silicon layer 3 is not limited to the plasma CVD method, but may be a catalytic CVD method.
The film can also be formed by a low-temperature process of 600 ° C. or less by the method. The n-type polycrystalline silicon layer 9 is formed by depositing the polycrystalline silicon layer 3 thicker than the predetermined film thickness and ion-implanting impurities into the polycrystalline silicon layer 3 to form a surface of the polycrystalline silicon layer 3. In this case, the n-type polycrystalline silicon layer 9 may be formed under ion implantation conditions.
In addition, the n-type polycrystalline silicon layer 9 is formed by depositing the polycrystalline silicon layer 3 thicker than the predetermined film thickness and diffusing impurities into the polycrystalline silicon layer 3. In this case, the resistance of n-type polycrystalline silicon layer 9 can be adjusted under diffusion conditions. If an n-type polycrystalline silicon layer 9 is laminated on one surface side of the polycrystalline silicon layer 3 serving as a semiconductor layer, the resistance becomes smaller as the distance from the polycrystalline silicon layer 3 increases.
The resistance of the n-type polycrystalline silicon layer 9 gradually decreases as it approaches the conductive layer 8. The n-type polycrystalline silicon layer 9
If the resistance changes continuously in the thickness direction and the resistance decreases as the distance from the polycrystalline silicon layer 3 increases, the resistance of the n-type polycrystalline silicon layer 9 increases as the resistance approaches the conductive layer 8. Become smaller.

After bonding the conductive layer 8 and the insulating substrate 11, the sacrificial substrate 13 is removed, and then the amorphous silicon layer 3 b, which is an unnecessary layer that is a part of the polycrystalline silicon layer 3, is wetted. By removing by etching or the like, a structure as shown in FIG. 4B is obtained. 4 (b) and FIG. 4 (a) are shown upside down.

After removing the unnecessary amorphous silicon layer 3b, an anodizing tank containing an electrolytic solution comprising a mixture of a 55 wt% aqueous solution of hydrogen fluoride and ethanol in a ratio of about 1: 1 is used. Using a platinum electrode (not shown) as a negative electrode and the conductive layer 8 as a positive electrode, the polycrystalline silicon layer 3 is anodized under predetermined conditions while irradiating the polycrystalline silicon layer 3 with light to make the polycrystalline silicon layer 3 porous to a predetermined depth. As a result, a porous polycrystalline silicon layer 4 is formed, and a structure as shown in FIG. 4C is obtained. Here, in the present embodiment, as the conditions of the anodic oxidation treatment, the light power applied to the surface of the polycrystalline silicon layer 3 is constant and the current density is constant during the anodic oxidation treatment, but these conditions are appropriately changed. (For example, the current density may be changed). In this embodiment, the entire polycrystalline silicon layer 3 is made porous, but a part of the polycrystalline silicon layer 3 may be made porous.

After the above-described anodizing treatment is completed, the electrolytic solution is removed from the anodizing treatment tank, and an acid (for example, about 10% diluted nitric acid, about 10% diluted sulfuric acid,
Aqua regia, etc.), and then using a anodic oxidation treatment tank containing the acid, a platinum electrode (not shown) as a negative electrode and the conductive layer 8 as a positive electrode, and a constant current is applied to make the porous polycrystal. A strong electric field drift layer 6 is formed by oxidizing the silicon layer 4, and then a surface electrode 7 made of a conductive thin film (for example, a gold thin film) is formed on the strong electric field drift layer 6 by, for example, vapor deposition. The field emission type electron source 10 having the structure shown in FIG. In the present embodiment, the thickness of the surface electrode 7 is set to 15 nm. However, the thickness is not particularly limited, and may be any thickness as long as electrons passing through the strong electric field drift layer 6 can tunnel. In the present embodiment, the conductive thin film to be the surface electrode 7 is formed by vapor deposition. However, the method of forming the conductive thin film is not limited to vapor deposition, and for example, a sputtering method may be used.

However, according to the above-described manufacturing method, the unnecessary layer (amorphous silicon layer 3b) which is a part of the polycrystalline silicon layer 3 as the semiconductor layer is removed. Layer is not formed, compared to the conventional field emission type electron source 10 ″ in which a high resistance amorphous silicon layer is formed on the conductive layer 8.
Since there is no voltage drop in the amorphous silicon layer and the Schottky barrier caused by the conductive layer 8 can be made thinner, current flows by tunneling and the voltage drop in the Schottky barrier is reduced, so that the electron emission efficiency is reduced. The field emission electron source 10 having high thermal stability and high thermal stability can be provided. In addition, the polycrystalline silicon layer 3 and the n-type polycrystalline silicon layer 9 are formed by a low-temperature process such as a plasma CVD method, and the porous polycrystalline silicon layer 4 is oxidized with an acid. Since the film is formed by a vapor deposition method, a sputtering method, or the like, the field emission electron source 10 can be manufactured by a low-temperature process of 600 ° C. or less.
Therefore, a non-alkali glass substrate, which is less expensive than a quartz glass substrate, can be used as the insulating substrate 11, which can reduce the cost and can further increase the area, and can further increase the polycrystalline structure. Depending on the temperature at which the silicon layer 3 and the n-type polycrystalline silicon layer 9 are formed, a glass substrate having a lower heat-resistant temperature than a non-alkali glass substrate such as a low alkali glass substrate or a soda lime glass substrate can be used.

The field emission type electron source 10 manufactured by the above-described manufacturing method is disclosed in Japanese Patent No. 2966842 and Japanese Patent No.
Similarly to the field emission type electron source disclosed in Japanese Patent No. 987140, the electron emission characteristics have a small dependence on the degree of vacuum and can stably emit electrons without generating a popping phenomenon during electron emission. Therefore, as shown in FIG. 8, the strong electric field drift layer 6 includes at least a columnar polycrystalline silicon 51 (grain) and a polycrystalline silicon 51 as shown in FIG.
A thin silicon oxide film 52 formed on the surface of the substrate, a microcrystalline silicon layer 63 of nanometer order interposed between the polycrystalline silicon 51, and crystal grains of the microcrystalline silicon layer 63 formed on the surface of the microcrystalline silicon layer 63. It is considered to be composed of a silicon oxide film 64 which is an insulating film having a thickness smaller than the diameter. That is, in the strong electric field drift layer 6, it is considered that the surface of each grain is porous and the crystalline state is maintained in the central portion of each grain.

In the above-described manufacturing method, the porous polycrystalline silicon layer 4 is oxidized with an acid. For example, the porous polycrystalline silicon layer 4 is oxidized by irradiating ultraviolet rays in a gas atmosphere containing at least one of oxygen and ozone. It is desirable that oxidation can be performed in a temperature range of 100 ° C. to 600 ° C. This temperature may be higher than 600 ° C.
In terms of using an inexpensive glass substrate,
It is desirable that oxidation can be performed in a temperature range of 0 ° C. to 600 ° C.

In the present embodiment, the strong electric field drift layer 6 is made of oxidized porous polycrystalline silicon. However, the strong electric field drift layer 6 is made of nitrided porous polycrystalline silicon, or other oxidized or polycrystalline silicon. It may be constituted by a nitrided porous polycrystalline semiconductor layer.

In the above-described manufacturing method, after the formation of the n-type polycrystalline silicon layer 9 or the formation of the conductive layer 8, the removal of the sacrificial substrate 13, the formation of the porous polycrystalline silicon layer 4, or After the formation of the drift layer 6 or the formation of the surface electrode 7, at least one heat treatment (600 ° C. or less) is performed so that the conductive layer 8 and n
It is possible to reduce or eliminate the Schottky barrier generated between the gate electrode and the polycrystalline silicon layer 9, thereby providing the field emission electron source 10 having higher electron emission efficiency and being thermally stable.

(Embodiment 3) In this embodiment, FIG.
A method of manufacturing the field emission electron source 10 having the configuration shown in FIG. 5D will be described with reference to FIG. However, since the configuration of the field emission electron source 10 is the same as that of FIG. 2 described in the first embodiment, the same reference numerals are given to the same components as in the first embodiment, and the description will be omitted. In the manufacturing method of the present embodiment, a sacrificial substrate 13 made of a single-crystal silicon substrate, which is a crystal substrate, is used separately from the insulating substrate 11.

First, the front surface of the sacrificial substrate 13 (hereinafter referred to as the
A non-doped polycrystalline silicon layer 3 having a predetermined thickness (for example, 1.5 μm) is formed on a plasma CV
(In the present embodiment, a silicon substrate is used as the sacrificial substrate 13 and the polycrystalline silicon layer 3 is deposited on the main surface of the silicon substrate. Then, a conductive layer 8 made of tungsten is deposited on the polycrystalline silicon layer 3 by, for example, a sputtering method, and then the conductive layer 8 and the insulating layer are formed. By bonding the substrate 11 (that is, bonding the sacrificial substrate 13 and the insulating substrate 11 with the polycrystalline silicon layer 3 and the conductive layer 8 interposed), a structure as shown in FIG. Is obtained. Here, since the non-doped polycrystalline silicon layer 3 is deposited by a plasma CVD method, it can be formed by a low-temperature process at 600 ° C. or lower (100 ° C. to 600 ° C.). The method of forming the non-doped polycrystalline silicon layer 3 is not limited to the plasma CVD method, but may be a catalytic CVD method. The catalytic CVD method can be used to form a film at a low temperature of 600 ° C. or lower.

After the conductive layer 8 and the insulating substrate 11 are bonded together, the sacrificial substrate 13 is removed, whereby the structure shown in FIG.
The structure as shown in (b) is obtained. In addition, FIG.
And FIG. 5A are shown upside down.

After removing the sacrificial substrate 13, a platinum electrode (see FIG. 1) was used by using an anodizing tank containing an electrolytic solution consisting of a mixture of a 55 wt% aqueous solution of hydrogen fluoride and ethanol in a ratio of about 1: 1. (Not shown) as a negative electrode and the conductive layer 8 as a positive electrode, the polycrystalline silicon layer 3 is anodized under predetermined conditions while irradiating the polycrystalline silicon layer 3 with light to make the polycrystalline silicon layer 3 porous to a predetermined depth. The porous polycrystalline silicon layer 4 is formed to obtain a structure as shown in FIG. Here, in the present embodiment, as the conditions of the anodic oxidation treatment, the light power applied to the surface of the polycrystalline silicon layer 3 is constant and the current density is constant during the anodic oxidation treatment, but these conditions are appropriately changed. (For example, the current density may be changed). In this embodiment, the entire polycrystalline silicon layer 3 is made porous, but a part of the polycrystalline silicon layer 3 may be made porous.

After the above-described anodizing treatment is completed, the electrolytic solution is removed from the anodizing treatment tank, and an acid (for example, about 10% diluted nitric acid, about 10% diluted sulfuric acid,
Aqua regia, etc.), and then using a anodic oxidation treatment tank containing the acid, a platinum electrode (not shown) as a negative electrode and the conductive layer 8 as a positive electrode, and a constant current is applied to make the porous polycrystal. A strong electric field drift layer 6 is formed by oxidizing the silicon layer 4, and then a surface electrode 7 made of a conductive thin film (for example, a gold thin film) is formed on the strong electric field drift layer 6 by, for example, vapor deposition. The field emission type electron source 10 having the structure shown in FIG. In the present embodiment, the thickness of the surface electrode 7 is set to 15 nm. However, the thickness is not particularly limited, and may be any thickness as long as electrons passing through the strong electric field drift layer 6 can tunnel. In the present embodiment, the conductive thin film to be the surface electrode 7 is formed by vapor deposition. However, the method of forming the conductive thin film is not limited to vapor deposition, and for example, a sputtering method may be used.

However, according to the above-described manufacturing method, the conventional field emission type in which the amorphous silicon layer is no longer formed in the strong electric field drift layer 6 and the high resistance amorphous silicon layer is formed on the conductive layer 8 The field emission type electron source 10 having a higher electron emission efficiency and a higher thermal stability than the electron source 10 ″ can be provided. Further, the polycrystalline silicon layer 3 can be formed by a low temperature process such as a plasma CVD method. Since the film is formed and the porous polycrystalline silicon layer 4 is oxidized with an acid and the surface electrode 7 is formed by a vapor deposition method, a sputtering method, or the like, the field emission type is formed by a low-temperature process of 600 ° C. or less. It is possible to manufacture the electron source 10. Therefore, an inexpensive alkali-free glass substrate can be used as the insulating substrate 11 as compared with a quartz glass substrate.
The cost can be reduced and the area can be further increased. Further, depending on the temperature at which the polycrystalline silicon layer 3 is formed, the heat resistance is higher than that of a non-alkali glass substrate such as a low alkali glass substrate or a soda lime glass substrate. It is also possible to use a glass substrate having a low temperature.

The field emission type electron source 10 manufactured by the above-described manufacturing method is disclosed in Japanese Patent No. 2966842 and Japanese Patent No.
Similarly to the field emission type electron source disclosed in Japanese Patent No. 987140, the electron emission characteristics have a small dependence on the degree of vacuum and can stably emit electrons without generating a popping phenomenon during electron emission. Therefore, as shown in FIG. 8, the strong electric field drift layer 6 includes at least a columnar polycrystalline silicon 51 (grain) and a polycrystalline silicon 51 as shown in FIG.
A thin silicon oxide film 52 formed on the surface of the substrate, a microcrystalline silicon layer 63 of nanometer order interposed between the polycrystalline silicon 51, and crystal grains of the microcrystalline silicon layer 63 formed on the surface of the microcrystalline silicon layer 63. It is considered to be composed of a silicon oxide film 64 which is an insulating film having a thickness smaller than the diameter. That is, in the strong electric field drift layer 6, it is considered that the surface of each grain is porous and the crystalline state is maintained in the central portion of each grain.

In the above-described manufacturing method, the porous polycrystalline silicon layer 4 is oxidized by an acid. For example, the porous polycrystalline silicon layer 4 is oxidized by irradiating ultraviolet rays in a gas atmosphere containing at least one of oxygen and ozone. It is desirable that oxidation can be performed in a temperature range of 100 ° C. to 600 ° C. This temperature may be higher than 600 ° C.
In terms of using an inexpensive glass substrate,
It is desirable that oxidation can be performed in a temperature range of 0 ° C. to 600 ° C.

In this embodiment, the strong electric field drift layer 6 is made of oxidized porous polycrystalline silicon. However, the strong electric field drift layer 6 is made of porous polycrystalline silicon, or other oxidized or polycrystalline silicon. It may be constituted by a nitrided porous polycrystalline semiconductor layer.

In the above-mentioned manufacturing method, after the formation of the polycrystalline silicon layer 3 as a semiconductor layer, after the formation of the conductive layer 8, after the removal of the sacrificial substrate 13, after the formation of the porous polycrystalline silicon layer 4, or Electric field drift layer 6
After forming the surface electrode 7 or after forming the surface electrode 7,
By performing the heat treatment twice (600 ° C. or less), the Schottky barrier generated between the conductive layer 8 and the polycrystalline silicon layer 3 can be reduced or eliminated, and the electron emission efficiency is higher and the thermal stability is higher. The field emission type electron source 10 can be provided.

Further, similarly to the second embodiment, an n-type polysilicon layer 9 (or a p-type polysilicon layer) may be provided between the conductive layer 8 and the strong electric field drift layer 6. .

In each of the above embodiments, a glass substrate is used as the insulating substrate 11, which is a substrate. However, the insulating substrate 11 is not limited to a glass substrate. Use a substrate on which an oxide film such as SiO _x or AlO _x or a nitride film such as SiN _x , BN or AlN _x is formed, or a substrate on which an insulating film (such as an oxide film or a nitride film) is formed on a metallic substrate. You may. When a substrate having a high heat resistance such as a silicon substrate or a quartz glass substrate is used as the substrate, the porous polycrystalline silicon layer 4 is oxidized by a rapid heating method (for example, an RTO method) to thereby form a strong electric field drift layer. 6 may be formed.

[0070]

According to the first aspect of the present invention, there is provided a substrate, a conductive layer formed on the main surface side of the substrate, and an oxidized or nitrided porous crystalline semiconductor layer formed on the surface side of the conductive layer. And a surface electrode formed on the strong electric field drift layer. Electrons injected from the conductive layer are strongly applied by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. A method for manufacturing a field emission type electron source that drifts an electric field drift layer and is emitted through a surface electrode, comprising: forming a semiconductor layer on one surface of a sacrificial substrate different from the substrate; Forming the conductive layer, bonding the conductive layer and the substrate, removing the sacrificial substrate and an unnecessary layer that is a part of the semiconductor layer, and removing the unnecessary layer. The crystal as the removed semiconductor layer Forming a porous crystalline semiconductor layer by making the conductive layer porous; forming the strong electric field drift layer by oxidizing or nitriding the porous crystalline semiconductor layer; Forming a surface electrode on the layer, an unnecessary layer that is a part of the semiconductor layer is removed, an amorphous semiconductor layer is not formed in the strong electric field drift layer, and a high level is formed on the conductive layer. Compared with the conventional field emission type electron source in which the amorphous semiconductor layer having resistance is formed, the voltage applied to the strong electric field drift layer can be increased because the voltage drop in the conventional amorphous semiconductor layer can be eliminated. There is an effect that a field emission type electron source having high electron emission efficiency and high thermal stability can be provided.

The invention according to claim 2 comprises a substrate, a conductive layer formed on the main surface side of the substrate, and an oxidized or nitrided porous crystalline semiconductor layer formed on the surface side of the conductive layer. It has a strong electric field drift layer and a surface electrode formed on the strong electric field drift layer, and electrons injected from the conductive layer are applied by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. A method for producing a field emission electron source wherein the layer drifts and is emitted through a surface electrode,
A step of forming a semiconductor layer on the main surface side of a sacrificial substrate that is another crystal substrate, the step of forming the conductive layer on one surface side of the semiconductor layer, and forming the conductive layer and the substrate. Bonding, and removing the sacrificial substrate,
A step of forming a porous crystalline semiconductor layer by making the crystalline semiconductor layer, which is the semiconductor layer, porous after the sacrificial layer is removed, and oxidizing or nitriding the porous crystalline semiconductor layer to form the crystalline semiconductor layer. Since the method includes a step of forming a strong electric field drift layer and a step of forming a surface electrode on the strong electric field drift layer, an amorphous semiconductor layer is not formed in the strong electric field drift layer, and a high level is formed on the conductive layer. Compared with the conventional field emission type electron source in which the amorphous semiconductor layer having resistance is formed, the voltage applied to the strong electric field drift layer can be increased because the voltage drop in the conventional amorphous semiconductor layer can be eliminated. There is an effect that a field emission type electron source having high electron emission efficiency and high thermal stability can be provided.

According to a third aspect of the present invention, in the first or second aspect of the present invention, the one surface of the semiconductor layer is provided between the step of forming the semiconductor layer and the step of forming the conductive layer. Forming a low-resistance semiconductor layer having a lower resistance than the semiconductor layer, so that a field-emission electron source in which a low-resistance semiconductor layer is provided between the conductive layer and the strong electric field drift layer is provided. The Schottky barrier caused by the conductive layer can be thinned, a current flows through tunneling, and a voltage drop across the Schottky barrier is reduced. As a result, field emission type electrons having higher electron emission efficiency There is an effect that a source can be provided.

According to a fourth aspect of the present invention, in the third aspect of the invention, the step of forming the low-resistance semiconductor layer includes laminating on the one surface side of the semiconductor layer a layer whose resistance decreases as the distance from the semiconductor layer increases. Accordingly, the resistance of the low-resistance semiconductor layer gradually decreases as it approaches the conductive layer, and as a result, there is an effect that a field emission electron source with higher electron emission efficiency can be provided.

According to a fifth aspect of the present invention, in the third aspect of the present invention, the step of forming the low-resistance semiconductor layer is such that the resistance changes continuously in the thickness direction and decreases as the distance from the semiconductor layer increases. Since the low-resistance semiconductor layer is formed at a low resistance, the resistance of the low-resistance semiconductor layer decreases continuously as it approaches the conductive layer, and as a result, a field emission electron source with higher electron emission efficiency can be provided. This has the effect.

According to a sixth aspect of the present invention, in the third to fifth aspects, the step of forming the low-resistance semiconductor layer adjusts the resistance of the low-resistance semiconductor layer by doping with an impurity. There is an effect that the resistance of the semiconductor layer can be appropriately controlled.

According to a seventh aspect of the present invention, in the third to fifth aspects, the step of forming the low-resistance semiconductor layer comprises introducing a doping gas during the deposition of the low-resistance semiconductor layer. Since the resistance of the layer is adjusted, there is an effect that the resistance of the low-resistance semiconductor layer can be adjusted by controlling the amount of the doping gas.

According to an eighth aspect of the present invention, in the third aspect, the step of forming the low-resistance semiconductor layer adjusts the resistance of the low-resistance semiconductor layer by ion implantation. There is an effect that the resistance of the low-resistance semiconductor layer can be adjusted under the conditions.

According to a ninth aspect of the present invention, in the third aspect, the step of forming the low-resistance semiconductor layer adjusts the resistance of the low-resistance semiconductor layer by diffusion of impurities. Thus, the resistance of the low-resistance semiconductor layer can be adjusted.

In a tenth aspect of the present invention, in the first to ninth aspects of the present invention, after the formation of the semiconductor layer, after the formation of the conductive layer, after the removal of the sacrificial substrate, or when the porous crystalline semiconductor layer is formed. After the formation of the strong electric field drift layer or the formation of the surface electrode, at least one heat treatment is performed, so that the Schottky barrier generated between the conductive layer and the semiconductor can be reduced or eliminated. Thus, a field emission type electron source having higher electron emission efficiency and being thermally stable can be provided.

According to an eleventh aspect of the present invention, in the first to tenth aspects of the present invention, the step of forming the strong electric field drift layer is such that the strong electric field drift layer is arranged substantially perpendicular to the main surface of the substrate. A semiconductor crystal having a columnar shape, a semiconductor microcrystal of nanometer order interposed between the semiconductor crystals, and an insulating film formed on the surface of the semiconductor microcrystal and having a thickness smaller than the crystal grain size of the semiconductor microcrystal. In the strong electric field drift layer, electrons injected from the conductive layer are accelerated and drift by the electric field applied to the insulating film without colliding with the semiconductor microcrystals. Can provide a field emission type electron source in which heat generated in the step is dissipated through the columnar semiconductor crystal, so that electrons can be emitted with high efficiency without generating a popping phenomenon during electron emission. Emission electron source is an effect that is obtained.

According to a twelfth aspect of the present invention, in the first to eleventh aspects, since the semiconductor is made of a polycrystalline semiconductor, there is an effect that the area of the field emission electron source can be easily increased.

According to a thirteenth aspect, in the first to twelfth aspects, since the semiconductor is made of silicon, there is an effect that a silicon process can be used.

[Brief description of the drawings]

FIG. 1 is a main process sectional view for describing a manufacturing method of a first embodiment.

FIG. 2 is a schematic sectional view showing a field emission electron source according to the first embodiment.

FIG. 3 is an explanatory diagram of a principle of measuring characteristics of the field emission type electron source according to the first embodiment.

FIG. 4 is a cross-sectional view showing main processes for describing a manufacturing method of a second embodiment.

FIG. 5 is a main process sectional view for explaining the manufacturing method in the third embodiment.

FIG. 6 is a schematic sectional view showing a conventional example.

FIG. 7 is an explanatory diagram of a principle of measuring characteristics according to the first embodiment;

FIG. 8 is an explanatory diagram of an electron emission mechanism according to the embodiment.

FIG. 9 is a schematic sectional view showing another conventional example.

FIG. 10 is an explanatory diagram of a principle of measuring characteristics of the above.

[Explanation of symbols]

 Reference Signs List 3 polycrystalline silicon layer 3b amorphous silicon layer 4 porous polycrystalline silicon layer 6 strong electric field drift layer 7 surface electrode 8 conductive layer 10 field emission electron source 11 insulating substrate 13 sacrificial substrate

Claims (13)

[Claims] 1. A substrate, a conductive layer formed on a main surface side of the substrate, and a strong electric field drift layer made of an oxidized or nitrided porous crystalline semiconductor layer formed on a surface side of the conductive layer. And a surface electrode formed on the strong electric field drift layer, and electrons injected from the conductive layer drift on the strong electric field drift layer by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. A method for manufacturing a field emission type electron source emitted through an electrode, comprising: forming a semiconductor layer on one surface of a sacrificial substrate different from the substrate; forming the conductive layer on one surface of the semiconductor layer A step of bonding the conductive layer and the substrate; a step of removing the sacrificial substrate and an unnecessary layer that is a part of the semiconductor layer; and a step of removing the unnecessary layer from the semiconductor layer. Making a crystalline semiconductor layer porous Forming a porous crystalline semiconductor layer by oxidizing or nitriding the porous crystalline semiconductor layer, and forming a surface electrode on the strong electric field drift layer. Forming a field emission type electron source. 2. A substrate, a conductive layer formed on the main surface side of the substrate, and a strong electric field drift layer made of an oxidized or nitrided porous crystalline semiconductor layer formed on the surface side of the conductive layer. And a surface electrode formed on the strong electric field drift layer, and electrons injected from the conductive layer drift on the strong electric field drift layer by applying a voltage with the surface electrode being a positive electrode with respect to the conductive layer. A method for manufacturing a field emission type electron source emitted through an electrode, comprising: forming a semiconductor layer on a main surface side of a sacrificial substrate which is another crystal substrate different from the substrate; Forming a conductive layer, bonding the conductive layer and the substrate, removing the sacrificial substrate, and removing the crystalline semiconductor layer that is the semiconductor layer after the sacrificial layer is removed. Porosity Forming a strong crystalline semiconductor layer, forming the strong electric field drift layer by oxidizing or nitriding the porous crystalline semiconductor layer, and forming a surface electrode on the strong electric field drift layer. A method for manufacturing a field emission electron source, comprising: 3. A low-resistance semiconductor layer having a lower resistance than the semiconductor layer is formed on the one surface of the semiconductor layer between the step of forming the semiconductor layer and the step of forming the conductive layer. 3. The method for manufacturing a field emission electron source according to claim 1, further comprising a step. 4. The step of forming the low-resistance semiconductor layer comprises:
4. The method for manufacturing a field emission electron source according to claim 3, wherein a layer whose resistance decreases as the distance from the semiconductor layer increases is increased on the one surface side of the semiconductor layer. 5. The step of forming the low-resistance semiconductor layer,
4. The method according to claim 3, wherein the low-resistance semiconductor layer is formed such that the resistance changes continuously in the thickness direction and the resistance decreases as the distance from the semiconductor layer increases. 6. The step of forming the low-resistance semiconductor layer,
6. The method according to claim 3, wherein the resistance of the low-resistance semiconductor layer is adjusted by doping with an impurity. 7. The step of forming the low-resistance semiconductor layer,
6. The method according to claim 3, wherein a doping gas is introduced during deposition of the low-resistance semiconductor layer to adjust the resistance of the low-resistance semiconductor layer. . 8. The step of forming the low-resistance semiconductor layer,
6. The method according to claim 3, wherein the resistance of the low-resistance semiconductor layer is adjusted by ion implantation. 9. The step of forming the low-resistance semiconductor layer,
6. The method according to claim 3, wherein the resistance of the low-resistance semiconductor layer is adjusted by diffusing impurities. 10. After the formation of the semiconductor layer, after the formation of the conductive layer, after the removal of the sacrificial substrate, after the formation of the porous crystalline semiconductor layer, after the formation of the strong electric field drift layer, or the surface electrode. After the formation of
The method according to any one of claims 1 to 9, wherein the heat treatment is performed at least once. 11. The step of forming the strong electric field drift layer includes the step of forming the strong electric field drift layer such that the strong electric field drift layer is a columnar semiconductor crystal arranged substantially orthogonal to the main surface of the substrate and a nanometer order intervening between the semiconductor crystals. 11. The semiconductor microcrystal according to claim 1, wherein the semiconductor microcrystal is formed on a surface of the semiconductor microcrystal and has a thickness smaller than a crystal grain size of the semiconductor microcrystal. A method for manufacturing the field emission electron source according to any one of the above. 12. The method according to claim 1, wherein the semiconductor is made of a polycrystalline semiconductor. 13. The method according to claim 1, wherein the semiconductor is made of silicon.