JP3456404B2 - Semiconductor element - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a semiconductor device including a GaN-based semiconductor layer.

[0002]

2. Description of the Related Art It is known that a GaN-based semiconductor can be used as, for example, a blue light emitting device. In such a light emitting device, sapphire is generally used for the substrate, and a light emitting device structure is formed by stacking GaN-based semiconductor layers with an AlN layer interposed therebetween, for example. Here, the AlN layer is Ga
It is considered to play a role in giving nucleation when growing the N-based semiconductor layer.

In such a device, it is desired to replace the sapphire substrate with another material. This is because the sapphire substrate is expensive. Further, since the sapphire substrate is an insulator, it is necessary to form an electrode on the same surface side, and a part of the semiconductor layer must be etched, and accordingly, the bonding process is doubled. Further, since both the n and p electrodes are formed on the same surface side, there is a limitation in reducing the element size. In addition, there was the problem of charge-up.

In order to avoid such a problem of the sapphire substrate, a technique for growing a GaN-based semiconductor layer on the Si substrate has been studied. See JP-A-8-310900 and JP-A-9-92882.

[0005]

However, according to the studies by the present inventors, it was very difficult to grow a GaN-based semiconductor layer on a Si substrate. One of the causes is the difference in the coefficient of thermal expansion between Si and GaN-based semiconductors. The linear expansion coefficient of Si is 4.7 x 10 ^-6 / K, whereas the linear expansion coefficient of GaN is 5.59 x 10 ^-6 / K, and the former is larger than the latter. Therefore, if heating is performed when growing a GaN-based semiconductor, as shown in FIG.
The device is deformed so that the i substrate 1 is expanded and the GaN-based semiconductor layer 3 side is compressed. At this time, tensile stress is generated in the GaN-based semiconductor layer 3, and as a result, cracks 5 may occur. In addition, strain occurs in the lattice even if the crack 5 does not occur. Therefore, the GaN-based semiconductor element cannot exhibit its original function.

Therefore, according to the present invention, GaN is formed on a Si substrate.
An object of the present invention is to provide a semiconductor light emitting device having a novel structure in which a system semiconductor layer can be easily formed.

[0007]

As an invention for achieving such an object, Japanese Patent Application No. 9-29346, which is a prior application of the present application, is disclosed.
3, in which Z is formed between the Si substrate and the GaN-based semiconductor layer.
An intervening buffer layer made of r is disclosed.

The Zr buffer layer has the following advantages. Since Zr has a melting point of 1000 ° C. or higher,
It is also stable depending on the temperature applied during the manufacturing process of the N-based semiconductor layer. Since Zr has a linear expansion coefficient of 10 × 10 ⁻⁶ / K or less, it is close to that of Si materials and GaN-based semiconductor materials, and its elastic modulus is 15 × 10 ¹⁰ N / m ² or less, which is relatively soft. , The internal stress caused by the difference in linear expansion coefficient between Si and the GaN-based semiconductor is relaxed in the buffer layer. Since the nitride formation energy of Zr is negative, a favorable adhesion can be obtained between the buffer layer and the GaN-based semiconductor. 2% difference in lattice constant between Zr and GaN-based semiconductor layer
Since it is the following, the buffer layer and the GaN-based semiconductor layer are better compatible with each other, and the lattice strain of the GaN-based semiconductor layer is reduced. Since Zr can form a silicide, a favorable adhesion can be obtained between the buffer layer and the Si substrate. Since the crystal structure of Zr is the same hexagonal crystal as that of the GaN-based semiconductor, the buffer layer and the GaN-based semiconductor layer are well compatible with each other, and the lattice strain of the GaN-based semiconductor layer is reduced.

When a buffer layer made of Zr is interposed between the Si substrate and the GaN-based semiconductor layer, the buffer layer 12 becomes the GaN-based semiconductor layer 13 and the substrate 1 as shown in FIG.
Since the stress generated due to the difference in the coefficient of thermal expansion from 1 is buffered, the tensile stress in the GaN-based semiconductor layer 13 becomes small. Therefore, cracks hardly occur there, and the lattice strain is relaxed. Therefore, the GaN-based semiconductor layer 13 can exhibit its original function as designed.

Both the Si substrate and the Zr buffer layer are electrically conductive. This connects the electrodes to the substrate,
It is possible to energize the GaN-based semiconductor layer from the substrate side. Therefore, complicated etching for the semiconductor layer, which is required when the device is composed of the GaN-based semiconductor layer, is unnecessary. In the example of FIG. 3, the n-clad layer can be electrically connected to the outside through the buffer layer and the substrate. On the other hand, in the case of the sapphire substrate, since it was insulative, it was necessary to etch the light emitting layer and the p-clad layer to expose the n-clad layer and electrically connect it to the outside. Since the semiconductor layer can be energized via the substrate and the buffer layer, bonding to an external power source is facilitated. Further, since electrodes can be formed above and below the semiconductor layer, the device can be downsized. Furthermore, if the element is incorporated into a functional device and grounded, the problem of charge-up can be easily solved.

When the buffer layer is made of Zr, G
When the aN-based semiconductor layer has a light emitting element structure or a light receiving element structure, the buffer layer itself functions as a reflection layer. Therefore, it is not necessary to form a separate reflection layer, which is required in the light emitting element and the light receiving element using the transparent sapphire substrate of the conventional example. Further, when the substrate is made of a light absorbing material such as GaAs, the work of removing the substrate becomes unnecessary.

As a result of further studies on the Zr-made buffer layer, the present inventors have arrived at the following invention. The first aspect of the present invention is as follows. GaN
A system semiconductor layer, a Si substrate, and a Zr buffer layer provided between the semiconductor layer and the substrate,
A buffer layer formed on the (111) plane of the substrate,
A semiconductor device comprising:

Z formed on the (111) surface of a Si substrate
It was found that the r-made buffer layer was likely to be c-axis oriented. That is, as compared with the case where the Si substrate is grown on the (100) plane, Zr grown on the (111) plane of the Si substrate is
Crystal has a higher tendency to grow in the <0001> direction. Since the GaN-based semiconductor layer is usually c-axis oriented, it is needless to say that the underlying buffer layer is also preferably c-axis oriented.

The second aspect of the present invention is as follows.
A GaN-based semiconductor layer, a Si substrate, and a Zr buffer layer provided between the semiconductor layer and the substrate and having a film thickness of 0.01 to 10 μm. A semiconductor device provided.

The thickness of the Zr buffer layer is 0.01 to 1
By setting the thickness to 0 μm, the c-axis orientation can be secured at least on the upper surface (the surface on which the GaN-based semiconductor layer is formed) of the buffer layer.

When the thickness of the buffer layer is less than 0.01 μm, it is difficult to secure the c-axis orientation on the upper surface of the buffer layer. S
This is probably because the crystal structure of the i substrate has an influence. Further, it is not necessary to increase the thickness of the buffer layer to more than 10 μm. The thickness of the buffer layer is preferably 0.0
5 to 1 μm. More preferably, it is 0.3 to 1 μm.

The third aspect of the present invention is as follows.
A substrate made of Si is heated to 100 to 200 ° C., a buffer layer made of Zr is formed on the substrate, and a G layer is formed on the buffer layer.
A method of manufacturing a semiconductor element, comprising forming an aN-based semiconductor layer.

It has been found that when Zr is grown on a heated Si substrate, Zr tends to be c-axis oriented. It is considered that this is because Zr reaching the substrate moves on the surface and can move to a stable lattice position along the atom. The temperature of the Si substrate when forming the buffer layer is 100 to 200 ° C.
If the temperature is less than 100 ° C., it is difficult to obtain a c-axis oriented Zr buffer layer, and it is not necessary to raise the temperature of the Si substrate above 200 ° C. The temperature of the Si substrate when forming the buffer layer is preferably 120 to 200 ° C. When the temperature of the Si substrate is 120 ° C. or higher, the adhesion of the buffer layer to the Si substrate becomes sufficient, and the buffer layer peels from the Si substrate even if the wafer is heated to near 1000 ° C. to form a GaN-based semiconductor layer later. Or it will not come up. The temperature of the Si substrate when forming the buffer layer is more preferably 120.
~ 180 ° C.

The fourth aspect of the present invention is as follows.
A semiconductor comprising: preparing a Si substrate; forming a Zr buffer layer on the substrate; heating the buffer layer; and forming a GaN-based semiconductor layer on the buffer layer. Device manufacturing method.

By heating the buffer layer made of Zr, the tendency of the c-axis orientation of the buffer layer is promoted. It is considered that this is because atoms in the Zr film can move to stable lattice positions. In addition, in the present invention, it is preferable that the buffer layer is heated in an atmosphere substantially free of oxygen. This is because Zr, which is the material for forming the buffer layer, may react with oxygen. Heating is 400-65
The conditions of 0 ° C. and vacuum degree of 5 × 10 ⁻⁵ Torr or less are maintained for 5 minutes. More preferable heating conditions are 500 to 65.
The condition is 0 ° C. and the degree of vacuum: 2 × 10 ⁻⁵ Torr or less for 5 minutes. More preferable heating conditions are
The condition is to maintain a temperature of 560 to 620 ° C. and a degree of vacuum of 1.5 × 10 ⁻⁵ Torr or less for 5 minutes. Further, in order to improve the adhesion between the buffer layer and the substrate, an inert gas such as nitrogen gas should be filled into the heating chamber at atmospheric pressure or higher, and heating should be performed in the chamber. Is preferred.

The requirements for the buffer layer and the requirements for manufacturing the buffer layer in each aspect described above can be arbitrarily combined. In addition, the Si substrate-buffer layer-
Other layers can be interposed between the respective layers of the semiconductor layer as long as the effects of the present invention are not impaired.

When the first aspect and the fourth aspect are combined, that is, when a buffer layer made of Zr is formed on the (111) plane of the Si substrate and the buffer layer is heated, the buffer layer and the substrate are separated from each other. It is suppressed that Zr and Si react with each other at the interface to form silicide. Since it is considered that a high quality GaN-based semiconductor cannot be grown on the silicide, the buffer layer is required to have a predetermined thickness as the silicidation proceeds. Therefore, by adopting the (111) plane of the Si substrate, the silicidation can be suppressed while promoting the c-axis orientation by heating, and a buffer layer as thin as possible can be provided.

The method for forming the buffer layer is not particularly limited, and is appropriately selected according to the characteristics of the material of the substrate and the material of the buffer layer itself. For example, when forming the buffer layer with the above-mentioned metal, CVD (Chemical Vapor Depos) such as plasma CVD, thermal CVD, or photo-CVD is used.
(ion), sputtering, vapor deposition, etc. (Physical
A method such as Vapor Deposition) can be adopted.

However, when forming the buffer layer, the atmosphere should be substantially free of oxygen. This is because, if oxygen is present when forming the buffer layer, Zr, which is a forming material thereof, may react with oxygen.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. The semiconductor element of the form described below is a light emitting diode 20, and its configuration is shown in FIG.

The specifications of each semiconductor layer are as follows. Layer: Composition: dopant (film thickness) p-clad layer 25: p-GaN: Mg (0.3 μm) light-emitting layer 24: superlattice structure quantum well layer: In _0.15 Ga _0.85 N (3.5 nm) barrier layer: GaN (3.5 nm ) Repetition number of quantum well layer and barrier layer: 1 to 10 n Clad layer 23: n-GaN: Si (4 μm) Buffer layer 22: Zr (0.3 μm) Substrate 21: Si (111) (300 μm)

The n-clad layer 23 may have a two-layer structure including a low electron concentration n layer on the light emitting layer 24 side and a high electron concentration n ⁺ layer on the buffer layer 22 side. The light emitting layer 24 is not limited to a superlattice structure, and may be a single hetero type, a double hetero type, a homojunction type, or the like. A wide bandgap A doped with an acceptor such as magnesium is provided between the light emitting layer 24 and the p-clad layer 25.
An l _X In _Y Ga _1-XY N (including X = 0, Y = 0, X = Y = 0) layer can be interposed. This is to prevent the electrons injected into the light emitting layer 24 from diffusing into the p-clad layer 25. The p-clad layer 25 may have a two-layer structure including a low hole concentration p layer on the light emitting layer 24 side and a high hole concentration p ⁺ layer on the electrode 26 side.

In the above, the buffer layer 22 is formed on the (111) surface of the substrate 21 as follows. First, the substrate 21 is placed in the chamber of an industrially widely used EB vapor deposition apparatus.
And put on the Zr lump. Then, the inside of the chamber is evacuated to about 1 × 10 ⁻³ Torr or less by using a vacuum device attached to the device. After that, nitrogen gas is fed into the chamber to fill it. Such nitrogen gas purging is repeated 3 times. After that, the inside of the chamber is evacuated again to about 8 × 10 ⁻⁷ Torr, and the temperature of the substrate 21 is set to about 15 ° C.
Keep at 0 ° C. Then, Zr is deposited on the (111) surface of the substrate by the electron beam method. The deposition rate is 3 to 5 Å / sec.

In the above, purging with nitrogen gas is S
This is to prevent Zr from reacting with residual oxygen in the chamber to form ZrO _x when Zr is vapor-deposited on the i substrate 21. Therefore, an inert gas other than nitrogen gas can be used. Further, when the chamber is evacuated to such an extent that the reaction between Zr and oxygen can be prevented, such purging with nitrogen gas is unnecessary. However,
According to a study by the present inventors, the capability (vacuum degree: 10 ⁻⁷ To) of a vacuum device attached to a vapor deposition device which is currently industrially widely used.
In rr), purging with nitrogen gas was essential.

The substrate 21 on which the buffer layer 22 is formed under the above conditions is set in the heating device and mounted in another chamber. Then, the inside of the chamber is evacuated to 1.5 × 10 ⁻⁵ Torr. Then, the buffer layer 22 is adjusted to about 600 while the heating device is operated to maintain the vacuum atmosphere.
Heat to ° C and hold for 5 minutes. Then, let stand to cool.

Each GaN-based semiconductor layer on the buffer layer is formed by a well-known metalorganic chemical vapor deposition method (hereinafter referred to as "MOCVD").
Law ". ). In this growth method, ammonia gas and an alkyl compound gas of a Group 3 element,
For example, trimethylgallium (TMG), trimethylaluminum (TMA) and trimethylindium (TMI)
And are supplied onto a substrate heated to an appropriate temperature to cause a thermal decomposition reaction, and thereby a desired crystal is grown on the substrate.

The GaN-based semiconductor is a group III nitride semiconductor, and is generally Al _X In _Y Ga _1-X-Y N (X =
0, Y = 0, and X = Y = 0 are included). As is well known, the light emitting element and the light receiving element have a configuration in which the light emitting layer is sandwiched between semiconductor layers (cladding layers) of different conductivity types, and a superlattice structure, a double hetero structure, or the like is adopted for the light emitting layer.

As shown in FIG. 4, the material (Zr) of the buffer layer 22 is generated by the heat when performing this MOCVD method.
Reacts with the material (Si) of the substrate 21 to form silicide (Zr
Si ₂ ) is formed. Zr has the same crystal structure (hexagonal) as GaN and has a lattice constant close to that of GaN. Therefore, it is expected that the two layers are fused together to form the ZrN layer between the cladding layer 23 and the buffer layer 22.

The translucent electrode 26 is a thin film containing gold, and p
The clad layer 25 is laminated so as to cover substantially the entire upper surface. The p-electrode 28 is also made of a material containing gold, and is formed on the translucent electrode 26 by vapor deposition. n-electrode 27
Are attached to the substrate 21 by vapor deposition.

The element to which the present invention is applied is not limited to the above-mentioned light emitting diode, but can be applied to an optical device such as a light receiving diode and a laser diode, and also to an electronic device having an FET structure. Further, as an intermediate body of these elements, a substrate made of Si, a buffer layer made of Zr, and Ga
The present invention is also applied to a laminated body formed by sequentially laminating N-based semiconductor layers.

[0036]

[Test Example] A test example for confirming the effect of the present invention will be described below.

(Test 1) This test is mainly the third test of the present invention.
It supports the aspect of. That is, the effect of raising the temperature of the Si substrate when forming the buffer layer is confirmed. In each test example, the method for forming the buffer layer on the Si substrate is the same as the method described in the above-described embodiments, except for the conditions described in the table below. The result is a diffraction pattern obtained in the range of 2θ = (20 to 100 °) by an X-ray analyzer (model number: X-pert) manufactured by Philips (the same applies to other test examples).

[0038]                 Substrate surface Substrate temperature result   Test Example 1 (111) Room temperature FIG.   Test Example 2 (111) 150 ° C.   Test Example 3 (111) 250 ° C.   Test Example 4 (100) room temperature FIG.   Test Example 5 (100) 150 ° C.   Test Example 6 (100) 250 ° C.

FIG. 11 shows Zr (0002) of Test Examples 1 to 3.
12 is a plot of the peak intensities of FIG.
Is a plot of the peak intensities of Zr (0002) in Test Examples 4 to 6. From the results of FIGS. 11 and 12, S
It can be seen that as the temperature of the i substrate increases, the tendency of the c-axis orientation of the buffer layer increases regardless of the surface of the Si substrate.

(Test 2) Further, the inventors of the present invention conducted Test Example 2,
Each of the buffer layers 3, 5 and 6 was heated under the following conditions.

Test Example 2 Test Example 3 Test Example 5 Test Example 6 400 ° C./Vac ○ ○ ○ ○ 600 ° C./Vac ○ ○ ○ ○ 800 ° C./Vac × i × i × ii × i 800 ° C./1 atm (N ₂ ) △ ○ × i ○ Note) Vac: Vacuum (about 1.5 × 10 ^-5 Torr) 1 atm (N ₂ ): Filling the chamber at the time of heating with 1 atm of nitrogen gas ○: Buffer layer and substrate No peeling between Δ: There is no peeling between the buffer layer and the substrate, but interference color appears on the surface of the buffer layer. Xi: There is slight peeling between the buffer layer and the substrate. Xii: With the buffer layer. Complete peeling from the substrate

In Test Example 6 also, since there is substantially no separation between the buffer layer and the substrate, it is considered that there is no problem even if a GaN-based semiconductor layer is formed on this. From this, it is understood that regarding the adhesiveness, the temperature of the substrate when forming the buffer layer is preferably 250 ° C. or higher.

Further, according to the study by the present inventors, when the other conditions are the same, the Zr buffer layer formed on the (111) plane of the Si substrate is also formed on the (100) plane. It was found that it had a tendency of higher c-axis orientation. This result supports the first aspect of the invention.

(Test 3) This test is mainly the second test of the present invention.
It supports the aspect of. That is, the effect of imparting a predetermined film thickness to the buffer layer is confirmed. In each test example, the method for forming the buffer layer on the Si substrate is the same as the method described in the above-described embodiments, except for the conditions described in the table below.

[0045]                  Substrate surface film thickness result   Test Example 7 (111) 0.05 μm   Test Example 8 (111) 0.3 μm   Test Example 9 (111) 1.0 μm   Test Example 10 (100) 0.05 μm   Test Example 11 (100) 0.3 μm   Test Example 12 (100) 1.0 μm

FIG. 19 shows Zr (0002) of Test Examples 7 to 9.
20 is a plot of the peak intensities of FIG.
Is a plot of the peak intensity of Zr (0002) in Test Examples 10 to 12. From the results of FIGS. 19 and 20, it can be seen that as the thickness of the buffer layer increases, the tendency of the c-axis orientation of the buffer layer increases regardless of the surface of the Si substrate.

From the results shown in FIG. 19, (1
It can be seen that when the buffer layer is formed on the (11) plane, the dependency of the film thickness is relatively small. From this, it is understood that it is preferable to use the (111) plane of the Si substrate when forming a thin buffer layer. This result supports the first aspect of the invention.

(Test 4) This test is mainly the fourth test of the present invention.
It supports the aspect of. That is, the effect of heating the buffer layer is confirmed. In each test example, the method for forming the buffer layer on the Si substrate is the same as the method described in the above-described embodiments, except for the conditions described in the table below.

[0049]                  Substrate surface heating temperature Result   Test Example 13 (111) No heating Fig. 21   Test Example 14 (111) 400 ° C.   Test Example 15 (111) 600 ° C.   Test Example 16 (100) No heating Fig. 24   Test Example 17 (100) 400 ° C.   Test Example 18 (100) 600 ° C.

FIG. 27 shows Zr (000 in Test Examples 13 to 15).
FIG. 28 is a plot of the peak intensity of 2), and similarly, FIG. 28 is a plot of the peak intensity of Zr (0002) of Test Examples 16 to 18. From the results of FIGS. 27 and 28, it can be seen that the tendency of the c-axis orientation of the buffer layer becomes higher as the heating temperature of the buffer layer becomes higher. (11
The silicide is formed at 650 ° C. when the 1) plane is used, and at 500 ° C. when the (100) plane is used.

The present invention is not limited to the above description of the embodiments and examples of the invention, and includes various modifications that can be conceived by those skilled in the art without departing from the scope of the claims.

The following matters will be disclosed below. (12) The semiconductor element according to any one of claims 1 to 6, wherein the buffer layer is vapor-deposited on the substrate whose temperature has been raised. (13) The buffer layer is heated after being formed on the substrate.
To 6 and the semiconductor device according to any one of (12).

(14) The laminate according to any one of claims 7 to 11, wherein the buffer layer is vapor-deposited on the substrate whose temperature has been raised. (15) The buffer layer is heated after being formed on the substrate.
~ The laminated body according to any one of 9 and (14).

(21) 100-200 Si substrate
A method of manufacturing a semiconductor device, comprising heating to a temperature of ℃, forming a Zr buffer layer on the substrate, and forming a GaN-based semiconductor layer on the buffer layer. (22) Prepare a Si substrate having a (111) plane,
A method of manufacturing a semiconductor element, comprising forming a Zr buffer layer on the (111) plane of the substrate and forming a GaN-based semiconductor layer on the buffer layer. (23) A substrate made of Si is prepared, a buffer layer made of Zr is formed on the substrate, the buffer layer is heated, and a GaN-based semiconductor layer is formed on the buffer layer. And a method for manufacturing a semiconductor device. (24) A Si substrate is prepared, a Zr buffer layer is formed on the substrate to a thickness of 0.01 to 10 μm, and a GaN-based semiconductor layer is formed on the buffer layer. A method for manufacturing a semiconductor device, comprising: (25) The method of manufacturing a semiconductor device according to (21), wherein the buffer layer is formed on the (111) plane of the substrate. (26) The method of manufacturing a semiconductor element according to (21), wherein the buffer layer is further heated. (27) The buffer layer is formed so that the film thickness is 0.01 to 10 μm (21)
A method of manufacturing a semiconductor device according to item 1. (28) The method of manufacturing a semiconductor device according to (22), wherein the buffer layer is further heated. (29) The buffer layer is formed so that the film thickness is 0.01 to 10 μm (22)
A method of manufacturing a semiconductor device according to item 1. (30) The buffer layer is formed so that the film thickness is 0.01 to 10 μm (23)
A method of manufacturing a semiconductor device according to item 1. (31) The method for manufacturing a semiconductor device according to (25), wherein the buffer layer is further heated. (32) The buffer layer is formed so that the film thickness is 0.01 to 10 μm (25)
A method of manufacturing a semiconductor device according to item 1. (33) The buffer layer is formed so that the film thickness is 0.01 to 10 μm (26)
A method of manufacturing a semiconductor device according to item 1. (34) The buffer layer is formed so that the film thickness is 0.01 to 10 μm (28)
A method of manufacturing a semiconductor device according to item 1. (35) The buffer layer is formed so that the film thickness is 0.01 to 10 μm (31)
A method of manufacturing a semiconductor device according to item 1.

(36) The substrate is heated to 120 to 200 ° C. (21), (25), (2)
6) The method for manufacturing a semiconductor element according to any one of (27), (31), (32), (33) and (35). (37) The substrate is heated to 120 to 180 ° C, (21), (25), (26),
(27), (31), (32), (33) and (35)
A method for manufacturing a semiconductor device according to any one of 1. (38) The heating temperature of the buffer layer is 400 to 650.
(23), (26), (2
8) A method for manufacturing a semiconductor device according to any one of (30), (31), (33), (34) and (35). (39) The heating temperature of the buffer layer is 500 to 650.
(23), (26), (2
8) A method for manufacturing a semiconductor device according to any one of (30), (31), (33), (34) and (35). (40) The heating temperature of the buffer layer is 560 to 620.
(23), (26), (2
8) A method for manufacturing a semiconductor device according to any one of (30), (31), (33), (34) and (35). (41) The film thickness of the buffer layer is 0.05 to 1 μm, (24), (27), (2)
9) A method for manufacturing a semiconductor device according to any one of (30), (32), (33), (34) and (35). (42) The film thickness of the buffer layer is 0.3 to 1 μm (24), (27), (29),
(30), (32), (33), (34) and (35)
A method for manufacturing a semiconductor device according to any one of 1.

(50) The semiconductor device according to any one of (21) to (42), wherein the buffer layer is deposited on the substrate under an atmosphere substantially free of oxygen. Method. (51) 1 × 10 ⁻³ Torr in the chamber of the vapor deposition device
After evacuation to the following high vacuum degree, the step of filling the inside of the chamber with an inert gas is performed once or plural times, and then the inside of the chamber is 5 × 10 ⁻⁶ Torr.
The method for manufacturing a semiconductor device according to (50), wherein the following high vacuum degree is evacuated, and then the material of the buffer layer is deposited on the substrate. (52) The heating is performed in an atmosphere substantially free of oxygen (23), (2)
6), (28), (30), (31), (33), (3
4), (35) and (50) to (51) (however, (2
3), (26), (28), (30), (31), (3
3), (34) and (35) (limited to those subordinate to). (53) The heating is performed in a high vacuum atmosphere of 5 × 10 ⁻⁵ Torr or less (23),
(26), (28), (30), (31), (33),
(34), (35) and (50) to (51) (however, (23), (26), (28), (30), (31),
(Limited to those subordinate to (33), (34) and (35)). (54) The heating is performed in an atmosphere of an inert gas (23), (26), (28),
(30), (31), (33), (34), (35) and (50) to (51) (however, (23), (26),
(28), (30), (31), (33), (34) and (35) only.

(60) A GaN-based semiconductor layer, a substrate made of Si, and Z provided between the semiconductor layer and the substrate.
A method for manufacturing a laminated body including a buffer layer made of r, which has the same requirements as (21) to (54) described above.

[Brief description of drawings]

FIG. 1 is a diagram for explaining warpage of an element caused by a difference in coefficient of thermal expansion between a Si substrate and a GaN-based semiconductor layer.

FIG. 2 is a conceptual diagram of the present invention, showing stress relaxation when a buffer layer is interposed between a Si substrate and a GaN-based semiconductor layer.

FIG. 3 is a diagram showing a light emitting diode according to an embodiment of the present invention.

FIG. 4 is an enlarged view of the substrate, the buffer layer and the n-clad layer in FIG. 3, showing the reaction between the substrate-buffer layer and the buffer layer-GaN.

FIG. 5 shows a diffraction pattern of Test Example 1.

FIG. 6 shows a diffraction pattern of Test Example 2.

FIG. 7 shows a diffraction pattern of Test Example 3.

FIG. 8 shows a diffraction pattern of Test Example 4.

FIG. 9 shows a diffraction pattern of Test Example 5.

FIG. 10 shows a diffraction pattern of Test Example 6.

FIG. 11 is a graph chart in which peak intensities of Zr (0002) of Test Examples 1 to 3 are plotted.

FIG. 12 is a graph chart in which peak intensities of Zr (0002) of Test Examples 4 to 6 are plotted.

FIG. 13 shows a diffraction pattern of Test Example 7.

FIG. 14 shows a diffraction pattern of Test Example 8.

FIG. 15 shows a diffraction pattern of Test Example 9.

16 shows a diffraction pattern of Test Example 10. FIG.

FIG. 17 shows a diffraction pattern of Test Example 11.

FIG. 18 shows a diffraction pattern of Test Example 12.

FIG. 19 is a graph chart in which peak intensities of Zr (0002) of Test Examples 7 to 9 are plotted.

FIG. 20 shows Zr (000 in Test Examples 10 to 12).
It is the graph which plotted the peak intensity of 2).

FIG. 21 shows a diffraction pattern of Test Example 13.

FIG. 22 shows a diffraction pattern of Test Example 14.

FIG. 23 shows a diffraction pattern of Test Example 15.

FIG. 24 shows a diffraction pattern of Test Example 16.

FIG. 25 shows a diffraction pattern of Test Example 17.

FIG. 26 shows a diffraction pattern of Test Example 19.

FIG. 27 shows Zr (000 in Test Examples 13 to 15).
It is the graph which plotted the peak intensity of 2).

FIG. 28 shows Zr (000 in Test Examples 16 to 18).
It is the graph which plotted the peak intensity of 2).

[Explanation of symbols]

1, 11, 21 substrate 12,22 Buffer layer 3, 13, 23, 24, 25 GaN-based semiconductor layer 20 Semiconductor light emitting device

─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shizuyo Nogyo 1 Ochiai, Nagahata, Ojiai, Kasuga-cho, Nishikasugai-gun, Aichi Prefecture (56) Reference: Japanese Patent Laid-Open No. 10-321954 (JP, A) (58) ) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 33/00 H01L 31/10 H01S 5/00-5/50 C03B 23/00-25/22 H01L 21/205

Claims (11)

(57) [Claims] 1. A GaN-based semiconductor layer, a Si substrate, and a c-axis oriented layer provided between the semiconductor layer and the substrate.
A Zr buffer layer , the buffer layer being formed on the (111) plane of the substrate. 2. A GaN-based semiconductor layer, a Si substrate, and a c-axis oriented layer provided between the semiconductor layer and the substrate.
The Zr buffer layer has a thickness of 0.01 to 10
A semiconductor device comprising a buffer layer having a thickness of μm. 3. The buffer layer has a thickness of 0.05 to 1 μm.
The semiconductor element according to claim 2, wherein m is m. 4. The semiconductor device according to claim 2, wherein the buffer layer is formed on the (111) plane of the substrate. 5. A GaN-based semiconductor layer, a Si substrate, and a c-axis oriented layer provided between the semiconductor layer and the substrate.
And a Zr buffer layer . 6. The semiconductor device according to claim 1, wherein the semiconductor device is a light emitting device or a light receiving device. 7. A GaN-based semiconductor layer, a Si substrate, and a c-axis orientation provided between the semiconductor layer and the substrate .
A stack comprising a Zr buffer layer , which is formed on the (111) plane of the substrate. 8. A GaN-based semiconductor layer, a Si substrate, and a c-axis oriented layer provided between the semiconductor layer and the substrate.
The Zr buffer layer has a thickness of 0.01 to 10
and a buffer layer having a thickness of μm. 9. The buffer layer has a thickness of 0.05 to 1 μm.
It is m, The laminated body of Claim 8 characterized by the above-mentioned. 10. The laminate according to claim 8, wherein the buffer layer is formed on the (111) plane of the substrate. 11. A GaN-based semiconductor layer, a Si substrate, and a c-axis orientation provided between the semiconductor layer and the substrate .
And a Zr buffer layer .